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-rw-r--r--arch/arm/boot/dts/dove.dtsi487
1 files changed, 248 insertions, 239 deletions
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 113a8bc7bee7..187fd46b7b5e 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -107,51 +107,29 @@
107 0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */ 107 0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */
108 0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */ 108 0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */
109 109
110 mbusc: mbus-ctrl@20000 { 110 spi0: spi-ctrl@10600 {
111 compatible = "marvell,mbus-controller"; 111 compatible = "marvell,orion-spi";
112 reg = <0x20000 0x80>, <0x800100 0x8>; 112 #address-cells = <1>;
113 }; 113 #size-cells = <0>;
114 114 cell-index = <0>;
115 timer: timer@20300 { 115 interrupts = <6>;
116 compatible = "marvell,orion-timer"; 116 reg = <0x10600 0x28>;
117 reg = <0x20300 0x20>;
118 interrupt-parent = <&bridge_intc>;
119 interrupts = <1>, <2>;
120 clocks = <&core_clk 0>; 117 clocks = <&core_clk 0>;
118 pinctrl-0 = <&pmx_spi0>;
119 pinctrl-names = "default";
120 status = "disabled";
121 }; 121 };
122 122
123 intc: main-interrupt-ctrl@20200 { 123 i2c0: i2c-ctrl@11000 {
124 compatible = "marvell,orion-intc"; 124 compatible = "marvell,mv64xxx-i2c";
125 interrupt-controller; 125 reg = <0x11000 0x20>;
126 #interrupt-cells = <1>; 126 #address-cells = <1>;
127 reg = <0x20200 0x10>, <0x20210 0x10>; 127 #size-cells = <0>;
128 }; 128 interrupts = <11>;
129 129 clock-frequency = <400000>;
130 bridge_intc: bridge-interrupt-ctrl@20110 { 130 timeout-ms = <1000>;
131 compatible = "marvell,orion-bridge-intc";
132 interrupt-controller;
133 #interrupt-cells = <1>;
134 reg = <0x20110 0x8>;
135 interrupts = <0>;
136 marvell,#interrupts = <5>;
137 };
138
139 core_clk: core-clocks@d0214 {
140 compatible = "marvell,dove-core-clock";
141 reg = <0xd0214 0x4>;
142 #clock-cells = <1>;
143 };
144
145 gate_clk: clock-gating-ctrl@d0038 {
146 compatible = "marvell,dove-gating-clock";
147 reg = <0xd0038 0x4>;
148 clocks = <&core_clk 0>; 131 clocks = <&core_clk 0>;
149 #clock-cells = <1>; 132 status = "disabled";
150 };
151
152 thermal: thermal-diode@d001c {
153 compatible = "marvell,dove-thermal";
154 reg = <0xd001c 0x0c>, <0xd005c 0x08>;
155 }; 133 };
156 134
157 uart0: serial@12000 { 135 uart0: serial@12000 {
@@ -192,34 +170,213 @@
192 status = "disabled"; 170 status = "disabled";
193 }; 171 };
194 172
195 gpio0: gpio-ctrl@d0400 { 173 spi1: spi-ctrl@14600 {
196 compatible = "marvell,orion-gpio"; 174 compatible = "marvell,orion-spi";
197 #gpio-cells = <2>; 175 #address-cells = <1>;
198 gpio-controller; 176 #size-cells = <0>;
199 reg = <0xd0400 0x20>; 177 cell-index = <1>;
200 ngpios = <32>; 178 interrupts = <5>;
179 reg = <0x14600 0x28>;
180 clocks = <&core_clk 0>;
181 status = "disabled";
182 };
183
184 mbusc: mbus-ctrl@20000 {
185 compatible = "marvell,mbus-controller";
186 reg = <0x20000 0x80>, <0x800100 0x8>;
187 };
188
189 bridge_intc: bridge-interrupt-ctrl@20110 {
190 compatible = "marvell,orion-bridge-intc";
201 interrupt-controller; 191 interrupt-controller;
202 #interrupt-cells = <2>; 192 #interrupt-cells = <1>;
203 interrupts = <12>, <13>, <14>, <60>; 193 reg = <0x20110 0x8>;
194 interrupts = <0>;
195 marvell,#interrupts = <5>;
204 }; 196 };
205 197
206 gpio1: gpio-ctrl@d0420 { 198 intc: main-interrupt-ctrl@20200 {
207 compatible = "marvell,orion-gpio"; 199 compatible = "marvell,orion-intc";
208 #gpio-cells = <2>;
209 gpio-controller;
210 reg = <0xd0420 0x20>;
211 ngpios = <32>;
212 interrupt-controller; 200 interrupt-controller;
213 #interrupt-cells = <2>; 201 #interrupt-cells = <1>;
214 interrupts = <61>; 202 reg = <0x20200 0x10>, <0x20210 0x10>;
215 }; 203 };
216 204
217 gpio2: gpio-ctrl@e8400 { 205 timer: timer@20300 {
218 compatible = "marvell,orion-gpio"; 206 compatible = "marvell,orion-timer";
219 #gpio-cells = <2>; 207 reg = <0x20300 0x20>;
220 gpio-controller; 208 interrupt-parent = <&bridge_intc>;
221 reg = <0xe8400 0x0c>; 209 interrupts = <1>, <2>;
222 ngpios = <8>; 210 clocks = <&core_clk 0>;
211 };
212
213 crypto: crypto-engine@30000 {
214 compatible = "marvell,orion-crypto";
215 reg = <0x30000 0x10000>,
216 <0xffffe000 0x800>;
217 reg-names = "regs", "sram";
218 interrupts = <31>;
219 clocks = <&gate_clk 15>;
220 status = "okay";
221 };
222
223 ehci0: usb-host@50000 {
224 compatible = "marvell,orion-ehci";
225 reg = <0x50000 0x1000>;
226 interrupts = <24>;
227 clocks = <&gate_clk 0>;
228 status = "okay";
229 };
230
231 ehci1: usb-host@51000 {
232 compatible = "marvell,orion-ehci";
233 reg = <0x51000 0x1000>;
234 interrupts = <25>;
235 clocks = <&gate_clk 1>;
236 status = "okay";
237 };
238
239 xor0: dma-engine@60800 {
240 compatible = "marvell,orion-xor";
241 reg = <0x60800 0x100
242 0x60a00 0x100>;
243 clocks = <&gate_clk 23>;
244 status = "okay";
245
246 channel0 {
247 interrupts = <39>;
248 dmacap,memcpy;
249 dmacap,xor;
250 };
251
252 channel1 {
253 interrupts = <40>;
254 dmacap,memcpy;
255 dmacap,xor;
256 };
257 };
258
259 xor1: dma-engine@60900 {
260 compatible = "marvell,orion-xor";
261 reg = <0x60900 0x100
262 0x60b00 0x100>;
263 clocks = <&gate_clk 24>;
264 status = "okay";
265
266 channel0 {
267 interrupts = <42>;
268 dmacap,memcpy;
269 dmacap,xor;
270 };
271
272 channel1 {
273 interrupts = <43>;
274 dmacap,memcpy;
275 dmacap,xor;
276 };
277 };
278
279 sdio1: sdio-host@90000 {
280 compatible = "marvell,dove-sdhci";
281 reg = <0x90000 0x100>;
282 interrupts = <36>, <38>;
283 clocks = <&gate_clk 9>;
284 pinctrl-0 = <&pmx_sdio1>;
285 pinctrl-names = "default";
286 status = "disabled";
287 };
288
289 eth: ethernet-ctrl@72000 {
290 compatible = "marvell,orion-eth";
291 #address-cells = <1>;
292 #size-cells = <0>;
293 reg = <0x72000 0x4000>;
294 clocks = <&gate_clk 2>;
295 marvell,tx-checksum-limit = <1600>;
296 status = "disabled";
297
298 ethernet-port@0 {
299 compatible = "marvell,orion-eth-port";
300 reg = <0>;
301 interrupts = <29>;
302 /* overwrite MAC address in bootloader */
303 local-mac-address = [00 00 00 00 00 00];
304 phy-handle = <&ethphy>;
305 };
306 };
307
308 mdio: mdio-bus@72004 {
309 compatible = "marvell,orion-mdio";
310 #address-cells = <1>;
311 #size-cells = <0>;
312 reg = <0x72004 0x84>;
313 interrupts = <30>;
314 clocks = <&gate_clk 2>;
315 status = "disabled";
316
317 ethphy: ethernet-phy {
318 /* set phy address in board file */
319 };
320 };
321
322 sdio0: sdio-host@92000 {
323 compatible = "marvell,dove-sdhci";
324 reg = <0x92000 0x100>;
325 interrupts = <35>, <37>;
326 clocks = <&gate_clk 8>;
327 pinctrl-0 = <&pmx_sdio0>;
328 pinctrl-names = "default";
329 status = "disabled";
330 };
331
332 sata0: sata-host@a0000 {
333 compatible = "marvell,orion-sata";
334 reg = <0xa0000 0x2400>;
335 interrupts = <62>;
336 clocks = <&gate_clk 3>;
337 phys = <&sata_phy0>;
338 phy-names = "port0";
339 nr-ports = <1>;
340 status = "disabled";
341 };
342
343 sata_phy0: sata-phy@a2000 {
344 compatible = "marvell,mvebu-sata-phy";
345 reg = <0xa2000 0x0334>;
346 clocks = <&gate_clk 3>;
347 clock-names = "sata";
348 #phy-cells = <0>;
349 status = "ok";
350 };
351
352 audio0: audio-controller@b0000 {
353 compatible = "marvell,dove-audio";
354 reg = <0xb0000 0x2210>;
355 interrupts = <19>, <20>;
356 clocks = <&gate_clk 12>;
357 clock-names = "internal";
358 status = "disabled";
359 };
360
361 audio1: audio-controller@b4000 {
362 compatible = "marvell,dove-audio";
363 reg = <0xb4000 0x2210>;
364 interrupts = <21>, <22>;
365 clocks = <&gate_clk 13>;
366 clock-names = "internal";
367 status = "disabled";
368 };
369
370 thermal: thermal-diode@d001c {
371 compatible = "marvell,dove-thermal";
372 reg = <0xd001c 0x0c>, <0xd005c 0x08>;
373 };
374
375 gate_clk: clock-gating-ctrl@d0038 {
376 compatible = "marvell,dove-gating-clock";
377 reg = <0xd0038 0x4>;
378 clocks = <&core_clk 0>;
379 #clock-cells = <1>;
223 }; 380 };
224 381
225 pinctrl: pin-ctrl@d0200 { 382 pinctrl: pin-ctrl@d0200 {
@@ -413,85 +570,32 @@
413 }; 570 };
414 }; 571 };
415 572
416 spi0: spi-ctrl@10600 { 573 core_clk: core-clocks@d0214 {
417 compatible = "marvell,orion-spi"; 574 compatible = "marvell,dove-core-clock";
418 #address-cells = <1>; 575 reg = <0xd0214 0x4>;
419 #size-cells = <0>; 576 #clock-cells = <1>;
420 cell-index = <0>;
421 interrupts = <6>;
422 reg = <0x10600 0x28>;
423 clocks = <&core_clk 0>;
424 pinctrl-0 = <&pmx_spi0>;
425 pinctrl-names = "default";
426 status = "disabled";
427 };
428
429 spi1: spi-ctrl@14600 {
430 compatible = "marvell,orion-spi";
431 #address-cells = <1>;
432 #size-cells = <0>;
433 cell-index = <1>;
434 interrupts = <5>;
435 reg = <0x14600 0x28>;
436 clocks = <&core_clk 0>;
437 status = "disabled";
438 };
439
440 i2c0: i2c-ctrl@11000 {
441 compatible = "marvell,mv64xxx-i2c";
442 reg = <0x11000 0x20>;
443 #address-cells = <1>;
444 #size-cells = <0>;
445 interrupts = <11>;
446 clock-frequency = <400000>;
447 timeout-ms = <1000>;
448 clocks = <&core_clk 0>;
449 status = "disabled";
450 };
451
452 ehci0: usb-host@50000 {
453 compatible = "marvell,orion-ehci";
454 reg = <0x50000 0x1000>;
455 interrupts = <24>;
456 clocks = <&gate_clk 0>;
457 status = "okay";
458 };
459
460 ehci1: usb-host@51000 {
461 compatible = "marvell,orion-ehci";
462 reg = <0x51000 0x1000>;
463 interrupts = <25>;
464 clocks = <&gate_clk 1>;
465 status = "okay";
466 };
467
468 sdio0: sdio-host@92000 {
469 compatible = "marvell,dove-sdhci";
470 reg = <0x92000 0x100>;
471 interrupts = <35>, <37>;
472 clocks = <&gate_clk 8>;
473 pinctrl-0 = <&pmx_sdio0>;
474 pinctrl-names = "default";
475 status = "disabled";
476 }; 577 };
477 578
478 sdio1: sdio-host@90000 { 579 gpio0: gpio-ctrl@d0400 {
479 compatible = "marvell,dove-sdhci"; 580 compatible = "marvell,orion-gpio";
480 reg = <0x90000 0x100>; 581 #gpio-cells = <2>;
481 interrupts = <36>, <38>; 582 gpio-controller;
482 clocks = <&gate_clk 9>; 583 reg = <0xd0400 0x20>;
483 pinctrl-0 = <&pmx_sdio1>; 584 ngpios = <32>;
484 pinctrl-names = "default"; 585 interrupt-controller;
485 status = "disabled"; 586 #interrupt-cells = <2>;
587 interrupts = <12>, <13>, <14>, <60>;
486 }; 588 };
487 589
488 sata0: sata-host@a0000 { 590 gpio1: gpio-ctrl@d0420 {
489 compatible = "marvell,orion-sata"; 591 compatible = "marvell,orion-gpio";
490 reg = <0xa0000 0x2400>; 592 #gpio-cells = <2>;
491 interrupts = <62>; 593 gpio-controller;
492 clocks = <&gate_clk 3>; 594 reg = <0xd0420 0x20>;
493 nr-ports = <1>; 595 ngpios = <32>;
494 status = "disabled"; 596 interrupt-controller;
597 #interrupt-cells = <2>;
598 interrupts = <61>;
495 }; 599 };
496 600
497 rtc: real-time-clock@d8500 { 601 rtc: real-time-clock@d8500 {
@@ -499,107 +603,12 @@
499 reg = <0xd8500 0x20>; 603 reg = <0xd8500 0x20>;
500 }; 604 };
501 605
502 crypto: crypto-engine@30000 { 606 gpio2: gpio-ctrl@e8400 {
503 compatible = "marvell,orion-crypto"; 607 compatible = "marvell,orion-gpio";
504 reg = <0x30000 0x10000>, 608 #gpio-cells = <2>;
505 <0xffffe000 0x800>; 609 gpio-controller;
506 reg-names = "regs", "sram"; 610 reg = <0xe8400 0x0c>;
507 interrupts = <31>; 611 ngpios = <8>;
508 clocks = <&gate_clk 15>;
509 status = "okay";
510 };
511
512 xor0: dma-engine@60800 {
513 compatible = "marvell,orion-xor";
514 reg = <0x60800 0x100
515 0x60a00 0x100>;
516 clocks = <&gate_clk 23>;
517 status = "okay";
518
519 channel0 {
520 interrupts = <39>;
521 dmacap,memcpy;
522 dmacap,xor;
523 };
524
525 channel1 {
526 interrupts = <40>;
527 dmacap,memcpy;
528 dmacap,xor;
529 };
530 };
531
532 xor1: dma-engine@60900 {
533 compatible = "marvell,orion-xor";
534 reg = <0x60900 0x100
535 0x60b00 0x100>;
536 clocks = <&gate_clk 24>;
537 status = "okay";
538
539 channel0 {
540 interrupts = <42>;
541 dmacap,memcpy;
542 dmacap,xor;
543 };
544
545 channel1 {
546 interrupts = <43>;
547 dmacap,memcpy;
548 dmacap,xor;
549 };
550 };
551
552 mdio: mdio-bus@72004 {
553 compatible = "marvell,orion-mdio";
554 #address-cells = <1>;
555 #size-cells = <0>;
556 reg = <0x72004 0x84>;
557 interrupts = <30>;
558 clocks = <&gate_clk 2>;
559 status = "disabled";
560
561 ethphy: ethernet-phy {
562 device-type = "ethernet-phy";
563 /* set phy address in board file */
564 };
565 };
566
567 eth: ethernet-ctrl@72000 {
568 compatible = "marvell,orion-eth";
569 #address-cells = <1>;
570 #size-cells = <0>;
571 reg = <0x72000 0x4000>;
572 clocks = <&gate_clk 2>;
573 marvell,tx-checksum-limit = <1600>;
574 status = "disabled";
575
576 ethernet-port@0 {
577 device_type = "network";
578 compatible = "marvell,orion-eth-port";
579 reg = <0>;
580 interrupts = <29>;
581 /* overwrite MAC address in bootloader */
582 local-mac-address = [00 00 00 00 00 00];
583 phy-handle = <&ethphy>;
584 };
585 };
586
587 audio0: audio-controller@b0000 {
588 compatible = "marvell,dove-audio";
589 reg = <0xb0000 0x2210>;
590 interrupts = <19>, <20>;
591 clocks = <&gate_clk 12>;
592 clock-names = "internal";
593 status = "disabled";
594 };
595
596 audio1: audio-controller@b4000 {
597 compatible = "marvell,dove-audio";
598 reg = <0xb4000 0x2210>;
599 interrupts = <21>, <22>;
600 clocks = <&gate_clk 13>;
601 clock-names = "internal";
602 status = "disabled";
603 }; 612 };
604 }; 613 };
605 }; 614 };
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-07 20:17:28 -0500