diff options
Diffstat (limited to 'arch/arm/boot/dts/db8500.dtsi')
-rw-r--r-- | arch/arm/boot/dts/db8500.dtsi | 275 |
1 files changed, 275 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi new file mode 100644 index 000000000000..d73dce645667 --- /dev/null +++ b/arch/arm/boot/dts/db8500.dtsi | |||
@@ -0,0 +1,275 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Linaro Ltd | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /include/ "skeleton.dtsi" | ||
13 | |||
14 | / { | ||
15 | soc-u9500 { | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | compatible = "stericsson,db8500"; | ||
19 | interrupt-parent = <&intc>; | ||
20 | ranges; | ||
21 | |||
22 | intc: interrupt-controller@a0411000 { | ||
23 | compatible = "arm,cortex-a9-gic"; | ||
24 | #interrupt-cells = <3>; | ||
25 | #address-cells = <1>; | ||
26 | interrupt-controller; | ||
27 | interrupt-parent; | ||
28 | reg = <0xa0411000 0x1000>, | ||
29 | <0xa0410100 0x100>; | ||
30 | }; | ||
31 | |||
32 | L2: l2-cache { | ||
33 | compatible = "arm,pl310-cache"; | ||
34 | reg = <0xa0412000 0x1000>; | ||
35 | interrupts = <0 13 4>; | ||
36 | cache-unified; | ||
37 | cache-level = <2>; | ||
38 | }; | ||
39 | |||
40 | pmu { | ||
41 | compatible = "arm,cortex-a9-pmu"; | ||
42 | interrupts = <0 7 0x4>; | ||
43 | }; | ||
44 | |||
45 | timer@a0410600 { | ||
46 | compatible = "arm,cortex-a9-twd-timer"; | ||
47 | reg = <0xa0410600 0x20>; | ||
48 | interrupts = <1 13 0x304>; | ||
49 | }; | ||
50 | |||
51 | rtc@80154000 { | ||
52 | compatible = "stericsson,db8500-rtc"; | ||
53 | reg = <0x80154000 0x1000>; | ||
54 | interrupts = <0 18 0x4>; | ||
55 | }; | ||
56 | |||
57 | gpio0: gpio@8012e000 { | ||
58 | compatible = "stericsson,db8500-gpio", | ||
59 | "stmicroelectronics,nomadik-gpio"; | ||
60 | reg = <0x8012e000 0x80>; | ||
61 | interrupts = <0 119 0x4>; | ||
62 | supports-sleepmode; | ||
63 | gpio-controller; | ||
64 | }; | ||
65 | |||
66 | gpio1: gpio@8012e080 { | ||
67 | compatible = "stericsson,db8500-gpio", | ||
68 | "stmicroelectronics,nomadik-gpio"; | ||
69 | reg = <0x8012e080 0x80>; | ||
70 | interrupts = <0 120 0x4>; | ||
71 | supports-sleepmode; | ||
72 | gpio-controller; | ||
73 | }; | ||
74 | |||
75 | gpio2: gpio@8000e000 { | ||
76 | compatible = "stericsson,db8500-gpio", | ||
77 | "stmicroelectronics,nomadik-gpio"; | ||
78 | reg = <0x8000e000 0x80>; | ||
79 | interrupts = <0 121 0x4>; | ||
80 | supports-sleepmode; | ||
81 | gpio-controller; | ||
82 | }; | ||
83 | |||
84 | gpio3: gpio@8000e080 { | ||
85 | compatible = "stericsson,db8500-gpio", | ||
86 | "stmicroelectronics,nomadik-gpio"; | ||
87 | reg = <0x8000e080 0x80>; | ||
88 | interrupts = <0 122 0x4>; | ||
89 | supports-sleepmode; | ||
90 | gpio-controller; | ||
91 | }; | ||
92 | |||
93 | gpio4: gpio@8000e100 { | ||
94 | compatible = "stericsson,db8500-gpio", | ||
95 | "stmicroelectronics,nomadik-gpio"; | ||
96 | reg = <0x8000e100 0x80>; | ||
97 | interrupts = <0 123 0x4>; | ||
98 | supports-sleepmode; | ||
99 | gpio-controller; | ||
100 | }; | ||
101 | |||
102 | gpio5: gpio@8000e180 { | ||
103 | compatible = "stericsson,db8500-gpio", | ||
104 | "stmicroelectronics,nomadik-gpio"; | ||
105 | reg = <0x8000e180 0x80>; | ||
106 | interrupts = <0 124 0x4>; | ||
107 | supports-sleepmode; | ||
108 | gpio-controller; | ||
109 | }; | ||
110 | |||
111 | gpio6: gpio@8011e000 { | ||
112 | compatible = "stericsson,db8500-gpio", | ||
113 | "stmicroelectronics,nomadik-gpio"; | ||
114 | reg = <0x8011e000 0x80>; | ||
115 | interrupts = <0 125 0x4>; | ||
116 | supports-sleepmode; | ||
117 | gpio-controller; | ||
118 | }; | ||
119 | |||
120 | gpio7: gpio@8011e080 { | ||
121 | compatible = "stericsson,db8500-gpio", | ||
122 | "stmicroelectronics,nomadik-gpio"; | ||
123 | reg = <0x8011e080 0x80>; | ||
124 | interrupts = <0 126 0x4>; | ||
125 | supports-sleepmode; | ||
126 | gpio-controller; | ||
127 | }; | ||
128 | |||
129 | gpio8: gpio@a03fe000 { | ||
130 | compatible = "stericsson,db8500-gpio", | ||
131 | "stmicroelectronics,nomadik-gpio"; | ||
132 | reg = <0xa03fe000 0x80>; | ||
133 | interrupts = <0 127 0x4>; | ||
134 | supports-sleepmode; | ||
135 | gpio-controller; | ||
136 | }; | ||
137 | |||
138 | usb@a03e0000 { | ||
139 | compatible = "stericsson,db8500-musb", | ||
140 | "mentor,musb"; | ||
141 | reg = <0xa03e0000 0x10000>; | ||
142 | interrupts = <0 23 0x4>; | ||
143 | }; | ||
144 | |||
145 | dma-controller@801C0000 { | ||
146 | compatible = "stericsson,db8500-dma40", | ||
147 | "stericsson,dma40"; | ||
148 | reg = <0x801C0000 0x1000 0x40010000 0x800>; | ||
149 | interrupts = <0 25 0x4>; | ||
150 | }; | ||
151 | |||
152 | prcmu@80157000 { | ||
153 | compatible = "stericsson,db8500-prcmu"; | ||
154 | reg = <0x80157000 0x1000>; | ||
155 | interrupts = <46 47>; | ||
156 | #address-cells = <1>; | ||
157 | #size-cells = <0>; | ||
158 | |||
159 | ab8500@5 { | ||
160 | compatible = "stericsson,ab8500"; | ||
161 | reg = <5>; /* mailbox 5 is i2c */ | ||
162 | interrupts = <0 40 0x4>; | ||
163 | }; | ||
164 | }; | ||
165 | |||
166 | i2c@80004000 { | ||
167 | compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c"; | ||
168 | reg = <0x80004000 0x1000>; | ||
169 | interrupts = <0 21 0x4>; | ||
170 | #address-cells = <1>; | ||
171 | #size-cells = <0>; | ||
172 | }; | ||
173 | |||
174 | i2c@80122000 { | ||
175 | compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c"; | ||
176 | reg = <0x80122000 0x1000>; | ||
177 | interrupts = <0 22 0x4>; | ||
178 | #address-cells = <1>; | ||
179 | #size-cells = <0>; | ||
180 | }; | ||
181 | |||
182 | i2c@80128000 { | ||
183 | compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c"; | ||
184 | reg = <0x80128000 0x1000>; | ||
185 | interrupts = <0 55 0x4>; | ||
186 | #address-cells = <1>; | ||
187 | #size-cells = <0>; | ||
188 | }; | ||
189 | |||
190 | i2c@80110000 { | ||
191 | compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c"; | ||
192 | reg = <0x80110000 0x1000>; | ||
193 | interrupts = <0 12 0x4>; | ||
194 | #address-cells = <1>; | ||
195 | #size-cells = <0>; | ||
196 | }; | ||
197 | |||
198 | i2c@8012a000 { | ||
199 | compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c"; | ||
200 | reg = <0x8012a000 0x1000>; | ||
201 | interrupts = <0 51 0x4>; | ||
202 | #address-cells = <1>; | ||
203 | #size-cells = <0>; | ||
204 | }; | ||
205 | |||
206 | ssp@80002000 { | ||
207 | compatible = "arm,pl022", "arm,primecell"; | ||
208 | reg = <80002000 0x1000>; | ||
209 | interrupts = <0 14 0x4>; | ||
210 | #address-cells = <1>; | ||
211 | #size-cells = <0>; | ||
212 | status = "disabled"; | ||
213 | |||
214 | // Add one of these for each child device | ||
215 | cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>; | ||
216 | |||
217 | }; | ||
218 | |||
219 | uart@80120000 { | ||
220 | compatible = "arm,pl011", "arm,primecell"; | ||
221 | reg = <0x80120000 0x1000>; | ||
222 | interrupts = <0 11 0x4>; | ||
223 | status = "disabled"; | ||
224 | }; | ||
225 | uart@80121000 { | ||
226 | compatible = "arm,pl011", "arm,primecell"; | ||
227 | reg = <0x80121000 0x1000>; | ||
228 | interrupts = <0 19 0x4>; | ||
229 | status = "disabled"; | ||
230 | }; | ||
231 | uart@80007000 { | ||
232 | compatible = "arm,pl011", "arm,primecell"; | ||
233 | reg = <0x80007000 0x1000>; | ||
234 | interrupts = <0 26 0x4>; | ||
235 | status = "disabled"; | ||
236 | }; | ||
237 | |||
238 | sdi@80126000 { | ||
239 | compatible = "arm,pl18x", "arm,primecell"; | ||
240 | reg = <0x80126000 0x1000>; | ||
241 | interrupts = <0 60 0x4>; | ||
242 | status = "disabled"; | ||
243 | }; | ||
244 | sdi@80118000 { | ||
245 | compatible = "arm,pl18x", "arm,primecell"; | ||
246 | reg = <0x80118000 0x1000>; | ||
247 | interrupts = <0 50 0x4>; | ||
248 | status = "disabled"; | ||
249 | }; | ||
250 | sdi@80005000 { | ||
251 | compatible = "arm,pl18x", "arm,primecell"; | ||
252 | reg = <0x80005000 0x1000>; | ||
253 | interrupts = <0 41 0x4>; | ||
254 | status = "disabled"; | ||
255 | }; | ||
256 | sdi@80119000 { | ||
257 | compatible = "arm,pl18x", "arm,primecell"; | ||
258 | reg = <0x80119000 0x1000>; | ||
259 | interrupts = <0 59 0x4>; | ||
260 | status = "disabled"; | ||
261 | }; | ||
262 | sdi@80114000 { | ||
263 | compatible = "arm,pl18x", "arm,primecell"; | ||
264 | reg = <0x80114000 0x1000>; | ||
265 | interrupts = <0 99 0x4>; | ||
266 | status = "disabled"; | ||
267 | }; | ||
268 | sdi@80008000 { | ||
269 | compatible = "arm,pl18x", "arm,primecell"; | ||
270 | reg = <0x80114000 0x1000>; | ||
271 | interrupts = <0 100 0x4>; | ||
272 | status = "disabled"; | ||
273 | }; | ||
274 | }; | ||
275 | }; | ||