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-rw-r--r--arch/arm/boot/dts/berlin2q.dtsi80
1 files changed, 80 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 635a16a64cb4..400c40fceccc 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -18,6 +18,7 @@
18 cpus { 18 cpus {
19 #address-cells = <1>; 19 #address-cells = <1>;
20 #size-cells = <0>; 20 #size-cells = <0>;
21 enable-method = "marvell,berlin-smp";
21 22
22 cpu@0 { 23 cpu@0 {
23 compatible = "arm,cortex-a9"; 24 compatible = "arm,cortex-a9";
@@ -90,6 +91,8 @@
90 compatible = "arm,pl310-cache"; 91 compatible = "arm,pl310-cache";
91 reg = <0xac0000 0x1000>; 92 reg = <0xac0000 0x1000>;
92 cache-level = <2>; 93 cache-level = <2>;
94 arm,data-latency = <2 2 2>;
95 arm,tag-latency = <2 2 2>;
93 }; 96 };
94 97
95 scu: snoop-control-unit@ad0000 { 98 scu: snoop-control-unit@ad0000 {
@@ -111,6 +114,11 @@
111 #interrupt-cells = <3>; 114 #interrupt-cells = <3>;
112 }; 115 };
113 116
117 cpu-ctrl@dd0000 {
118 compatible = "marvell,berlin-cpu-ctrl";
119 reg = <0xdd0000 0x10000>;
120 };
121
114 apb@e80000 { 122 apb@e80000 {
115 compatible = "simple-bus"; 123 compatible = "simple-bus";
116 #address-cells = <1>; 124 #address-cells = <1>;
@@ -191,6 +199,32 @@
191 }; 199 };
192 }; 200 };
193 201
202 i2c0: i2c@1400 {
203 compatible = "snps,designware-i2c";
204 #address-cells = <1>;
205 #size-cells = <0>;
206 reg = <0x1400 0x100>;
207 interrupt-parent = <&aic>;
208 interrupts = <4>;
209 clocks = <&chip CLKID_CFG>;
210 pinctrl-0 = <&twsi0_pmux>;
211 pinctrl-names = "default";
212 status = "disabled";
213 };
214
215 i2c1: i2c@1800 {
216 compatible = "snps,designware-i2c";
217 #address-cells = <1>;
218 #size-cells = <0>;
219 reg = <0x1800 0x100>;
220 interrupt-parent = <&aic>;
221 interrupts = <5>;
222 clocks = <&chip CLKID_CFG>;
223 pinctrl-0 = <&twsi1_pmux>;
224 pinctrl-names = "default";
225 status = "disabled";
226 };
227
194 timer0: timer@2c00 { 228 timer0: timer@2c00 {
195 compatible = "snps,dw-apb-timer"; 229 compatible = "snps,dw-apb-timer";
196 reg = <0x2c00 0x14>; 230 reg = <0x2c00 0x14>;
@@ -301,6 +335,16 @@
301 reg = <0xea0000 0x400>, <0xdd0170 0x10>; 335 reg = <0xea0000 0x400>, <0xdd0170 0x10>;
302 clocks = <&refclk>; 336 clocks = <&refclk>;
303 clock-names = "refclk"; 337 clock-names = "refclk";
338
339 twsi0_pmux: twsi0-pmux {
340 groups = "G6";
341 function = "twsi0";
342 };
343
344 twsi1_pmux: twsi1-pmux {
345 groups = "G7";
346 function = "twsi1";
347 };
304 }; 348 };
305 349
306 apb@fc0000 { 350 apb@fc0000 {
@@ -311,6 +355,32 @@
311 ranges = <0 0xfc0000 0x10000>; 355 ranges = <0 0xfc0000 0x10000>;
312 interrupt-parent = <&sic>; 356 interrupt-parent = <&sic>;
313 357
358 i2c2: i2c@7000 {
359 compatible = "snps,designware-i2c";
360 #address-cells = <1>;
361 #size-cells = <0>;
362 reg = <0x7000 0x100>;
363 interrupt-parent = <&sic>;
364 interrupts = <6>;
365 clocks = <&refclk>;
366 pinctrl-0 = <&twsi2_pmux>;
367 pinctrl-names = "default";
368 status = "disabled";
369 };
370
371 i2c3: i2c@8000 {
372 compatible = "snps,designware-i2c";
373 #address-cells = <1>;
374 #size-cells = <0>;
375 reg = <0x8000 0x100>;
376 interrupt-parent = <&sic>;
377 interrupts = <7>;
378 clocks = <&refclk>;
379 pinctrl-0 = <&twsi3_pmux>;
380 pinctrl-names = "default";
381 status = "disabled";
382 };
383
314 uart0: uart@9000 { 384 uart0: uart@9000 {
315 compatible = "snps,dw-apb-uart"; 385 compatible = "snps,dw-apb-uart";
316 reg = <0x9000 0x100>; 386 reg = <0x9000 0x100>;
@@ -348,6 +418,16 @@
348 groups = "GSM14"; 418 groups = "GSM14";
349 function = "uart1"; 419 function = "uart1";
350 }; 420 };
421
422 twsi2_pmux: twsi2-pmux {
423 groups = "GSM13";
424 function = "twsi2";
425 };
426
427 twsi3_pmux: twsi3-pmux {
428 groups = "GSM14";
429 function = "twsi3";
430 };
351 }; 431 };
352 432
353 sic: interrupt-controller@e000 { 433 sic: interrupt-controller@e000 {