1 files changed, 51 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 53c624f766b4..78aec6270c2f 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -8,6 +8,8 @@
  * Licensed under the GNU/GPL. See COPYING for details.
  */
 
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include "skeleton.dtsi"
@@ -92,4 +94,53 @@
                         clock-frequency = <400000000>;
                 };
         };
+
+        axi@18000000 {
+                compatible = "brcm,bus-axi";
+                reg = <0x18000000 0x1000>;
+                ranges = <0x00000000 0x18000000 0x00100000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                #interrupt-cells = <1>;
+                interrupt-map-mask = <0x000fffff 0xffff>;
+                interrupt-map = 
+                        /* ChipCommon */
+                        <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+
+                        /* USB 2.0 Controller */
+                        <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
+
+                        /* USB 3.0 Controller */
+                        <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+
+                        /* Ethernet Controller 0 */
+                        <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+
+                        /* Ethernet Controller 1 */
+                        <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+
+                        /* Ethernet Controller 2 */
+                        <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+
+                        /* Ethernet Controller 3 */
+                        <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
+
+                        /* NAND Controller */
+                        <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+                        <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+                        <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+                        <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+                        <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+                        <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+                        <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+                        <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+
+                chipcommon: chipcommon@0 {
+                        reg = <0x00000000 0x1000>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+        };
 };