diff options
Diffstat (limited to 'arch/arm/boot/dts/at91sam9x5.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91sam9x5.dtsi | 270 |
1 files changed, 237 insertions, 33 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 03fc136421c5..7ee49e8daf98 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
@@ -111,50 +111,244 @@ | |||
111 | interrupts = <21 4 0>; | 111 | interrupts = <21 4 0>; |
112 | }; | 112 | }; |
113 | 113 | ||
114 | pioA: gpio@fffff400 { | 114 | pinctrl@fffff400 { |
115 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 115 | #address-cells = <1>; |
116 | reg = <0xfffff400 0x100>; | 116 | #size-cells = <1>; |
117 | interrupts = <2 4 1>; | 117 | compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; |
118 | #gpio-cells = <2>; | 118 | ranges = <0xfffff400 0xfffff400 0x800>; |
119 | gpio-controller; | 119 | |
120 | interrupt-controller; | 120 | /* shared pinctrl settings */ |
121 | #interrupt-cells = <2>; | 121 | dbgu { |
122 | }; | 122 | pinctrl_dbgu: dbgu-0 { |
123 | atmel,pins = | ||
124 | <0 9 0x1 0x0 /* PA9 periph A */ | ||
125 | 0 10 0x1 0x1>; /* PA10 periph A with pullup */ | ||
126 | }; | ||
127 | }; | ||
123 | 128 | ||
124 | pioB: gpio@fffff600 { | 129 | usart0 { |
125 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 130 | pinctrl_usart0: usart0-0 { |
126 | reg = <0xfffff600 0x100>; | 131 | atmel,pins = |
127 | interrupts = <2 4 1>; | 132 | <0 0 0x1 0x1 /* PA0 periph A with pullup */ |
128 | #gpio-cells = <2>; | 133 | 0 1 0x1 0x0>; /* PA1 periph A */ |
129 | gpio-controller; | 134 | }; |
130 | interrupt-controller; | 135 | |
131 | #interrupt-cells = <2>; | 136 | pinctrl_usart0_rts: usart0_rts-0 { |
137 | atmel,pins = | ||
138 | <0 2 0x1 0x0>; /* PA2 periph A */ | ||
139 | }; | ||
140 | |||
141 | pinctrl_usart0_cts: usart0_cts-0 { | ||
142 | atmel,pins = | ||
143 | <0 3 0x1 0x0>; /* PA3 periph A */ | ||
144 | }; | ||
145 | }; | ||
146 | |||
147 | usart1 { | ||
148 | pinctrl_usart1: usart1-0 { | ||
149 | atmel,pins = | ||
150 | <0 5 0x1 0x1 /* PA5 periph A with pullup */ | ||
151 | 0 6 0x1 0x0>; /* PA6 periph A */ | ||
152 | }; | ||
153 | |||
154 | pinctrl_usart1_rts: usart1_rts-0 { | ||
155 | atmel,pins = | ||
156 | <3 27 0x3 0x0>; /* PC27 periph C */ | ||
157 | }; | ||
158 | |||
159 | pinctrl_usart1_cts: usart1_cts-0 { | ||
160 | atmel,pins = | ||
161 | <3 28 0x3 0x0>; /* PC28 periph C */ | ||
162 | }; | ||
163 | }; | ||
164 | |||
165 | usart2 { | ||
166 | pinctrl_usart2: usart2-0 { | ||
167 | atmel,pins = | ||
168 | <0 7 0x1 0x1 /* PA7 periph A with pullup */ | ||
169 | 0 8 0x1 0x0>; /* PA8 periph A */ | ||
170 | }; | ||
171 | |||
172 | pinctrl_uart2_rts: uart2_rts-0 { | ||
173 | atmel,pins = | ||
174 | <0 0 0x2 0x0>; /* PB0 periph B */ | ||
175 | }; | ||
176 | |||
177 | pinctrl_uart2_cts: uart2_cts-0 { | ||
178 | atmel,pins = | ||
179 | <0 1 0x2 0x0>; /* PB1 periph B */ | ||
180 | }; | ||
181 | }; | ||
182 | |||
183 | usart3 { | ||
184 | pinctrl_uart3: usart3-0 { | ||
185 | atmel,pins = | ||
186 | <3 23 0x2 0x1 /* PC22 periph B with pullup */ | ||
187 | 3 23 0x2 0x0>; /* PC23 periph B */ | ||
188 | }; | ||
189 | |||
190 | pinctrl_usart3_rts: usart3_rts-0 { | ||
191 | atmel,pins = | ||
192 | <3 24 0x2 0x0>; /* PC24 periph B */ | ||
193 | }; | ||
194 | |||
195 | pinctrl_usart3_cts: usart3_cts-0 { | ||
196 | atmel,pins = | ||
197 | <3 25 0x2 0x0>; /* PC25 periph B */ | ||
198 | }; | ||
199 | }; | ||
200 | |||
201 | uart0 { | ||
202 | pinctrl_uart0: uart0-0 { | ||
203 | atmel,pins = | ||
204 | <3 8 0x3 0x0 /* PC8 periph C */ | ||
205 | 3 9 0x3 0x1>; /* PC9 periph C with pullup */ | ||
206 | }; | ||
207 | }; | ||
208 | |||
209 | uart1 { | ||
210 | pinctrl_uart1: uart1-0 { | ||
211 | atmel,pins = | ||
212 | <3 16 0x3 0x0 /* PC16 periph C */ | ||
213 | 3 17 0x3 0x1>; /* PC17 periph C with pullup */ | ||
214 | }; | ||
215 | }; | ||
216 | |||
217 | nand { | ||
218 | pinctrl_nand: nand-0 { | ||
219 | atmel,pins = | ||
220 | <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */ | ||
221 | 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */ | ||
222 | }; | ||
223 | }; | ||
224 | |||
225 | macb0 { | ||
226 | pinctrl_macb0_rmii: macb0_rmii-0 { | ||
227 | atmel,pins = | ||
228 | <1 0 0x1 0x0 /* PB0 periph A */ | ||
229 | 1 1 0x1 0x0 /* PB1 periph A */ | ||
230 | 1 2 0x1 0x0 /* PB2 periph A */ | ||
231 | 1 3 0x1 0x0 /* PB3 periph A */ | ||
232 | 1 4 0x1 0x0 /* PB4 periph A */ | ||
233 | 1 5 0x1 0x0 /* PB5 periph A */ | ||
234 | 1 6 0x1 0x0 /* PB6 periph A */ | ||
235 | 1 7 0x1 0x0 /* PB7 periph A */ | ||
236 | 1 9 0x1 0x0 /* PB9 periph A */ | ||
237 | 1 10 0x1 0x0>; /* PB10 periph A */ | ||
238 | }; | ||
239 | |||
240 | pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { | ||
241 | atmel,pins = | ||
242 | <1 8 0x1 0x0 /* PA8 periph A */ | ||
243 | 1 11 0x1 0x0 /* PA11 periph A */ | ||
244 | 1 12 0x1 0x0 /* PA12 periph A */ | ||
245 | 1 13 0x1 0x0 /* PA13 periph A */ | ||
246 | 1 14 0x1 0x0 /* PA14 periph A */ | ||
247 | 1 15 0x1 0x0 /* PA15 periph A */ | ||
248 | 1 16 0x1 0x0 /* PA16 periph A */ | ||
249 | 1 17 0x1 0x0>; /* PA17 periph A */ | ||
250 | }; | ||
251 | }; | ||
252 | |||
253 | mmc0 { | ||
254 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { | ||
255 | atmel,pins = | ||
256 | <0 17 0x1 0x0 /* PA17 periph A */ | ||
257 | 0 16 0x1 0x1 /* PA16 periph A with pullup */ | ||
258 | 0 15 0x1 0x1>; /* PA15 periph A with pullup */ | ||
259 | }; | ||
260 | |||
261 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | ||
262 | atmel,pins = | ||
263 | <0 18 0x1 0x1 /* PA18 periph A with pullup */ | ||
264 | 0 19 0x1 0x1 /* PA19 periph A with pullup */ | ||
265 | 0 20 0x1 0x1>; /* PA20 periph A with pullup */ | ||
266 | }; | ||
267 | }; | ||
268 | |||
269 | mmc1 { | ||
270 | pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { | ||
271 | atmel,pins = | ||
272 | <0 13 0x2 0x0 /* PA13 periph B */ | ||
273 | 0 12 0x2 0x1 /* PA12 periph B with pullup */ | ||
274 | 0 11 0x2 0x1>; /* PA11 periph B with pullup */ | ||
275 | }; | ||
276 | |||
277 | pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { | ||
278 | atmel,pins = | ||
279 | <0 2 0x2 0x1 /* PA2 periph B with pullup */ | ||
280 | 0 3 0x2 0x1 /* PA3 periph B with pullup */ | ||
281 | 0 4 0x2 0x1>; /* PA4 periph B with pullup */ | ||
282 | }; | ||
283 | }; | ||
284 | |||
285 | pioA: gpio@fffff400 { | ||
286 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | ||
287 | reg = <0xfffff400 0x200>; | ||
288 | interrupts = <2 4 1>; | ||
289 | #gpio-cells = <2>; | ||
290 | gpio-controller; | ||
291 | interrupt-controller; | ||
292 | #interrupt-cells = <2>; | ||
293 | }; | ||
294 | |||
295 | pioB: gpio@fffff600 { | ||
296 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | ||
297 | reg = <0xfffff600 0x200>; | ||
298 | interrupts = <2 4 1>; | ||
299 | #gpio-cells = <2>; | ||
300 | gpio-controller; | ||
301 | #gpio-lines = <19>; | ||
302 | interrupt-controller; | ||
303 | #interrupt-cells = <2>; | ||
304 | }; | ||
305 | |||
306 | pioC: gpio@fffff800 { | ||
307 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | ||
308 | reg = <0xfffff800 0x200>; | ||
309 | interrupts = <3 4 1>; | ||
310 | #gpio-cells = <2>; | ||
311 | gpio-controller; | ||
312 | interrupt-controller; | ||
313 | #interrupt-cells = <2>; | ||
314 | }; | ||
315 | |||
316 | pioD: gpio@fffffa00 { | ||
317 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | ||
318 | reg = <0xfffffa00 0x200>; | ||
319 | interrupts = <3 4 1>; | ||
320 | #gpio-cells = <2>; | ||
321 | gpio-controller; | ||
322 | #gpio-lines = <22>; | ||
323 | interrupt-controller; | ||
324 | #interrupt-cells = <2>; | ||
325 | }; | ||
132 | }; | 326 | }; |
133 | 327 | ||
134 | pioC: gpio@fffff800 { | 328 | mmc0: mmc@f0008000 { |
135 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 329 | compatible = "atmel,hsmci"; |
136 | reg = <0xfffff800 0x100>; | 330 | reg = <0xf0008000 0x600>; |
137 | interrupts = <3 4 1>; | 331 | interrupts = <12 4 0>; |
138 | #gpio-cells = <2>; | 332 | #address-cells = <1>; |
139 | gpio-controller; | 333 | #size-cells = <0>; |
140 | interrupt-controller; | 334 | status = "disabled"; |
141 | #interrupt-cells = <2>; | ||
142 | }; | 335 | }; |
143 | 336 | ||
144 | pioD: gpio@fffffa00 { | 337 | mmc1: mmc@f000c000 { |
145 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 338 | compatible = "atmel,hsmci"; |
146 | reg = <0xfffffa00 0x100>; | 339 | reg = <0xf000c000 0x600>; |
147 | interrupts = <3 4 1>; | 340 | interrupts = <26 4 0>; |
148 | #gpio-cells = <2>; | 341 | #address-cells = <1>; |
149 | gpio-controller; | 342 | #size-cells = <0>; |
150 | interrupt-controller; | 343 | status = "disabled"; |
151 | #interrupt-cells = <2>; | ||
152 | }; | 344 | }; |
153 | 345 | ||
154 | dbgu: serial@fffff200 { | 346 | dbgu: serial@fffff200 { |
155 | compatible = "atmel,at91sam9260-usart"; | 347 | compatible = "atmel,at91sam9260-usart"; |
156 | reg = <0xfffff200 0x200>; | 348 | reg = <0xfffff200 0x200>; |
157 | interrupts = <1 4 7>; | 349 | interrupts = <1 4 7>; |
350 | pinctrl-names = "default"; | ||
351 | pinctrl-0 = <&pinctrl_dbgu>; | ||
158 | status = "disabled"; | 352 | status = "disabled"; |
159 | }; | 353 | }; |
160 | 354 | ||
@@ -164,6 +358,8 @@ | |||
164 | interrupts = <5 4 5>; | 358 | interrupts = <5 4 5>; |
165 | atmel,use-dma-rx; | 359 | atmel,use-dma-rx; |
166 | atmel,use-dma-tx; | 360 | atmel,use-dma-tx; |
361 | pinctrl-names = "default"; | ||
362 | pinctrl-0 = <&pinctrl_usart0>; | ||
167 | status = "disabled"; | 363 | status = "disabled"; |
168 | }; | 364 | }; |
169 | 365 | ||
@@ -173,6 +369,8 @@ | |||
173 | interrupts = <6 4 5>; | 369 | interrupts = <6 4 5>; |
174 | atmel,use-dma-rx; | 370 | atmel,use-dma-rx; |
175 | atmel,use-dma-tx; | 371 | atmel,use-dma-tx; |
372 | pinctrl-names = "default"; | ||
373 | pinctrl-0 = <&pinctrl_usart1>; | ||
176 | status = "disabled"; | 374 | status = "disabled"; |
177 | }; | 375 | }; |
178 | 376 | ||
@@ -182,6 +380,8 @@ | |||
182 | interrupts = <7 4 5>; | 380 | interrupts = <7 4 5>; |
183 | atmel,use-dma-rx; | 381 | atmel,use-dma-rx; |
184 | atmel,use-dma-tx; | 382 | atmel,use-dma-tx; |
383 | pinctrl-names = "default"; | ||
384 | pinctrl-0 = <&pinctrl_usart2>; | ||
185 | status = "disabled"; | 385 | status = "disabled"; |
186 | }; | 386 | }; |
187 | 387 | ||
@@ -189,6 +389,8 @@ | |||
189 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 389 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
190 | reg = <0xf802c000 0x100>; | 390 | reg = <0xf802c000 0x100>; |
191 | interrupts = <24 4 3>; | 391 | interrupts = <24 4 3>; |
392 | pinctrl-names = "default"; | ||
393 | pinctrl-0 = <&pinctrl_macb0_rmii>; | ||
192 | status = "disabled"; | 394 | status = "disabled"; |
193 | }; | 395 | }; |
194 | 396 | ||
@@ -273,6 +475,8 @@ | |||
273 | >; | 475 | >; |
274 | atmel,nand-addr-offset = <21>; | 476 | atmel,nand-addr-offset = <21>; |
275 | atmel,nand-cmd-offset = <22>; | 477 | atmel,nand-cmd-offset = <22>; |
478 | pinctrl-names = "default"; | ||
479 | pinctrl-0 = <&pinctrl_nand>; | ||
276 | gpios = <&pioD 5 0 | 480 | gpios = <&pioD 5 0 |
277 | &pioD 4 0 | 481 | &pioD 4 0 |
278 | 0 | 482 | 0 |