aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/at91sam9x5.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts/at91sam9x5.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi381
1 files changed, 242 insertions, 139 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 6d8bd6715bd0..ff4bd7a061b0 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -9,7 +9,10 @@
9 * Licensed under GPLv2 or later. 9 * Licensed under GPLv2 or later.
10 */ 10 */
11 11
12/include/ "skeleton.dtsi" 12#include "skeleton.dtsi"
13#include <dt-bindings/pinctrl/at91.h>
14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/gpio/gpio.h>
13 16
14/ { 17/ {
15 model = "Atmel AT91SAM9x5 family SoC"; 18 model = "Atmel AT91SAM9x5 family SoC";
@@ -89,32 +92,32 @@
89 pit: timer@fffffe30 { 92 pit: timer@fffffe30 {
90 compatible = "atmel,at91sam9260-pit"; 93 compatible = "atmel,at91sam9260-pit";
91 reg = <0xfffffe30 0xf>; 94 reg = <0xfffffe30 0xf>;
92 interrupts = <1 4 7>; 95 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
93 }; 96 };
94 97
95 tcb0: timer@f8008000 { 98 tcb0: timer@f8008000 {
96 compatible = "atmel,at91sam9x5-tcb"; 99 compatible = "atmel,at91sam9x5-tcb";
97 reg = <0xf8008000 0x100>; 100 reg = <0xf8008000 0x100>;
98 interrupts = <17 4 0>; 101 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
99 }; 102 };
100 103
101 tcb1: timer@f800c000 { 104 tcb1: timer@f800c000 {
102 compatible = "atmel,at91sam9x5-tcb"; 105 compatible = "atmel,at91sam9x5-tcb";
103 reg = <0xf800c000 0x100>; 106 reg = <0xf800c000 0x100>;
104 interrupts = <17 4 0>; 107 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
105 }; 108 };
106 109
107 dma0: dma-controller@ffffec00 { 110 dma0: dma-controller@ffffec00 {
108 compatible = "atmel,at91sam9g45-dma"; 111 compatible = "atmel,at91sam9g45-dma";
109 reg = <0xffffec00 0x200>; 112 reg = <0xffffec00 0x200>;
110 interrupts = <20 4 0>; 113 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
111 #dma-cells = <2>; 114 #dma-cells = <2>;
112 }; 115 };
113 116
114 dma1: dma-controller@ffffee00 { 117 dma1: dma-controller@ffffee00 {
115 compatible = "atmel,at91sam9g45-dma"; 118 compatible = "atmel,at91sam9g45-dma";
116 reg = <0xffffee00 0x200>; 119 reg = <0xffffee00 0x200>;
117 interrupts = <21 4 0>; 120 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
118 #dma-cells = <2>; 121 #dma-cells = <2>;
119 }; 122 };
120 123
@@ -128,297 +131,373 @@
128 dbgu { 131 dbgu {
129 pinctrl_dbgu: dbgu-0 { 132 pinctrl_dbgu: dbgu-0 {
130 atmel,pins = 133 atmel,pins =
131 <0 9 0x1 0x0 /* PA9 periph A */ 134 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
132 0 10 0x1 0x1>; /* PA10 periph A with pullup */ 135 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
133 }; 136 };
134 }; 137 };
135 138
136 usart0 { 139 usart0 {
137 pinctrl_usart0: usart0-0 { 140 pinctrl_usart0: usart0-0 {
138 atmel,pins = 141 atmel,pins =
139 <0 0 0x1 0x1 /* PA0 periph A with pullup */ 142 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
140 0 1 0x1 0x0>; /* PA1 periph A */ 143 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
141 }; 144 };
142 145
143 pinctrl_usart0_rts: usart0_rts-0 { 146 pinctrl_usart0_rts: usart0_rts-0 {
144 atmel,pins = 147 atmel,pins =
145 <0 2 0x1 0x0>; /* PA2 periph A */ 148 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
146 }; 149 };
147 150
148 pinctrl_usart0_cts: usart0_cts-0 { 151 pinctrl_usart0_cts: usart0_cts-0 {
149 atmel,pins = 152 atmel,pins =
150 <0 3 0x1 0x0>; /* PA3 periph A */ 153 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
151 }; 154 };
152 155
153 pinctrl_usart0_sck: usart0_sck-0 { 156 pinctrl_usart0_sck: usart0_sck-0 {
154 atmel,pins = 157 atmel,pins =
155 <0 4 0x1 0x0>; /* PA4 periph A */ 158 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
156 }; 159 };
157 }; 160 };
158 161
159 usart1 { 162 usart1 {
160 pinctrl_usart1: usart1-0 { 163 pinctrl_usart1: usart1-0 {
161 atmel,pins = 164 atmel,pins =
162 <0 5 0x1 0x1 /* PA5 periph A with pullup */ 165 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
163 0 6 0x1 0x0>; /* PA6 periph A */ 166 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
164 }; 167 };
165 168
166 pinctrl_usart1_rts: usart1_rts-0 { 169 pinctrl_usart1_rts: usart1_rts-0 {
167 atmel,pins = 170 atmel,pins =
168 <2 27 0x3 0x0>; /* PC27 periph C */ 171 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
169 }; 172 };
170 173
171 pinctrl_usart1_cts: usart1_cts-0 { 174 pinctrl_usart1_cts: usart1_cts-0 {
172 atmel,pins = 175 atmel,pins =
173 <2 28 0x3 0x0>; /* PC28 periph C */ 176 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
174 }; 177 };
175 178
176 pinctrl_usart1_sck: usart1_sck-0 { 179 pinctrl_usart1_sck: usart1_sck-0 {
177 atmel,pins = 180 atmel,pins =
178 <2 28 0x3 0x0>; /* PC29 periph C */ 181 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
179 }; 182 };
180 }; 183 };
181 184
182 usart2 { 185 usart2 {
183 pinctrl_usart2: usart2-0 { 186 pinctrl_usart2: usart2-0 {
184 atmel,pins = 187 atmel,pins =
185 <0 7 0x1 0x1 /* PA7 periph A with pullup */ 188 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
186 0 8 0x1 0x0>; /* PA8 periph A */ 189 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
187 }; 190 };
188 191
189 pinctrl_uart2_rts: uart2_rts-0 { 192 pinctrl_uart2_rts: uart2_rts-0 {
190 atmel,pins = 193 atmel,pins =
191 <1 0 0x2 0x0>; /* PB0 periph B */ 194 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
192 }; 195 };
193 196
194 pinctrl_uart2_cts: uart2_cts-0 { 197 pinctrl_uart2_cts: uart2_cts-0 {
195 atmel,pins = 198 atmel,pins =
196 <1 1 0x2 0x0>; /* PB1 periph B */ 199 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
197 }; 200 };
198 201
199 pinctrl_usart2_sck: usart2_sck-0 { 202 pinctrl_usart2_sck: usart2_sck-0 {
200 atmel,pins = 203 atmel,pins =
201 <1 2 0x2 0x0>; /* PB2 periph B */ 204 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
202 }; 205 };
203 }; 206 };
204 207
205 usart3 { 208 usart3 {
206 pinctrl_usart3: usart3-0 { 209 pinctrl_usart3: usart3-0 {
207 atmel,pins = 210 atmel,pins =
208 <2 22 0x2 0x1 /* PC22 periph B with pullup */ 211 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
209 2 23 0x2 0x0>; /* PC23 periph B */ 212 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
210 }; 213 };
211 214
212 pinctrl_usart3_rts: usart3_rts-0 { 215 pinctrl_usart3_rts: usart3_rts-0 {
213 atmel,pins = 216 atmel,pins =
214 <2 24 0x2 0x0>; /* PC24 periph B */ 217 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
215 }; 218 };
216 219
217 pinctrl_usart3_cts: usart3_cts-0 { 220 pinctrl_usart3_cts: usart3_cts-0 {
218 atmel,pins = 221 atmel,pins =
219 <2 25 0x2 0x0>; /* PC25 periph B */ 222 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
220 }; 223 };
221 224
222 pinctrl_usart3_sck: usart3_sck-0 { 225 pinctrl_usart3_sck: usart3_sck-0 {
223 atmel,pins = 226 atmel,pins =
224 <2 26 0x2 0x0>; /* PC26 periph B */ 227 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
225 }; 228 };
226 }; 229 };
227 230
228 uart0 { 231 uart0 {
229 pinctrl_uart0: uart0-0 { 232 pinctrl_uart0: uart0-0 {
230 atmel,pins = 233 atmel,pins =
231 <2 8 0x3 0x0 /* PC8 periph C */ 234 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
232 2 9 0x3 0x1>; /* PC9 periph C with pullup */ 235 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
233 }; 236 };
234 }; 237 };
235 238
236 uart1 { 239 uart1 {
237 pinctrl_uart1: uart1-0 { 240 pinctrl_uart1: uart1-0 {
238 atmel,pins = 241 atmel,pins =
239 <2 16 0x3 0x0 /* PC16 periph C */ 242 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
240 2 17 0x3 0x1>; /* PC17 periph C with pullup */ 243 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
241 }; 244 };
242 }; 245 };
243 246
244 nand { 247 nand {
245 pinctrl_nand: nand-0 { 248 pinctrl_nand: nand-0 {
246 atmel,pins = 249 atmel,pins =
247 <3 0 0x1 0x0 /* PD0 periph A Read Enable */ 250 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
248 3 1 0x1 0x0 /* PD1 periph A Write Enable */ 251 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
249 3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */ 252 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
250 3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */ 253 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
251 3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */ 254 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
252 3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */ 255 AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
253 3 6 0x1 0x0 /* PD6 periph A Data bit 0 */ 256 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
254 3 7 0x1 0x0 /* PD7 periph A Data bit 1 */ 257 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
255 3 8 0x1 0x0 /* PD8 periph A Data bit 2 */ 258 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
256 3 9 0x1 0x0 /* PD9 periph A Data bit 3 */ 259 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
257 3 10 0x1 0x0 /* PD10 periph A Data bit 4 */ 260 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
258 3 11 0x1 0x0 /* PD11 periph A Data bit 5 */ 261 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
259 3 12 0x1 0x0 /* PD12 periph A Data bit 6 */ 262 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
260 3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */ 263 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
261 }; 264 };
262 265
263 pinctrl_nand_16bits: nand_16bits-0 { 266 pinctrl_nand_16bits: nand_16bits-0 {
264 atmel,pins = 267 atmel,pins =
265 <3 14 0x1 0x0 /* PD14 periph A Data bit 8 */ 268 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
266 3 15 0x1 0x0 /* PD15 periph A Data bit 9 */ 269 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
267 3 16 0x1 0x0 /* PD16 periph A Data bit 10 */ 270 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
268 3 17 0x1 0x0 /* PD17 periph A Data bit 11 */ 271 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
269 3 18 0x1 0x0 /* PD18 periph A Data bit 12 */ 272 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
270 3 19 0x1 0x0 /* PD19 periph A Data bit 13 */ 273 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
271 3 20 0x1 0x0 /* PD20 periph A Data bit 14 */ 274 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
272 3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */ 275 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
273 }; 276 };
274 }; 277 };
275 278
276 macb0 { 279 macb0 {
277 pinctrl_macb0_rmii: macb0_rmii-0 { 280 pinctrl_macb0_rmii: macb0_rmii-0 {
278 atmel,pins = 281 atmel,pins =
279 <1 0 0x1 0x0 /* PB0 periph A */ 282 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
280 1 1 0x1 0x0 /* PB1 periph A */ 283 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
281 1 2 0x1 0x0 /* PB2 periph A */ 284 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
282 1 3 0x1 0x0 /* PB3 periph A */ 285 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
283 1 4 0x1 0x0 /* PB4 periph A */ 286 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
284 1 5 0x1 0x0 /* PB5 periph A */ 287 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
285 1 6 0x1 0x0 /* PB6 periph A */ 288 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
286 1 7 0x1 0x0 /* PB7 periph A */ 289 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
287 1 9 0x1 0x0 /* PB9 periph A */ 290 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
288 1 10 0x1 0x0>; /* PB10 periph A */ 291 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
289 }; 292 };
290 293
291 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { 294 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
292 atmel,pins = 295 atmel,pins =
293 <1 8 0x1 0x0 /* PB8 periph A */ 296 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
294 1 11 0x1 0x0 /* PB11 periph A */ 297 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
295 1 12 0x1 0x0 /* PB12 periph A */ 298 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
296 1 13 0x1 0x0 /* PB13 periph A */ 299 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
297 1 14 0x1 0x0 /* PB14 periph A */ 300 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
298 1 15 0x1 0x0 /* PB15 periph A */ 301 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
299 1 16 0x1 0x0 /* PB16 periph A */ 302 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
300 1 17 0x1 0x0>; /* PB17 periph A */ 303 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
301 }; 304 };
302 }; 305 };
303 306
304 mmc0 { 307 mmc0 {
305 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 308 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
306 atmel,pins = 309 atmel,pins =
307 <0 17 0x1 0x0 /* PA17 periph A */ 310 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
308 0 16 0x1 0x1 /* PA16 periph A with pullup */ 311 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
309 0 15 0x1 0x1>; /* PA15 periph A with pullup */ 312 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
310 }; 313 };
311 314
312 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 315 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
313 atmel,pins = 316 atmel,pins =
314 <0 18 0x1 0x1 /* PA18 periph A with pullup */ 317 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
315 0 19 0x1 0x1 /* PA19 periph A with pullup */ 318 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
316 0 20 0x1 0x1>; /* PA20 periph A with pullup */ 319 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
317 }; 320 };
318 }; 321 };
319 322
320 mmc1 { 323 mmc1 {
321 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { 324 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
322 atmel,pins = 325 atmel,pins =
323 <0 13 0x2 0x0 /* PA13 periph B */ 326 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
324 0 12 0x2 0x1 /* PA12 periph B with pullup */ 327 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
325 0 11 0x2 0x1>; /* PA11 periph B with pullup */ 328 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
326 }; 329 };
327 330
328 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 331 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
329 atmel,pins = 332 atmel,pins =
330 <0 2 0x2 0x1 /* PA2 periph B with pullup */ 333 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
331 0 3 0x2 0x1 /* PA3 periph B with pullup */ 334 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
332 0 4 0x2 0x1>; /* PA4 periph B with pullup */ 335 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
333 }; 336 };
334 }; 337 };
335 338
336 ssc0 { 339 ssc0 {
337 pinctrl_ssc0_tx: ssc0_tx-0 { 340 pinctrl_ssc0_tx: ssc0_tx-0 {
338 atmel,pins = 341 atmel,pins =
339 <0 24 0x2 0x0 /* PA24 periph B */ 342 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
340 0 25 0x2 0x0 /* PA25 periph B */ 343 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
341 0 26 0x2 0x0>; /* PA26 periph B */ 344 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
342 }; 345 };
343 346
344 pinctrl_ssc0_rx: ssc0_rx-0 { 347 pinctrl_ssc0_rx: ssc0_rx-0 {
345 atmel,pins = 348 atmel,pins =
346 <0 27 0x2 0x0 /* PA27 periph B */ 349 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
347 0 28 0x2 0x0 /* PA28 periph B */ 350 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
348 0 29 0x2 0x0>; /* PA29 periph B */ 351 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
349 }; 352 };
350 }; 353 };
351 354
352 spi0 { 355 spi0 {
353 pinctrl_spi0: spi0-0 { 356 pinctrl_spi0: spi0-0 {
354 atmel,pins = 357 atmel,pins =
355 <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */ 358 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
356 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */ 359 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
357 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */ 360 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
358 }; 361 };
359 }; 362 };
360 363
361 spi1 { 364 spi1 {
362 pinctrl_spi1: spi1-0 { 365 pinctrl_spi1: spi1-0 {
363 atmel,pins = 366 atmel,pins =
364 <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */ 367 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
365 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */ 368 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
366 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */ 369 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
367 }; 370 };
368 }; 371 };
369 372
370 i2c0 { 373 i2c0 {
371 pinctrl_i2c0: i2c0-0 { 374 pinctrl_i2c0: i2c0-0 {
372 atmel,pins = 375 atmel,pins =
373 <0 30 0x1 0x0 /* PA30 periph A I2C0 data */ 376 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
374 0 31 0x1 0x0>; /* PA31 periph A I2C0 clock */ 377 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
375 }; 378 };
376 }; 379 };
377 380
378 i2c1 { 381 i2c1 {
379 pinctrl_i2c1: i2c1-0 { 382 pinctrl_i2c1: i2c1-0 {
380 atmel,pins = 383 atmel,pins =
381 <2 0 0x3 0x0 /* PC0 periph C I2C1 data */ 384 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
382 2 1 0x3 0x0>; /* PC1 periph C I2C1 clock */ 385 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
383 }; 386 };
384 }; 387 };
385 388
386 i2c2 { 389 i2c2 {
387 pinctrl_i2c2: i2c2-0 { 390 pinctrl_i2c2: i2c2-0 {
388 atmel,pins = 391 atmel,pins =
389 <1 4 0x2 0x0 /* PB4 periph B I2C2 data */ 392 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
390 1 5 0x2 0x0>; /* PB5 periph B I2C2 clock */ 393 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
391 }; 394 };
392 }; 395 };
393 396
394 i2c_gpio0 { 397 i2c_gpio0 {
395 pinctrl_i2c_gpio0: i2c_gpio0-0 { 398 pinctrl_i2c_gpio0: i2c_gpio0-0 {
396 atmel,pins = 399 atmel,pins =
397 <0 30 0x0 0x2 /* PA30 gpio multidrive I2C0 data */ 400 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
398 0 31 0x0 0x2>; /* PA31 gpio multidrive I2C0 clock */ 401 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
399 }; 402 };
400 }; 403 };
401 404
402 i2c_gpio1 { 405 i2c_gpio1 {
403 pinctrl_i2c_gpio1: i2c_gpio1-0 { 406 pinctrl_i2c_gpio1: i2c_gpio1-0 {
404 atmel,pins = 407 atmel,pins =
405 <2 0 0x0 0x2 /* PC0 gpio multidrive I2C1 data */ 408 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
406 2 1 0x0 0x2>; /* PC1 gpio multidrive I2C1 clock */ 409 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
407 }; 410 };
408 }; 411 };
409 412
410 i2c_gpio2 { 413 i2c_gpio2 {
411 pinctrl_i2c_gpio2: i2c_gpio2-0 { 414 pinctrl_i2c_gpio2: i2c_gpio2-0 {
412 atmel,pins = 415 atmel,pins =
413 <1 4 0x0 0x2 /* PB4 gpio multidrive I2C2 data */ 416 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
414 1 5 0x0 0x2>; /* PB5 gpio multidrive I2C2 clock */ 417 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
418 };
419 };
420
421 tcb0 {
422 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
423 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
424 };
425
426 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
427 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
428 };
429
430 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
431 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
432 };
433
434 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
435 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
436 };
437
438 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
439 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
440 };
441
442 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
443 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
444 };
445
446 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
447 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
448 };
449
450 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
451 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
452 };
453
454 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
455 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
456 };
457 };
458
459 tcb1 {
460 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
461 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
462 };
463
464 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
465 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
466 };
467
468 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
469 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
470 };
471
472 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
473 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
474 };
475
476 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
477 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
478 };
479
480 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
481 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
482 };
483
484 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
485 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
486 };
487
488 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
489 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
490 };
491
492 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
493 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
415 }; 494 };
416 }; 495 };
417 496
418 pioA: gpio@fffff400 { 497 pioA: gpio@fffff400 {
419 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 498 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
420 reg = <0xfffff400 0x200>; 499 reg = <0xfffff400 0x200>;
421 interrupts = <2 4 1>; 500 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
422 #gpio-cells = <2>; 501 #gpio-cells = <2>;
423 gpio-controller; 502 gpio-controller;
424 interrupt-controller; 503 interrupt-controller;
@@ -428,7 +507,7 @@
428 pioB: gpio@fffff600 { 507 pioB: gpio@fffff600 {
429 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 508 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
430 reg = <0xfffff600 0x200>; 509 reg = <0xfffff600 0x200>;
431 interrupts = <2 4 1>; 510 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
432 #gpio-cells = <2>; 511 #gpio-cells = <2>;
433 gpio-controller; 512 gpio-controller;
434 #gpio-lines = <19>; 513 #gpio-lines = <19>;
@@ -439,7 +518,7 @@
439 pioC: gpio@fffff800 { 518 pioC: gpio@fffff800 {
440 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 519 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
441 reg = <0xfffff800 0x200>; 520 reg = <0xfffff800 0x200>;
442 interrupts = <3 4 1>; 521 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
443 #gpio-cells = <2>; 522 #gpio-cells = <2>;
444 gpio-controller; 523 gpio-controller;
445 interrupt-controller; 524 interrupt-controller;
@@ -449,7 +528,7 @@
449 pioD: gpio@fffffa00 { 528 pioD: gpio@fffffa00 {
450 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 529 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
451 reg = <0xfffffa00 0x200>; 530 reg = <0xfffffa00 0x200>;
452 interrupts = <3 4 1>; 531 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
453 #gpio-cells = <2>; 532 #gpio-cells = <2>;
454 gpio-controller; 533 gpio-controller;
455 #gpio-lines = <22>; 534 #gpio-lines = <22>;
@@ -461,7 +540,7 @@
461 ssc0: ssc@f0010000 { 540 ssc0: ssc@f0010000 {
462 compatible = "atmel,at91sam9g45-ssc"; 541 compatible = "atmel,at91sam9g45-ssc";
463 reg = <0xf0010000 0x4000>; 542 reg = <0xf0010000 0x4000>;
464 interrupts = <28 4 5>; 543 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
465 pinctrl-names = "default"; 544 pinctrl-names = "default";
466 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 545 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
467 status = "disabled"; 546 status = "disabled";
@@ -470,7 +549,7 @@
470 mmc0: mmc@f0008000 { 549 mmc0: mmc@f0008000 {
471 compatible = "atmel,hsmci"; 550 compatible = "atmel,hsmci";
472 reg = <0xf0008000 0x600>; 551 reg = <0xf0008000 0x600>;
473 interrupts = <12 4 0>; 552 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
474 dmas = <&dma0 1 0>; 553 dmas = <&dma0 1 0>;
475 dma-names = "rxtx"; 554 dma-names = "rxtx";
476 #address-cells = <1>; 555 #address-cells = <1>;
@@ -481,7 +560,7 @@
481 mmc1: mmc@f000c000 { 560 mmc1: mmc@f000c000 {
482 compatible = "atmel,hsmci"; 561 compatible = "atmel,hsmci";
483 reg = <0xf000c000 0x600>; 562 reg = <0xf000c000 0x600>;
484 interrupts = <26 4 0>; 563 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
485 dmas = <&dma1 1 0>; 564 dmas = <&dma1 1 0>;
486 dma-names = "rxtx"; 565 dma-names = "rxtx";
487 #address-cells = <1>; 566 #address-cells = <1>;
@@ -492,7 +571,7 @@
492 dbgu: serial@fffff200 { 571 dbgu: serial@fffff200 {
493 compatible = "atmel,at91sam9260-usart"; 572 compatible = "atmel,at91sam9260-usart";
494 reg = <0xfffff200 0x200>; 573 reg = <0xfffff200 0x200>;
495 interrupts = <1 4 7>; 574 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
496 pinctrl-names = "default"; 575 pinctrl-names = "default";
497 pinctrl-0 = <&pinctrl_dbgu>; 576 pinctrl-0 = <&pinctrl_dbgu>;
498 status = "disabled"; 577 status = "disabled";
@@ -501,7 +580,7 @@
501 usart0: serial@f801c000 { 580 usart0: serial@f801c000 {
502 compatible = "atmel,at91sam9260-usart"; 581 compatible = "atmel,at91sam9260-usart";
503 reg = <0xf801c000 0x200>; 582 reg = <0xf801c000 0x200>;
504 interrupts = <5 4 5>; 583 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
505 pinctrl-names = "default"; 584 pinctrl-names = "default";
506 pinctrl-0 = <&pinctrl_usart0>; 585 pinctrl-0 = <&pinctrl_usart0>;
507 status = "disabled"; 586 status = "disabled";
@@ -510,7 +589,7 @@
510 usart1: serial@f8020000 { 589 usart1: serial@f8020000 {
511 compatible = "atmel,at91sam9260-usart"; 590 compatible = "atmel,at91sam9260-usart";
512 reg = <0xf8020000 0x200>; 591 reg = <0xf8020000 0x200>;
513 interrupts = <6 4 5>; 592 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
514 pinctrl-names = "default"; 593 pinctrl-names = "default";
515 pinctrl-0 = <&pinctrl_usart1>; 594 pinctrl-0 = <&pinctrl_usart1>;
516 status = "disabled"; 595 status = "disabled";
@@ -519,7 +598,7 @@
519 usart2: serial@f8024000 { 598 usart2: serial@f8024000 {
520 compatible = "atmel,at91sam9260-usart"; 599 compatible = "atmel,at91sam9260-usart";
521 reg = <0xf8024000 0x200>; 600 reg = <0xf8024000 0x200>;
522 interrupts = <7 4 5>; 601 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
523 pinctrl-names = "default"; 602 pinctrl-names = "default";
524 pinctrl-0 = <&pinctrl_usart2>; 603 pinctrl-0 = <&pinctrl_usart2>;
525 status = "disabled"; 604 status = "disabled";
@@ -528,7 +607,7 @@
528 macb0: ethernet@f802c000 { 607 macb0: ethernet@f802c000 {
529 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 608 compatible = "cdns,at32ap7000-macb", "cdns,macb";
530 reg = <0xf802c000 0x100>; 609 reg = <0xf802c000 0x100>;
531 interrupts = <24 4 3>; 610 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
532 pinctrl-names = "default"; 611 pinctrl-names = "default";
533 pinctrl-0 = <&pinctrl_macb0_rmii>; 612 pinctrl-0 = <&pinctrl_macb0_rmii>;
534 status = "disabled"; 613 status = "disabled";
@@ -537,14 +616,14 @@
537 macb1: ethernet@f8030000 { 616 macb1: ethernet@f8030000 {
538 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 617 compatible = "cdns,at32ap7000-macb", "cdns,macb";
539 reg = <0xf8030000 0x100>; 618 reg = <0xf8030000 0x100>;
540 interrupts = <27 4 3>; 619 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
541 status = "disabled"; 620 status = "disabled";
542 }; 621 };
543 622
544 i2c0: i2c@f8010000 { 623 i2c0: i2c@f8010000 {
545 compatible = "atmel,at91sam9x5-i2c"; 624 compatible = "atmel,at91sam9x5-i2c";
546 reg = <0xf8010000 0x100>; 625 reg = <0xf8010000 0x100>;
547 interrupts = <9 4 6>; 626 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
548 dmas = <&dma0 1 7>, 627 dmas = <&dma0 1 7>,
549 <&dma0 1 8>; 628 <&dma0 1 8>;
550 dma-names = "tx", "rx"; 629 dma-names = "tx", "rx";
@@ -558,7 +637,7 @@
558 i2c1: i2c@f8014000 { 637 i2c1: i2c@f8014000 {
559 compatible = "atmel,at91sam9x5-i2c"; 638 compatible = "atmel,at91sam9x5-i2c";
560 reg = <0xf8014000 0x100>; 639 reg = <0xf8014000 0x100>;
561 interrupts = <10 4 6>; 640 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
562 dmas = <&dma1 1 5>, 641 dmas = <&dma1 1 5>,
563 <&dma1 1 6>; 642 <&dma1 1 6>;
564 dma-names = "tx", "rx"; 643 dma-names = "tx", "rx";
@@ -572,7 +651,7 @@
572 i2c2: i2c@f8018000 { 651 i2c2: i2c@f8018000 {
573 compatible = "atmel,at91sam9x5-i2c"; 652 compatible = "atmel,at91sam9x5-i2c";
574 reg = <0xf8018000 0x100>; 653 reg = <0xf8018000 0x100>;
575 interrupts = <11 4 6>; 654 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
576 dmas = <&dma0 1 9>, 655 dmas = <&dma0 1 9>,
577 <&dma0 1 10>; 656 <&dma0 1 10>;
578 dma-names = "tx", "rx"; 657 dma-names = "tx", "rx";
@@ -583,10 +662,28 @@
583 status = "disabled"; 662 status = "disabled";
584 }; 663 };
585 664
665 uart0: serial@f8040000 {
666 compatible = "atmel,at91sam9260-usart";
667 reg = <0xf8040000 0x200>;
668 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
669 pinctrl-names = "default";
670 pinctrl-0 = <&pinctrl_uart0>;
671 status = "disabled";
672 };
673
674 uart1: serial@f8044000 {
675 compatible = "atmel,at91sam9260-usart";
676 reg = <0xf8044000 0x200>;
677 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
678 pinctrl-names = "default";
679 pinctrl-0 = <&pinctrl_uart1>;
680 status = "disabled";
681 };
682
586 adc0: adc@f804c000 { 683 adc0: adc@f804c000 {
587 compatible = "atmel,at91sam9260-adc"; 684 compatible = "atmel,at91sam9260-adc";
588 reg = <0xf804c000 0x100>; 685 reg = <0xf804c000 0x100>;
589 interrupts = <19 4 0>; 686 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
590 atmel,adc-use-external; 687 atmel,adc-use-external;
591 atmel,adc-channels-used = <0xffff>; 688 atmel,adc-channels-used = <0xffff>;
592 atmel,adc-vref = <3300>; 689 atmel,adc-vref = <3300>;
@@ -629,7 +726,7 @@
629 #size-cells = <0>; 726 #size-cells = <0>;
630 compatible = "atmel,at91rm9200-spi"; 727 compatible = "atmel,at91rm9200-spi";
631 reg = <0xf0000000 0x100>; 728 reg = <0xf0000000 0x100>;
632 interrupts = <13 4 3>; 729 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
633 pinctrl-names = "default"; 730 pinctrl-names = "default";
634 pinctrl-0 = <&pinctrl_spi0>; 731 pinctrl-0 = <&pinctrl_spi0>;
635 status = "disabled"; 732 status = "disabled";
@@ -640,16 +737,22 @@
640 #size-cells = <0>; 737 #size-cells = <0>;
641 compatible = "atmel,at91rm9200-spi"; 738 compatible = "atmel,at91rm9200-spi";
642 reg = <0xf0004000 0x100>; 739 reg = <0xf0004000 0x100>;
643 interrupts = <14 4 3>; 740 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
644 pinctrl-names = "default"; 741 pinctrl-names = "default";
645 pinctrl-0 = <&pinctrl_spi1>; 742 pinctrl-0 = <&pinctrl_spi1>;
646 status = "disabled"; 743 status = "disabled";
647 }; 744 };
648 745
746 watchdog@fffffe40 {
747 compatible = "atmel,at91sam9260-wdt";
748 reg = <0xfffffe40 0x10>;
749 status = "disabled";
750 };
751
649 rtc@fffffeb0 { 752 rtc@fffffeb0 {
650 compatible = "atmel,at91rm9200-rtc"; 753 compatible = "atmel,at91sam9x5-rtc";
651 reg = <0xfffffeb0 0x40>; 754 reg = <0xfffffeb0 0x40>;
652 interrupts = <1 4 7>; 755 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
653 status = "disabled"; 756 status = "disabled";
654 }; 757 };
655 }; 758 };
@@ -668,8 +771,8 @@
668 atmel,nand-cmd-offset = <22>; 771 atmel,nand-cmd-offset = <22>;
669 pinctrl-names = "default"; 772 pinctrl-names = "default";
670 pinctrl-0 = <&pinctrl_nand>; 773 pinctrl-0 = <&pinctrl_nand>;
671 gpios = <&pioD 5 0 774 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
672 &pioD 4 0 775 &pioD 4 GPIO_ACTIVE_HIGH
673 0 776 0
674 >; 777 >;
675 status = "disabled"; 778 status = "disabled";
@@ -678,22 +781,22 @@
678 usb0: ohci@00600000 { 781 usb0: ohci@00600000 {
679 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 782 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
680 reg = <0x00600000 0x100000>; 783 reg = <0x00600000 0x100000>;
681 interrupts = <22 4 2>; 784 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
682 status = "disabled"; 785 status = "disabled";
683 }; 786 };
684 787
685 usb1: ehci@00700000 { 788 usb1: ehci@00700000 {
686 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 789 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
687 reg = <0x00700000 0x100000>; 790 reg = <0x00700000 0x100000>;
688 interrupts = <22 4 2>; 791 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
689 status = "disabled"; 792 status = "disabled";
690 }; 793 };
691 }; 794 };
692 795
693 i2c@0 { 796 i2c@0 {
694 compatible = "i2c-gpio"; 797 compatible = "i2c-gpio";
695 gpios = <&pioA 30 0 /* sda */ 798 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
696 &pioA 31 0 /* scl */ 799 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
697 >; 800 >;
698 i2c-gpio,sda-open-drain; 801 i2c-gpio,sda-open-drain;
699 i2c-gpio,scl-open-drain; 802 i2c-gpio,scl-open-drain;
@@ -707,8 +810,8 @@
707 810
708 i2c@1 { 811 i2c@1 {
709 compatible = "i2c-gpio"; 812 compatible = "i2c-gpio";
710 gpios = <&pioC 0 0 /* sda */ 813 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
711 &pioC 1 0 /* scl */ 814 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
712 >; 815 >;
713 i2c-gpio,sda-open-drain; 816 i2c-gpio,sda-open-drain;
714 i2c-gpio,scl-open-drain; 817 i2c-gpio,scl-open-drain;
@@ -722,8 +825,8 @@
722 825
723 i2c@2 { 826 i2c@2 {
724 compatible = "i2c-gpio"; 827 compatible = "i2c-gpio";
725 gpios = <&pioB 4 0 /* sda */ 828 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
726 &pioB 5 0 /* scl */ 829 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
727 >; 830 >;
728 i2c-gpio,sda-open-drain; 831 i2c-gpio,sda-open-drain;
729 i2c-gpio,scl-open-drain; 832 i2c-gpio,scl-open-drain;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-16 08:23:39 -0400