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-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi248
1 files changed, 172 insertions, 76 deletions
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 8d25f889928e..bb7f564b3a55 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -7,7 +7,11 @@
7 * Licensed under GPLv2 or later. 7 * Licensed under GPLv2 or later.
8 */ 8 */
9 9
10/include/ "skeleton.dtsi" 10#include "skeleton.dtsi"
11#include <dt-bindings/dma/at91.h>
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
11 15
12/ { 16/ {
13 model = "Atmel AT91SAM9N12 SoC"; 17 model = "Atmel AT91SAM9N12 SoC";
@@ -31,8 +35,12 @@
31 ssc0 = &ssc0; 35 ssc0 = &ssc0;
32 }; 36 };
33 cpus { 37 cpus {
34 cpu@0 { 38 #address-cells = <0>;
35 compatible = "arm,arm926ejs"; 39 #size-cells = <0>;
40
41 cpu {
42 compatible = "arm,arm926ej-s";
43 device_type = "cpu";
36 }; 44 };
37 }; 45 };
38 46
@@ -78,7 +86,7 @@
78 pit: timer@fffffe30 { 86 pit: timer@fffffe30 {
79 compatible = "atmel,at91sam9260-pit"; 87 compatible = "atmel,at91sam9260-pit";
80 reg = <0xfffffe30 0xf>; 88 reg = <0xfffffe30 0xf>;
81 interrupts = <1 4 7>; 89 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
82 }; 90 };
83 91
84 shdwc@fffffe10 { 92 shdwc@fffffe10 {
@@ -89,8 +97,8 @@
89 mmc0: mmc@f0008000 { 97 mmc0: mmc@f0008000 {
90 compatible = "atmel,hsmci"; 98 compatible = "atmel,hsmci";
91 reg = <0xf0008000 0x600>; 99 reg = <0xf0008000 0x600>;
92 interrupts = <12 4 0>; 100 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
93 dmas = <&dma 1 0>; 101 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
94 dma-names = "rxtx"; 102 dma-names = "rxtx";
95 #address-cells = <1>; 103 #address-cells = <1>;
96 #size-cells = <0>; 104 #size-cells = <0>;
@@ -100,19 +108,19 @@
100 tcb0: timer@f8008000 { 108 tcb0: timer@f8008000 {
101 compatible = "atmel,at91sam9x5-tcb"; 109 compatible = "atmel,at91sam9x5-tcb";
102 reg = <0xf8008000 0x100>; 110 reg = <0xf8008000 0x100>;
103 interrupts = <17 4 0>; 111 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
104 }; 112 };
105 113
106 tcb1: timer@f800c000 { 114 tcb1: timer@f800c000 {
107 compatible = "atmel,at91sam9x5-tcb"; 115 compatible = "atmel,at91sam9x5-tcb";
108 reg = <0xf800c000 0x100>; 116 reg = <0xf800c000 0x100>;
109 interrupts = <17 4 0>; 117 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
110 }; 118 };
111 119
112 dma: dma-controller@ffffec00 { 120 dma: dma-controller@ffffec00 {
113 compatible = "atmel,at91sam9g45-dma"; 121 compatible = "atmel,at91sam9g45-dma";
114 reg = <0xffffec00 0x200>; 122 reg = <0xffffec00 0x200>;
115 interrupts = <20 4 0>; 123 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
116 #dma-cells = <2>; 124 #dma-cells = <2>;
117 }; 125 };
118 126
@@ -134,159 +142,235 @@
134 dbgu { 142 dbgu {
135 pinctrl_dbgu: dbgu-0 { 143 pinctrl_dbgu: dbgu-0 {
136 atmel,pins = 144 atmel,pins =
137 <0 9 0x1 0x0 /* PA9 periph A */ 145 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
138 0 10 0x1 0x1>; /* PA10 periph with pullup */ 146 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */
139 }; 147 };
140 }; 148 };
141 149
142 usart0 { 150 usart0 {
143 pinctrl_usart0: usart0-0 { 151 pinctrl_usart0: usart0-0 {
144 atmel,pins = 152 atmel,pins =
145 <0 1 0x1 0x1 /* PA1 periph A with pullup */ 153 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
146 0 0 0x1 0x0>; /* PA0 periph A */ 154 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
147 }; 155 };
148 156
149 pinctrl_usart0_rts: usart0_rts-0 { 157 pinctrl_usart0_rts: usart0_rts-0 {
150 atmel,pins = 158 atmel,pins =
151 <0 2 0x1 0x0>; /* PA2 periph A */ 159 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
152 }; 160 };
153 161
154 pinctrl_usart0_cts: usart0_cts-0 { 162 pinctrl_usart0_cts: usart0_cts-0 {
155 atmel,pins = 163 atmel,pins =
156 <0 3 0x1 0x0>; /* PA3 periph A */ 164 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
157 }; 165 };
158 }; 166 };
159 167
160 usart1 { 168 usart1 {
161 pinctrl_usart1: usart1-0 { 169 pinctrl_usart1: usart1-0 {
162 atmel,pins = 170 atmel,pins =
163 <0 6 0x1 0x1 /* PA6 periph A with pullup */ 171 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
164 0 5 0x1 0x0>; /* PA5 periph A */ 172 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
165 }; 173 };
166 }; 174 };
167 175
168 usart2 { 176 usart2 {
169 pinctrl_usart2: usart2-0 { 177 pinctrl_usart2: usart2-0 {
170 atmel,pins = 178 atmel,pins =
171 <0 8 0x1 0x1 /* PA8 periph A with pullup */ 179 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
172 0 7 0x1 0x0>; /* PA7 periph A */ 180 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
173 }; 181 };
174 182
175 pinctrl_usart2_rts: usart2_rts-0 { 183 pinctrl_usart2_rts: usart2_rts-0 {
176 atmel,pins = 184 atmel,pins =
177 <1 0 0x2 0x0>; /* PB0 periph B */ 185 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
178 }; 186 };
179 187
180 pinctrl_usart2_cts: usart2_cts-0 { 188 pinctrl_usart2_cts: usart2_cts-0 {
181 atmel,pins = 189 atmel,pins =
182 <1 1 0x2 0x0>; /* PB1 periph B */ 190 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
183 }; 191 };
184 }; 192 };
185 193
186 usart3 { 194 usart3 {
187 pinctrl_usart3: usart3-0 { 195 pinctrl_usart3: usart3-0 {
188 atmel,pins = 196 atmel,pins =
189 <2 23 0x2 0x1 /* PC23 periph B with pullup */ 197 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
190 2 22 0x2 0x0>; /* PC22 periph B */ 198 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
191 }; 199 };
192 200
193 pinctrl_usart3_rts: usart3_rts-0 { 201 pinctrl_usart3_rts: usart3_rts-0 {
194 atmel,pins = 202 atmel,pins =
195 <2 24 0x2 0x0>; /* PC24 periph B */ 203 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
196 }; 204 };
197 205
198 pinctrl_usart3_cts: usart3_cts-0 { 206 pinctrl_usart3_cts: usart3_cts-0 {
199 atmel,pins = 207 atmel,pins =
200 <2 25 0x2 0x0>; /* PC25 periph B */ 208 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
201 }; 209 };
202 }; 210 };
203 211
204 uart0 { 212 uart0 {
205 pinctrl_uart0: uart0-0 { 213 pinctrl_uart0: uart0-0 {
206 atmel,pins = 214 atmel,pins =
207 <2 9 0x3 0x1 /* PC9 periph C with pullup */ 215 <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
208 2 8 0x3 0x0>; /* PC8 periph C */ 216 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
209 }; 217 };
210 }; 218 };
211 219
212 uart1 { 220 uart1 {
213 pinctrl_uart1: uart1-0 { 221 pinctrl_uart1: uart1-0 {
214 atmel,pins = 222 atmel,pins =
215 <2 16 0x3 0x1 /* PC17 periph C with pullup */ 223 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */
216 2 17 0x3 0x0>; /* PC16 periph C */ 224 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
217 }; 225 };
218 }; 226 };
219 227
220 nand { 228 nand {
221 pinctrl_nand: nand-0 { 229 pinctrl_nand: nand-0 {
222 atmel,pins = 230 atmel,pins =
223 <3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/ 231 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/
224 3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */ 232 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */
225 }; 233 };
226 }; 234 };
227 235
228 mmc0 { 236 mmc0 {
229 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 237 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
230 atmel,pins = 238 atmel,pins =
231 <0 17 0x1 0x0 /* PA17 periph A */ 239 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
232 0 16 0x1 0x1 /* PA16 periph A with pullup */ 240 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
233 0 15 0x1 0x1>; /* PA15 periph A with pullup */ 241 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
234 }; 242 };
235 243
236 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 244 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
237 atmel,pins = 245 atmel,pins =
238 <0 18 0x1 0x1 /* PA18 periph A with pullup */ 246 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
239 0 19 0x1 0x1 /* PA19 periph A with pullup */ 247 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
240 0 20 0x1 0x1>; /* PA20 periph A with pullup */ 248 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
241 }; 249 };
242 250
243 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { 251 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
244 atmel,pins = 252 atmel,pins =
245 <0 11 0x2 0x1 /* PA11 periph B with pullup */ 253 <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
246 0 12 0x2 0x1 /* PA12 periph B with pullup */ 254 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
247 0 13 0x2 0x1 /* PA13 periph B with pullup */ 255 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
248 0 14 0x2 0x1>; /* PA14 periph B with pullup */ 256 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
249 }; 257 };
250 }; 258 };
251 259
252 ssc0 { 260 ssc0 {
253 pinctrl_ssc0_tx: ssc0_tx-0 { 261 pinctrl_ssc0_tx: ssc0_tx-0 {
254 atmel,pins = 262 atmel,pins =
255 <0 24 0x2 0x0 /* PA24 periph B */ 263 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
256 0 25 0x2 0x0 /* PA25 periph B */ 264 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
257 0 26 0x2 0x0>; /* PA26 periph B */ 265 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
258 }; 266 };
259 267
260 pinctrl_ssc0_rx: ssc0_rx-0 { 268 pinctrl_ssc0_rx: ssc0_rx-0 {
261 atmel,pins = 269 atmel,pins =
262 <0 27 0x2 0x0 /* PA27 periph B */ 270 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
263 0 28 0x2 0x0 /* PA28 periph B */ 271 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
264 0 29 0x2 0x0>; /* PA29 periph B */ 272 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
265 }; 273 };
266 }; 274 };
267 275
268 spi0 { 276 spi0 {
269 pinctrl_spi0: spi0-0 { 277 pinctrl_spi0: spi0-0 {
270 atmel,pins = 278 atmel,pins =
271 <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */ 279 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
272 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */ 280 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
273 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */ 281 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
274 }; 282 };
275 }; 283 };
276 284
277 spi1 { 285 spi1 {
278 pinctrl_spi1: spi1-0 { 286 pinctrl_spi1: spi1-0 {
279 atmel,pins = 287 atmel,pins =
280 <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */ 288 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
281 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */ 289 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
282 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */ 290 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
291 };
292 };
293
294 tcb0 {
295 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
296 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
297 };
298
299 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
300 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
301 };
302
303 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
304 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
305 };
306
307 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
308 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
309 };
310
311 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
312 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
313 };
314
315 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
316 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
317 };
318
319 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
320 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
321 };
322
323 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
324 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
325 };
326
327 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
328 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
329 };
330 };
331
332 tcb1 {
333 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
334 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
335 };
336
337 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
338 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
339 };
340
341 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
342 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
343 };
344
345 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
346 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
347 };
348
349 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
350 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
351 };
352
353 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
354 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
355 };
356
357 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
358 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
359 };
360
361 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
362 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
363 };
364
365 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
366 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
283 }; 367 };
284 }; 368 };
285 369
286 pioA: gpio@fffff400 { 370 pioA: gpio@fffff400 {
287 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 371 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
288 reg = <0xfffff400 0x200>; 372 reg = <0xfffff400 0x200>;
289 interrupts = <2 4 1>; 373 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
290 #gpio-cells = <2>; 374 #gpio-cells = <2>;
291 gpio-controller; 375 gpio-controller;
292 interrupt-controller; 376 interrupt-controller;
@@ -296,7 +380,7 @@
296 pioB: gpio@fffff600 { 380 pioB: gpio@fffff600 {
297 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 381 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
298 reg = <0xfffff600 0x200>; 382 reg = <0xfffff600 0x200>;
299 interrupts = <2 4 1>; 383 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
300 #gpio-cells = <2>; 384 #gpio-cells = <2>;
301 gpio-controller; 385 gpio-controller;
302 interrupt-controller; 386 interrupt-controller;
@@ -306,7 +390,7 @@
306 pioC: gpio@fffff800 { 390 pioC: gpio@fffff800 {
307 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 391 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
308 reg = <0xfffff800 0x200>; 392 reg = <0xfffff800 0x200>;
309 interrupts = <3 4 1>; 393 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
310 #gpio-cells = <2>; 394 #gpio-cells = <2>;
311 gpio-controller; 395 gpio-controller;
312 interrupt-controller; 396 interrupt-controller;
@@ -316,7 +400,7 @@
316 pioD: gpio@fffffa00 { 400 pioD: gpio@fffffa00 {
317 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 401 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
318 reg = <0xfffffa00 0x200>; 402 reg = <0xfffffa00 0x200>;
319 interrupts = <3 4 1>; 403 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
320 #gpio-cells = <2>; 404 #gpio-cells = <2>;
321 gpio-controller; 405 gpio-controller;
322 interrupt-controller; 406 interrupt-controller;
@@ -327,7 +411,7 @@
327 dbgu: serial@fffff200 { 411 dbgu: serial@fffff200 {
328 compatible = "atmel,at91sam9260-usart"; 412 compatible = "atmel,at91sam9260-usart";
329 reg = <0xfffff200 0x200>; 413 reg = <0xfffff200 0x200>;
330 interrupts = <1 4 7>; 414 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
331 pinctrl-names = "default"; 415 pinctrl-names = "default";
332 pinctrl-0 = <&pinctrl_dbgu>; 416 pinctrl-0 = <&pinctrl_dbgu>;
333 status = "disabled"; 417 status = "disabled";
@@ -336,7 +420,7 @@
336 ssc0: ssc@f0010000 { 420 ssc0: ssc@f0010000 {
337 compatible = "atmel,at91sam9g45-ssc"; 421 compatible = "atmel,at91sam9g45-ssc";
338 reg = <0xf0010000 0x4000>; 422 reg = <0xf0010000 0x4000>;
339 interrupts = <28 4 5>; 423 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
340 pinctrl-names = "default"; 424 pinctrl-names = "default";
341 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 425 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
342 status = "disabled"; 426 status = "disabled";
@@ -345,7 +429,7 @@
345 usart0: serial@f801c000 { 429 usart0: serial@f801c000 {
346 compatible = "atmel,at91sam9260-usart"; 430 compatible = "atmel,at91sam9260-usart";
347 reg = <0xf801c000 0x4000>; 431 reg = <0xf801c000 0x4000>;
348 interrupts = <5 4 5>; 432 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
349 pinctrl-names = "default"; 433 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_usart0>; 434 pinctrl-0 = <&pinctrl_usart0>;
351 status = "disabled"; 435 status = "disabled";
@@ -354,7 +438,7 @@
354 usart1: serial@f8020000 { 438 usart1: serial@f8020000 {
355 compatible = "atmel,at91sam9260-usart"; 439 compatible = "atmel,at91sam9260-usart";
356 reg = <0xf8020000 0x4000>; 440 reg = <0xf8020000 0x4000>;
357 interrupts = <6 4 5>; 441 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
358 pinctrl-names = "default"; 442 pinctrl-names = "default";
359 pinctrl-0 = <&pinctrl_usart1>; 443 pinctrl-0 = <&pinctrl_usart1>;
360 status = "disabled"; 444 status = "disabled";
@@ -363,7 +447,7 @@
363 usart2: serial@f8024000 { 447 usart2: serial@f8024000 {
364 compatible = "atmel,at91sam9260-usart"; 448 compatible = "atmel,at91sam9260-usart";
365 reg = <0xf8024000 0x4000>; 449 reg = <0xf8024000 0x4000>;
366 interrupts = <7 4 5>; 450 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
367 pinctrl-names = "default"; 451 pinctrl-names = "default";
368 pinctrl-0 = <&pinctrl_usart2>; 452 pinctrl-0 = <&pinctrl_usart2>;
369 status = "disabled"; 453 status = "disabled";
@@ -372,7 +456,7 @@
372 usart3: serial@f8028000 { 456 usart3: serial@f8028000 {
373 compatible = "atmel,at91sam9260-usart"; 457 compatible = "atmel,at91sam9260-usart";
374 reg = <0xf8028000 0x4000>; 458 reg = <0xf8028000 0x4000>;
375 interrupts = <8 4 5>; 459 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
376 pinctrl-names = "default"; 460 pinctrl-names = "default";
377 pinctrl-0 = <&pinctrl_usart3>; 461 pinctrl-0 = <&pinctrl_usart3>;
378 status = "disabled"; 462 status = "disabled";
@@ -381,9 +465,9 @@
381 i2c0: i2c@f8010000 { 465 i2c0: i2c@f8010000 {
382 compatible = "atmel,at91sam9x5-i2c"; 466 compatible = "atmel,at91sam9x5-i2c";
383 reg = <0xf8010000 0x100>; 467 reg = <0xf8010000 0x100>;
384 interrupts = <9 4 6>; 468 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
385 dmas = <&dma 1 13>, 469 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
386 <&dma 1 14>; 470 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
387 dma-names = "tx", "rx"; 471 dma-names = "tx", "rx";
388 #address-cells = <1>; 472 #address-cells = <1>;
389 #size-cells = <0>; 473 #size-cells = <0>;
@@ -393,9 +477,9 @@
393 i2c1: i2c@f8014000 { 477 i2c1: i2c@f8014000 {
394 compatible = "atmel,at91sam9x5-i2c"; 478 compatible = "atmel,at91sam9x5-i2c";
395 reg = <0xf8014000 0x100>; 479 reg = <0xf8014000 0x100>;
396 interrupts = <10 4 6>; 480 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
397 dmas = <&dma 1 15>, 481 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
398 <&dma 1 16>; 482 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
399 dma-names = "tx", "rx"; 483 dma-names = "tx", "rx";
400 #address-cells = <1>; 484 #address-cells = <1>;
401 #size-cells = <0>; 485 #size-cells = <0>;
@@ -407,7 +491,10 @@
407 #size-cells = <0>; 491 #size-cells = <0>;
408 compatible = "atmel,at91rm9200-spi"; 492 compatible = "atmel,at91rm9200-spi";
409 reg = <0xf0000000 0x100>; 493 reg = <0xf0000000 0x100>;
410 interrupts = <13 4 3>; 494 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
495 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
496 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
497 dma-names = "tx", "rx";
411 pinctrl-names = "default"; 498 pinctrl-names = "default";
412 pinctrl-0 = <&pinctrl_spi0>; 499 pinctrl-0 = <&pinctrl_spi0>;
413 status = "disabled"; 500 status = "disabled";
@@ -418,11 +505,20 @@
418 #size-cells = <0>; 505 #size-cells = <0>;
419 compatible = "atmel,at91rm9200-spi"; 506 compatible = "atmel,at91rm9200-spi";
420 reg = <0xf0004000 0x100>; 507 reg = <0xf0004000 0x100>;
421 interrupts = <14 4 3>; 508 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
509 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
510 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
511 dma-names = "tx", "rx";
422 pinctrl-names = "default"; 512 pinctrl-names = "default";
423 pinctrl-0 = <&pinctrl_spi1>; 513 pinctrl-0 = <&pinctrl_spi1>;
424 status = "disabled"; 514 status = "disabled";
425 }; 515 };
516
517 watchdog@fffffe40 {
518 compatible = "atmel,at91sam9260-wdt";
519 reg = <0xfffffe40 0x10>;
520 status = "disabled";
521 };
426 }; 522 };
427 523
428 nand0: nand@40000000 { 524 nand0: nand@40000000 {
@@ -439,8 +535,8 @@
439 atmel,nand-cmd-offset = <22>; 535 atmel,nand-cmd-offset = <22>;
440 pinctrl-names = "default"; 536 pinctrl-names = "default";
441 pinctrl-0 = <&pinctrl_nand>; 537 pinctrl-0 = <&pinctrl_nand>;
442 gpios = <&pioD 5 0 538 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
443 &pioD 4 0 539 &pioD 4 GPIO_ACTIVE_HIGH
444 0 540 0
445 >; 541 >;
446 status = "disabled"; 542 status = "disabled";
@@ -449,15 +545,15 @@
449 usb0: ohci@00500000 { 545 usb0: ohci@00500000 {
450 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 546 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
451 reg = <0x00500000 0x00100000>; 547 reg = <0x00500000 0x00100000>;
452 interrupts = <22 4 2>; 548 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
453 status = "disabled"; 549 status = "disabled";
454 }; 550 };
455 }; 551 };
456 552
457 i2c@0 { 553 i2c@0 {
458 compatible = "i2c-gpio"; 554 compatible = "i2c-gpio";
459 gpios = <&pioA 30 0 /* sda */ 555 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
460 &pioA 31 0 /* scl */ 556 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
461 >; 557 >;
462 i2c-gpio,sda-open-drain; 558 i2c-gpio,sda-open-drain;
463 i2c-gpio,scl-open-drain; 559 i2c-gpio,scl-open-drain;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-11 06:14:30 -0500