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-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi213
1 files changed, 108 insertions, 105 deletions
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index bf18a735c37d..f0091af6c285 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -9,7 +9,10 @@
9 * Licensed under GPLv2 or later. 9 * Licensed under GPLv2 or later.
10 */ 10 */
11 11
12/include/ "skeleton.dtsi" 12#include "skeleton.dtsi"
13#include <dt-bindings/pinctrl/at91.h>
14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/gpio/gpio.h>
13 16
14/ { 17/ {
15 model = "Atmel AT91SAM9G45 family SoC"; 18 model = "Atmel AT91SAM9G45 family SoC";
@@ -83,7 +86,7 @@
83 pit: timer@fffffd30 { 86 pit: timer@fffffd30 {
84 compatible = "atmel,at91sam9260-pit"; 87 compatible = "atmel,at91sam9260-pit";
85 reg = <0xfffffd30 0xf>; 88 reg = <0xfffffd30 0xf>;
86 interrupts = <1 4 7>; 89 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
87 }; 90 };
88 91
89 92
@@ -95,19 +98,19 @@
95 tcb0: timer@fff7c000 { 98 tcb0: timer@fff7c000 {
96 compatible = "atmel,at91rm9200-tcb"; 99 compatible = "atmel,at91rm9200-tcb";
97 reg = <0xfff7c000 0x100>; 100 reg = <0xfff7c000 0x100>;
98 interrupts = <18 4 0>; 101 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
99 }; 102 };
100 103
101 tcb1: timer@fffd4000 { 104 tcb1: timer@fffd4000 {
102 compatible = "atmel,at91rm9200-tcb"; 105 compatible = "atmel,at91rm9200-tcb";
103 reg = <0xfffd4000 0x100>; 106 reg = <0xfffd4000 0x100>;
104 interrupts = <18 4 0>; 107 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
105 }; 108 };
106 109
107 dma: dma-controller@ffffec00 { 110 dma: dma-controller@ffffec00 {
108 compatible = "atmel,at91sam9g45-dma"; 111 compatible = "atmel,at91sam9g45-dma";
109 reg = <0xffffec00 0x200>; 112 reg = <0xffffec00 0x200>;
110 interrupts = <21 4 0>; 113 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
111 #dma-cells = <2>; 114 #dma-cells = <2>;
112 }; 115 };
113 116
@@ -130,221 +133,221 @@
130 dbgu { 133 dbgu {
131 pinctrl_dbgu: dbgu-0 { 134 pinctrl_dbgu: dbgu-0 {
132 atmel,pins = 135 atmel,pins =
133 <1 12 0x1 0x0 /* PB12 periph A */ 136 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
134 1 13 0x1 0x0>; /* PB13 periph A */ 137 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
135 }; 138 };
136 }; 139 };
137 140
138 usart0 { 141 usart0 {
139 pinctrl_usart0: usart0-0 { 142 pinctrl_usart0: usart0-0 {
140 atmel,pins = 143 atmel,pins =
141 <1 19 0x1 0x1 /* PB19 periph A with pullup */ 144 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
142 1 18 0x1 0x0>; /* PB18 periph A */ 145 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
143 }; 146 };
144 147
145 pinctrl_usart0_rts: usart0_rts-0 { 148 pinctrl_usart0_rts: usart0_rts-0 {
146 atmel,pins = 149 atmel,pins =
147 <1 17 0x2 0x0>; /* PB17 periph B */ 150 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
148 }; 151 };
149 152
150 pinctrl_usart0_cts: usart0_cts-0 { 153 pinctrl_usart0_cts: usart0_cts-0 {
151 atmel,pins = 154 atmel,pins =
152 <1 15 0x2 0x0>; /* PB15 periph B */ 155 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
153 }; 156 };
154 }; 157 };
155 158
156 uart1 { 159 uart1 {
157 pinctrl_usart1: usart1-0 { 160 pinctrl_usart1: usart1-0 {
158 atmel,pins = 161 atmel,pins =
159 <1 4 0x1 0x1 /* PB4 periph A with pullup */ 162 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
160 1 5 0x1 0x0>; /* PB5 periph A */ 163 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
161 }; 164 };
162 165
163 pinctrl_usart1_rts: usart1_rts-0 { 166 pinctrl_usart1_rts: usart1_rts-0 {
164 atmel,pins = 167 atmel,pins =
165 <3 16 0x1 0x0>; /* PD16 periph A */ 168 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
166 }; 169 };
167 170
168 pinctrl_usart1_cts: usart1_cts-0 { 171 pinctrl_usart1_cts: usart1_cts-0 {
169 atmel,pins = 172 atmel,pins =
170 <3 17 0x1 0x0>; /* PD17 periph A */ 173 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
171 }; 174 };
172 }; 175 };
173 176
174 usart2 { 177 usart2 {
175 pinctrl_usart2: usart2-0 { 178 pinctrl_usart2: usart2-0 {
176 atmel,pins = 179 atmel,pins =
177 <1 6 0x1 0x1 /* PB6 periph A with pullup */ 180 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
178 1 7 0x1 0x0>; /* PB7 periph A */ 181 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
179 }; 182 };
180 183
181 pinctrl_usart2_rts: usart2_rts-0 { 184 pinctrl_usart2_rts: usart2_rts-0 {
182 atmel,pins = 185 atmel,pins =
183 <2 9 0x2 0x0>; /* PC9 periph B */ 186 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
184 }; 187 };
185 188
186 pinctrl_usart2_cts: usart2_cts-0 { 189 pinctrl_usart2_cts: usart2_cts-0 {
187 atmel,pins = 190 atmel,pins =
188 <2 11 0x2 0x0>; /* PC11 periph B */ 191 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
189 }; 192 };
190 }; 193 };
191 194
192 usart3 { 195 usart3 {
193 pinctrl_usart3: usart3-0 { 196 pinctrl_usart3: usart3-0 {
194 atmel,pins = 197 atmel,pins =
195 <1 8 0x1 0x1 /* PB9 periph A with pullup */ 198 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
196 1 9 0x1 0x0>; /* PB8 periph A */ 199 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
197 }; 200 };
198 201
199 pinctrl_usart3_rts: usart3_rts-0 { 202 pinctrl_usart3_rts: usart3_rts-0 {
200 atmel,pins = 203 atmel,pins =
201 <0 23 0x2 0x0>; /* PA23 periph B */ 204 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
202 }; 205 };
203 206
204 pinctrl_usart3_cts: usart3_cts-0 { 207 pinctrl_usart3_cts: usart3_cts-0 {
205 atmel,pins = 208 atmel,pins =
206 <0 24 0x2 0x0>; /* PA24 periph B */ 209 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
207 }; 210 };
208 }; 211 };
209 212
210 nand { 213 nand {
211 pinctrl_nand: nand-0 { 214 pinctrl_nand: nand-0 {
212 atmel,pins = 215 atmel,pins =
213 <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/ 216 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
214 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ 217 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
215 }; 218 };
216 }; 219 };
217 220
218 macb { 221 macb {
219 pinctrl_macb_rmii: macb_rmii-0 { 222 pinctrl_macb_rmii: macb_rmii-0 {
220 atmel,pins = 223 atmel,pins =
221 <0 10 0x1 0x0 /* PA10 periph A */ 224 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
222 0 11 0x1 0x0 /* PA11 periph A */ 225 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
223 0 12 0x1 0x0 /* PA12 periph A */ 226 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
224 0 13 0x1 0x0 /* PA13 periph A */ 227 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
225 0 14 0x1 0x0 /* PA14 periph A */ 228 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
226 0 15 0x1 0x0 /* PA15 periph A */ 229 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
227 0 16 0x1 0x0 /* PA16 periph A */ 230 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
228 0 17 0x1 0x0 /* PA17 periph A */ 231 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
229 0 18 0x1 0x0 /* PA18 periph A */ 232 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
230 0 19 0x1 0x0>; /* PA19 periph A */ 233 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
231 }; 234 };
232 235
233 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 236 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
234 atmel,pins = 237 atmel,pins =
235 <0 6 0x2 0x0 /* PA6 periph B */ 238 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
236 0 7 0x2 0x0 /* PA7 periph B */ 239 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
237 0 8 0x2 0x0 /* PA8 periph B */ 240 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
238 0 9 0x2 0x0 /* PA9 periph B */ 241 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
239 0 27 0x2 0x0 /* PA27 periph B */ 242 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
240 0 28 0x2 0x0 /* PA28 periph B */ 243 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
241 0 29 0x2 0x0 /* PA29 periph B */ 244 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
242 0 30 0x2 0x0>; /* PA30 periph B */ 245 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
243 }; 246 };
244 }; 247 };
245 248
246 mmc0 { 249 mmc0 {
247 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 250 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
248 atmel,pins = 251 atmel,pins =
249 <0 0 0x1 0x0 /* PA0 periph A */ 252 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
250 0 1 0x1 0x1 /* PA1 periph A with pullup */ 253 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
251 0 2 0x1 0x1>; /* PA2 periph A with pullup */ 254 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
252 }; 255 };
253 256
254 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 257 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
255 atmel,pins = 258 atmel,pins =
256 <0 3 0x1 0x1 /* PA3 periph A with pullup */ 259 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
257 0 4 0x1 0x1 /* PA4 periph A with pullup */ 260 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
258 0 5 0x1 0x1>; /* PA5 periph A with pullup */ 261 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
259 }; 262 };
260 263
261 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { 264 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
262 atmel,pins = 265 atmel,pins =
263 <0 6 0x1 0x1 /* PA6 periph A with pullup */ 266 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
264 0 7 0x1 0x1 /* PA7 periph A with pullup */ 267 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
265 0 8 0x1 0x1 /* PA8 periph A with pullup */ 268 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
266 0 9 0x1 0x1>; /* PA9 periph A with pullup */ 269 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
267 }; 270 };
268 }; 271 };
269 272
270 mmc1 { 273 mmc1 {
271 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { 274 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
272 atmel,pins = 275 atmel,pins =
273 <0 31 0x1 0x0 /* PA31 periph A */ 276 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
274 0 22 0x1 0x1 /* PA22 periph A with pullup */ 277 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
275 0 23 0x1 0x1>; /* PA23 periph A with pullup */ 278 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
276 }; 279 };
277 280
278 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 281 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
279 atmel,pins = 282 atmel,pins =
280 <0 24 0x1 0x1 /* PA24 periph A with pullup */ 283 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
281 0 25 0x1 0x1 /* PA25 periph A with pullup */ 284 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
282 0 26 0x1 0x1>; /* PA26 periph A with pullup */ 285 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
283 }; 286 };
284 287
285 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 { 288 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
286 atmel,pins = 289 atmel,pins =
287 <0 27 0x1 0x1 /* PA27 periph A with pullup */ 290 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
288 0 28 0x1 0x1 /* PA28 periph A with pullup */ 291 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
289 0 29 0x1 0x1 /* PA29 periph A with pullup */ 292 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
290 0 20 0x1 0x1>; /* PA30 periph A with pullup */ 293 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
291 }; 294 };
292 }; 295 };
293 296
294 ssc0 { 297 ssc0 {
295 pinctrl_ssc0_tx: ssc0_tx-0 { 298 pinctrl_ssc0_tx: ssc0_tx-0 {
296 atmel,pins = 299 atmel,pins =
297 <3 0 0x1 0x0 /* PD0 periph A */ 300 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
298 3 1 0x1 0x0 /* PD1 periph A */ 301 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
299 3 2 0x1 0x0>; /* PD2 periph A */ 302 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
300 }; 303 };
301 304
302 pinctrl_ssc0_rx: ssc0_rx-0 { 305 pinctrl_ssc0_rx: ssc0_rx-0 {
303 atmel,pins = 306 atmel,pins =
304 <3 3 0x1 0x0 /* PD3 periph A */ 307 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
305 3 4 0x1 0x0 /* PD4 periph A */ 308 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
306 3 5 0x1 0x0>; /* PD5 periph A */ 309 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
307 }; 310 };
308 }; 311 };
309 312
310 ssc1 { 313 ssc1 {
311 pinctrl_ssc1_tx: ssc1_tx-0 { 314 pinctrl_ssc1_tx: ssc1_tx-0 {
312 atmel,pins = 315 atmel,pins =
313 <3 10 0x1 0x0 /* PD10 periph A */ 316 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
314 3 11 0x1 0x0 /* PD11 periph A */ 317 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
315 3 12 0x1 0x0>; /* PD12 periph A */ 318 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
316 }; 319 };
317 320
318 pinctrl_ssc1_rx: ssc1_rx-0 { 321 pinctrl_ssc1_rx: ssc1_rx-0 {
319 atmel,pins = 322 atmel,pins =
320 <3 13 0x1 0x0 /* PD13 periph A */ 323 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
321 3 14 0x1 0x0 /* PD14 periph A */ 324 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
322 3 15 0x1 0x0>; /* PD15 periph A */ 325 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
323 }; 326 };
324 }; 327 };
325 328
326 spi0 { 329 spi0 {
327 pinctrl_spi0: spi0-0 { 330 pinctrl_spi0: spi0-0 {
328 atmel,pins = 331 atmel,pins =
329 <1 0 0x1 0x0 /* PB0 periph A SPI0_MISO pin */ 332 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
330 1 1 0x1 0x0 /* PB1 periph A SPI0_MOSI pin */ 333 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
331 1 2 0x1 0x0>; /* PB2 periph A SPI0_SPCK pin */ 334 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
332 }; 335 };
333 }; 336 };
334 337
335 spi1 { 338 spi1 {
336 pinctrl_spi1: spi1-0 { 339 pinctrl_spi1: spi1-0 {
337 atmel,pins = 340 atmel,pins =
338 <1 14 0x1 0x0 /* PB14 periph A SPI1_MISO pin */ 341 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
339 1 15 0x1 0x0 /* PB15 periph A SPI1_MOSI pin */ 342 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
340 1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */ 343 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
341 }; 344 };
342 }; 345 };
343 346
344 pioA: gpio@fffff200 { 347 pioA: gpio@fffff200 {
345 compatible = "atmel,at91rm9200-gpio"; 348 compatible = "atmel,at91rm9200-gpio";
346 reg = <0xfffff200 0x200>; 349 reg = <0xfffff200 0x200>;
347 interrupts = <2 4 1>; 350 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
348 #gpio-cells = <2>; 351 #gpio-cells = <2>;
349 gpio-controller; 352 gpio-controller;
350 interrupt-controller; 353 interrupt-controller;
@@ -354,7 +357,7 @@
354 pioB: gpio@fffff400 { 357 pioB: gpio@fffff400 {
355 compatible = "atmel,at91rm9200-gpio"; 358 compatible = "atmel,at91rm9200-gpio";
356 reg = <0xfffff400 0x200>; 359 reg = <0xfffff400 0x200>;
357 interrupts = <3 4 1>; 360 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
358 #gpio-cells = <2>; 361 #gpio-cells = <2>;
359 gpio-controller; 362 gpio-controller;
360 interrupt-controller; 363 interrupt-controller;
@@ -364,7 +367,7 @@
364 pioC: gpio@fffff600 { 367 pioC: gpio@fffff600 {
365 compatible = "atmel,at91rm9200-gpio"; 368 compatible = "atmel,at91rm9200-gpio";
366 reg = <0xfffff600 0x200>; 369 reg = <0xfffff600 0x200>;
367 interrupts = <4 4 1>; 370 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
368 #gpio-cells = <2>; 371 #gpio-cells = <2>;
369 gpio-controller; 372 gpio-controller;
370 interrupt-controller; 373 interrupt-controller;
@@ -374,7 +377,7 @@
374 pioD: gpio@fffff800 { 377 pioD: gpio@fffff800 {
375 compatible = "atmel,at91rm9200-gpio"; 378 compatible = "atmel,at91rm9200-gpio";
376 reg = <0xfffff800 0x200>; 379 reg = <0xfffff800 0x200>;
377 interrupts = <5 4 1>; 380 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
378 #gpio-cells = <2>; 381 #gpio-cells = <2>;
379 gpio-controller; 382 gpio-controller;
380 interrupt-controller; 383 interrupt-controller;
@@ -384,7 +387,7 @@
384 pioE: gpio@fffffa00 { 387 pioE: gpio@fffffa00 {
385 compatible = "atmel,at91rm9200-gpio"; 388 compatible = "atmel,at91rm9200-gpio";
386 reg = <0xfffffa00 0x200>; 389 reg = <0xfffffa00 0x200>;
387 interrupts = <5 4 1>; 390 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
388 #gpio-cells = <2>; 391 #gpio-cells = <2>;
389 gpio-controller; 392 gpio-controller;
390 interrupt-controller; 393 interrupt-controller;
@@ -395,7 +398,7 @@
395 dbgu: serial@ffffee00 { 398 dbgu: serial@ffffee00 {
396 compatible = "atmel,at91sam9260-usart"; 399 compatible = "atmel,at91sam9260-usart";
397 reg = <0xffffee00 0x200>; 400 reg = <0xffffee00 0x200>;
398 interrupts = <1 4 7>; 401 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
399 pinctrl-names = "default"; 402 pinctrl-names = "default";
400 pinctrl-0 = <&pinctrl_dbgu>; 403 pinctrl-0 = <&pinctrl_dbgu>;
401 status = "disabled"; 404 status = "disabled";
@@ -404,7 +407,7 @@
404 usart0: serial@fff8c000 { 407 usart0: serial@fff8c000 {
405 compatible = "atmel,at91sam9260-usart"; 408 compatible = "atmel,at91sam9260-usart";
406 reg = <0xfff8c000 0x200>; 409 reg = <0xfff8c000 0x200>;
407 interrupts = <7 4 5>; 410 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
408 atmel,use-dma-rx; 411 atmel,use-dma-rx;
409 atmel,use-dma-tx; 412 atmel,use-dma-tx;
410 pinctrl-names = "default"; 413 pinctrl-names = "default";
@@ -415,7 +418,7 @@
415 usart1: serial@fff90000 { 418 usart1: serial@fff90000 {
416 compatible = "atmel,at91sam9260-usart"; 419 compatible = "atmel,at91sam9260-usart";
417 reg = <0xfff90000 0x200>; 420 reg = <0xfff90000 0x200>;
418 interrupts = <8 4 5>; 421 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
419 atmel,use-dma-rx; 422 atmel,use-dma-rx;
420 atmel,use-dma-tx; 423 atmel,use-dma-tx;
421 pinctrl-names = "default"; 424 pinctrl-names = "default";
@@ -426,7 +429,7 @@
426 usart2: serial@fff94000 { 429 usart2: serial@fff94000 {
427 compatible = "atmel,at91sam9260-usart"; 430 compatible = "atmel,at91sam9260-usart";
428 reg = <0xfff94000 0x200>; 431 reg = <0xfff94000 0x200>;
429 interrupts = <9 4 5>; 432 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
430 atmel,use-dma-rx; 433 atmel,use-dma-rx;
431 atmel,use-dma-tx; 434 atmel,use-dma-tx;
432 pinctrl-names = "default"; 435 pinctrl-names = "default";
@@ -437,7 +440,7 @@
437 usart3: serial@fff98000 { 440 usart3: serial@fff98000 {
438 compatible = "atmel,at91sam9260-usart"; 441 compatible = "atmel,at91sam9260-usart";
439 reg = <0xfff98000 0x200>; 442 reg = <0xfff98000 0x200>;
440 interrupts = <10 4 5>; 443 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
441 atmel,use-dma-rx; 444 atmel,use-dma-rx;
442 atmel,use-dma-tx; 445 atmel,use-dma-tx;
443 pinctrl-names = "default"; 446 pinctrl-names = "default";
@@ -448,7 +451,7 @@
448 macb0: ethernet@fffbc000 { 451 macb0: ethernet@fffbc000 {
449 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 452 compatible = "cdns,at32ap7000-macb", "cdns,macb";
450 reg = <0xfffbc000 0x100>; 453 reg = <0xfffbc000 0x100>;
451 interrupts = <25 4 3>; 454 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
452 pinctrl-names = "default"; 455 pinctrl-names = "default";
453 pinctrl-0 = <&pinctrl_macb_rmii>; 456 pinctrl-0 = <&pinctrl_macb_rmii>;
454 status = "disabled"; 457 status = "disabled";
@@ -457,7 +460,7 @@
457 i2c0: i2c@fff84000 { 460 i2c0: i2c@fff84000 {
458 compatible = "atmel,at91sam9g10-i2c"; 461 compatible = "atmel,at91sam9g10-i2c";
459 reg = <0xfff84000 0x100>; 462 reg = <0xfff84000 0x100>;
460 interrupts = <12 4 6>; 463 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
461 #address-cells = <1>; 464 #address-cells = <1>;
462 #size-cells = <0>; 465 #size-cells = <0>;
463 status = "disabled"; 466 status = "disabled";
@@ -466,7 +469,7 @@
466 i2c1: i2c@fff88000 { 469 i2c1: i2c@fff88000 {
467 compatible = "atmel,at91sam9g10-i2c"; 470 compatible = "atmel,at91sam9g10-i2c";
468 reg = <0xfff88000 0x100>; 471 reg = <0xfff88000 0x100>;
469 interrupts = <13 4 6>; 472 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
470 #address-cells = <1>; 473 #address-cells = <1>;
471 #size-cells = <0>; 474 #size-cells = <0>;
472 status = "disabled"; 475 status = "disabled";
@@ -475,7 +478,7 @@
475 ssc0: ssc@fff9c000 { 478 ssc0: ssc@fff9c000 {
476 compatible = "atmel,at91sam9g45-ssc"; 479 compatible = "atmel,at91sam9g45-ssc";
477 reg = <0xfff9c000 0x4000>; 480 reg = <0xfff9c000 0x4000>;
478 interrupts = <16 4 5>; 481 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
479 pinctrl-names = "default"; 482 pinctrl-names = "default";
480 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 483 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
481 status = "disabled"; 484 status = "disabled";
@@ -484,7 +487,7 @@
484 ssc1: ssc@fffa0000 { 487 ssc1: ssc@fffa0000 {
485 compatible = "atmel,at91sam9g45-ssc"; 488 compatible = "atmel,at91sam9g45-ssc";
486 reg = <0xfffa0000 0x4000>; 489 reg = <0xfffa0000 0x4000>;
487 interrupts = <17 4 5>; 490 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
488 pinctrl-names = "default"; 491 pinctrl-names = "default";
489 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 492 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
490 status = "disabled"; 493 status = "disabled";
@@ -493,7 +496,7 @@
493 adc0: adc@fffb0000 { 496 adc0: adc@fffb0000 {
494 compatible = "atmel,at91sam9260-adc"; 497 compatible = "atmel,at91sam9260-adc";
495 reg = <0xfffb0000 0x100>; 498 reg = <0xfffb0000 0x100>;
496 interrupts = <20 4 0>; 499 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
497 atmel,adc-use-external-triggers; 500 atmel,adc-use-external-triggers;
498 atmel,adc-channels-used = <0xff>; 501 atmel,adc-channels-used = <0xff>;
499 atmel,adc-vref = <3300>; 502 atmel,adc-vref = <3300>;
@@ -533,7 +536,7 @@
533 mmc0: mmc@fff80000 { 536 mmc0: mmc@fff80000 {
534 compatible = "atmel,hsmci"; 537 compatible = "atmel,hsmci";
535 reg = <0xfff80000 0x600>; 538 reg = <0xfff80000 0x600>;
536 interrupts = <11 4 0>; 539 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
537 dmas = <&dma 1 0>; 540 dmas = <&dma 1 0>;
538 dma-names = "rxtx"; 541 dma-names = "rxtx";
539 #address-cells = <1>; 542 #address-cells = <1>;
@@ -544,7 +547,7 @@
544 mmc1: mmc@fffd0000 { 547 mmc1: mmc@fffd0000 {
545 compatible = "atmel,hsmci"; 548 compatible = "atmel,hsmci";
546 reg = <0xfffd0000 0x600>; 549 reg = <0xfffd0000 0x600>;
547 interrupts = <29 4 0>; 550 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
548 dmas = <&dma 1 13>; 551 dmas = <&dma 1 13>;
549 dma-names = "rxtx"; 552 dma-names = "rxtx";
550 #address-cells = <1>; 553 #address-cells = <1>;
@@ -592,8 +595,8 @@
592 atmel,nand-cmd-offset = <22>; 595 atmel,nand-cmd-offset = <22>;
593 pinctrl-names = "default"; 596 pinctrl-names = "default";
594 pinctrl-0 = <&pinctrl_nand>; 597 pinctrl-0 = <&pinctrl_nand>;
595 gpios = <&pioC 8 0 598 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
596 &pioC 14 0 599 &pioC 14 GPIO_ACTIVE_HIGH
597 0 600 0
598 >; 601 >;
599 status = "disabled"; 602 status = "disabled";
@@ -602,22 +605,22 @@
602 usb0: ohci@00700000 { 605 usb0: ohci@00700000 {
603 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 606 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
604 reg = <0x00700000 0x100000>; 607 reg = <0x00700000 0x100000>;
605 interrupts = <22 4 2>; 608 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
606 status = "disabled"; 609 status = "disabled";
607 }; 610 };
608 611
609 usb1: ehci@00800000 { 612 usb1: ehci@00800000 {
610 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 613 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
611 reg = <0x00800000 0x100000>; 614 reg = <0x00800000 0x100000>;
612 interrupts = <22 4 2>; 615 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
613 status = "disabled"; 616 status = "disabled";
614 }; 617 };
615 }; 618 };
616 619
617 i2c@0 { 620 i2c@0 {
618 compatible = "i2c-gpio"; 621 compatible = "i2c-gpio";
619 gpios = <&pioA 20 0 /* sda */ 622 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
620 &pioA 21 0 /* scl */ 623 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
621 >; 624 >;
622 i2c-gpio,sda-open-drain; 625 i2c-gpio,sda-open-drain;
623 i2c-gpio,scl-open-drain; 626 i2c-gpio,scl-open-drain;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-13 19:22:59 -0400