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Diffstat (limited to 'arch/arm/boot/dts/at91sam9260.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi309
1 files changed, 279 insertions, 30 deletions
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index d410581a5a85..68bccf41a2c6 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -21,14 +21,15 @@
21 serial2 = &usart1; 21 serial2 = &usart1;
22 serial3 = &usart2; 22 serial3 = &usart2;
23 serial4 = &usart3; 23 serial4 = &usart3;
24 serial5 = &usart4; 24 serial5 = &uart0;
25 serial6 = &usart5; 25 serial6 = &uart1;
26 gpio0 = &pioA; 26 gpio0 = &pioA;
27 gpio1 = &pioB; 27 gpio1 = &pioB;
28 gpio2 = &pioC; 28 gpio2 = &pioC;
29 tcb0 = &tcb0; 29 tcb0 = &tcb0;
30 tcb1 = &tcb1; 30 tcb1 = &tcb1;
31 i2c0 = &i2c0; 31 i2c0 = &i2c0;
32 ssc0 = &ssc0;
32 }; 33 };
33 cpus { 34 cpus {
34 cpu@0 { 35 cpu@0 {
@@ -98,40 +99,250 @@
98 interrupts = <26 4 0 27 4 0 28 4 0>; 99 interrupts = <26 4 0 27 4 0 28 4 0>;
99 }; 100 };
100 101
101 pioA: gpio@fffff400 { 102 pinctrl@fffff400 {
102 compatible = "atmel,at91rm9200-gpio"; 103 #address-cells = <1>;
103 reg = <0xfffff400 0x100>; 104 #size-cells = <1>;
104 interrupts = <2 4 1>; 105 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
105 #gpio-cells = <2>; 106 ranges = <0xfffff400 0xfffff400 0x600>;
106 gpio-controller; 107
107 interrupt-controller; 108 atmel,mux-mask = <
108 #interrupt-cells = <2>; 109 /* A B */
109 }; 110 0xffffffff 0xffc00c3b /* pioA */
111 0xffffffff 0x7fff3ccf /* pioB */
112 0xffffffff 0x007fffff /* pioC */
113 >;
114
115 /* shared pinctrl settings */
116 dbgu {
117 pinctrl_dbgu: dbgu-0 {
118 atmel,pins =
119 <1 14 0x1 0x0 /* PB14 periph A */
120 1 15 0x1 0x1>; /* PB15 periph with pullup */
121 };
122 };
110 123
111 pioB: gpio@fffff600 { 124 usart0 {
112 compatible = "atmel,at91rm9200-gpio"; 125 pinctrl_usart0: usart0-0 {
113 reg = <0xfffff600 0x100>; 126 atmel,pins =
114 interrupts = <3 4 1>; 127 <1 4 0x1 0x0 /* PB4 periph A */
115 #gpio-cells = <2>; 128 1 5 0x1 0x0>; /* PB5 periph A */
116 gpio-controller; 129 };
117 interrupt-controller; 130
118 #interrupt-cells = <2>; 131 pinctrl_usart0_rts: usart0_rts-0 {
119 }; 132 atmel,pins =
133 <1 26 0x1 0x0>; /* PB26 periph A */
134 };
135
136 pinctrl_usart0_cts: usart0_cts-0 {
137 atmel,pins =
138 <1 27 0x1 0x0>; /* PB27 periph A */
139 };
140
141 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
142 atmel,pins =
143 <1 24 0x1 0x0 /* PB24 periph A */
144 1 22 0x1 0x0>; /* PB22 periph A */
145 };
146
147 pinctrl_usart0_dcd: usart0_dcd-0 {
148 atmel,pins =
149 <1 23 0x1 0x0>; /* PB23 periph A */
150 };
151
152 pinctrl_usart0_ri: usart0_ri-0 {
153 atmel,pins =
154 <1 25 0x1 0x0>; /* PB25 periph A */
155 };
156 };
120 157
121 pioC: gpio@fffff800 { 158 usart1 {
122 compatible = "atmel,at91rm9200-gpio"; 159 pinctrl_usart1: usart1-0 {
123 reg = <0xfffff800 0x100>; 160 atmel,pins =
124 interrupts = <4 4 1>; 161 <2 6 0x1 0x1 /* PB6 periph A with pullup */
125 #gpio-cells = <2>; 162 2 7 0x1 0x0>; /* PB7 periph A */
126 gpio-controller; 163 };
127 interrupt-controller; 164
128 #interrupt-cells = <2>; 165 pinctrl_usart1_rts: usart1_rts-0 {
166 atmel,pins =
167 <1 28 0x1 0x0>; /* PB28 periph A */
168 };
169
170 pinctrl_usart1_cts: usart1_cts-0 {
171 atmel,pins =
172 <1 29 0x1 0x0>; /* PB29 periph A */
173 };
174 };
175
176 usart2 {
177 pinctrl_usart2: usart2-0 {
178 atmel,pins =
179 <1 8 0x1 0x1 /* PB8 periph A with pullup */
180 1 9 0x1 0x0>; /* PB9 periph A */
181 };
182
183 pinctrl_usart2_rts: usart2_rts-0 {
184 atmel,pins =
185 <0 4 0x1 0x0>; /* PA4 periph A */
186 };
187
188 pinctrl_usart2_cts: usart2_cts-0 {
189 atmel,pins =
190 <0 5 0x1 0x0>; /* PA5 periph A */
191 };
192 };
193
194 usart3 {
195 pinctrl_usart3: usart3-0 {
196 atmel,pins =
197 <2 10 0x1 0x1 /* PB10 periph A with pullup */
198 2 11 0x1 0x0>; /* PB11 periph A */
199 };
200
201 pinctrl_usart3_rts: usart3_rts-0 {
202 atmel,pins =
203 <3 8 0x2 0x0>; /* PB8 periph B */
204 };
205
206 pinctrl_usart3_cts: usart3_cts-0 {
207 atmel,pins =
208 <3 10 0x2 0x0>; /* PB10 periph B */
209 };
210 };
211
212 uart0 {
213 pinctrl_uart0: uart0-0 {
214 atmel,pins =
215 <0 31 0x2 0x1 /* PA31 periph B with pullup */
216 0 30 0x2 0x0>; /* PA30 periph B */
217 };
218 };
219
220 uart1 {
221 pinctrl_uart1: uart1-0 {
222 atmel,pins =
223 <2 12 0x1 0x1 /* PB12 periph A with pullup */
224 2 13 0x1 0x0>; /* PB13 periph A */
225 };
226 };
227
228 nand {
229 pinctrl_nand: nand-0 {
230 atmel,pins =
231 <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */
232 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
233 };
234 };
235
236 macb {
237 pinctrl_macb_rmii: macb_rmii-0 {
238 atmel,pins =
239 <0 12 0x1 0x0 /* PA12 periph A */
240 0 13 0x1 0x0 /* PA13 periph A */
241 0 14 0x1 0x0 /* PA14 periph A */
242 0 15 0x1 0x0 /* PA15 periph A */
243 0 16 0x1 0x0 /* PA16 periph A */
244 0 17 0x1 0x0 /* PA17 periph A */
245 0 18 0x1 0x0 /* PA18 periph A */
246 0 19 0x1 0x0 /* PA19 periph A */
247 0 20 0x1 0x0 /* PA20 periph A */
248 0 21 0x1 0x0>; /* PA21 periph A */
249 };
250
251 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
252 atmel,pins =
253 <0 22 0x2 0x0 /* PA22 periph B */
254 0 23 0x2 0x0 /* PA23 periph B */
255 0 24 0x2 0x0 /* PA24 periph B */
256 0 25 0x2 0x0 /* PA25 periph B */
257 0 26 0x2 0x0 /* PA26 periph B */
258 0 27 0x2 0x0 /* PA27 periph B */
259 0 28 0x2 0x0 /* PA28 periph B */
260 0 29 0x2 0x0>; /* PA29 periph B */
261 };
262
263 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
264 atmel,pins =
265 <0 10 0x2 0x0 /* PA10 periph B */
266 0 11 0x2 0x0 /* PA11 periph B */
267 0 24 0x2 0x0 /* PA24 periph B */
268 0 25 0x2 0x0 /* PA25 periph B */
269 0 26 0x2 0x0 /* PA26 periph B */
270 0 27 0x2 0x0 /* PA27 periph B */
271 0 28 0x2 0x0 /* PA28 periph B */
272 0 29 0x2 0x0>; /* PA29 periph B */
273 };
274 };
275
276 mmc0 {
277 pinctrl_mmc0_clk: mmc0_clk-0 {
278 atmel,pins =
279 <0 8 0x1 0x0>; /* PA8 periph A */
280 };
281
282 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
283 atmel,pins =
284 <0 7 0x1 0x1 /* PA7 periph A with pullup */
285 0 6 0x1 0x1>; /* PA6 periph A with pullup */
286 };
287
288 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
289 atmel,pins =
290 <0 9 0x1 0x1 /* PA9 periph A with pullup */
291 0 10 0x1 0x1 /* PA10 periph A with pullup */
292 0 11 0x1 0x1>; /* PA11 periph A with pullup */
293 };
294
295 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
296 atmel,pins =
297 <0 1 0x2 0x1 /* PA1 periph B with pullup */
298 0 0 0x2 0x1>; /* PA0 periph B with pullup */
299 };
300
301 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
302 atmel,pins =
303 <0 5 0x2 0x1 /* PA5 periph B with pullup */
304 0 4 0x2 0x1 /* PA4 periph B with pullup */
305 0 3 0x2 0x1>; /* PA3 periph B with pullup */
306 };
307 };
308
309 pioA: gpio@fffff400 {
310 compatible = "atmel,at91rm9200-gpio";
311 reg = <0xfffff400 0x200>;
312 interrupts = <2 4 1>;
313 #gpio-cells = <2>;
314 gpio-controller;
315 interrupt-controller;
316 #interrupt-cells = <2>;
317 };
318
319 pioB: gpio@fffff600 {
320 compatible = "atmel,at91rm9200-gpio";
321 reg = <0xfffff600 0x200>;
322 interrupts = <3 4 1>;
323 #gpio-cells = <2>;
324 gpio-controller;
325 interrupt-controller;
326 #interrupt-cells = <2>;
327 };
328
329 pioC: gpio@fffff800 {
330 compatible = "atmel,at91rm9200-gpio";
331 reg = <0xfffff800 0x200>;
332 interrupts = <4 4 1>;
333 #gpio-cells = <2>;
334 gpio-controller;
335 interrupt-controller;
336 #interrupt-cells = <2>;
337 };
129 }; 338 };
130 339
131 dbgu: serial@fffff200 { 340 dbgu: serial@fffff200 {
132 compatible = "atmel,at91sam9260-usart"; 341 compatible = "atmel,at91sam9260-usart";
133 reg = <0xfffff200 0x200>; 342 reg = <0xfffff200 0x200>;
134 interrupts = <1 4 7>; 343 interrupts = <1 4 7>;
344 pinctrl-names = "default";
345 pinctrl-0 = <&pinctrl_dbgu>;
135 status = "disabled"; 346 status = "disabled";
136 }; 347 };
137 348
@@ -141,6 +352,8 @@
141 interrupts = <6 4 5>; 352 interrupts = <6 4 5>;
142 atmel,use-dma-rx; 353 atmel,use-dma-rx;
143 atmel,use-dma-tx; 354 atmel,use-dma-tx;
355 pinctrl-names = "default";
356 pinctrl-0 = <&pinctrl_usart0>;
144 status = "disabled"; 357 status = "disabled";
145 }; 358 };
146 359
@@ -150,6 +363,8 @@
150 interrupts = <7 4 5>; 363 interrupts = <7 4 5>;
151 atmel,use-dma-rx; 364 atmel,use-dma-rx;
152 atmel,use-dma-tx; 365 atmel,use-dma-tx;
366 pinctrl-names = "default";
367 pinctrl-0 = <&pinctrl_usart1>;
153 status = "disabled"; 368 status = "disabled";
154 }; 369 };
155 370
@@ -159,6 +374,8 @@
159 interrupts = <8 4 5>; 374 interrupts = <8 4 5>;
160 atmel,use-dma-rx; 375 atmel,use-dma-rx;
161 atmel,use-dma-tx; 376 atmel,use-dma-tx;
377 pinctrl-names = "default";
378 pinctrl-0 = <&pinctrl_usart2>;
162 status = "disabled"; 379 status = "disabled";
163 }; 380 };
164 381
@@ -168,24 +385,30 @@
168 interrupts = <23 4 5>; 385 interrupts = <23 4 5>;
169 atmel,use-dma-rx; 386 atmel,use-dma-rx;
170 atmel,use-dma-tx; 387 atmel,use-dma-tx;
388 pinctrl-names = "default";
389 pinctrl-0 = <&pinctrl_usart3>;
171 status = "disabled"; 390 status = "disabled";
172 }; 391 };
173 392
174 usart4: serial@fffd4000 { 393 uart0: serial@fffd4000 {
175 compatible = "atmel,at91sam9260-usart"; 394 compatible = "atmel,at91sam9260-usart";
176 reg = <0xfffd4000 0x200>; 395 reg = <0xfffd4000 0x200>;
177 interrupts = <24 4 5>; 396 interrupts = <24 4 5>;
178 atmel,use-dma-rx; 397 atmel,use-dma-rx;
179 atmel,use-dma-tx; 398 atmel,use-dma-tx;
399 pinctrl-names = "default";
400 pinctrl-0 = <&pinctrl_uart0>;
180 status = "disabled"; 401 status = "disabled";
181 }; 402 };
182 403
183 usart5: serial@fffd8000 { 404 uart1: serial@fffd8000 {
184 compatible = "atmel,at91sam9260-usart"; 405 compatible = "atmel,at91sam9260-usart";
185 reg = <0xfffd8000 0x200>; 406 reg = <0xfffd8000 0x200>;
186 interrupts = <25 4 5>; 407 interrupts = <25 4 5>;
187 atmel,use-dma-rx; 408 atmel,use-dma-rx;
188 atmel,use-dma-tx; 409 atmel,use-dma-tx;
410 pinctrl-names = "default";
411 pinctrl-0 = <&pinctrl_uart1>;
189 status = "disabled"; 412 status = "disabled";
190 }; 413 };
191 414
@@ -193,6 +416,8 @@
193 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 416 compatible = "cdns,at32ap7000-macb", "cdns,macb";
194 reg = <0xfffc4000 0x100>; 417 reg = <0xfffc4000 0x100>;
195 interrupts = <21 4 3>; 418 interrupts = <21 4 3>;
419 pinctrl-names = "default";
420 pinctrl-0 = <&pinctrl_macb_rmii>;
196 status = "disabled"; 421 status = "disabled";
197 }; 422 };
198 423
@@ -212,6 +437,22 @@
212 status = "disabled"; 437 status = "disabled";
213 }; 438 };
214 439
440 mmc0: mmc@fffa8000 {
441 compatible = "atmel,hsmci";
442 reg = <0xfffa8000 0x600>;
443 interrupts = <9 4 0>;
444 #address-cells = <1>;
445 #size-cells = <0>;
446 status = "disabled";
447 };
448
449 ssc0: ssc@fffbc000 {
450 compatible = "atmel,at91rm9200-ssc";
451 reg = <0xfffbc000 0x4000>;
452 interrupts = <14 4 5>;
453 status = "disabled";
454 };
455
215 adc0: adc@fffe0000 { 456 adc0: adc@fffe0000 {
216 compatible = "atmel,at91sam9260-adc"; 457 compatible = "atmel,at91sam9260-adc";
217 reg = <0xfffe0000 0x100>; 458 reg = <0xfffe0000 0x100>;
@@ -246,6 +487,12 @@
246 trigger-external; 487 trigger-external;
247 }; 488 };
248 }; 489 };
490
491 watchdog@fffffd40 {
492 compatible = "atmel,at91sam9260-wdt";
493 reg = <0xfffffd40 0x10>;
494 status = "disabled";
495 };
249 }; 496 };
250 497
251 nand0: nand@40000000 { 498 nand0: nand@40000000 {
@@ -257,6 +504,8 @@
257 >; 504 >;
258 atmel,nand-addr-offset = <21>; 505 atmel,nand-addr-offset = <21>;
259 atmel,nand-cmd-offset = <22>; 506 atmel,nand-cmd-offset = <22>;
507 pinctrl-names = "default";
508 pinctrl-0 = <&pinctrl_nand>;
260 gpios = <&pioC 13 0 509 gpios = <&pioC 13 0
261 &pioC 14 0 510 &pioC 14 0
262 0 511 0
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-11 04:20:51 -0500