diff options
Diffstat (limited to 'arch/arm/boot/dts/at91sam9260.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91sam9260.dtsi | 295 |
1 files changed, 265 insertions, 30 deletions
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index d410581a5a85..b1d3fab60e0a 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi | |||
@@ -21,8 +21,8 @@ | |||
21 | serial2 = &usart1; | 21 | serial2 = &usart1; |
22 | serial3 = &usart2; | 22 | serial3 = &usart2; |
23 | serial4 = &usart3; | 23 | serial4 = &usart3; |
24 | serial5 = &usart4; | 24 | serial5 = &uart0; |
25 | serial6 = &usart5; | 25 | serial6 = &uart1; |
26 | gpio0 = &pioA; | 26 | gpio0 = &pioA; |
27 | gpio1 = &pioB; | 27 | gpio1 = &pioB; |
28 | gpio2 = &pioC; | 28 | gpio2 = &pioC; |
@@ -98,40 +98,250 @@ | |||
98 | interrupts = <26 4 0 27 4 0 28 4 0>; | 98 | interrupts = <26 4 0 27 4 0 28 4 0>; |
99 | }; | 99 | }; |
100 | 100 | ||
101 | pioA: gpio@fffff400 { | 101 | pinctrl@fffff400 { |
102 | compatible = "atmel,at91rm9200-gpio"; | 102 | #address-cells = <1>; |
103 | reg = <0xfffff400 0x100>; | 103 | #size-cells = <1>; |
104 | interrupts = <2 4 1>; | 104 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; |
105 | #gpio-cells = <2>; | 105 | ranges = <0xfffff400 0xfffff400 0x600>; |
106 | gpio-controller; | 106 | |
107 | interrupt-controller; | 107 | atmel,mux-mask = < |
108 | #interrupt-cells = <2>; | 108 | /* A B */ |
109 | }; | 109 | 0xffffffff 0xffc00c3b /* pioA */ |
110 | 0xffffffff 0x7fff3ccf /* pioB */ | ||
111 | 0xffffffff 0x007fffff /* pioC */ | ||
112 | >; | ||
113 | |||
114 | /* shared pinctrl settings */ | ||
115 | dbgu { | ||
116 | pinctrl_dbgu: dbgu-0 { | ||
117 | atmel,pins = | ||
118 | <1 14 0x1 0x0 /* PB14 periph A */ | ||
119 | 1 15 0x1 0x1>; /* PB15 periph with pullup */ | ||
120 | }; | ||
121 | }; | ||
110 | 122 | ||
111 | pioB: gpio@fffff600 { | 123 | usart0 { |
112 | compatible = "atmel,at91rm9200-gpio"; | 124 | pinctrl_usart0: usart0-0 { |
113 | reg = <0xfffff600 0x100>; | 125 | atmel,pins = |
114 | interrupts = <3 4 1>; | 126 | <1 4 0x1 0x0 /* PB4 periph A */ |
115 | #gpio-cells = <2>; | 127 | 1 5 0x1 0x0>; /* PB5 periph A */ |
116 | gpio-controller; | 128 | }; |
117 | interrupt-controller; | 129 | |
118 | #interrupt-cells = <2>; | 130 | pinctrl_usart0_rts: usart0_rts-0 { |
119 | }; | 131 | atmel,pins = |
132 | <1 26 0x1 0x0>; /* PB26 periph A */ | ||
133 | }; | ||
134 | |||
135 | pinctrl_usart0_cts: usart0_cts-0 { | ||
136 | atmel,pins = | ||
137 | <1 27 0x1 0x0>; /* PB27 periph A */ | ||
138 | }; | ||
139 | |||
140 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { | ||
141 | atmel,pins = | ||
142 | <1 24 0x1 0x0 /* PB24 periph A */ | ||
143 | 1 22 0x1 0x0>; /* PB22 periph A */ | ||
144 | }; | ||
145 | |||
146 | pinctrl_usart0_dcd: usart0_dcd-0 { | ||
147 | atmel,pins = | ||
148 | <1 23 0x1 0x0>; /* PB23 periph A */ | ||
149 | }; | ||
150 | |||
151 | pinctrl_usart0_ri: usart0_ri-0 { | ||
152 | atmel,pins = | ||
153 | <1 25 0x1 0x0>; /* PB25 periph A */ | ||
154 | }; | ||
155 | }; | ||
120 | 156 | ||
121 | pioC: gpio@fffff800 { | 157 | usart1 { |
122 | compatible = "atmel,at91rm9200-gpio"; | 158 | pinctrl_usart1: usart1-0 { |
123 | reg = <0xfffff800 0x100>; | 159 | atmel,pins = |
124 | interrupts = <4 4 1>; | 160 | <2 6 0x1 0x1 /* PB6 periph A with pullup */ |
125 | #gpio-cells = <2>; | 161 | 2 7 0x1 0x0>; /* PB7 periph A */ |
126 | gpio-controller; | 162 | }; |
127 | interrupt-controller; | 163 | |
128 | #interrupt-cells = <2>; | 164 | pinctrl_usart1_rts: usart1_rts-0 { |
165 | atmel,pins = | ||
166 | <1 28 0x1 0x0>; /* PB28 periph A */ | ||
167 | }; | ||
168 | |||
169 | pinctrl_usart1_cts: usart1_cts-0 { | ||
170 | atmel,pins = | ||
171 | <1 29 0x1 0x0>; /* PB29 periph A */ | ||
172 | }; | ||
173 | }; | ||
174 | |||
175 | usart2 { | ||
176 | pinctrl_usart2: usart2-0 { | ||
177 | atmel,pins = | ||
178 | <1 8 0x1 0x1 /* PB8 periph A with pullup */ | ||
179 | 1 9 0x1 0x0>; /* PB9 periph A */ | ||
180 | }; | ||
181 | |||
182 | pinctrl_usart2_rts: usart2_rts-0 { | ||
183 | atmel,pins = | ||
184 | <0 4 0x1 0x0>; /* PA4 periph A */ | ||
185 | }; | ||
186 | |||
187 | pinctrl_usart2_cts: usart2_cts-0 { | ||
188 | atmel,pins = | ||
189 | <0 5 0x1 0x0>; /* PA5 periph A */ | ||
190 | }; | ||
191 | }; | ||
192 | |||
193 | usart3 { | ||
194 | pinctrl_usart3: usart3-0 { | ||
195 | atmel,pins = | ||
196 | <2 10 0x1 0x1 /* PB10 periph A with pullup */ | ||
197 | 2 11 0x1 0x0>; /* PB11 periph A */ | ||
198 | }; | ||
199 | |||
200 | pinctrl_usart3_rts: usart3_rts-0 { | ||
201 | atmel,pins = | ||
202 | <3 8 0x2 0x0>; /* PB8 periph B */ | ||
203 | }; | ||
204 | |||
205 | pinctrl_usart3_cts: usart3_cts-0 { | ||
206 | atmel,pins = | ||
207 | <3 10 0x2 0x0>; /* PB10 periph B */ | ||
208 | }; | ||
209 | }; | ||
210 | |||
211 | uart0 { | ||
212 | pinctrl_uart0: uart0-0 { | ||
213 | atmel,pins = | ||
214 | <0 31 0x2 0x1 /* PA31 periph B with pullup */ | ||
215 | 0 30 0x2 0x0>; /* PA30 periph B */ | ||
216 | }; | ||
217 | }; | ||
218 | |||
219 | uart1 { | ||
220 | pinctrl_uart1: uart1-0 { | ||
221 | atmel,pins = | ||
222 | <2 12 0x1 0x1 /* PB12 periph A with pullup */ | ||
223 | 2 13 0x1 0x0>; /* PB13 periph A */ | ||
224 | }; | ||
225 | }; | ||
226 | |||
227 | nand { | ||
228 | pinctrl_nand: nand-0 { | ||
229 | atmel,pins = | ||
230 | <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */ | ||
231 | 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ | ||
232 | }; | ||
233 | }; | ||
234 | |||
235 | macb { | ||
236 | pinctrl_macb_rmii: macb_rmii-0 { | ||
237 | atmel,pins = | ||
238 | <0 12 0x1 0x0 /* PA12 periph A */ | ||
239 | 0 13 0x1 0x0 /* PA13 periph A */ | ||
240 | 0 14 0x1 0x0 /* PA14 periph A */ | ||
241 | 0 15 0x1 0x0 /* PA15 periph A */ | ||
242 | 0 16 0x1 0x0 /* PA16 periph A */ | ||
243 | 0 17 0x1 0x0 /* PA17 periph A */ | ||
244 | 0 18 0x1 0x0 /* PA18 periph A */ | ||
245 | 0 19 0x1 0x0 /* PA19 periph A */ | ||
246 | 0 20 0x1 0x0 /* PA20 periph A */ | ||
247 | 0 21 0x1 0x0>; /* PA21 periph A */ | ||
248 | }; | ||
249 | |||
250 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | ||
251 | atmel,pins = | ||
252 | <0 22 0x2 0x0 /* PA22 periph B */ | ||
253 | 0 23 0x2 0x0 /* PA23 periph B */ | ||
254 | 0 24 0x2 0x0 /* PA24 periph B */ | ||
255 | 0 25 0x2 0x0 /* PA25 periph B */ | ||
256 | 0 26 0x2 0x0 /* PA26 periph B */ | ||
257 | 0 27 0x2 0x0 /* PA27 periph B */ | ||
258 | 0 28 0x2 0x0 /* PA28 periph B */ | ||
259 | 0 29 0x2 0x0>; /* PA29 periph B */ | ||
260 | }; | ||
261 | |||
262 | pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { | ||
263 | atmel,pins = | ||
264 | <0 10 0x2 0x0 /* PA10 periph B */ | ||
265 | 0 11 0x2 0x0 /* PA11 periph B */ | ||
266 | 0 24 0x2 0x0 /* PA24 periph B */ | ||
267 | 0 25 0x2 0x0 /* PA25 periph B */ | ||
268 | 0 26 0x2 0x0 /* PA26 periph B */ | ||
269 | 0 27 0x2 0x0 /* PA27 periph B */ | ||
270 | 0 28 0x2 0x0 /* PA28 periph B */ | ||
271 | 0 29 0x2 0x0>; /* PA29 periph B */ | ||
272 | }; | ||
273 | }; | ||
274 | |||
275 | mmc0 { | ||
276 | pinctrl_mmc0_clk: mmc0_clk-0 { | ||
277 | atmel,pins = | ||
278 | <0 8 0x1 0x0>; /* PA8 periph A */ | ||
279 | }; | ||
280 | |||
281 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | ||
282 | atmel,pins = | ||
283 | <0 7 0x1 0x1 /* PA7 periph A with pullup */ | ||
284 | 0 6 0x1 0x1>; /* PA6 periph A with pullup */ | ||
285 | }; | ||
286 | |||
287 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | ||
288 | atmel,pins = | ||
289 | <0 9 0x1 0x1 /* PA9 periph A with pullup */ | ||
290 | 0 10 0x1 0x1 /* PA10 periph A with pullup */ | ||
291 | 0 11 0x1 0x1>; /* PA11 periph A with pullup */ | ||
292 | }; | ||
293 | |||
294 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { | ||
295 | atmel,pins = | ||
296 | <0 1 0x2 0x1 /* PA1 periph B with pullup */ | ||
297 | 0 0 0x2 0x1>; /* PA0 periph B with pullup */ | ||
298 | }; | ||
299 | |||
300 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { | ||
301 | atmel,pins = | ||
302 | <0 5 0x2 0x1 /* PA5 periph B with pullup */ | ||
303 | 0 4 0x2 0x1 /* PA4 periph B with pullup */ | ||
304 | 0 3 0x2 0x1>; /* PA3 periph B with pullup */ | ||
305 | }; | ||
306 | }; | ||
307 | |||
308 | pioA: gpio@fffff400 { | ||
309 | compatible = "atmel,at91rm9200-gpio"; | ||
310 | reg = <0xfffff400 0x200>; | ||
311 | interrupts = <2 4 1>; | ||
312 | #gpio-cells = <2>; | ||
313 | gpio-controller; | ||
314 | interrupt-controller; | ||
315 | #interrupt-cells = <2>; | ||
316 | }; | ||
317 | |||
318 | pioB: gpio@fffff600 { | ||
319 | compatible = "atmel,at91rm9200-gpio"; | ||
320 | reg = <0xfffff600 0x200>; | ||
321 | interrupts = <3 4 1>; | ||
322 | #gpio-cells = <2>; | ||
323 | gpio-controller; | ||
324 | interrupt-controller; | ||
325 | #interrupt-cells = <2>; | ||
326 | }; | ||
327 | |||
328 | pioC: gpio@fffff800 { | ||
329 | compatible = "atmel,at91rm9200-gpio"; | ||
330 | reg = <0xfffff800 0x200>; | ||
331 | interrupts = <4 4 1>; | ||
332 | #gpio-cells = <2>; | ||
333 | gpio-controller; | ||
334 | interrupt-controller; | ||
335 | #interrupt-cells = <2>; | ||
336 | }; | ||
129 | }; | 337 | }; |
130 | 338 | ||
131 | dbgu: serial@fffff200 { | 339 | dbgu: serial@fffff200 { |
132 | compatible = "atmel,at91sam9260-usart"; | 340 | compatible = "atmel,at91sam9260-usart"; |
133 | reg = <0xfffff200 0x200>; | 341 | reg = <0xfffff200 0x200>; |
134 | interrupts = <1 4 7>; | 342 | interrupts = <1 4 7>; |
343 | pinctrl-names = "default"; | ||
344 | pinctrl-0 = <&pinctrl_dbgu>; | ||
135 | status = "disabled"; | 345 | status = "disabled"; |
136 | }; | 346 | }; |
137 | 347 | ||
@@ -141,6 +351,8 @@ | |||
141 | interrupts = <6 4 5>; | 351 | interrupts = <6 4 5>; |
142 | atmel,use-dma-rx; | 352 | atmel,use-dma-rx; |
143 | atmel,use-dma-tx; | 353 | atmel,use-dma-tx; |
354 | pinctrl-names = "default"; | ||
355 | pinctrl-0 = <&pinctrl_usart0>; | ||
144 | status = "disabled"; | 356 | status = "disabled"; |
145 | }; | 357 | }; |
146 | 358 | ||
@@ -150,6 +362,8 @@ | |||
150 | interrupts = <7 4 5>; | 362 | interrupts = <7 4 5>; |
151 | atmel,use-dma-rx; | 363 | atmel,use-dma-rx; |
152 | atmel,use-dma-tx; | 364 | atmel,use-dma-tx; |
365 | pinctrl-names = "default"; | ||
366 | pinctrl-0 = <&pinctrl_usart1>; | ||
153 | status = "disabled"; | 367 | status = "disabled"; |
154 | }; | 368 | }; |
155 | 369 | ||
@@ -159,6 +373,8 @@ | |||
159 | interrupts = <8 4 5>; | 373 | interrupts = <8 4 5>; |
160 | atmel,use-dma-rx; | 374 | atmel,use-dma-rx; |
161 | atmel,use-dma-tx; | 375 | atmel,use-dma-tx; |
376 | pinctrl-names = "default"; | ||
377 | pinctrl-0 = <&pinctrl_usart2>; | ||
162 | status = "disabled"; | 378 | status = "disabled"; |
163 | }; | 379 | }; |
164 | 380 | ||
@@ -168,24 +384,30 @@ | |||
168 | interrupts = <23 4 5>; | 384 | interrupts = <23 4 5>; |
169 | atmel,use-dma-rx; | 385 | atmel,use-dma-rx; |
170 | atmel,use-dma-tx; | 386 | atmel,use-dma-tx; |
387 | pinctrl-names = "default"; | ||
388 | pinctrl-0 = <&pinctrl_usart3>; | ||
171 | status = "disabled"; | 389 | status = "disabled"; |
172 | }; | 390 | }; |
173 | 391 | ||
174 | usart4: serial@fffd4000 { | 392 | uart0: serial@fffd4000 { |
175 | compatible = "atmel,at91sam9260-usart"; | 393 | compatible = "atmel,at91sam9260-usart"; |
176 | reg = <0xfffd4000 0x200>; | 394 | reg = <0xfffd4000 0x200>; |
177 | interrupts = <24 4 5>; | 395 | interrupts = <24 4 5>; |
178 | atmel,use-dma-rx; | 396 | atmel,use-dma-rx; |
179 | atmel,use-dma-tx; | 397 | atmel,use-dma-tx; |
398 | pinctrl-names = "default"; | ||
399 | pinctrl-0 = <&pinctrl_uart0>; | ||
180 | status = "disabled"; | 400 | status = "disabled"; |
181 | }; | 401 | }; |
182 | 402 | ||
183 | usart5: serial@fffd8000 { | 403 | uart1: serial@fffd8000 { |
184 | compatible = "atmel,at91sam9260-usart"; | 404 | compatible = "atmel,at91sam9260-usart"; |
185 | reg = <0xfffd8000 0x200>; | 405 | reg = <0xfffd8000 0x200>; |
186 | interrupts = <25 4 5>; | 406 | interrupts = <25 4 5>; |
187 | atmel,use-dma-rx; | 407 | atmel,use-dma-rx; |
188 | atmel,use-dma-tx; | 408 | atmel,use-dma-tx; |
409 | pinctrl-names = "default"; | ||
410 | pinctrl-0 = <&pinctrl_uart1>; | ||
189 | status = "disabled"; | 411 | status = "disabled"; |
190 | }; | 412 | }; |
191 | 413 | ||
@@ -193,6 +415,8 @@ | |||
193 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 415 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
194 | reg = <0xfffc4000 0x100>; | 416 | reg = <0xfffc4000 0x100>; |
195 | interrupts = <21 4 3>; | 417 | interrupts = <21 4 3>; |
418 | pinctrl-names = "default"; | ||
419 | pinctrl-0 = <&pinctrl_macb_rmii>; | ||
196 | status = "disabled"; | 420 | status = "disabled"; |
197 | }; | 421 | }; |
198 | 422 | ||
@@ -212,6 +436,15 @@ | |||
212 | status = "disabled"; | 436 | status = "disabled"; |
213 | }; | 437 | }; |
214 | 438 | ||
439 | mmc0: mmc@fffa8000 { | ||
440 | compatible = "atmel,hsmci"; | ||
441 | reg = <0xfffa8000 0x600>; | ||
442 | interrupts = <9 4 0>; | ||
443 | #address-cells = <1>; | ||
444 | #size-cells = <0>; | ||
445 | status = "disabled"; | ||
446 | }; | ||
447 | |||
215 | adc0: adc@fffe0000 { | 448 | adc0: adc@fffe0000 { |
216 | compatible = "atmel,at91sam9260-adc"; | 449 | compatible = "atmel,at91sam9260-adc"; |
217 | reg = <0xfffe0000 0x100>; | 450 | reg = <0xfffe0000 0x100>; |
@@ -257,6 +490,8 @@ | |||
257 | >; | 490 | >; |
258 | atmel,nand-addr-offset = <21>; | 491 | atmel,nand-addr-offset = <21>; |
259 | atmel,nand-cmd-offset = <22>; | 492 | atmel,nand-cmd-offset = <22>; |
493 | pinctrl-names = "default"; | ||
494 | pinctrl-0 = <&pinctrl_nand>; | ||
260 | gpios = <&pioC 13 0 | 495 | gpios = <&pioC 13 0 |
261 | &pioC 14 0 | 496 | &pioC 14 0 |
262 | 0 | 497 | 0 |