diff options
Diffstat (limited to 'arch/arm/boot/dts/at91sam9260.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91sam9260.dtsi | 215 |
1 files changed, 111 insertions, 104 deletions
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index 84c4bef2d726..44851b977069 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi | |||
@@ -8,7 +8,10 @@ | |||
8 | * Licensed under GPLv2 or later. | 8 | * Licensed under GPLv2 or later. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | /include/ "skeleton.dtsi" | 11 | #include "skeleton.dtsi" |
12 | #include <dt-bindings/pinctrl/at91.h> | ||
13 | #include <dt-bindings/interrupt-controller/irq.h> | ||
14 | #include <dt-bindings/gpio/gpio.h> | ||
12 | 15 | ||
13 | / { | 16 | / { |
14 | model = "Atmel AT91SAM9260 family SoC"; | 17 | model = "Atmel AT91SAM9260 family SoC"; |
@@ -84,19 +87,23 @@ | |||
84 | pit: timer@fffffd30 { | 87 | pit: timer@fffffd30 { |
85 | compatible = "atmel,at91sam9260-pit"; | 88 | compatible = "atmel,at91sam9260-pit"; |
86 | reg = <0xfffffd30 0xf>; | 89 | reg = <0xfffffd30 0xf>; |
87 | interrupts = <1 4 7>; | 90 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
88 | }; | 91 | }; |
89 | 92 | ||
90 | tcb0: timer@fffa0000 { | 93 | tcb0: timer@fffa0000 { |
91 | compatible = "atmel,at91rm9200-tcb"; | 94 | compatible = "atmel,at91rm9200-tcb"; |
92 | reg = <0xfffa0000 0x100>; | 95 | reg = <0xfffa0000 0x100>; |
93 | interrupts = <17 4 0 18 4 0 19 4 0>; | 96 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 |
97 | 18 IRQ_TYPE_LEVEL_HIGH 0 | ||
98 | 19 IRQ_TYPE_LEVEL_HIGH 0>; | ||
94 | }; | 99 | }; |
95 | 100 | ||
96 | tcb1: timer@fffdc000 { | 101 | tcb1: timer@fffdc000 { |
97 | compatible = "atmel,at91rm9200-tcb"; | 102 | compatible = "atmel,at91rm9200-tcb"; |
98 | reg = <0xfffdc000 0x100>; | 103 | reg = <0xfffdc000 0x100>; |
99 | interrupts = <26 4 0 27 4 0 28 4 0>; | 104 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0 |
105 | 27 IRQ_TYPE_LEVEL_HIGH 0 | ||
106 | 28 IRQ_TYPE_LEVEL_HIGH 0>; | ||
100 | }; | 107 | }; |
101 | 108 | ||
102 | pinctrl@fffff400 { | 109 | pinctrl@fffff400 { |
@@ -116,234 +123,234 @@ | |||
116 | dbgu { | 123 | dbgu { |
117 | pinctrl_dbgu: dbgu-0 { | 124 | pinctrl_dbgu: dbgu-0 { |
118 | atmel,pins = | 125 | atmel,pins = |
119 | <1 14 0x1 0x0 /* PB14 periph A */ | 126 | <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ |
120 | 1 15 0x1 0x1>; /* PB15 periph with pullup */ | 127 | AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */ |
121 | }; | 128 | }; |
122 | }; | 129 | }; |
123 | 130 | ||
124 | usart0 { | 131 | usart0 { |
125 | pinctrl_usart0: usart0-0 { | 132 | pinctrl_usart0: usart0-0 { |
126 | atmel,pins = | 133 | atmel,pins = |
127 | <1 4 0x1 0x0 /* PB4 periph A */ | 134 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ |
128 | 1 5 0x1 0x0>; /* PB5 periph A */ | 135 | AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ |
129 | }; | 136 | }; |
130 | 137 | ||
131 | pinctrl_usart0_rts: usart0_rts-0 { | 138 | pinctrl_usart0_rts: usart0_rts-0 { |
132 | atmel,pins = | 139 | atmel,pins = |
133 | <1 26 0x1 0x0>; /* PB26 periph A */ | 140 | <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */ |
134 | }; | 141 | }; |
135 | 142 | ||
136 | pinctrl_usart0_cts: usart0_cts-0 { | 143 | pinctrl_usart0_cts: usart0_cts-0 { |
137 | atmel,pins = | 144 | atmel,pins = |
138 | <1 27 0x1 0x0>; /* PB27 periph A */ | 145 | <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */ |
139 | }; | 146 | }; |
140 | 147 | ||
141 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { | 148 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { |
142 | atmel,pins = | 149 | atmel,pins = |
143 | <1 24 0x1 0x0 /* PB24 periph A */ | 150 | <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */ |
144 | 1 22 0x1 0x0>; /* PB22 periph A */ | 151 | AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */ |
145 | }; | 152 | }; |
146 | 153 | ||
147 | pinctrl_usart0_dcd: usart0_dcd-0 { | 154 | pinctrl_usart0_dcd: usart0_dcd-0 { |
148 | atmel,pins = | 155 | atmel,pins = |
149 | <1 23 0x1 0x0>; /* PB23 periph A */ | 156 | <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */ |
150 | }; | 157 | }; |
151 | 158 | ||
152 | pinctrl_usart0_ri: usart0_ri-0 { | 159 | pinctrl_usart0_ri: usart0_ri-0 { |
153 | atmel,pins = | 160 | atmel,pins = |
154 | <1 25 0x1 0x0>; /* PB25 periph A */ | 161 | <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */ |
155 | }; | 162 | }; |
156 | }; | 163 | }; |
157 | 164 | ||
158 | usart1 { | 165 | usart1 { |
159 | pinctrl_usart1: usart1-0 { | 166 | pinctrl_usart1: usart1-0 { |
160 | atmel,pins = | 167 | atmel,pins = |
161 | <1 6 0x1 0x1 /* PB6 periph A with pullup */ | 168 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ |
162 | 1 7 0x1 0x0>; /* PB7 periph A */ | 169 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ |
163 | }; | 170 | }; |
164 | 171 | ||
165 | pinctrl_usart1_rts: usart1_rts-0 { | 172 | pinctrl_usart1_rts: usart1_rts-0 { |
166 | atmel,pins = | 173 | atmel,pins = |
167 | <1 28 0x1 0x0>; /* PB28 periph A */ | 174 | <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */ |
168 | }; | 175 | }; |
169 | 176 | ||
170 | pinctrl_usart1_cts: usart1_cts-0 { | 177 | pinctrl_usart1_cts: usart1_cts-0 { |
171 | atmel,pins = | 178 | atmel,pins = |
172 | <1 29 0x1 0x0>; /* PB29 periph A */ | 179 | <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */ |
173 | }; | 180 | }; |
174 | }; | 181 | }; |
175 | 182 | ||
176 | usart2 { | 183 | usart2 { |
177 | pinctrl_usart2: usart2-0 { | 184 | pinctrl_usart2: usart2-0 { |
178 | atmel,pins = | 185 | atmel,pins = |
179 | <1 8 0x1 0x1 /* PB8 periph A with pullup */ | 186 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */ |
180 | 1 9 0x1 0x0>; /* PB9 periph A */ | 187 | AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */ |
181 | }; | 188 | }; |
182 | 189 | ||
183 | pinctrl_usart2_rts: usart2_rts-0 { | 190 | pinctrl_usart2_rts: usart2_rts-0 { |
184 | atmel,pins = | 191 | atmel,pins = |
185 | <0 4 0x1 0x0>; /* PA4 periph A */ | 192 | <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */ |
186 | }; | 193 | }; |
187 | 194 | ||
188 | pinctrl_usart2_cts: usart2_cts-0 { | 195 | pinctrl_usart2_cts: usart2_cts-0 { |
189 | atmel,pins = | 196 | atmel,pins = |
190 | <0 5 0x1 0x0>; /* PA5 periph A */ | 197 | <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ |
191 | }; | 198 | }; |
192 | }; | 199 | }; |
193 | 200 | ||
194 | usart3 { | 201 | usart3 { |
195 | pinctrl_usart3: usart3-0 { | 202 | pinctrl_usart3: usart3-0 { |
196 | atmel,pins = | 203 | atmel,pins = |
197 | <1 10 0x1 0x1 /* PB10 periph A with pullup */ | 204 | <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */ |
198 | 1 11 0x1 0x0>; /* PB11 periph A */ | 205 | AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ |
199 | }; | 206 | }; |
200 | 207 | ||
201 | pinctrl_usart3_rts: usart3_rts-0 { | 208 | pinctrl_usart3_rts: usart3_rts-0 { |
202 | atmel,pins = | 209 | atmel,pins = |
203 | <2 8 0x2 0x0>; /* PC8 periph B */ | 210 | <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */ |
204 | }; | 211 | }; |
205 | 212 | ||
206 | pinctrl_usart3_cts: usart3_cts-0 { | 213 | pinctrl_usart3_cts: usart3_cts-0 { |
207 | atmel,pins = | 214 | atmel,pins = |
208 | <2 10 0x2 0x0>; /* PC10 periph B */ | 215 | <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */ |
209 | }; | 216 | }; |
210 | }; | 217 | }; |
211 | 218 | ||
212 | uart0 { | 219 | uart0 { |
213 | pinctrl_uart0: uart0-0 { | 220 | pinctrl_uart0: uart0-0 { |
214 | atmel,pins = | 221 | atmel,pins = |
215 | <0 31 0x2 0x1 /* PA31 periph B with pullup */ | 222 | <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */ |
216 | 0 30 0x2 0x0>; /* PA30 periph B */ | 223 | AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ |
217 | }; | 224 | }; |
218 | }; | 225 | }; |
219 | 226 | ||
220 | uart1 { | 227 | uart1 { |
221 | pinctrl_uart1: uart1-0 { | 228 | pinctrl_uart1: uart1-0 { |
222 | atmel,pins = | 229 | atmel,pins = |
223 | <1 12 0x1 0x1 /* PB12 periph A with pullup */ | 230 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */ |
224 | 1 13 0x1 0x0>; /* PB13 periph A */ | 231 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ |
225 | }; | 232 | }; |
226 | }; | 233 | }; |
227 | 234 | ||
228 | nand { | 235 | nand { |
229 | pinctrl_nand: nand-0 { | 236 | pinctrl_nand: nand-0 { |
230 | atmel,pins = | 237 | atmel,pins = |
231 | <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */ | 238 | <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */ |
232 | 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ | 239 | AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ |
233 | }; | 240 | }; |
234 | }; | 241 | }; |
235 | 242 | ||
236 | macb { | 243 | macb { |
237 | pinctrl_macb_rmii: macb_rmii-0 { | 244 | pinctrl_macb_rmii: macb_rmii-0 { |
238 | atmel,pins = | 245 | atmel,pins = |
239 | <0 12 0x1 0x0 /* PA12 periph A */ | 246 | <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ |
240 | 0 13 0x1 0x0 /* PA13 periph A */ | 247 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ |
241 | 0 14 0x1 0x0 /* PA14 periph A */ | 248 | AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ |
242 | 0 15 0x1 0x0 /* PA15 periph A */ | 249 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ |
243 | 0 16 0x1 0x0 /* PA16 periph A */ | 250 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ |
244 | 0 17 0x1 0x0 /* PA17 periph A */ | 251 | AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ |
245 | 0 18 0x1 0x0 /* PA18 periph A */ | 252 | AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ |
246 | 0 19 0x1 0x0 /* PA19 periph A */ | 253 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */ |
247 | 0 20 0x1 0x0 /* PA20 periph A */ | 254 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */ |
248 | 0 21 0x1 0x0>; /* PA21 periph A */ | 255 | AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ |
249 | }; | 256 | }; |
250 | 257 | ||
251 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | 258 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { |
252 | atmel,pins = | 259 | atmel,pins = |
253 | <0 22 0x2 0x0 /* PA22 periph B */ | 260 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ |
254 | 0 23 0x2 0x0 /* PA23 periph B */ | 261 | AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */ |
255 | 0 24 0x2 0x0 /* PA24 periph B */ | 262 | AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ |
256 | 0 25 0x2 0x0 /* PA25 periph B */ | 263 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ |
257 | 0 26 0x2 0x0 /* PA26 periph B */ | 264 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ |
258 | 0 27 0x2 0x0 /* PA27 periph B */ | 265 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ |
259 | 0 28 0x2 0x0 /* PA28 periph B */ | 266 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ |
260 | 0 29 0x2 0x0>; /* PA29 periph B */ | 267 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ |
261 | }; | 268 | }; |
262 | 269 | ||
263 | pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { | 270 | pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { |
264 | atmel,pins = | 271 | atmel,pins = |
265 | <0 10 0x2 0x0 /* PA10 periph B */ | 272 | <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */ |
266 | 0 11 0x2 0x0 /* PA11 periph B */ | 273 | AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */ |
267 | 0 22 0x2 0x0 /* PA22 periph B */ | 274 | AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ |
268 | 0 25 0x2 0x0 /* PA25 periph B */ | 275 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ |
269 | 0 26 0x2 0x0 /* PA26 periph B */ | 276 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ |
270 | 0 27 0x2 0x0 /* PA27 periph B */ | 277 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ |
271 | 0 28 0x2 0x0 /* PA28 periph B */ | 278 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ |
272 | 0 29 0x2 0x0>; /* PA29 periph B */ | 279 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ |
273 | }; | 280 | }; |
274 | }; | 281 | }; |
275 | 282 | ||
276 | mmc0 { | 283 | mmc0 { |
277 | pinctrl_mmc0_clk: mmc0_clk-0 { | 284 | pinctrl_mmc0_clk: mmc0_clk-0 { |
278 | atmel,pins = | 285 | atmel,pins = |
279 | <0 8 0x1 0x0>; /* PA8 periph A */ | 286 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ |
280 | }; | 287 | }; |
281 | 288 | ||
282 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | 289 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { |
283 | atmel,pins = | 290 | atmel,pins = |
284 | <0 7 0x1 0x1 /* PA7 periph A with pullup */ | 291 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ |
285 | 0 6 0x1 0x1>; /* PA6 periph A with pullup */ | 292 | AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */ |
286 | }; | 293 | }; |
287 | 294 | ||
288 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | 295 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { |
289 | atmel,pins = | 296 | atmel,pins = |
290 | <0 9 0x1 0x1 /* PA9 periph A with pullup */ | 297 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ |
291 | 0 10 0x1 0x1 /* PA10 periph A with pullup */ | 298 | AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ |
292 | 0 11 0x1 0x1>; /* PA11 periph A with pullup */ | 299 | AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ |
293 | }; | 300 | }; |
294 | 301 | ||
295 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { | 302 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { |
296 | atmel,pins = | 303 | atmel,pins = |
297 | <0 1 0x2 0x1 /* PA1 periph B with pullup */ | 304 | <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */ |
298 | 0 0 0x2 0x1>; /* PA0 periph B with pullup */ | 305 | AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */ |
299 | }; | 306 | }; |
300 | 307 | ||
301 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { | 308 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { |
302 | atmel,pins = | 309 | atmel,pins = |
303 | <0 5 0x2 0x1 /* PA5 periph B with pullup */ | 310 | <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */ |
304 | 0 4 0x2 0x1 /* PA4 periph B with pullup */ | 311 | AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */ |
305 | 0 3 0x2 0x1>; /* PA3 periph B with pullup */ | 312 | AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */ |
306 | }; | 313 | }; |
307 | }; | 314 | }; |
308 | 315 | ||
309 | ssc0 { | 316 | ssc0 { |
310 | pinctrl_ssc0_tx: ssc0_tx-0 { | 317 | pinctrl_ssc0_tx: ssc0_tx-0 { |
311 | atmel,pins = | 318 | atmel,pins = |
312 | <1 16 0x1 0x0 /* PB16 periph A */ | 319 | <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ |
313 | 1 17 0x1 0x0 /* PB17 periph A */ | 320 | AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */ |
314 | 1 18 0x1 0x0>; /* PB18 periph A */ | 321 | AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ |
315 | }; | 322 | }; |
316 | 323 | ||
317 | pinctrl_ssc0_rx: ssc0_rx-0 { | 324 | pinctrl_ssc0_rx: ssc0_rx-0 { |
318 | atmel,pins = | 325 | atmel,pins = |
319 | <1 19 0x1 0x0 /* PB19 periph A */ | 326 | <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */ |
320 | 1 20 0x1 0x0 /* PB20 periph A */ | 327 | AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */ |
321 | 1 21 0x1 0x0>; /* PB21 periph A */ | 328 | AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */ |
322 | }; | 329 | }; |
323 | }; | 330 | }; |
324 | 331 | ||
325 | spi0 { | 332 | spi0 { |
326 | pinctrl_spi0: spi0-0 { | 333 | pinctrl_spi0: spi0-0 { |
327 | atmel,pins = | 334 | atmel,pins = |
328 | <0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */ | 335 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */ |
329 | 0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */ | 336 | AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */ |
330 | 0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */ | 337 | AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */ |
331 | }; | 338 | }; |
332 | }; | 339 | }; |
333 | 340 | ||
334 | spi1 { | 341 | spi1 { |
335 | pinctrl_spi1: spi1-0 { | 342 | pinctrl_spi1: spi1-0 { |
336 | atmel,pins = | 343 | atmel,pins = |
337 | <1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */ | 344 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */ |
338 | 1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */ | 345 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */ |
339 | 1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */ | 346 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */ |
340 | }; | 347 | }; |
341 | }; | 348 | }; |
342 | 349 | ||
343 | pioA: gpio@fffff400 { | 350 | pioA: gpio@fffff400 { |
344 | compatible = "atmel,at91rm9200-gpio"; | 351 | compatible = "atmel,at91rm9200-gpio"; |
345 | reg = <0xfffff400 0x200>; | 352 | reg = <0xfffff400 0x200>; |
346 | interrupts = <2 4 1>; | 353 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
347 | #gpio-cells = <2>; | 354 | #gpio-cells = <2>; |
348 | gpio-controller; | 355 | gpio-controller; |
349 | interrupt-controller; | 356 | interrupt-controller; |
@@ -353,7 +360,7 @@ | |||
353 | pioB: gpio@fffff600 { | 360 | pioB: gpio@fffff600 { |
354 | compatible = "atmel,at91rm9200-gpio"; | 361 | compatible = "atmel,at91rm9200-gpio"; |
355 | reg = <0xfffff600 0x200>; | 362 | reg = <0xfffff600 0x200>; |
356 | interrupts = <3 4 1>; | 363 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
357 | #gpio-cells = <2>; | 364 | #gpio-cells = <2>; |
358 | gpio-controller; | 365 | gpio-controller; |
359 | interrupt-controller; | 366 | interrupt-controller; |
@@ -363,7 +370,7 @@ | |||
363 | pioC: gpio@fffff800 { | 370 | pioC: gpio@fffff800 { |
364 | compatible = "atmel,at91rm9200-gpio"; | 371 | compatible = "atmel,at91rm9200-gpio"; |
365 | reg = <0xfffff800 0x200>; | 372 | reg = <0xfffff800 0x200>; |
366 | interrupts = <4 4 1>; | 373 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
367 | #gpio-cells = <2>; | 374 | #gpio-cells = <2>; |
368 | gpio-controller; | 375 | gpio-controller; |
369 | interrupt-controller; | 376 | interrupt-controller; |
@@ -374,7 +381,7 @@ | |||
374 | dbgu: serial@fffff200 { | 381 | dbgu: serial@fffff200 { |
375 | compatible = "atmel,at91sam9260-usart"; | 382 | compatible = "atmel,at91sam9260-usart"; |
376 | reg = <0xfffff200 0x200>; | 383 | reg = <0xfffff200 0x200>; |
377 | interrupts = <1 4 7>; | 384 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
378 | pinctrl-names = "default"; | 385 | pinctrl-names = "default"; |
379 | pinctrl-0 = <&pinctrl_dbgu>; | 386 | pinctrl-0 = <&pinctrl_dbgu>; |
380 | status = "disabled"; | 387 | status = "disabled"; |
@@ -383,7 +390,7 @@ | |||
383 | usart0: serial@fffb0000 { | 390 | usart0: serial@fffb0000 { |
384 | compatible = "atmel,at91sam9260-usart"; | 391 | compatible = "atmel,at91sam9260-usart"; |
385 | reg = <0xfffb0000 0x200>; | 392 | reg = <0xfffb0000 0x200>; |
386 | interrupts = <6 4 5>; | 393 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; |
387 | atmel,use-dma-rx; | 394 | atmel,use-dma-rx; |
388 | atmel,use-dma-tx; | 395 | atmel,use-dma-tx; |
389 | pinctrl-names = "default"; | 396 | pinctrl-names = "default"; |
@@ -394,7 +401,7 @@ | |||
394 | usart1: serial@fffb4000 { | 401 | usart1: serial@fffb4000 { |
395 | compatible = "atmel,at91sam9260-usart"; | 402 | compatible = "atmel,at91sam9260-usart"; |
396 | reg = <0xfffb4000 0x200>; | 403 | reg = <0xfffb4000 0x200>; |
397 | interrupts = <7 4 5>; | 404 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
398 | atmel,use-dma-rx; | 405 | atmel,use-dma-rx; |
399 | atmel,use-dma-tx; | 406 | atmel,use-dma-tx; |
400 | pinctrl-names = "default"; | 407 | pinctrl-names = "default"; |
@@ -405,7 +412,7 @@ | |||
405 | usart2: serial@fffb8000 { | 412 | usart2: serial@fffb8000 { |
406 | compatible = "atmel,at91sam9260-usart"; | 413 | compatible = "atmel,at91sam9260-usart"; |
407 | reg = <0xfffb8000 0x200>; | 414 | reg = <0xfffb8000 0x200>; |
408 | interrupts = <8 4 5>; | 415 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; |
409 | atmel,use-dma-rx; | 416 | atmel,use-dma-rx; |
410 | atmel,use-dma-tx; | 417 | atmel,use-dma-tx; |
411 | pinctrl-names = "default"; | 418 | pinctrl-names = "default"; |
@@ -416,7 +423,7 @@ | |||
416 | usart3: serial@fffd0000 { | 423 | usart3: serial@fffd0000 { |
417 | compatible = "atmel,at91sam9260-usart"; | 424 | compatible = "atmel,at91sam9260-usart"; |
418 | reg = <0xfffd0000 0x200>; | 425 | reg = <0xfffd0000 0x200>; |
419 | interrupts = <23 4 5>; | 426 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>; |
420 | atmel,use-dma-rx; | 427 | atmel,use-dma-rx; |
421 | atmel,use-dma-tx; | 428 | atmel,use-dma-tx; |
422 | pinctrl-names = "default"; | 429 | pinctrl-names = "default"; |
@@ -427,7 +434,7 @@ | |||
427 | uart0: serial@fffd4000 { | 434 | uart0: serial@fffd4000 { |
428 | compatible = "atmel,at91sam9260-usart"; | 435 | compatible = "atmel,at91sam9260-usart"; |
429 | reg = <0xfffd4000 0x200>; | 436 | reg = <0xfffd4000 0x200>; |
430 | interrupts = <24 4 5>; | 437 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>; |
431 | atmel,use-dma-rx; | 438 | atmel,use-dma-rx; |
432 | atmel,use-dma-tx; | 439 | atmel,use-dma-tx; |
433 | pinctrl-names = "default"; | 440 | pinctrl-names = "default"; |
@@ -438,7 +445,7 @@ | |||
438 | uart1: serial@fffd8000 { | 445 | uart1: serial@fffd8000 { |
439 | compatible = "atmel,at91sam9260-usart"; | 446 | compatible = "atmel,at91sam9260-usart"; |
440 | reg = <0xfffd8000 0x200>; | 447 | reg = <0xfffd8000 0x200>; |
441 | interrupts = <25 4 5>; | 448 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>; |
442 | atmel,use-dma-rx; | 449 | atmel,use-dma-rx; |
443 | atmel,use-dma-tx; | 450 | atmel,use-dma-tx; |
444 | pinctrl-names = "default"; | 451 | pinctrl-names = "default"; |
@@ -449,7 +456,7 @@ | |||
449 | macb0: ethernet@fffc4000 { | 456 | macb0: ethernet@fffc4000 { |
450 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 457 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
451 | reg = <0xfffc4000 0x100>; | 458 | reg = <0xfffc4000 0x100>; |
452 | interrupts = <21 4 3>; | 459 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; |
453 | pinctrl-names = "default"; | 460 | pinctrl-names = "default"; |
454 | pinctrl-0 = <&pinctrl_macb_rmii>; | 461 | pinctrl-0 = <&pinctrl_macb_rmii>; |
455 | status = "disabled"; | 462 | status = "disabled"; |
@@ -458,14 +465,14 @@ | |||
458 | usb1: gadget@fffa4000 { | 465 | usb1: gadget@fffa4000 { |
459 | compatible = "atmel,at91rm9200-udc"; | 466 | compatible = "atmel,at91rm9200-udc"; |
460 | reg = <0xfffa4000 0x4000>; | 467 | reg = <0xfffa4000 0x4000>; |
461 | interrupts = <10 4 2>; | 468 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; |
462 | status = "disabled"; | 469 | status = "disabled"; |
463 | }; | 470 | }; |
464 | 471 | ||
465 | i2c0: i2c@fffac000 { | 472 | i2c0: i2c@fffac000 { |
466 | compatible = "atmel,at91sam9260-i2c"; | 473 | compatible = "atmel,at91sam9260-i2c"; |
467 | reg = <0xfffac000 0x100>; | 474 | reg = <0xfffac000 0x100>; |
468 | interrupts = <11 4 6>; | 475 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; |
469 | #address-cells = <1>; | 476 | #address-cells = <1>; |
470 | #size-cells = <0>; | 477 | #size-cells = <0>; |
471 | status = "disabled"; | 478 | status = "disabled"; |
@@ -474,7 +481,7 @@ | |||
474 | mmc0: mmc@fffa8000 { | 481 | mmc0: mmc@fffa8000 { |
475 | compatible = "atmel,hsmci"; | 482 | compatible = "atmel,hsmci"; |
476 | reg = <0xfffa8000 0x600>; | 483 | reg = <0xfffa8000 0x600>; |
477 | interrupts = <9 4 0>; | 484 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; |
478 | #address-cells = <1>; | 485 | #address-cells = <1>; |
479 | #size-cells = <0>; | 486 | #size-cells = <0>; |
480 | status = "disabled"; | 487 | status = "disabled"; |
@@ -483,7 +490,7 @@ | |||
483 | ssc0: ssc@fffbc000 { | 490 | ssc0: ssc@fffbc000 { |
484 | compatible = "atmel,at91rm9200-ssc"; | 491 | compatible = "atmel,at91rm9200-ssc"; |
485 | reg = <0xfffbc000 0x4000>; | 492 | reg = <0xfffbc000 0x4000>; |
486 | interrupts = <14 4 5>; | 493 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; |
487 | pinctrl-names = "default"; | 494 | pinctrl-names = "default"; |
488 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | 495 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; |
489 | status = "disabled"; | 496 | status = "disabled"; |
@@ -494,7 +501,7 @@ | |||
494 | #size-cells = <0>; | 501 | #size-cells = <0>; |
495 | compatible = "atmel,at91rm9200-spi"; | 502 | compatible = "atmel,at91rm9200-spi"; |
496 | reg = <0xfffc8000 0x200>; | 503 | reg = <0xfffc8000 0x200>; |
497 | interrupts = <12 4 3>; | 504 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; |
498 | pinctrl-names = "default"; | 505 | pinctrl-names = "default"; |
499 | pinctrl-0 = <&pinctrl_spi0>; | 506 | pinctrl-0 = <&pinctrl_spi0>; |
500 | status = "disabled"; | 507 | status = "disabled"; |
@@ -505,7 +512,7 @@ | |||
505 | #size-cells = <0>; | 512 | #size-cells = <0>; |
506 | compatible = "atmel,at91rm9200-spi"; | 513 | compatible = "atmel,at91rm9200-spi"; |
507 | reg = <0xfffcc000 0x200>; | 514 | reg = <0xfffcc000 0x200>; |
508 | interrupts = <13 4 3>; | 515 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; |
509 | pinctrl-names = "default"; | 516 | pinctrl-names = "default"; |
510 | pinctrl-0 = <&pinctrl_spi1>; | 517 | pinctrl-0 = <&pinctrl_spi1>; |
511 | status = "disabled"; | 518 | status = "disabled"; |
@@ -514,7 +521,7 @@ | |||
514 | adc0: adc@fffe0000 { | 521 | adc0: adc@fffe0000 { |
515 | compatible = "atmel,at91sam9260-adc"; | 522 | compatible = "atmel,at91sam9260-adc"; |
516 | reg = <0xfffe0000 0x100>; | 523 | reg = <0xfffe0000 0x100>; |
517 | interrupts = <5 4 0>; | 524 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>; |
518 | atmel,adc-use-external-triggers; | 525 | atmel,adc-use-external-triggers; |
519 | atmel,adc-channels-used = <0xf>; | 526 | atmel,adc-channels-used = <0xf>; |
520 | atmel,adc-vref = <3300>; | 527 | atmel,adc-vref = <3300>; |
@@ -567,8 +574,8 @@ | |||
567 | atmel,nand-cmd-offset = <22>; | 574 | atmel,nand-cmd-offset = <22>; |
568 | pinctrl-names = "default"; | 575 | pinctrl-names = "default"; |
569 | pinctrl-0 = <&pinctrl_nand>; | 576 | pinctrl-0 = <&pinctrl_nand>; |
570 | gpios = <&pioC 13 0 | 577 | gpios = <&pioC 13 GPIO_ACTIVE_HIGH |
571 | &pioC 14 0 | 578 | &pioC 14 GPIO_ACTIVE_HIGH |
572 | 0 | 579 | 0 |
573 | >; | 580 | >; |
574 | status = "disabled"; | 581 | status = "disabled"; |
@@ -577,15 +584,15 @@ | |||
577 | usb0: ohci@00500000 { | 584 | usb0: ohci@00500000 { |
578 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | 585 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
579 | reg = <0x00500000 0x100000>; | 586 | reg = <0x00500000 0x100000>; |
580 | interrupts = <20 4 2>; | 587 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; |
581 | status = "disabled"; | 588 | status = "disabled"; |
582 | }; | 589 | }; |
583 | }; | 590 | }; |
584 | 591 | ||
585 | i2c@0 { | 592 | i2c@0 { |
586 | compatible = "i2c-gpio"; | 593 | compatible = "i2c-gpio"; |
587 | gpios = <&pioA 23 0 /* sda */ | 594 | gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */ |
588 | &pioA 24 0 /* scl */ | 595 | &pioA 24 GPIO_ACTIVE_HIGH /* scl */ |
589 | >; | 596 | >; |
590 | i2c-gpio,sda-open-drain; | 597 | i2c-gpio,sda-open-drain; |
591 | i2c-gpio,scl-open-drain; | 598 | i2c-gpio,scl-open-drain; |