aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/at91rm9200.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts/at91rm9200.dtsi')
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi349
1 files changed, 349 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
new file mode 100644
index 000000000000..e154f242c680
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -0,0 +1,349 @@
1/*
2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2012 Joachim Eastwood <manabian@gmail.com>
7 *
8 * Based on at91sam9260.dtsi
9 *
10 * Licensed under GPLv2 or later.
11 */
12
13/include/ "skeleton.dtsi"
14
15/ {
16 model = "Atmel AT91RM9200 family SoC";
17 compatible = "atmel,at91rm9200";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 serial4 = &usart3;
26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 gpio3 = &pioD;
30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
32 };
33 cpus {
34 cpu@0 {
35 compatible = "arm,arm920t";
36 };
37 };
38
39 memory {
40 reg = <0x20000000 0x04000000>;
41 };
42
43 ahb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 apb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 aic: interrupt-controller@fffff000 {
56 #interrupt-cells = <3>;
57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller;
59 reg = <0xfffff000 0x200>;
60 atmel,external-irqs = <25 26 27 28 29 30 31>;
61 };
62
63 ramc0: ramc@ffffff00 {
64 compatible = "atmel,at91rm9200-sdramc";
65 reg = <0xffffff00 0x100>;
66 };
67
68 pmc: pmc@fffffc00 {
69 compatible = "atmel,at91rm9200-pmc";
70 reg = <0xfffffc00 0x100>;
71 };
72
73 st: timer@fffffd00 {
74 compatible = "atmel,at91rm9200-st";
75 reg = <0xfffffd00 0x100>;
76 interrupts = <1 4 7>;
77 };
78
79 tcb0: timer@fffa0000 {
80 compatible = "atmel,at91rm9200-tcb";
81 reg = <0xfffa0000 0x100>;
82 interrupts = <17 4 0 18 4 0 19 4 0>;
83 };
84
85 tcb1: timer@fffa4000 {
86 compatible = "atmel,at91rm9200-tcb";
87 reg = <0xfffa4000 0x100>;
88 interrupts = <20 4 0 21 4 0 22 4 0>;
89 };
90
91 pinctrl@fffff400 {
92 #address-cells = <1>;
93 #size-cells = <1>;
94 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
95 ranges = <0xfffff400 0xfffff400 0x800>;
96
97 atmel,mux-mask = <
98 /* A B */
99 0xffffffff 0xffffffff /* pioA */
100 0xffffffff 0x083fffff /* pioB */
101 0xffff3fff 0x00000000 /* pioC */
102 0x03ff87ff 0x0fffff80 /* pioD */
103 >;
104
105 /* shared pinctrl settings */
106 dbgu {
107 pinctrl_dbgu: dbgu-0 {
108 atmel,pins =
109 <0 30 0x1 0x0 /* PA30 periph A */
110 0 31 0x1 0x1>; /* PA31 periph with pullup */
111 };
112 };
113
114 uart0 {
115 pinctrl_uart0: uart0-0 {
116 atmel,pins =
117 <0 17 0x1 0x0 /* PA17 periph A */
118 0 18 0x1 0x0>; /* PA18 periph A */
119 };
120
121 pinctrl_uart0_rts: uart0_rts-0 {
122 atmel,pins =
123 <0 20 0x1 0x0>; /* PA20 periph A */
124 };
125
126 pinctrl_uart0_cts: uart0_cts-0 {
127 atmel,pins =
128 <0 21 0x1 0x0>; /* PA21 periph A */
129 };
130 };
131
132 uart1 {
133 pinctrl_uart1: uart1-0 {
134 atmel,pins =
135 <1 20 0x1 0x1 /* PB20 periph A with pullup */
136 1 21 0x1 0x0>; /* PB21 periph A */
137 };
138
139 pinctrl_uart1_rts: uart1_rts-0 {
140 atmel,pins =
141 <1 24 0x1 0x0>; /* PB24 periph A */
142 };
143
144 pinctrl_uart1_cts: uart1_cts-0 {
145 atmel,pins =
146 <1 26 0x1 0x0>; /* PB26 periph A */
147 };
148
149 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
150 atmel,pins =
151 <1 19 0x1 0x0 /* PB19 periph A */
152 1 25 0x1 0x0>; /* PB25 periph A */
153 };
154
155 pinctrl_uart1_dcd: uart1_dcd-0 {
156 atmel,pins =
157 <1 23 0x1 0x0>; /* PB23 periph A */
158 };
159
160 pinctrl_uart1_ri: uart1_ri-0 {
161 atmel,pins =
162 <1 18 0x1 0x0>; /* PB18 periph A */
163 };
164 };
165
166 uart2 {
167 pinctrl_uart2: uart2-0 {
168 atmel,pins =
169 <0 22 0x1 0x0 /* PA22 periph A */
170 0 23 0x1 0x1>; /* PA23 periph A with pullup */
171 };
172
173 pinctrl_uart2_rts: uart2_rts-0 {
174 atmel,pins =
175 <0 30 0x2 0x0>; /* PA30 periph B */
176 };
177
178 pinctrl_uart2_cts: uart2_cts-0 {
179 atmel,pins =
180 <0 31 0x2 0x0>; /* PA31 periph B */
181 };
182 };
183
184 uart3 {
185 pinctrl_uart3: uart3-0 {
186 atmel,pins =
187 <0 5 0x2 0x1 /* PA5 periph B with pullup */
188 0 6 0x2 0x0>; /* PA6 periph B */
189 };
190
191 pinctrl_uart3_rts: uart3_rts-0 {
192 atmel,pins =
193 <1 0 0x2 0x0>; /* PB0 periph B */
194 };
195
196 pinctrl_uart3_cts: uart3_cts-0 {
197 atmel,pins =
198 <1 1 0x2 0x0>; /* PB1 periph B */
199 };
200 };
201
202 nand {
203 pinctrl_nand: nand-0 {
204 atmel,pins =
205 <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */
206 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */
207 };
208 };
209
210 pioA: gpio@fffff400 {
211 compatible = "atmel,at91rm9200-gpio";
212 reg = <0xfffff400 0x200>;
213 interrupts = <2 4 1>;
214 #gpio-cells = <2>;
215 gpio-controller;
216 interrupt-controller;
217 #interrupt-cells = <2>;
218 };
219
220 pioB: gpio@fffff600 {
221 compatible = "atmel,at91rm9200-gpio";
222 reg = <0xfffff600 0x200>;
223 interrupts = <3 4 1>;
224 #gpio-cells = <2>;
225 gpio-controller;
226 interrupt-controller;
227 #interrupt-cells = <2>;
228 };
229
230 pioC: gpio@fffff800 {
231 compatible = "atmel,at91rm9200-gpio";
232 reg = <0xfffff800 0x200>;
233 interrupts = <4 4 1>;
234 #gpio-cells = <2>;
235 gpio-controller;
236 interrupt-controller;
237 #interrupt-cells = <2>;
238 };
239
240 pioD: gpio@fffffa00 {
241 compatible = "atmel,at91rm9200-gpio";
242 reg = <0xfffffa00 0x200>;
243 interrupts = <5 4 1>;
244 #gpio-cells = <2>;
245 gpio-controller;
246 interrupt-controller;
247 #interrupt-cells = <2>;
248 };
249 };
250
251 dbgu: serial@fffff200 {
252 compatible = "atmel,at91rm9200-usart";
253 reg = <0xfffff200 0x200>;
254 interrupts = <1 4 7>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_dbgu>;
257 status = "disabled";
258 };
259
260 usart0: serial@fffc0000 {
261 compatible = "atmel,at91rm9200-usart";
262 reg = <0xfffc0000 0x200>;
263 interrupts = <6 4 5>;
264 atmel,use-dma-rx;
265 atmel,use-dma-tx;
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_uart0>;
268 status = "disabled";
269 };
270
271 usart1: serial@fffc4000 {
272 compatible = "atmel,at91rm9200-usart";
273 reg = <0xfffc4000 0x200>;
274 interrupts = <7 4 5>;
275 atmel,use-dma-rx;
276 atmel,use-dma-tx;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_uart1>;
279 status = "disabled";
280 };
281
282 usart2: serial@fffc8000 {
283 compatible = "atmel,at91rm9200-usart";
284 reg = <0xfffc8000 0x200>;
285 interrupts = <8 4 5>;
286 atmel,use-dma-rx;
287 atmel,use-dma-tx;
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_uart2>;
290 status = "disabled";
291 };
292
293 usart3: serial@fffcc000 {
294 compatible = "atmel,at91rm9200-usart";
295 reg = <0xfffcc000 0x200>;
296 interrupts = <23 4 5>;
297 atmel,use-dma-rx;
298 atmel,use-dma-tx;
299 pinctrl-names = "default";
300 pinctrl-0 = <&pinctrl_uart3>;
301 status = "disabled";
302 };
303
304 usb1: gadget@fffb0000 {
305 compatible = "atmel,at91rm9200-udc";
306 reg = <0xfffb0000 0x4000>;
307 interrupts = <11 4 2>;
308 status = "disabled";
309 };
310 };
311
312 nand0: nand@40000000 {
313 compatible = "atmel,at91rm9200-nand";
314 #address-cells = <1>;
315 #size-cells = <1>;
316 reg = <0x40000000 0x10000000>;
317 atmel,nand-addr-offset = <21>;
318 atmel,nand-cmd-offset = <22>;
319 pinctrl-names = "default";
320 pinctrl-0 = <&pinctrl_nand>;
321 nand-ecc-mode = "soft";
322 gpios = <&pioC 2 0
323 0
324 &pioB 1 0
325 >;
326 status = "disabled";
327 };
328
329 usb0: ohci@00300000 {
330 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
331 reg = <0x00300000 0x100000>;
332 interrupts = <23 4 2>;
333 status = "disabled";
334 };
335 };
336
337 i2c@0 {
338 compatible = "i2c-gpio";
339 gpios = <&pioA 23 0 /* sda */
340 &pioA 24 0 /* scl */
341 >;
342 i2c-gpio,sda-open-drain;
343 i2c-gpio,scl-open-drain;
344 i2c-gpio,delay-us = <2>; /* ~100 kHz */
345 #address-cells = <1>;
346 #size-cells = <0>;
347 status = "disabled";
348 };
349};
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 06:38:06 -0500