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-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi309
1 files changed, 208 insertions, 101 deletions
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 5d3ed5aafc69..92b9e21389db 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -10,7 +10,10 @@
10 * Licensed under GPLv2 or later. 10 * Licensed under GPLv2 or later.
11 */ 11 */
12 12
13/include/ "skeleton.dtsi" 13#include "skeleton.dtsi"
14#include <dt-bindings/pinctrl/at91.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16#include <dt-bindings/gpio/gpio.h>
14 17
15/ { 18/ {
16 model = "Atmel AT91RM9200 family SoC"; 19 model = "Atmel AT91RM9200 family SoC";
@@ -35,8 +38,12 @@
35 ssc2 = &ssc2; 38 ssc2 = &ssc2;
36 }; 39 };
37 cpus { 40 cpus {
38 cpu@0 { 41 #address-cells = <0>;
42 #size-cells = <0>;
43
44 cpu {
39 compatible = "arm,arm920t"; 45 compatible = "arm,arm920t";
46 device_type = "cpu";
40 }; 47 };
41 }; 48 };
42 49
@@ -77,25 +84,29 @@
77 st: timer@fffffd00 { 84 st: timer@fffffd00 {
78 compatible = "atmel,at91rm9200-st"; 85 compatible = "atmel,at91rm9200-st";
79 reg = <0xfffffd00 0x100>; 86 reg = <0xfffffd00 0x100>;
80 interrupts = <1 4 7>; 87 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
81 }; 88 };
82 89
83 tcb0: timer@fffa0000 { 90 tcb0: timer@fffa0000 {
84 compatible = "atmel,at91rm9200-tcb"; 91 compatible = "atmel,at91rm9200-tcb";
85 reg = <0xfffa0000 0x100>; 92 reg = <0xfffa0000 0x100>;
86 interrupts = <17 4 0 18 4 0 19 4 0>; 93 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
94 18 IRQ_TYPE_LEVEL_HIGH 0
95 19 IRQ_TYPE_LEVEL_HIGH 0>;
87 }; 96 };
88 97
89 tcb1: timer@fffa4000 { 98 tcb1: timer@fffa4000 {
90 compatible = "atmel,at91rm9200-tcb"; 99 compatible = "atmel,at91rm9200-tcb";
91 reg = <0xfffa4000 0x100>; 100 reg = <0xfffa4000 0x100>;
92 interrupts = <20 4 0 21 4 0 22 4 0>; 101 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
102 21 IRQ_TYPE_LEVEL_HIGH 0
103 22 IRQ_TYPE_LEVEL_HIGH 0>;
93 }; 104 };
94 105
95 i2c0: i2c@fffb8000 { 106 i2c0: i2c@fffb8000 {
96 compatible = "atmel,at91rm9200-i2c"; 107 compatible = "atmel,at91rm9200-i2c";
97 reg = <0xfffb8000 0x4000>; 108 reg = <0xfffb8000 0x4000>;
98 interrupts = <12 4 6>; 109 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
99 pinctrl-names = "default"; 110 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_twi>; 111 pinctrl-0 = <&pinctrl_twi>;
101 #address-cells = <1>; 112 #address-cells = <1>;
@@ -106,7 +117,7 @@
106 mmc0: mmc@fffb4000 { 117 mmc0: mmc@fffb4000 {
107 compatible = "atmel,hsmci"; 118 compatible = "atmel,hsmci";
108 reg = <0xfffb4000 0x4000>; 119 reg = <0xfffb4000 0x4000>;
109 interrupts = <10 4 0>; 120 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
110 #address-cells = <1>; 121 #address-cells = <1>;
111 #size-cells = <0>; 122 #size-cells = <0>;
112 status = "disabled"; 123 status = "disabled";
@@ -115,7 +126,7 @@
115 ssc0: ssc@fffd0000 { 126 ssc0: ssc@fffd0000 {
116 compatible = "atmel,at91rm9200-ssc"; 127 compatible = "atmel,at91rm9200-ssc";
117 reg = <0xfffd0000 0x4000>; 128 reg = <0xfffd0000 0x4000>;
118 interrupts = <14 4 5>; 129 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
119 pinctrl-names = "default"; 130 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 131 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
121 status = "disable"; 132 status = "disable";
@@ -124,7 +135,7 @@
124 ssc1: ssc@fffd4000 { 135 ssc1: ssc@fffd4000 {
125 compatible = "atmel,at91rm9200-ssc"; 136 compatible = "atmel,at91rm9200-ssc";
126 reg = <0xfffd4000 0x4000>; 137 reg = <0xfffd4000 0x4000>;
127 interrupts = <15 4 5>; 138 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
128 pinctrl-names = "default"; 139 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 140 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
130 status = "disable"; 141 status = "disable";
@@ -133,7 +144,7 @@
133 ssc2: ssc@fffd8000 { 144 ssc2: ssc@fffd8000 {
134 compatible = "atmel,at91rm9200-ssc"; 145 compatible = "atmel,at91rm9200-ssc";
135 reg = <0xfffd8000 0x4000>; 146 reg = <0xfffd8000 0x4000>;
136 interrupts = <16 4 5>; 147 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
137 pinctrl-names = "default"; 148 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; 149 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
139 status = "disable"; 150 status = "disable";
@@ -142,7 +153,7 @@
142 macb0: ethernet@fffbc000 { 153 macb0: ethernet@fffbc000 {
143 compatible = "cdns,at91rm9200-emac", "cdns,emac"; 154 compatible = "cdns,at91rm9200-emac", "cdns,emac";
144 reg = <0xfffbc000 0x4000>; 155 reg = <0xfffbc000 0x4000>;
145 interrupts = <24 4 3>; 156 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
146 phy-mode = "rmii"; 157 phy-mode = "rmii";
147 pinctrl-names = "default"; 158 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_macb_rmii>; 159 pinctrl-0 = <&pinctrl_macb_rmii>;
@@ -167,234 +178,319 @@
167 dbgu { 178 dbgu {
168 pinctrl_dbgu: dbgu-0 { 179 pinctrl_dbgu: dbgu-0 {
169 atmel,pins = 180 atmel,pins =
170 <0 30 0x1 0x0 /* PA30 periph A */ 181 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */
171 0 31 0x1 0x1>; /* PA31 periph with pullup */ 182 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */
172 }; 183 };
173 }; 184 };
174 185
175 uart0 { 186 uart0 {
176 pinctrl_uart0: uart0-0 { 187 pinctrl_uart0: uart0-0 {
177 atmel,pins = 188 atmel,pins =
178 <0 17 0x1 0x0 /* PA17 periph A */ 189 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
179 0 18 0x1 0x0>; /* PA18 periph A */ 190 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
180 }; 191 };
181 192
182 pinctrl_uart0_rts: uart0_rts-0 { 193 pinctrl_uart0_rts: uart0_rts-0 {
183 atmel,pins = 194 atmel,pins =
184 <0 20 0x1 0x0>; /* PA20 periph A */ 195 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
185 }; 196 };
186 197
187 pinctrl_uart0_cts: uart0_cts-0 { 198 pinctrl_uart0_cts: uart0_cts-0 {
188 atmel,pins = 199 atmel,pins =
189 <0 21 0x1 0x0>; /* PA21 periph A */ 200 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
190 }; 201 };
191 }; 202 };
192 203
193 uart1 { 204 uart1 {
194 pinctrl_uart1: uart1-0 { 205 pinctrl_uart1: uart1-0 {
195 atmel,pins = 206 atmel,pins =
196 <1 20 0x1 0x1 /* PB20 periph A with pullup */ 207 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */
197 1 21 0x1 0x0>; /* PB21 periph A */ 208 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
198 }; 209 };
199 210
200 pinctrl_uart1_rts: uart1_rts-0 { 211 pinctrl_uart1_rts: uart1_rts-0 {
201 atmel,pins = 212 atmel,pins =
202 <1 24 0x1 0x0>; /* PB24 periph A */ 213 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
203 }; 214 };
204 215
205 pinctrl_uart1_cts: uart1_cts-0 { 216 pinctrl_uart1_cts: uart1_cts-0 {
206 atmel,pins = 217 atmel,pins =
207 <1 26 0x1 0x0>; /* PB26 periph A */ 218 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
208 }; 219 };
209 220
210 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 { 221 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
211 atmel,pins = 222 atmel,pins =
212 <1 19 0x1 0x0 /* PB19 periph A */ 223 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
213 1 25 0x1 0x0>; /* PB25 periph A */ 224 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
214 }; 225 };
215 226
216 pinctrl_uart1_dcd: uart1_dcd-0 { 227 pinctrl_uart1_dcd: uart1_dcd-0 {
217 atmel,pins = 228 atmel,pins =
218 <1 23 0x1 0x0>; /* PB23 periph A */ 229 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
219 }; 230 };
220 231
221 pinctrl_uart1_ri: uart1_ri-0 { 232 pinctrl_uart1_ri: uart1_ri-0 {
222 atmel,pins = 233 atmel,pins =
223 <1 18 0x1 0x0>; /* PB18 periph A */ 234 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
224 }; 235 };
225 }; 236 };
226 237
227 uart2 { 238 uart2 {
228 pinctrl_uart2: uart2-0 { 239 pinctrl_uart2: uart2-0 {
229 atmel,pins = 240 atmel,pins =
230 <0 22 0x1 0x0 /* PA22 periph A */ 241 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */
231 0 23 0x1 0x1>; /* PA23 periph A with pullup */ 242 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
232 }; 243 };
233 244
234 pinctrl_uart2_rts: uart2_rts-0 { 245 pinctrl_uart2_rts: uart2_rts-0 {
235 atmel,pins = 246 atmel,pins =
236 <0 30 0x2 0x0>; /* PA30 periph B */ 247 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
237 }; 248 };
238 249
239 pinctrl_uart2_cts: uart2_cts-0 { 250 pinctrl_uart2_cts: uart2_cts-0 {
240 atmel,pins = 251 atmel,pins =
241 <0 31 0x2 0x0>; /* PA31 periph B */ 252 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
242 }; 253 };
243 }; 254 };
244 255
245 uart3 { 256 uart3 {
246 pinctrl_uart3: uart3-0 { 257 pinctrl_uart3: uart3-0 {
247 atmel,pins = 258 atmel,pins =
248 <0 5 0x2 0x1 /* PA5 periph B with pullup */ 259 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
249 0 6 0x2 0x0>; /* PA6 periph B */ 260 AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */
250 }; 261 };
251 262
252 pinctrl_uart3_rts: uart3_rts-0 { 263 pinctrl_uart3_rts: uart3_rts-0 {
253 atmel,pins = 264 atmel,pins =
254 <1 0 0x2 0x0>; /* PB0 periph B */ 265 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
255 }; 266 };
256 267
257 pinctrl_uart3_cts: uart3_cts-0 { 268 pinctrl_uart3_cts: uart3_cts-0 {
258 atmel,pins = 269 atmel,pins =
259 <1 1 0x2 0x0>; /* PB1 periph B */ 270 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
260 }; 271 };
261 }; 272 };
262 273
263 nand { 274 nand {
264 pinctrl_nand: nand-0 { 275 pinctrl_nand: nand-0 {
265 atmel,pins = 276 atmel,pins =
266 <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */ 277 <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
267 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */ 278 AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
268 }; 279 };
269 }; 280 };
270 281
271 macb { 282 macb {
272 pinctrl_macb_rmii: macb_rmii-0 { 283 pinctrl_macb_rmii: macb_rmii-0 {
273 atmel,pins = 284 atmel,pins =
274 <0 7 0x1 0x0 /* PA7 periph A */ 285 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
275 0 8 0x1 0x0 /* PA8 periph A */ 286 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
276 0 9 0x1 0x0 /* PA9 periph A */ 287 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
277 0 10 0x1 0x0 /* PA10 periph A */ 288 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
278 0 11 0x1 0x0 /* PA11 periph A */ 289 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
279 0 12 0x1 0x0 /* PA12 periph A */ 290 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
280 0 13 0x1 0x0 /* PA13 periph A */ 291 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
281 0 14 0x1 0x0 /* PA14 periph A */ 292 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
282 0 15 0x1 0x0 /* PA15 periph A */ 293 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
283 0 16 0x1 0x0>; /* PA16 periph A */ 294 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
284 }; 295 };
285 296
286 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 297 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
287 atmel,pins = 298 atmel,pins =
288 <1 12 0x2 0x0 /* PB12 periph B */ 299 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
289 1 13 0x2 0x0 /* PB13 periph B */ 300 AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
290 1 14 0x2 0x0 /* PB14 periph B */ 301 AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
291 1 15 0x2 0x0 /* PB15 periph B */ 302 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
292 1 16 0x2 0x0 /* PB16 periph B */ 303 AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
293 1 17 0x2 0x0 /* PB17 periph B */ 304 AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
294 1 18 0x2 0x0 /* PB18 periph B */ 305 AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
295 1 19 0x2 0x0>; /* PB19 periph B */ 306 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
296 }; 307 };
297 }; 308 };
298 309
299 mmc0 { 310 mmc0 {
300 pinctrl_mmc0_clk: mmc0_clk-0 { 311 pinctrl_mmc0_clk: mmc0_clk-0 {
301 atmel,pins = 312 atmel,pins =
302 <0 27 0x1 0x0>; /* PA27 periph A */ 313 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
303 }; 314 };
304 315
305 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 316 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
306 atmel,pins = 317 atmel,pins =
307 <0 28 0x1 0x1 /* PA28 periph A with pullup */ 318 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
308 0 29 0x1 0x1>; /* PA29 periph A with pullup */ 319 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
309 }; 320 };
310 321
311 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 322 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
312 atmel,pins = 323 atmel,pins =
313 <1 3 0x2 0x1 /* PB3 periph B with pullup */ 324 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
314 1 4 0x2 0x1 /* PB4 periph B with pullup */ 325 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
315 1 5 0x2 0x1>; /* PB5 periph B with pullup */ 326 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
316 }; 327 };
317 328
318 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 329 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
319 atmel,pins = 330 atmel,pins =
320 <0 8 0x2 0x1 /* PA8 periph B with pullup */ 331 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
321 0 9 0x2 0x1>; /* PA9 periph B with pullup */ 332 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
322 }; 333 };
323 334
324 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 335 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
325 atmel,pins = 336 atmel,pins =
326 <0 10 0x2 0x1 /* PA10 periph B with pullup */ 337 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
327 0 11 0x2 0x1 /* PA11 periph B with pullup */ 338 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
328 0 12 0x2 0x1>; /* PA12 periph B with pullup */ 339 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
329 }; 340 };
330 }; 341 };
331 342
332 ssc0 { 343 ssc0 {
333 pinctrl_ssc0_tx: ssc0_tx-0 { 344 pinctrl_ssc0_tx: ssc0_tx-0 {
334 atmel,pins = 345 atmel,pins =
335 <1 0 0x1 0x0 /* PB0 periph A */ 346 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
336 1 1 0x1 0x0 /* PB1 periph A */ 347 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
337 1 2 0x1 0x0>; /* PB2 periph A */ 348 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
338 }; 349 };
339 350
340 pinctrl_ssc0_rx: ssc0_rx-0 { 351 pinctrl_ssc0_rx: ssc0_rx-0 {
341 atmel,pins = 352 atmel,pins =
342 <1 3 0x1 0x0 /* PB3 periph A */ 353 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
343 1 4 0x1 0x0 /* PB4 periph A */ 354 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
344 1 5 0x1 0x0>; /* PB5 periph A */ 355 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
345 }; 356 };
346 }; 357 };
347 358
348 ssc1 { 359 ssc1 {
349 pinctrl_ssc1_tx: ssc1_tx-0 { 360 pinctrl_ssc1_tx: ssc1_tx-0 {
350 atmel,pins = 361 atmel,pins =
351 <1 6 0x1 0x0 /* PB6 periph A */ 362 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
352 1 7 0x1 0x0 /* PB7 periph A */ 363 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
353 1 8 0x1 0x0>; /* PB8 periph A */ 364 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
354 }; 365 };
355 366
356 pinctrl_ssc1_rx: ssc1_rx-0 { 367 pinctrl_ssc1_rx: ssc1_rx-0 {
357 atmel,pins = 368 atmel,pins =
358 <1 9 0x1 0x0 /* PB9 periph A */ 369 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
359 1 10 0x1 0x0 /* PB10 periph A */ 370 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
360 1 11 0x1 0x0>; /* PB11 periph A */ 371 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
361 }; 372 };
362 }; 373 };
363 374
364 ssc2 { 375 ssc2 {
365 pinctrl_ssc2_tx: ssc2_tx-0 { 376 pinctrl_ssc2_tx: ssc2_tx-0 {
366 atmel,pins = 377 atmel,pins =
367 <1 12 0x1 0x0 /* PB12 periph A */ 378 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
368 1 13 0x1 0x0 /* PB13 periph A */ 379 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
369 1 14 0x1 0x0>; /* PB14 periph A */ 380 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
370 }; 381 };
371 382
372 pinctrl_ssc2_rx: ssc2_rx-0 { 383 pinctrl_ssc2_rx: ssc2_rx-0 {
373 atmel,pins = 384 atmel,pins =
374 <1 15 0x1 0x0 /* PB15 periph A */ 385 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
375 1 16 0x1 0x0 /* PB16 periph A */ 386 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
376 1 17 0x1 0x0>; /* PB17 periph A */ 387 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
377 }; 388 };
378 }; 389 };
379 390
380 twi { 391 twi {
381 pinctrl_twi: twi-0 { 392 pinctrl_twi: twi-0 {
382 atmel,pins = 393 atmel,pins =
383 <0 25 0x1 0x2 /* PA25 periph A with multi drive */ 394 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
384 0 26 0x1 0x2>; /* PA26 periph A with multi drive */ 395 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
385 }; 396 };
386 397
387 pinctrl_twi_gpio: twi_gpio-0 { 398 pinctrl_twi_gpio: twi_gpio-0 {
388 atmel,pins = 399 atmel,pins =
389 <0 25 0x0 0x2 /* PA25 GPIO with multi drive */ 400 <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
390 0 26 0x0 0x2>; /* PA26 GPIO with multi drive */ 401 AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
402 };
403 };
404
405 tcb0 {
406 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
407 atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
408 };
409
410 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
411 atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
412 };
413
414 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
415 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
416 };
417
418 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
419 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
420 };
421
422 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
423 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
424 };
425
426 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
427 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
428 };
429
430 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
431 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
432 };
433
434 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
435 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
436 };
437
438 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
439 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
440 };
441 };
442
443 tcb1 {
444 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
445 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
446 };
447
448 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
449 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
450 };
451
452 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
453 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
454 };
455
456 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
457 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
458 };
459
460 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
461 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
462 };
463
464 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
465 atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
466 };
467
468 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
469 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
470 };
471
472 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
473 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
474 };
475
476 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
477 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
478 };
479 };
480
481 spi0 {
482 pinctrl_spi0: spi0-0 {
483 atmel,pins =
484 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
485 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
486 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
391 }; 487 };
392 }; 488 };
393 489
394 pioA: gpio@fffff400 { 490 pioA: gpio@fffff400 {
395 compatible = "atmel,at91rm9200-gpio"; 491 compatible = "atmel,at91rm9200-gpio";
396 reg = <0xfffff400 0x200>; 492 reg = <0xfffff400 0x200>;
397 interrupts = <2 4 1>; 493 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
398 #gpio-cells = <2>; 494 #gpio-cells = <2>;
399 gpio-controller; 495 gpio-controller;
400 interrupt-controller; 496 interrupt-controller;
@@ -404,7 +500,7 @@
404 pioB: gpio@fffff600 { 500 pioB: gpio@fffff600 {
405 compatible = "atmel,at91rm9200-gpio"; 501 compatible = "atmel,at91rm9200-gpio";
406 reg = <0xfffff600 0x200>; 502 reg = <0xfffff600 0x200>;
407 interrupts = <3 4 1>; 503 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
408 #gpio-cells = <2>; 504 #gpio-cells = <2>;
409 gpio-controller; 505 gpio-controller;
410 interrupt-controller; 506 interrupt-controller;
@@ -414,7 +510,7 @@
414 pioC: gpio@fffff800 { 510 pioC: gpio@fffff800 {
415 compatible = "atmel,at91rm9200-gpio"; 511 compatible = "atmel,at91rm9200-gpio";
416 reg = <0xfffff800 0x200>; 512 reg = <0xfffff800 0x200>;
417 interrupts = <4 4 1>; 513 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
418 #gpio-cells = <2>; 514 #gpio-cells = <2>;
419 gpio-controller; 515 gpio-controller;
420 interrupt-controller; 516 interrupt-controller;
@@ -424,7 +520,7 @@
424 pioD: gpio@fffffa00 { 520 pioD: gpio@fffffa00 {
425 compatible = "atmel,at91rm9200-gpio"; 521 compatible = "atmel,at91rm9200-gpio";
426 reg = <0xfffffa00 0x200>; 522 reg = <0xfffffa00 0x200>;
427 interrupts = <5 4 1>; 523 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
428 #gpio-cells = <2>; 524 #gpio-cells = <2>;
429 gpio-controller; 525 gpio-controller;
430 interrupt-controller; 526 interrupt-controller;
@@ -435,7 +531,7 @@
435 dbgu: serial@fffff200 { 531 dbgu: serial@fffff200 {
436 compatible = "atmel,at91rm9200-usart"; 532 compatible = "atmel,at91rm9200-usart";
437 reg = <0xfffff200 0x200>; 533 reg = <0xfffff200 0x200>;
438 interrupts = <1 4 7>; 534 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
439 pinctrl-names = "default"; 535 pinctrl-names = "default";
440 pinctrl-0 = <&pinctrl_dbgu>; 536 pinctrl-0 = <&pinctrl_dbgu>;
441 status = "disabled"; 537 status = "disabled";
@@ -444,7 +540,7 @@
444 usart0: serial@fffc0000 { 540 usart0: serial@fffc0000 {
445 compatible = "atmel,at91rm9200-usart"; 541 compatible = "atmel,at91rm9200-usart";
446 reg = <0xfffc0000 0x200>; 542 reg = <0xfffc0000 0x200>;
447 interrupts = <6 4 5>; 543 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
448 atmel,use-dma-rx; 544 atmel,use-dma-rx;
449 atmel,use-dma-tx; 545 atmel,use-dma-tx;
450 pinctrl-names = "default"; 546 pinctrl-names = "default";
@@ -455,7 +551,7 @@
455 usart1: serial@fffc4000 { 551 usart1: serial@fffc4000 {
456 compatible = "atmel,at91rm9200-usart"; 552 compatible = "atmel,at91rm9200-usart";
457 reg = <0xfffc4000 0x200>; 553 reg = <0xfffc4000 0x200>;
458 interrupts = <7 4 5>; 554 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
459 atmel,use-dma-rx; 555 atmel,use-dma-rx;
460 atmel,use-dma-tx; 556 atmel,use-dma-tx;
461 pinctrl-names = "default"; 557 pinctrl-names = "default";
@@ -466,7 +562,7 @@
466 usart2: serial@fffc8000 { 562 usart2: serial@fffc8000 {
467 compatible = "atmel,at91rm9200-usart"; 563 compatible = "atmel,at91rm9200-usart";
468 reg = <0xfffc8000 0x200>; 564 reg = <0xfffc8000 0x200>;
469 interrupts = <8 4 5>; 565 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
470 atmel,use-dma-rx; 566 atmel,use-dma-rx;
471 atmel,use-dma-tx; 567 atmel,use-dma-tx;
472 pinctrl-names = "default"; 568 pinctrl-names = "default";
@@ -477,7 +573,7 @@
477 usart3: serial@fffcc000 { 573 usart3: serial@fffcc000 {
478 compatible = "atmel,at91rm9200-usart"; 574 compatible = "atmel,at91rm9200-usart";
479 reg = <0xfffcc000 0x200>; 575 reg = <0xfffcc000 0x200>;
480 interrupts = <23 4 5>; 576 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
481 atmel,use-dma-rx; 577 atmel,use-dma-rx;
482 atmel,use-dma-tx; 578 atmel,use-dma-tx;
483 pinctrl-names = "default"; 579 pinctrl-names = "default";
@@ -488,7 +584,18 @@
488 usb1: gadget@fffb0000 { 584 usb1: gadget@fffb0000 {
489 compatible = "atmel,at91rm9200-udc"; 585 compatible = "atmel,at91rm9200-udc";
490 reg = <0xfffb0000 0x4000>; 586 reg = <0xfffb0000 0x4000>;
491 interrupts = <11 4 2>; 587 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
588 status = "disabled";
589 };
590
591 spi0: spi@fffe0000 {
592 #address-cells = <1>;
593 #size-cells = <0>;
594 compatible = "atmel,at91rm9200-spi";
595 reg = <0xfffe0000 0x200>;
596 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
597 pinctrl-names = "default";
598 pinctrl-0 = <&pinctrl_spi0>;
492 status = "disabled"; 599 status = "disabled";
493 }; 600 };
494 }; 601 };
@@ -503,9 +610,9 @@
503 pinctrl-names = "default"; 610 pinctrl-names = "default";
504 pinctrl-0 = <&pinctrl_nand>; 611 pinctrl-0 = <&pinctrl_nand>;
505 nand-ecc-mode = "soft"; 612 nand-ecc-mode = "soft";
506 gpios = <&pioC 2 0 613 gpios = <&pioC 2 GPIO_ACTIVE_HIGH
507 0 614 0
508 &pioB 1 0 615 &pioB 1 GPIO_ACTIVE_HIGH
509 >; 616 >;
510 status = "disabled"; 617 status = "disabled";
511 }; 618 };
@@ -513,15 +620,15 @@
513 usb0: ohci@00300000 { 620 usb0: ohci@00300000 {
514 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 621 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
515 reg = <0x00300000 0x100000>; 622 reg = <0x00300000 0x100000>;
516 interrupts = <23 4 2>; 623 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
517 status = "disabled"; 624 status = "disabled";
518 }; 625 };
519 }; 626 };
520 627
521 i2c@0 { 628 i2c@0 {
522 compatible = "i2c-gpio"; 629 compatible = "i2c-gpio";
523 gpios = <&pioA 25 0 /* sda */ 630 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
524 &pioA 26 0 /* scl */ 631 &pioA 26 GPIO_ACTIVE_HIGH /* scl */
525 >; 632 >;
526 i2c-gpio,sda-open-drain; 633 i2c-gpio,sda-open-drain;
527 i2c-gpio,scl-open-drain; 634 i2c-gpio,scl-open-drain;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-11 03:17:27 -0400