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Diffstat (limited to 'arch/arm/boot/dts/armada-375.dtsi')
-rw-r--r--arch/arm/boot/dts/armada-375.dtsi55
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi
index 3877693fb2d8..fb92551a1e71 100644
--- a/arch/arm/boot/dts/armada-375.dtsi
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -39,6 +39,8 @@
39 cpus { 39 cpus {
40 #address-cells = <1>; 40 #address-cells = <1>;
41 #size-cells = <0>; 41 #size-cells = <0>;
42 enable-method = "marvell,armada-375-smp";
43
42 cpu@0 { 44 cpu@0 {
43 device_type = "cpu"; 45 device_type = "cpu";
44 compatible = "arm,cortex-a9"; 46 compatible = "arm,cortex-a9";
@@ -128,6 +130,11 @@
128 cache-level = <2>; 130 cache-level = <2>;
129 }; 131 };
130 132
133 scu@c000 {
134 compatible = "arm,cortex-a9-scu";
135 reg = <0xc000 0x58>;
136 };
137
131 timer@c600 { 138 timer@c600 {
132 compatible = "arm,cortex-a9-twd-timer"; 139 compatible = "arm,cortex-a9-twd-timer";
133 reg = <0xc600 0x20>; 140 reg = <0xc600 0x20>;
@@ -194,6 +201,7 @@
194 reg-shift = <2>; 201 reg-shift = <2>;
195 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 202 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
196 reg-io-width = <1>; 203 reg-io-width = <1>;
204 clocks = <&coreclk 0>;
197 status = "disabled"; 205 status = "disabled";
198 }; 206 };
199 207
@@ -203,6 +211,7 @@
203 reg-shift = <2>; 211 reg-shift = <2>;
204 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 212 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
205 reg-io-width = <1>; 213 reg-io-width = <1>;
214 clocks = <&coreclk 0>;
206 status = "disabled"; 215 status = "disabled";
207 }; 216 };
208 217
@@ -320,6 +329,46 @@
320 clocks = <&coreclk 0>; 329 clocks = <&coreclk 0>;
321 }; 330 };
322 331
332 watchdog@20300 {
333 compatible = "marvell,armada-375-wdt";
334 reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
335 clocks = <&coreclk 0>;
336 };
337
338 cpurst@20800 {
339 compatible = "marvell,armada-370-cpu-reset";
340 reg = <0x20800 0x10>;
341 };
342
343 coherency-fabric@21010 {
344 compatible = "marvell,armada-375-coherency-fabric";
345 reg = <0x21010 0x1c>;
346 };
347
348 usb@50000 {
349 compatible = "marvell,orion-ehci";
350 reg = <0x50000 0x500>;
351 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
352 clocks = <&gateclk 18>;
353 status = "disabled";
354 };
355
356 usb@54000 {
357 compatible = "marvell,orion-ehci";
358 reg = <0x54000 0x500>;
359 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
360 clocks = <&gateclk 26>;
361 status = "disabled";
362 };
363
364 usb3@58000 {
365 compatible = "marvell,armada-375-xhci";
366 reg = <0x58000 0x20000>,<0x5b880 0x80>;
367 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
368 clocks = <&gateclk 16>;
369 status = "disabled";
370 };
371
323 xor@60800 { 372 xor@60800 {
324 compatible = "marvell,orion-xor"; 373 compatible = "marvell,orion-xor";
325 reg = <0x60800 0x100 374 reg = <0x60800 0x100
@@ -391,6 +440,12 @@
391 status = "disabled"; 440 status = "disabled";
392 }; 441 };
393 442
443 thermal@e8078 {
444 compatible = "marvell,armada375-thermal";
445 reg = <0xe8078 0x4>, <0xe807c 0x8>;
446 status = "okay";
447 };
448
394 coreclk: mvebu-sar@e8204 { 449 coreclk: mvebu-sar@e8204 {
395 compatible = "marvell,armada-375-core-clock"; 450 compatible = "marvell,armada-375-core-clock";
396 reg = <0xe8204 0x04>; 451 reg = <0xe8204 0x04>;