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-rw-r--r--arch/arm/boot/compressed/head.S26
1 files changed, 17 insertions, 9 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index d356af7cef82..99b75aa1c2ec 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -22,19 +22,27 @@
22#if defined(CONFIG_DEBUG_ICEDCC) 22#if defined(CONFIG_DEBUG_ICEDCC)
23 23
24#ifdef CONFIG_CPU_V6 24#ifdef CONFIG_CPU_V6
25 .macro loadsp, rb 25 .macro loadsp, rb, tmp
26 .endm 26 .endm
27 .macro writeb, ch, rb 27 .macro writeb, ch, rb
28 mcr p14, 0, \ch, c0, c5, 0 28 mcr p14, 0, \ch, c0, c5, 0
29 .endm 29 .endm
30#elif defined(CONFIG_CPU_V7)
31 .macro loadsp, rb, tmp
32 .endm
33 .macro writeb, ch, rb
34wait: mrc p14, 0, pc, c0, c1, 0
35 bcs wait
36 mcr p14, 0, \ch, c0, c5, 0
37 .endm
30#elif defined(CONFIG_CPU_XSCALE) 38#elif defined(CONFIG_CPU_XSCALE)
31 .macro loadsp, rb 39 .macro loadsp, rb, tmp
32 .endm 40 .endm
33 .macro writeb, ch, rb 41 .macro writeb, ch, rb
34 mcr p14, 0, \ch, c8, c0, 0 42 mcr p14, 0, \ch, c8, c0, 0
35 .endm 43 .endm
36#else 44#else
37 .macro loadsp, rb 45 .macro loadsp, rb, tmp
38 .endm 46 .endm
39 .macro writeb, ch, rb 47 .macro writeb, ch, rb
40 mcr p14, 0, \ch, c1, c0, 0 48 mcr p14, 0, \ch, c1, c0, 0
@@ -50,7 +58,7 @@
50 .endm 58 .endm
51 59
52#if defined(CONFIG_ARCH_SA1100) 60#if defined(CONFIG_ARCH_SA1100)
53 .macro loadsp, rb 61 .macro loadsp, rb, tmp
54 mov \rb, #0x80000000 @ physical base address 62 mov \rb, #0x80000000 @ physical base address
55#ifdef CONFIG_DEBUG_LL_SER3 63#ifdef CONFIG_DEBUG_LL_SER3
56 add \rb, \rb, #0x00050000 @ Ser3 64 add \rb, \rb, #0x00050000 @ Ser3
@@ -59,13 +67,13 @@
59#endif 67#endif
60 .endm 68 .endm
61#elif defined(CONFIG_ARCH_S3C2410) 69#elif defined(CONFIG_ARCH_S3C2410)
62 .macro loadsp, rb 70 .macro loadsp, rb, tmp
63 mov \rb, #0x50000000 71 mov \rb, #0x50000000
64 add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT 72 add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
65 .endm 73 .endm
66#else 74#else
67 .macro loadsp, rb 75 .macro loadsp, rb, tmp
68 addruart \rb 76 addruart \rb, \tmp
69 .endm 77 .endm
70#endif 78#endif
71#endif 79#endif
@@ -1017,7 +1025,7 @@ phex: adr r3, phexbuf
1017 strb r2, [r3, r1] 1025 strb r2, [r3, r1]
1018 b 1b 1026 b 1b
1019 1027
1020puts: loadsp r3 1028puts: loadsp r3, r1
10211: ldrb r2, [r0], #1 10291: ldrb r2, [r0], #1
1022 teq r2, #0 1030 teq r2, #0
1023 moveq pc, lr 1031 moveq pc, lr
@@ -1034,7 +1042,7 @@ puts: loadsp r3
1034putc: 1042putc:
1035 mov r2, r0 1043 mov r2, r0
1036 mov r0, #0 1044 mov r0, #0
1037 loadsp r3 1045 loadsp r3, r1
1038 b 2b 1046 b 2b
1039 1047
1040memdump: mov r12, r0 1048memdump: mov r12, r0