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1/* The head-file for the Shark
2 * by Alexander Schulz
3 *
4 * Does the following:
5 * - get the memory layout from firmware. This can only be done as long as the mmu
6 * is still on.
7 * - switch the mmu off, so we have physical addresses
8 * - copy the kernel to 0x08508000. This is done to have a fixed address where the
9 * C-parts (misc.c) are executed. This address must be known at compile-time,
10 * but the load-address of the kernel depends on how much memory is installed.
11 * - Jump to this location.
12 * - Set r8 with 0, r7 with the architecture ID for head.S
13 */
14
15#include <linux/linkage.h>
16
17#include <asm/assembler.h>
18
19 .section ".start", "ax"
20
21 .arch armv4
22 b __beginning
23
24__ofw_data: .long 0 @ the number of memory blocks
25 .space 128 @ (startaddr,size) ...
26 .space 128 @ bootargs
27 .align
28
29__beginning: mov r4, r0 @ save the entry to the firmware
30
31 mov r0, #0xC0 @ disable irq and fiq
32 mov r1, r0
33 mrs r3, cpsr
34 bic r2, r3, r0
35 eor r2, r2, r1
36 msr cpsr_c, r2
37
38 mov r0, r4 @ get the Memory layout from firmware
39 adr r1, __ofw_data
40 add r2, r1, #4
41 mov lr, pc
42 b ofw_init
43 mov r1, #0
44
45 adr r2, __mmu_off @ calculate physical address
46 sub r2, r2, #0xf0000000 @ openprom maps us at f000 virt, 0e50 phys
47 adr r0, __ofw_data
48 ldr r0, [r0, #4]
49 add r2, r2, r0
50 add r2, r2, #0x00500000
51
52 mrc p15, 0, r3, c1, c0
53 bic r3, r3, #0xC @ Write Buffer and DCache
54 bic r3, r3, #0x1000 @ ICache
55 mcr p15, 0, r3, c1, c0 @ disabled
56
57 mov r0, #0
58 mcr p15, 0, r0, c7, c7 @ flush I,D caches on v4
59 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
60 mcr p15, 0, r0, c8, c7 @ flush I,D TLBs on v4
61
62 bic r3, r3, #0x1 @ MMU
63 mcr p15, 0, r3, c1, c0 @ disabled
64
65 mov pc, r2
66
67__copy_target: .long 0x08507FFC
68__copy_end: .long 0x08607FFC
69
70 .word _start
71 .word __bss_start
72
73 .align
74__temp_stack: .space 128
75
76__mmu_off:
77 adr r0, __ofw_data @ read the 1. entry of the memory map
78 ldr r0, [r0, #4]
79 orr r0, r0, #0x00600000
80 sub r0, r0, #4
81
82 ldr r1, __copy_end
83 ldr r3, __copy_target
84
85/* r0 = 0x0e600000 (current end of kernelcode)
86 * r3 = 0x08508000 (where it should begin)
87 * r1 = 0x08608000 (end of copying area, 1MB)
88 * The kernel is compressed, so 1 MB should be enough.
89 * copy the kernel to the beginning of physical memory
90 * We start from the highest address, so we can copy
91 * from 0x08500000 to 0x08508000 if we have only 8MB
92 */
93
94/* As we get more 2.6-kernels it gets more and more
95 * uncomfortable to be bound to kernel images of 1MB only.
96 * So we add a loop here, to be able to copy some more.
97 * Alexander Schulz 2005-07-17
98 */
99
100 mov r4, #3 @ How many megabytes to copy
101
102
103__MoveCode: sub r4, r4, #1
104
105__Copy: ldr r2, [r0], #-4
106 str r2, [r1], #-4
107 teq r1, r3
108 bne __Copy
109
110 /* The firmware maps us in blocks of 1 MB, the next block is
111 _below_ the last one. So our decrementing source pointer
112 ist right here, but the destination pointer must be increased
113 by 2 MB */
114 add r1, r1, #0x00200000
115 add r3, r3, #0x00100000
116
117 teq r4, #0
118 bne __MoveCode
119
120
121 /* and jump to it */
122 adr r2, __go_on @ where we want to jump
123 adr r0, __ofw_data @ read the 1. entry of the memory map
124 ldr r0, [r0, #4]
125 sub r2, r2, r0 @ we are mapped add 0e50 now, sub that (-0e00)
126 sub r2, r2, #0x00500000 @ -0050
127 ldr r0, __copy_target @ and add 0850 8000 instead
128 add r0, r0, #4
129 add r2, r2, r0
130 mov pc, r2 @ and jump there
131
132__go_on:
133 adr sp, __temp_stack
134 add sp, sp, #128
135 adr r0, __ofw_data
136 mov lr, pc
137 b create_params
138
139 mov r8, #0
140 mov r7, #15