1 files changed, 61 insertions, 27 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 44789eff983f..f72e1707d463 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -220,8 +220,9 @@ config NEED_MACH_MEMORY_H
          be avoided when possible.
 config PHYS_OFFSET
-        hex "Physical address of main memory"
+        hex "Physical address of main memory" if MMU
        depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
+        default DRAM_BASE if !MMU
        help
          Please provide the physical address corresponding to the
          location of main memory in your system.
@@ -257,6 +258,7 @@ config ARCH_INTEGRATOR
        select ARCH_HAS_CPUFREQ
        select CLKDEV_LOOKUP
        select HAVE_MACH_CLKDEV
+        select HAVE_TCM
        select ICST
        select GENERIC_CLOCKEVENTS
        select PLAT_VERSATILE
@@ -340,10 +342,12 @@ config ARCH_HIGHBANK
        select ARM_AMBA
        select ARM_GIC
        select ARM_TIMER_SP804
+        select CACHE_L2X0
        select CLKDEV_LOOKUP
        select CPU_V7
        select GENERIC_CLOCKEVENTS
        select HAVE_ARM_SCU
+        select HAVE_SMP
        select USE_OF
        help
          Support for the Calxeda Highbank SoC based boards.
@@ -361,6 +365,7 @@ config ARCH_CNS3XXX
        select CPU_V6K
        select GENERIC_CLOCKEVENTS
        select ARM_GIC
+        select MIGHT_HAVE_CACHE_L2X0
        select MIGHT_HAVE_PCI
        select PCI_DOMAINS if PCI
        help
@@ -381,6 +386,7 @@ config ARCH_PRIMA2
        select GENERIC_CLOCKEVENTS
        select CLKDEV_LOOKUP
        select GENERIC_IRQ_CHIP
+        select MIGHT_HAVE_CACHE_L2X0
        select USE_OF
        select ZONE_DMA
        help
@@ -633,6 +639,8 @@ config ARCH_TEGRA
        select GENERIC_GPIO
        select HAVE_CLK
        select HAVE_SCHED_CLOCK
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
        select ARCH_HAS_CPUFREQ
        help
          This enables support for NVIDIA Tegra based systems (Tegra APX,
@@ -702,7 +710,9 @@ config ARCH_SHMOBILE
        select HAVE_CLK
        select CLKDEV_LOOKUP
        select HAVE_MACH_CLKDEV
+        select HAVE_SMP
        select GENERIC_CLOCKEVENTS
+        select MIGHT_HAVE_CACHE_L2X0
        select NO_IOPORT
        select SPARSE_IRQ
        select MULTI_IRQ_HANDLER
@@ -867,16 +877,6 @@ config ARCH_SHARK
          Support for the StrongARM based Digital DNARD machine, also known
          as "Shark" (<http://www.shark-linux.de/shark.html>).
-config ARCH_TCC_926
-        bool "Telechips TCC ARM926-based systems"
-        select CLKSRC_MMIO
-        select CPU_ARM926T
-        select HAVE_CLK
-        select CLKDEV_LOOKUP
-        select GENERIC_CLOCKEVENTS
-        help
-          Support for Telechips TCC ARM926-based systems.
 config ARCH_U300
        bool "ST-Ericsson U300 Series"
        depends on MMU
@@ -904,6 +904,8 @@ config ARCH_U8500
        select CLKDEV_LOOKUP
        select ARCH_REQUIRE_GPIOLIB
        select ARCH_HAS_CPUFREQ
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
        help
          Support for ST-Ericsson's Ux500 architecture
@@ -914,6 +916,7 @@ config ARCH_NOMADIK
        select CPU_ARM926T
        select CLKDEV_LOOKUP
        select GENERIC_CLOCKEVENTS
+        select MIGHT_HAVE_CACHE_L2X0
        select ARCH_REQUIRE_GPIOLIB
        help
          Support for the Nomadik platform by ST-Ericsson
@@ -973,6 +976,7 @@ config ARCH_ZYNQ
        select ARM_GIC
        select ARM_AMBA
        select ICST
+        select MIGHT_HAVE_CACHE_L2X0
        select USE_OF
        help
          Support for Xilinx Zynq ARM Cortex A9 Platform
@@ -1059,8 +1063,6 @@ source "arch/arm/plat-s5p/Kconfig"
 source "arch/arm/plat-spear/Kconfig"
-source "arch/arm/plat-tcc/Kconfig"
 if ARCH_S3C2410
 source "arch/arm/mach-s3c2410/Kconfig"
 source "arch/arm/mach-s3c2412/Kconfig"
@@ -1125,6 +1127,11 @@ config ARM_TIMER_SP804
 source arch/arm/mm/Kconfig
+config ARM_NR_BANKS
+        int
+        default 16 if ARCH_EP93XX
+        default 8
 config IWMMXT
        bool "Enable iWMMXt support"
        depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
@@ -1133,10 +1140,9 @@ config IWMMXT
          Enable support for iWMMXt context switching at run time if
          running on a CPU that supports it.
-#  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
 config XSCALE_PMU
        bool
-        depends on CPU_XSCALE && !XSCALE_PMU_TIMER
+        depends on CPU_XSCALE
        default y
 config CPU_HAS_PMU
@@ -1231,7 +1237,7 @@ config ARM_ERRATA_742231
          capabilities of the processor.
 config PL310_ERRATA_588369
-        bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
+        bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
        depends on CACHE_L2X0
        help
           The PL310 L2 cache controller implements three types of Clean &
@@ -1245,7 +1251,7 @@ config PL310_ERRATA_588369
 config ARM_ERRATA_720789
        bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
-        depends on CPU_V7 && SMP
+        depends on CPU_V7
        help
          This option enables the workaround for the 720789 Cortex-A9 (prior to
          r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
@@ -1256,7 +1262,7 @@ config ARM_ERRATA_720789
          entries regardless of the ASID.
 config PL310_ERRATA_727915
-        bool "Background Clean & Invalidate by Way operation can cause data corruption"
+        bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
        depends on CACHE_L2X0
        help
          PL310 implements the Clean & Invalidate by Way L2 cache maintenance
@@ -1281,7 +1287,7 @@ config ARM_ERRATA_743622
 config ARM_ERRATA_751472
        bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
-        depends on CPU_V7 && SMP
+        depends on CPU_V7
        help
          This option enables the workaround for the 751472 Cortex-A9 (prior
          to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
@@ -1289,8 +1295,8 @@ config ARM_ERRATA_751472
          operation is received by a CPU before the ICIALLUIS has completed,
          potentially leading to corrupted entries in the cache or TLB.
-config ARM_ERRATA_753970
+config PL310_ERRATA_753970
-        bool "ARM errata: cache sync operation may be faulty"
+        bool "PL310 errata: cache sync operation may be faulty"
        depends on CACHE_PL310
        help
          This option enables the workaround for the 753970 PL310 (r3p0) erratum.
@@ -1352,6 +1358,18 @@ config ARM_ERRATA_764369
          relevant cache maintenance functions and sets a specific bit
          in the diagnostic control register of the SCU.
+config PL310_ERRATA_769419
+        bool "PL310 errata: no automatic Store Buffer drain"
+        depends on CACHE_L2X0
+        help
+          On revisions of the PL310 prior to r3p2, the Store Buffer does
+          not automatically drain. This can cause normal, non-cacheable
+          writes to be retained when the memory system is idle, leading
+          to suboptimal I/O performance for drivers using coherent DMA.
+          This option adds a write barrier to the cpu_idle loop so that,
+          on systems with an outer cache, the store buffer is drained
+          explicitly.
 endmenu
 source "arch/arm/common/Kconfig"
@@ -1422,14 +1440,20 @@ menu "Kernel Features"
 source "kernel/time/Kconfig"
+config HAVE_SMP
+        bool
+        help
+          This option should be selected by machines which have an SMP-
+          capable CPU.
+          The only effect of this option is to make the SMP-related
+          options available to the user for configuration.
 config SMP
        bool "Symmetric Multi-Processing"
        depends on CPU_V6K || CPU_V7
        depends on GENERIC_CLOCKEVENTS
-        depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
+        depends on HAVE_SMP
-                 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
-                 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
-                 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q
        depends on MMU
        select USE_GENERIC_SMP_HELPERS
        select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
@@ -1547,6 +1571,16 @@ config LOCAL_TIMERS
          accounting to be spread across the timer interval, preventing a
          "thundering herd" at every timer tick.
+config ARCH_NR_GPIO
+        int
+        default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
+        default 350 if ARCH_U8500
+        default 0
+        help
+          Maximum number of GPIOs in the system.
+          If unsure, leave the default value.
 source kernel/Kconfig.preempt
 config HZ
@@ -1959,7 +1993,7 @@ endchoice
 config XIP_KERNEL
        bool "Kernel Execute-In-Place from ROM"
-        depends on !ZBOOT_ROM
+        depends on !ZBOOT_ROM && !ARM_LPAE
        help
          Execute-In-Place allows the kernel to run from non-volatile storage
          directly addressable by the CPU, such as NOR flash. This saves RAM
@@ -1989,7 +2023,7 @@ config XIP_PHYS_ADDR
 config KEXEC
        bool "Kexec system call (EXPERIMENTAL)"
-        depends on EXPERIMENTAL
+        depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
        help
          kexec is a system call that implements the ability to shutdown your
          current kernel, and to start another kernel.  It is like a reboot