diff options
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r-- | arch/arm/Kconfig | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ab14c0a5d21e..0f89335b84c2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -1063,6 +1063,20 @@ config ARM_ERRATA_742230 | |||
1063 | instruction to behave as a DSB, ensuring the correct behaviour of | 1063 | instruction to behave as a DSB, ensuring the correct behaviour of |
1064 | the two writes. | 1064 | the two writes. |
1065 | 1065 | ||
1066 | config ARM_ERRATA_742231 | ||
1067 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | ||
1068 | depends on CPU_V7 && SMP | ||
1069 | help | ||
1070 | This option enables the workaround for the 742231 Cortex-A9 | ||
1071 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | ||
1072 | Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, | ||
1073 | accessing some data located in the same cache line, may get corrupted | ||
1074 | data due to bad handling of the address hazard when the line gets | ||
1075 | replaced from one of the CPUs at the same time as another CPU is | ||
1076 | accessing it. This workaround sets specific bits in the diagnostic | ||
1077 | register of the Cortex-A9 which reduces the linefill issuing | ||
1078 | capabilities of the processor. | ||
1079 | |||
1066 | config PL310_ERRATA_588369 | 1080 | config PL310_ERRATA_588369 |
1067 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" | 1081 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" |
1068 | depends on CACHE_L2X0 && ARCH_OMAP4 | 1082 | depends on CACHE_L2X0 && ARCH_OMAP4 |