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-rw-r--r--arch/arc/mm/tlbex.S5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index 4b1ad2d905ca..9df765dc7c3a 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -53,8 +53,7 @@
53; For details refer to comments before TLBMISS_FREEUP_REGS below 53; For details refer to comments before TLBMISS_FREEUP_REGS below
54;-------------------------------------------------------------------------- 54;--------------------------------------------------------------------------
55 55
56 .section .data 56ARCFP_DATA ex_saved_reg1
57 .global ex_saved_reg1
58 .align 1 << L1_CACHE_SHIFT ; IMP: Must be Cache Line aligned 57 .align 1 << L1_CACHE_SHIFT ; IMP: Must be Cache Line aligned
59 .type ex_saved_reg1, @object 58 .type ex_saved_reg1, @object
60#ifdef CONFIG_SMP 59#ifdef CONFIG_SMP
@@ -255,7 +254,7 @@ ex_saved_reg1:
255#endif 254#endif
256.endm 255.endm
257 256
258.section .text, "ax",@progbits ;Fast Path Code, candidate for ICCM 257ARCFP_CODE ;Fast Path Code, candidate for ICCM
259 258
260;----------------------------------------------------------------------------- 259;-----------------------------------------------------------------------------
261; I-TLB Miss Exception Handler 260; I-TLB Miss Exception Handler