aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arc/mm/tlb.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arc/mm/tlb.c')
-rw-r--r--arch/arc/mm/tlb.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c
index 5f53050abf60..db0f0f823980 100644
--- a/arch/arc/mm/tlb.c
+++ b/arch/arc/mm/tlb.c
@@ -100,7 +100,7 @@
100 100
101 101
102/* A copy of the ASID from the PID reg is kept in asid_cache */ 102/* A copy of the ASID from the PID reg is kept in asid_cache */
103unsigned int asid_cache = MM_CTXT_FIRST_CYCLE; 103DEFINE_PER_CPU(unsigned int, asid_cache) = MM_CTXT_FIRST_CYCLE;
104 104
105/* 105/*
106 * Utility Routine to erase a J-TLB entry 106 * Utility Routine to erase a J-TLB entry
@@ -274,6 +274,7 @@ noinline void local_flush_tlb_mm(struct mm_struct *mm)
274void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 274void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
275 unsigned long end) 275 unsigned long end)
276{ 276{
277 const unsigned int cpu = smp_processor_id();
277 unsigned long flags; 278 unsigned long flags;
278 279
279 /* If range @start to @end is more than 32 TLB entries deep, 280 /* If range @start to @end is more than 32 TLB entries deep,
@@ -297,9 +298,9 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
297 298
298 local_irq_save(flags); 299 local_irq_save(flags);
299 300
300 if (vma->vm_mm->context.asid != MM_CTXT_NO_ASID) { 301 if (asid_mm(vma->vm_mm, cpu) != MM_CTXT_NO_ASID) {
301 while (start < end) { 302 while (start < end) {
302 tlb_entry_erase(start | hw_pid(vma->vm_mm)); 303 tlb_entry_erase(start | hw_pid(vma->vm_mm, cpu));
303 start += PAGE_SIZE; 304 start += PAGE_SIZE;
304 } 305 }
305 } 306 }
@@ -346,6 +347,7 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
346 347
347void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) 348void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
348{ 349{
350 const unsigned int cpu = smp_processor_id();
349 unsigned long flags; 351 unsigned long flags;
350 352
351 /* Note that it is critical that interrupts are DISABLED between 353 /* Note that it is critical that interrupts are DISABLED between
@@ -353,8 +355,8 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
353 */ 355 */
354 local_irq_save(flags); 356 local_irq_save(flags);
355 357
356 if (vma->vm_mm->context.asid != MM_CTXT_NO_ASID) { 358 if (asid_mm(vma->vm_mm, cpu) != MM_CTXT_NO_ASID) {
357 tlb_entry_erase((page & PAGE_MASK) | hw_pid(vma->vm_mm)); 359 tlb_entry_erase((page & PAGE_MASK) | hw_pid(vma->vm_mm, cpu));
358 utlb_invalidate(); 360 utlb_invalidate();
359 } 361 }
360 362
@@ -400,7 +402,7 @@ void create_tlb(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
400 402
401 local_irq_save(flags); 403 local_irq_save(flags);
402 404
403 tlb_paranoid_check(vma->vm_mm->context.asid, address); 405 tlb_paranoid_check(asid_mm(vma->vm_mm, smp_processor_id()), address);
404 406
405 address &= PAGE_MASK; 407 address &= PAGE_MASK;
406 408