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-rw-r--r--arch/arc/include/asm/pgtable.h39
1 files changed, 14 insertions, 25 deletions
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h
index 4749a0eee1cf..99799c91ca00 100644
--- a/arch/arc/include/asm/pgtable.h
+++ b/arch/arc/include/asm/pgtable.h
@@ -57,27 +57,21 @@
57 57
58#define _PAGE_ACCESSED (1<<1) /* Page is accessed (S) */ 58#define _PAGE_ACCESSED (1<<1) /* Page is accessed (S) */
59#define _PAGE_CACHEABLE (1<<2) /* Page is cached (H) */ 59#define _PAGE_CACHEABLE (1<<2) /* Page is cached (H) */
60#define _PAGE_U_EXECUTE (1<<3) /* Page has user execute perm (H) */ 60#define _PAGE_EXECUTE (1<<3) /* Page has user execute perm (H) */
61#define _PAGE_U_WRITE (1<<4) /* Page has user write perm (H) */ 61#define _PAGE_WRITE (1<<4) /* Page has user write perm (H) */
62#define _PAGE_U_READ (1<<5) /* Page has user read perm (H) */ 62#define _PAGE_READ (1<<5) /* Page has user read perm (H) */
63#define _PAGE_K_EXECUTE (1<<6) /* Page has kernel execute perm (H) */
64#define _PAGE_K_WRITE (1<<7) /* Page has kernel write perm (H) */
65#define _PAGE_K_READ (1<<8) /* Page has kernel perm (H) */
66#define _PAGE_GLOBAL (1<<9) /* Page is global (H) */ 63#define _PAGE_GLOBAL (1<<9) /* Page is global (H) */
67#define _PAGE_MODIFIED (1<<10) /* Page modified (dirty) (S) */ 64#define _PAGE_MODIFIED (1<<10) /* Page modified (dirty) (S) */
68#define _PAGE_FILE (1<<10) /* page cache/ swap (S) */ 65#define _PAGE_FILE (1<<10) /* page cache/ swap (S) */
69#define _PAGE_PRESENT (1<<11) /* TLB entry is valid (H) */ 66#define _PAGE_PRESENT (1<<11) /* TLB entry is valid (H) */
70 67
71#else 68#else /* MMU v3 onwards */
72 69
73/* PD1 */ 70/* PD1 */
74#define _PAGE_CACHEABLE (1<<0) /* Page is cached (H) */ 71#define _PAGE_CACHEABLE (1<<0) /* Page is cached (H) */
75#define _PAGE_U_EXECUTE (1<<1) /* Page has user execute perm (H) */ 72#define _PAGE_EXECUTE (1<<1) /* Page has user execute perm (H) */
76#define _PAGE_U_WRITE (1<<2) /* Page has user write perm (H) */ 73#define _PAGE_WRITE (1<<2) /* Page has user write perm (H) */
77#define _PAGE_U_READ (1<<3) /* Page has user read perm (H) */ 74#define _PAGE_READ (1<<3) /* Page has user read perm (H) */
78#define _PAGE_K_EXECUTE (1<<4) /* Page has kernel execute perm (H) */
79#define _PAGE_K_WRITE (1<<5) /* Page has kernel write perm (H) */
80#define _PAGE_K_READ (1<<6) /* Page has kernel perm (H) */
81#define _PAGE_ACCESSED (1<<7) /* Page is accessed (S) */ 75#define _PAGE_ACCESSED (1<<7) /* Page is accessed (S) */
82 76
83/* PD0 */ 77/* PD0 */
@@ -92,8 +86,8 @@
92#define _PAGE_SHARED_CODE_H (1<<31) /* Hardware counterpart of above */ 86#define _PAGE_SHARED_CODE_H (1<<31) /* Hardware counterpart of above */
93#endif 87#endif
94 88
95/* Kernel allowed all permissions for all pages */ 89/* vmalloc permissions */
96#define _K_PAGE_PERMS (_PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ | \ 90#define _K_PAGE_PERMS (_PAGE_EXECUTE | _PAGE_WRITE | _PAGE_READ | \
97 _PAGE_GLOBAL | _PAGE_PRESENT) 91 _PAGE_GLOBAL | _PAGE_PRESENT)
98 92
99#ifdef CONFIG_ARC_CACHE_PAGES 93#ifdef CONFIG_ARC_CACHE_PAGES
@@ -109,10 +103,6 @@
109 */ 103 */
110#define ___DEF (_PAGE_PRESENT | _PAGE_DEF_CACHEABLE) 104#define ___DEF (_PAGE_PRESENT | _PAGE_DEF_CACHEABLE)
111 105
112#define _PAGE_READ (_PAGE_U_READ | _PAGE_K_READ)
113#define _PAGE_WRITE (_PAGE_U_WRITE | _PAGE_K_WRITE)
114#define _PAGE_EXECUTE (_PAGE_U_EXECUTE | _PAGE_K_EXECUTE)
115
116/* Set of bits not changed in pte_modify */ 106/* Set of bits not changed in pte_modify */
117#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED) 107#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED)
118 108
@@ -126,8 +116,8 @@
126 116
127#define PAGE_SHARED PAGE_U_W_R 117#define PAGE_SHARED PAGE_U_W_R
128 118
129/* While kernel runs out of unstrslated space, vmalloc/modules use a chunk of 119/* While kernel runs out of unstranslated space, vmalloc/modules use a chunk of
130 * kernel vaddr space - visible in all addr spaces, but kernel mode only 120 * user vaddr space - visible in all addr spaces, but kernel mode only
131 * Thus Global, all-kernel-access, no-user-access, cached 121 * Thus Global, all-kernel-access, no-user-access, cached
132 */ 122 */
133#define PAGE_KERNEL __pgprot(_K_PAGE_PERMS | _PAGE_DEF_CACHEABLE) 123#define PAGE_KERNEL __pgprot(_K_PAGE_PERMS | _PAGE_DEF_CACHEABLE)
@@ -136,10 +126,9 @@
136#define PAGE_KERNEL_NO_CACHE __pgprot(_K_PAGE_PERMS) 126#define PAGE_KERNEL_NO_CACHE __pgprot(_K_PAGE_PERMS)
137 127
138/* Masks for actual TLB "PD"s */ 128/* Masks for actual TLB "PD"s */
139#define PTE_BITS_IN_PD0 (_PAGE_GLOBAL | _PAGE_PRESENT) 129#define PTE_BITS_IN_PD0 (_PAGE_GLOBAL | _PAGE_PRESENT)
140#define PTE_BITS_IN_PD1 (PAGE_MASK | _PAGE_CACHEABLE | \ 130#define PTE_BITS_RWX (_PAGE_EXECUTE | _PAGE_WRITE | _PAGE_READ)
141 _PAGE_U_EXECUTE | _PAGE_U_WRITE | _PAGE_U_READ | \ 131#define PTE_BITS_NON_RWX_IN_PD1 (PAGE_MASK | _PAGE_CACHEABLE)
142 _PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ)
143 132
144/************************************************************************** 133/**************************************************************************
145 * Mapping of vm_flags (Generic VM) to PTE flags (arch specific) 134 * Mapping of vm_flags (Generic VM) to PTE flags (arch specific)