diff options
Diffstat (limited to 'arch/alpha/kernel/pci.c')
-rw-r--r-- | arch/alpha/kernel/pci.c | 22 |
1 files changed, 5 insertions, 17 deletions
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c index c107cc08daf4..78357798b6fd 100644 --- a/arch/alpha/kernel/pci.c +++ b/arch/alpha/kernel/pci.c | |||
@@ -71,25 +71,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82378, quirk_i | |||
71 | static void __init | 71 | static void __init |
72 | quirk_cypress(struct pci_dev *dev) | 72 | quirk_cypress(struct pci_dev *dev) |
73 | { | 73 | { |
74 | /* The Notorious Cy82C693 chip. */ | ||
75 | |||
76 | /* The Cypress IDE controller doesn't support native mode, but it | ||
77 | has programmable addresses of IDE command/control registers. | ||
78 | This violates PCI specifications, confuses the IDE subsystem and | ||
79 | causes resource conflicts between the primary HD_CMD register and | ||
80 | the floppy controller. Ugh. Fix that. */ | ||
81 | if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE) { | ||
82 | dev->resource[0].flags = 0; | ||
83 | dev->resource[1].flags = 0; | ||
84 | } | ||
85 | |||
86 | /* The Cypress bridge responds on the PCI bus in the address range | 74 | /* The Cypress bridge responds on the PCI bus in the address range |
87 | 0xffff0000-0xffffffff (conventional x86 BIOS ROM). There is no | 75 | 0xffff0000-0xffffffff (conventional x86 BIOS ROM). There is no |
88 | way to turn this off. The bridge also supports several extended | 76 | way to turn this off. The bridge also supports several extended |
89 | BIOS ranges (disabled after power-up), and some consoles do turn | 77 | BIOS ranges (disabled after power-up), and some consoles do turn |
90 | them on. So if we use a large direct-map window, or a large SG | 78 | them on. So if we use a large direct-map window, or a large SG |
91 | window, we must avoid the entire 0xfff00000-0xffffffff region. */ | 79 | window, we must avoid the entire 0xfff00000-0xffffffff region. */ |
92 | else if (dev->class >> 8 == PCI_CLASS_BRIDGE_ISA) { | 80 | if (dev->class >> 8 == PCI_CLASS_BRIDGE_ISA) { |
93 | if (__direct_map_base + __direct_map_size >= 0xfff00000UL) | 81 | if (__direct_map_base + __direct_map_size >= 0xfff00000UL) |
94 | __direct_map_size = 0xfff00000UL - __direct_map_base; | 82 | __direct_map_size = 0xfff00000UL - __direct_map_base; |
95 | else { | 83 | else { |
@@ -391,7 +379,7 @@ pcibios_set_master(struct pci_dev *dev) | |||
391 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); | 379 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); |
392 | } | 380 | } |
393 | 381 | ||
394 | static void __init | 382 | void __init |
395 | pcibios_claim_one_bus(struct pci_bus *b) | 383 | pcibios_claim_one_bus(struct pci_bus *b) |
396 | { | 384 | { |
397 | struct pci_dev *dev; | 385 | struct pci_dev *dev; |
@@ -405,7 +393,8 @@ pcibios_claim_one_bus(struct pci_bus *b) | |||
405 | 393 | ||
406 | if (r->parent || !r->start || !r->flags) | 394 | if (r->parent || !r->start || !r->flags) |
407 | continue; | 395 | continue; |
408 | pci_claim_resource(dev, i); | 396 | if (pci_probe_only || (r->flags & IORESOURCE_PCI_FIXED)) |
397 | pci_claim_resource(dev, i); | ||
409 | } | 398 | } |
410 | } | 399 | } |
411 | 400 | ||
@@ -444,8 +433,7 @@ common_init_pci(void) | |||
444 | } | 433 | } |
445 | } | 434 | } |
446 | 435 | ||
447 | if (pci_probe_only) | 436 | pcibios_claim_console_setup(); |
448 | pcibios_claim_console_setup(); | ||
449 | 437 | ||
450 | pci_assign_unassigned_resources(); | 438 | pci_assign_unassigned_resources(); |
451 | pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq); | 439 | pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq); |