450 files changed, 16332 insertions, 3460 deletions

diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX
index 0c4cc688e89a..38f8444bdd0e 100644
--- a/Documentation/00-INDEX
+++ b/Documentation/00-INDEX
@@ -40,7 +40,7 @@ IPMI.txt
 IRQ-affinity.txt
         - how to select which CPU(s) handle which interrupt events on SMP.
 IRQ-domain.txt
-        - info on inerrupt numbering and setting up IRQ domains.
+        - info on interrupt numbering and setting up IRQ domains.
 IRQ.txt
         - description of what an IRQ is.
 Intel-IOMMU.txt
diff --git a/Documentation/ABI/stable/sysfs-bus-usb b/Documentation/ABI/stable/sysfs-bus-usb
new file mode 100644
index 000000000000..a6b685724740
--- /dev/null
+++ b/Documentation/ABI/stable/sysfs-bus-usb
@@ -0,0 +1,142 @@
+What:           /sys/bus/usb/devices/.../power/persist
+Date:           May 2007
+KernelVersion:  2.6.23
+Contact:        Alan Stern <stern@rowland.harvard.edu>
+Description:
+                If CONFIG_USB_PERSIST is set, then each USB device directory
+                will contain a file named power/persist.  The file holds a
+                boolean value (0 or 1) indicating whether or not the
+                "USB-Persist" facility is enabled for the device.  Since the
+                facility is inherently dangerous, it is disabled by default
+                for all devices except hubs.  For more information, see
+                Documentation/usb/persist.txt.
+
+What:           /sys/bus/usb/devices/.../power/autosuspend
+Date:           March 2007
+KernelVersion:  2.6.21
+Contact:        Alan Stern <stern@rowland.harvard.edu>
+Description:
+                Each USB device directory will contain a file named
+                power/autosuspend.  This file holds the time (in seconds)
+                the device must be idle before it will be autosuspended.
+                0 means the device will be autosuspended as soon as
+                possible.  Negative values will prevent the device from
+                being autosuspended at all, and writing a negative value
+                will resume the device if it is already suspended.
+
+                The autosuspend delay for newly-created devices is set to
+                the value of the usbcore.autosuspend module parameter.
+
+What:           /sys/bus/usb/device/.../power/connected_duration
+Date:           January 2008
+KernelVersion:  2.6.25
+Contact:        Sarah Sharp <sarah.a.sharp@intel.com>
+Description:
+                If CONFIG_PM_RUNTIME is enabled then this file
+                is present.  When read, it returns the total time (in msec)
+                that the USB device has been connected to the machine.  This
+                file is read-only.
+Users:
+                PowerTOP <powertop@lists.01.org>
+                https://01.org/powertop/
+
+What:           /sys/bus/usb/device/.../power/active_duration
+Date:           January 2008
+KernelVersion:  2.6.25
+Contact:        Sarah Sharp <sarah.a.sharp@intel.com>
+Description:
+                If CONFIG_PM_RUNTIME is enabled then this file
+                is present.  When read, it returns the total time (in msec)
+                that the USB device has been active, i.e. not in a suspended
+                state.  This file is read-only.
+
+                Tools can use this file and the connected_duration file to
+                compute the percentage of time that a device has been active.
+                For example,
+                echo $((100 * `cat active_duration` / `cat connected_duration`))
+                will give an integer percentage.  Note that this does not
+                account for counter wrap.
+Users:
+                PowerTOP <powertop@lists.01.org>
+                https://01.org/powertop/
+
+What:           /sys/bus/usb/devices/<busnum>-<port[.port]>...:<config num>-<interface num>/supports_autosuspend
+Date:           January 2008
+KernelVersion:  2.6.27
+Contact:        Sarah Sharp <sarah.a.sharp@intel.com>
+Description:
+                When read, this file returns 1 if the interface driver
+                for this interface supports autosuspend.  It also
+                returns 1 if no driver has claimed this interface, as an
+                unclaimed interface will not stop the device from being
+                autosuspended if all other interface drivers are idle.
+                The file returns 0 if autosuspend support has not been
+                added to the driver.
+Users:
+                USB PM tool
+                git://git.moblin.org/users/sarah/usb-pm-tool/
+
+What:           /sys/bus/usb/device/.../avoid_reset_quirk
+Date:           December 2009
+Contact:        Oliver Neukum <oliver@neukum.org>
+Description:
+                Writing 1 to this file tells the kernel that this
+                device will morph into another mode when it is reset.
+                Drivers will not use reset for error handling for
+                such devices.
+Users:
+                usb_modeswitch
+
+What:           /sys/bus/usb/devices/.../devnum
+KernelVersion:  since at least 2.6.18
+Description:
+                Device address on the USB bus.
+Users:
+                libusb
+
+What:           /sys/bus/usb/devices/.../bConfigurationValue
+KernelVersion:  since at least 2.6.18
+Description:
+                bConfigurationValue of the *active* configuration for the
+                device. Writing 0 or -1 to bConfigurationValue will reset the
+                active configuration (unconfigure the device). Writing
+                another value will change the active configuration.
+
+                Note that some devices, in violation of the USB spec, have a
+                configuration with a value equal to 0. Writing 0 to
+                bConfigurationValue for these devices will install that
+                configuration, rather then unconfigure the device.
+
+                Writing -1 will always unconfigure the device.
+Users:
+                libusb
+
+What:           /sys/bus/usb/devices/.../busnum
+KernelVersion:  2.6.22
+Description:
+                Bus-number of the USB-bus the device is connected to.
+Users:
+                libusb
+
+What:           /sys/bus/usb/devices/.../descriptors
+KernelVersion:  2.6.26
+Description:
+                Binary file containing cached descriptors of the device. The
+                binary data consists of the device descriptor followed by the
+                descriptors for each configuration of the device.
+                Note that the wTotalLength of the config descriptors can not
+                be trusted, as the device may have a smaller config descriptor
+                than it advertises. The bLength field of each (sub) descriptor
+                can be trusted, and can be used to seek forward one (sub)
+                descriptor at a time until the next config descriptor is found.
+                All descriptors read from this file are in bus-endian format
+Users:
+                libusb
+
+What:           /sys/bus/usb/devices/.../speed
+KernelVersion:  since at least 2.6.18
+Description:
+                Speed the device is connected with to the usb-host in
+                Mbit / second. IE one of 1.5 / 12 / 480 / 5000.
+Users:
+                libusb
diff --git a/Documentation/ABI/testing/configfs-usb-gadget-mass-storage b/Documentation/ABI/testing/configfs-usb-gadget-mass-storage
new file mode 100644
index 000000000000..ad72a37ee9ff
--- /dev/null
+++ b/Documentation/ABI/testing/configfs-usb-gadget-mass-storage
@@ -0,0 +1,31 @@
+What:           /config/usb-gadget/gadget/functions/mass_storage.name
+Date:           Oct 2013
+KenelVersion:   3.13
+Description:
+                The attributes:
+
+                stall           - Set to permit function to halt bulk endpoints.
+                                Disabled on some USB devices known not to work
+                                correctly. You should set it to true.
+                num_buffers     - Number of pipeline buffers. Valid numbers
+                                are 2..4. Available only if
+                                CONFIG_USB_GADGET_DEBUG_FILES is set.
+
+What:           /config/usb-gadget/gadget/functions/mass_storage.name/lun.name
+Date:           Oct 2013
+KenelVersion:   3.13
+Description:
+                The attributes:
+
+                file            - The path to the backing file for the LUN.
+                                Required if LUN is not marked as removable.
+                ro              - Flag specifying access to the LUN shall be
+                                read-only. This is implied if CD-ROM emulation
+                                is enabled as well as when it was impossible
+                                to open "filename" in R/W mode.
+                removable       - Flag specifying that LUN shall be indicated as
+                                being removable.
+                cdrom           - Flag specifying that LUN shall be reported as
+                                being a CD-ROM.
+                nofua           - Flag specifying that FUA flag
+                                in SCSI WRITE(10,12)
diff --git a/Documentation/ABI/testing/sysfs-block-zram b/Documentation/ABI/testing/sysfs-block-zram
index ec93fe33baa6..3f0b9ae61d8c 100644
--- a/Documentation/ABI/testing/sysfs-block-zram
+++ b/Documentation/ABI/testing/sysfs-block-zram
@@ -5,20 +5,21 @@ Description:
                 The disksize file is read-write and specifies the disk size
                 which represents the limit on the *uncompressed* worth of data
                 that can be stored in this disk.
+                Unit: bytes
 
 What:           /sys/block/zram<id>/initstate
 Date:           August 2010
 Contact:        Nitin Gupta <ngupta@vflare.org>
 Description:
-                The disksize file is read-only and shows the initialization
+                The initstate file is read-only and shows the initialization
                 state of the device.
 
 What:           /sys/block/zram<id>/reset
 Date:           August 2010
 Contact:        Nitin Gupta <ngupta@vflare.org>
 Description:
-                The disksize file is write-only and allows resetting the
-                device. The reset operation frees all the memory assocaited
+                The reset file is write-only and allows resetting the
+                device. The reset operation frees all the memory associated
                 with this device.
 
 What:           /sys/block/zram<id>/num_reads
@@ -48,7 +49,7 @@ Contact:	Nitin Gupta <ngupta@vflare.org>
 Description:
                 The notify_free file is read-only and specifies the number of
                 swap slot free notifications received by this device. These
-                notifications are send to a swap block device when a swap slot
+                notifications are sent to a swap block device when a swap slot
                 is freed. This statistic is applicable only when this disk is
                 being used as a swap disk.
 
diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio
index dda81ffae5cf..b20e829d350f 100644
--- a/Documentation/ABI/testing/sysfs-bus-iio
+++ b/Documentation/ABI/testing/sysfs-bus-iio
@@ -79,7 +79,7 @@ Description:
                 correspond to externally available input one of the named
                 versions may be used. The number must always be specified and
                 unique to allow association with event codes. Units after
-                application of scale and offset are microvolts.
+                application of scale and offset are millivolts.
 
 What:           /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_raw
 KernelVersion:  2.6.35
@@ -90,7 +90,7 @@ Description:
                 physically equivalent inputs when non differential readings are
                 separately available. In differential only parts, then all that
                 is required is a consistent labeling.  Units after application
-                of scale and offset are microvolts.
+                of scale and offset are millivolts.
 
 What:           /sys/bus/iio/devices/iio:deviceX/in_capacitanceY_raw
 KernelVersion:  3.2
@@ -351,6 +351,7 @@ Description:
                 6kohm_to_gnd: connected to ground via a 6kOhm resistor,
                 20kohm_to_gnd: connected to ground via a 20kOhm resistor,
                 100kohm_to_gnd: connected to ground via an 100kOhm resistor,
+                500kohm_to_gnd: connected to ground via a 500kOhm resistor,
                 three_state: left floating.
                 For a list of available output power down options read
                 outX_powerdown_mode_available. If Y is not present the
@@ -536,6 +537,62 @@ Description:
                 value is in raw device units or in processed units (as _raw
                 and _input do on sysfs direct channel read attributes).
 
+What:           /sys/.../events/in_accel_x_thresh_rising_hysteresis
+What:           /sys/.../events/in_accel_x_thresh_falling_hysteresis
+What:           /sys/.../events/in_accel_x_thresh_either_hysteresis
+What:           /sys/.../events/in_accel_y_thresh_rising_hysteresis
+What:           /sys/.../events/in_accel_y_thresh_falling_hysteresis
+What:           /sys/.../events/in_accel_y_thresh_either_hysteresis
+What:           /sys/.../events/in_accel_z_thresh_rising_hysteresis
+What:           /sys/.../events/in_accel_z_thresh_falling_hysteresis
+What:           /sys/.../events/in_accel_z_thresh_either_hysteresis
+What:           /sys/.../events/in_anglvel_x_thresh_rising_hysteresis
+What:           /sys/.../events/in_anglvel_x_thresh_falling_hysteresis
+What:           /sys/.../events/in_anglvel_x_thresh_either_hysteresis
+What:           /sys/.../events/in_anglvel_y_thresh_rising_hysteresis
+What:           /sys/.../events/in_anglvel_y_thresh_falling_hysteresis
+What:           /sys/.../events/in_anglvel_y_thresh_either_hysteresis
+What:           /sys/.../events/in_anglvel_z_thresh_rising_hysteresis
+What:           /sys/.../events/in_anglvel_z_thresh_falling_hysteresis
+What:           /sys/.../events/in_anglvel_z_thresh_either_hysteresis
+What:           /sys/.../events/in_magn_x_thresh_rising_hysteresis
+What:           /sys/.../events/in_magn_x_thresh_falling_hysteresis
+What:           /sys/.../events/in_magn_x_thresh_either_hysteresis
+What:           /sys/.../events/in_magn_y_thresh_rising_hysteresis
+What:           /sys/.../events/in_magn_y_thresh_falling_hysteresis
+What:           /sys/.../events/in_magn_y_thresh_either_hysteresis
+What:           /sys/.../events/in_magn_z_thresh_rising_hysteresis
+What:           /sys/.../events/in_magn_z_thresh_falling_hysteresis
+What:           /sys/.../events/in_magn_z_thresh_either_hysteresis
+What:           /sys/.../events/in_voltageY_thresh_rising_hysteresis
+What:           /sys/.../events/in_voltageY_thresh_falling_hysteresis
+What:           /sys/.../events/in_voltageY_thresh_either_hysteresis
+What:           /sys/.../events/in_tempY_thresh_rising_hysteresis
+What:           /sys/.../events/in_tempY_thresh_falling_hysteresis
+What:           /sys/.../events/in_tempY_thresh_either_hysteresis
+What:           /sys/.../events/in_illuminance0_thresh_falling_hysteresis
+what:           /sys/.../events/in_illuminance0_thresh_rising_hysteresis
+what:           /sys/.../events/in_illuminance0_thresh_either_hysteresis
+what:           /sys/.../events/in_proximity0_thresh_falling_hysteresis
+what:           /sys/.../events/in_proximity0_thresh_rising_hysteresis
+what:           /sys/.../events/in_proximity0_thresh_either_hysteresis
+KernelVersion:  3.13
+Contact:        linux-iio@vger.kernel.org
+Description:
+                Specifies the hysteresis of threshold that the device is comparing
+                against for the events enabled by
+                <type>Y[_name]_thresh[_(rising|falling)]_hysteresis.
+                If separate attributes exist for the two directions, but
+                direction is not specified for this attribute, then a single
+                hysteresis value applies to both directions.
+                For falling events the hysteresis is added to the _value attribute for
+                this event to get the upper threshold for when the event goes back to
+                normal, for rising events the hysteresis is subtracted from the _value
+                attribute. E.g. if in_voltage0_raw_thresh_rising_value is set to 1200
+                and in_voltage0_raw_thresh_rising_hysteresis is set to 50. The event
+                will get activated once in_voltage0_raw goes above 1200 and will become
+                deactived again once the value falls below 1150.
+
 What:           /sys/.../events/in_accel_x_raw_roc_rising_value
 What:           /sys/.../events/in_accel_x_raw_roc_falling_value
 What:           /sys/.../events/in_accel_y_raw_roc_rising_value
@@ -792,3 +849,32 @@ Contact:	linux-iio@vger.kernel.org
 Description:
                 This attribute is used to read the amount of quadrature error
                 present in the device at a given time.
+
+What:           /sys/.../iio:deviceX/in_accelX_power_mode
+KernelVersion:  3.11
+Contact:        linux-iio@vger.kernel.org
+Description:
+                Specifies the chip power mode.
+                low_noise: reduce noise level from ADC,
+                low_power: enable low current consumption.
+                For a list of available output power modes read
+                in_accel_power_mode_available.
+
+What:           /sys/bus/iio/devices/iio:deviceX/store_eeprom
+KernelVersion:  3.4.0
+Contact:        linux-iio@vger.kernel.org
+Description:
+                Writing '1' stores the current device configuration into
+                on-chip EEPROM. After power-up or chip reset the device will
+                automatically load the saved configuration.
+
+What:           /sys/.../iio:deviceX/in_intensity_red_integration_time
+What:           /sys/.../iio:deviceX/in_intensity_green_integration_time
+What:           /sys/.../iio:deviceX/in_intensity_blue_integration_time
+What:           /sys/.../iio:deviceX/in_intensity_clear_integration_time
+What:           /sys/.../iio:deviceX/in_illuminance_integration_time
+KernelVersion:  3.12
+Contact:        linux-iio@vger.kernel.org
+Description:
+                This attribute is used to get/set the integration time in
+                seconds.
diff --git a/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9523 b/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9523
index 2ce9c3f68eee..a91aeabe7b24 100644
--- a/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9523
+++ b/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9523
@@ -18,14 +18,6 @@ Description:
                 Reading returns either '1' or '0'. '1' means that the
                 pllY is locked.
 
-What:           /sys/bus/iio/devices/iio:deviceX/store_eeprom
-KernelVersion:  3.4.0
-Contact:        linux-iio@vger.kernel.org
-Description:
-                Writing '1' stores the current device configuration into
-                on-chip EEPROM. After power-up or chip reset the device will
-                automatically load the saved configuration.
-
 What:           /sys/bus/iio/devices/iio:deviceX/sync_dividers
 KernelVersion:  3.4.0
 Contact:        linux-iio@vger.kernel.org
diff --git a/Documentation/ABI/testing/sysfs-bus-iio-frequency-adf4350 b/Documentation/ABI/testing/sysfs-bus-iio-frequency-adf4350
index d89aded01c5a..1254457a726e 100644
--- a/Documentation/ABI/testing/sysfs-bus-iio-frequency-adf4350
+++ b/Documentation/ABI/testing/sysfs-bus-iio-frequency-adf4350
@@ -18,4 +18,4 @@ Description:
                 adjust the reference frequency accordingly.
                 The value written has no effect until out_altvoltageY_frequency
                 is updated. Consider to use out_altvoltageY_powerdown to power
-                down the PLL and it's RFOut buffers during REFin changes.
+                down the PLL and its RFOut buffers during REFin changes.
diff --git a/Documentation/ABI/testing/sysfs-bus-usb b/Documentation/ABI/testing/sysfs-bus-usb
index 9759b8c91332..1430f584b266 100644
--- a/Documentation/ABI/testing/sysfs-bus-usb
+++ b/Documentation/ABI/testing/sysfs-bus-usb
@@ -1,81 +1,3 @@
-What:           /sys/bus/usb/devices/.../power/autosuspend
-Date:           March 2007
-KernelVersion:  2.6.21
-Contact:        Alan Stern <stern@rowland.harvard.edu>
-Description:
-                Each USB device directory will contain a file named
-                power/autosuspend.  This file holds the time (in seconds)
-                the device must be idle before it will be autosuspended.
-                0 means the device will be autosuspended as soon as
-                possible.  Negative values will prevent the device from
-                being autosuspended at all, and writing a negative value
-                will resume the device if it is already suspended.
-
-                The autosuspend delay for newly-created devices is set to
-                the value of the usbcore.autosuspend module parameter.
-
-What:           /sys/bus/usb/devices/.../power/persist
-Date:           May 2007
-KernelVersion:  2.6.23
-Contact:        Alan Stern <stern@rowland.harvard.edu>
-Description:
-                If CONFIG_USB_PERSIST is set, then each USB device directory
-                will contain a file named power/persist.  The file holds a
-                boolean value (0 or 1) indicating whether or not the
-                "USB-Persist" facility is enabled for the device.  Since the
-                facility is inherently dangerous, it is disabled by default
-                for all devices except hubs.  For more information, see
-                Documentation/usb/persist.txt.
-
-What:           /sys/bus/usb/device/.../power/connected_duration
-Date:           January 2008
-KernelVersion:  2.6.25
-Contact:        Sarah Sharp <sarah.a.sharp@intel.com>
-Description:
-                If CONFIG_PM_RUNTIME is enabled then this file
-                is present.  When read, it returns the total time (in msec)
-                that the USB device has been connected to the machine.  This
-                file is read-only.
-Users:
-                PowerTOP <power@bughost.org>
-                http://www.lesswatts.org/projects/powertop/
-
-What:           /sys/bus/usb/device/.../power/active_duration
-Date:           January 2008
-KernelVersion:  2.6.25
-Contact:        Sarah Sharp <sarah.a.sharp@intel.com>
-Description:
-                If CONFIG_PM_RUNTIME is enabled then this file
-                is present.  When read, it returns the total time (in msec)
-                that the USB device has been active, i.e. not in a suspended
-                state.  This file is read-only.
-
-                Tools can use this file and the connected_duration file to
-                compute the percentage of time that a device has been active.
-                For example,
-                echo $((100 * `cat active_duration` / `cat connected_duration`))
-                will give an integer percentage.  Note that this does not
-                account for counter wrap.
-Users:
-                PowerTOP <power@bughost.org>
-                http://www.lesswatts.org/projects/powertop/
-
-What:           /sys/bus/usb/device/<busnum>-<devnum>...:<config num>-<interface num>/supports_autosuspend
-Date:           January 2008
-KernelVersion:  2.6.27
-Contact:        Sarah Sharp <sarah.a.sharp@intel.com>
-Description:
-                When read, this file returns 1 if the interface driver
-                for this interface supports autosuspend.  It also
-                returns 1 if no driver has claimed this interface, as an
-                unclaimed interface will not stop the device from being
-                autosuspended if all other interface drivers are idle.
-                The file returns 0 if autosuspend support has not been
-                added to the driver.
-Users:
-                USB PM tool
-                git://git.moblin.org/users/sarah/usb-pm-tool/
-
 What:           /sys/bus/usb/device/.../authorized
 Date:           July 2008
 KernelVersion:  2.6.26
@@ -172,17 +94,6 @@ Description:
                 device IDs, exactly like reading from the entry
                 "/sys/bus/usb/drivers/.../new_id"
 
-What:           /sys/bus/usb/device/.../avoid_reset_quirk
-Date:           December 2009
-Contact:        Oliver Neukum <oliver@neukum.org>
-Description:
-                Writing 1 to this file tells the kernel that this
-                device will morph into another mode when it is reset.
-                Drivers will not use reset for error handling for
-                such devices.
-Users:
-                usb_modeswitch
-
 What:           /sys/bus/usb/devices/.../power/usb2_hardware_lpm
 Date:           September 2011
 Contact:        Andiry Xu <andiry.xu@amd.com>
diff --git a/Documentation/ABI/testing/sysfs-class-mic.txt b/Documentation/ABI/testing/sysfs-class-mic.txt
new file mode 100644
index 000000000000..13f48afc534f
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-mic.txt
@@ -0,0 +1,157 @@
+What:           /sys/class/mic/
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                The mic class directory belongs to Intel MIC devices and
+                provides information per MIC device. An Intel MIC device is a
+                PCIe form factor add-in Coprocessor card based on the Intel Many
+                Integrated Core (MIC) architecture that runs a Linux OS.
+
+What:           /sys/class/mic/mic(x)
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                The directories /sys/class/mic/mic0, /sys/class/mic/mic1 etc.,
+                represent MIC devices (0,1,..etc). Each directory has
+                information specific to that MIC device.
+
+What:           /sys/class/mic/mic(x)/family
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                Provides information about the Coprocessor family for an Intel
+                MIC device. For example - "x100"
+
+What:           /sys/class/mic/mic(x)/stepping
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                Provides information about the silicon stepping for an Intel
+                MIC device. For example - "A0" or "B0"
+
+What:           /sys/class/mic/mic(x)/state
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                When read, this entry provides the current state of an Intel
+                MIC device in the context of the card OS. Possible values that
+                will be read are:
+                "offline" - The MIC device is ready to boot the card OS. On
+                reading this entry after an OSPM resume, a "boot" has to be
+                written to this entry if the card was previously shutdown
+                during OSPM suspend.
+                "online" - The MIC device has initiated booting a card OS.
+                "shutting_down" - The card OS is shutting down.
+                "reset_failed" - The MIC device has failed to reset.
+                "suspending" - The MIC device is currently being prepared for
+                suspend. On reading this entry, a "suspend" has to be written
+                to the state sysfs entry to ensure the card is shutdown during
+                OSPM suspend.
+                "suspended" - The MIC device has been suspended.
+
+                When written, this sysfs entry triggers different state change
+                operations depending upon the current state of the card OS.
+                Acceptable values are:
+                "boot" - Boot the card OS image specified by the combination
+                         of firmware, ramdisk, cmdline and bootmode
+                        sysfs entries.
+                "reset" - Initiates device reset.
+                "shutdown" - Initiates card OS shutdown.
+                "suspend" - Initiates card OS shutdown and also marks the card
+                as suspended.
+
+What:           /sys/class/mic/mic(x)/shutdown_status
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                An Intel MIC device runs a Linux OS during its operation. This
+                OS can shutdown because of various reasons. When read, this
+                entry provides the status on why the card OS was shutdown.
+                Possible values are:
+                "nop" -  shutdown status is not applicable, when the card OS is
+                        "online"
+                "crashed" - Shutdown because of a HW or SW crash.
+                "halted" - Shutdown because of a halt command.
+                "poweroff" - Shutdown because of a poweroff command.
+                "restart" - Shutdown because of a restart command.
+
+What:           /sys/class/mic/mic(x)/cmdline
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                An Intel MIC device runs a Linux OS during its operation. Before
+                booting this card OS, it is possible to pass kernel command line
+                options to configure various features in it, similar to
+                self-bootable machines. When read, this entry provides
+                information about the current kernel command line options set to
+                boot the card OS. This entry can be written to change the
+                existing kernel command line options. Typically, the user would
+                want to read the current command line options, append new ones
+                or modify existing ones and then write the whole kernel command
+                line back to this entry.
+
+What:           /sys/class/mic/mic(x)/firmware
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                When read, this sysfs entry provides the path name under
+                /lib/firmware/ where the firmware image to be booted on the
+                card can be found. The entry can be written to change the
+                firmware image location under /lib/firmware/.
+
+What:           /sys/class/mic/mic(x)/ramdisk
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                When read, this sysfs entry provides the path name under
+                /lib/firmware/ where the ramdisk image to be used during card
+                OS boot can be found. The entry can be written to change
+                the ramdisk image location under /lib/firmware/.
+
+What:           /sys/class/mic/mic(x)/bootmode
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                When read, this sysfs entry provides the current bootmode for
+                the card. This sysfs entry can be written with the following
+                valid strings:
+                a) linux - Boot a Linux image.
+                b) elf - Boot an elf image for flash updates.
+
+What:           /sys/class/mic/mic(x)/log_buf_addr
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                An Intel MIC device runs a Linux OS during its operation. For
+                debugging purpose and early kernel boot messages, the user can
+                access the card OS log buffer via debugfs. When read, this entry
+                provides the kernel virtual address of the buffer where the card
+                OS log buffer can be read. This entry is written by the host
+                configuration daemon to set the log buffer address. The correct
+                log buffer address to be written can be found in the System.map
+                file of the card OS.
+
+What:           /sys/class/mic/mic(x)/log_buf_len
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                An Intel MIC device runs a Linux OS during its operation. For
+                debugging purpose and early kernel boot messages, the user can
+                access the card OS log buffer via debugfs. When read, this entry
+                provides the kernel virtual address where the card OS log buffer
+                length can be read. This entry is written by host configuration
+                daemon to set the log buffer length address. The correct log
+                buffer length address to be written can be found in the
+                System.map file of the card OS.
diff --git a/Documentation/ABI/testing/sysfs-class-mtd b/Documentation/ABI/testing/sysfs-class-mtd
index 3105644b3bfc..bfd119ace6ad 100644
--- a/Documentation/ABI/testing/sysfs-class-mtd
+++ b/Documentation/ABI/testing/sysfs-class-mtd
@@ -128,9 +128,8 @@ KernelVersion:	3.4
 Contact:        linux-mtd@lists.infradead.org
 Description:
                 Maximum number of bit errors that the device is capable of
-                correcting within each region covering an ecc step.  This will
-                always be a non-negative integer.  Note that some devices will
-                have multiple ecc steps within each writesize region.
+                correcting within each region covering an ECC step (see
+                ecc_step_size).  This will always be a non-negative integer.
 
                 In the case of devices lacking any ECC capability, it is 0.
 
@@ -173,3 +172,15 @@ Description:
                 This is generally applicable only to NAND flash devices with ECC
                 capability.  It is ignored on devices lacking ECC capability;
                 i.e., devices for which ecc_strength is zero.
+
+What:           /sys/class/mtd/mtdX/ecc_step_size
+Date:           May 2013
+KernelVersion:  3.10
+Contact:        linux-mtd@lists.infradead.org
+Description:
+                The size of a single region covered by ECC, known as the ECC
+                step.  Devices may have several equally sized ECC steps within
+                each writesize region.
+
+                It will always be a non-negative integer.  In the case of
+                devices lacking any ECC capability, it is 0.
diff --git a/Documentation/ABI/testing/sysfs-devices-power b/Documentation/ABI/testing/sysfs-devices-power
index 9d43e7670841..efe449bdf811 100644
--- a/Documentation/ABI/testing/sysfs-devices-power
+++ b/Documentation/ABI/testing/sysfs-devices-power
@@ -1,6 +1,6 @@
 What:           /sys/devices/.../power/
 Date:           January 2009
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../power directory contains attributes
                 allowing the user space to check and modify some power
@@ -8,7 +8,7 @@ Description:
 
 What:           /sys/devices/.../power/wakeup
 Date:           January 2009
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../power/wakeup attribute allows the user
                 space to check if the device is enabled to wake up the system
@@ -34,7 +34,7 @@ Description:
 
 What:           /sys/devices/.../power/control
 Date:           January 2009
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../power/control attribute allows the user
                 space to control the run-time power management of the device.
@@ -53,7 +53,7 @@ Description:
 
 What:           /sys/devices/.../power/async
 Date:           January 2009
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../async attribute allows the user space to
                 enable or diasble the device's suspend and resume callbacks to
@@ -79,7 +79,7 @@ Description:
 
 What:           /sys/devices/.../power/wakeup_count
 Date:           September 2010
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../wakeup_count attribute contains the number
                 of signaled wakeup events associated with the device.  This
@@ -88,7 +88,7 @@ Description:
 
 What:           /sys/devices/.../power/wakeup_active_count
 Date:           September 2010
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../wakeup_active_count attribute contains the
                 number of times the processing of wakeup events associated with
@@ -98,7 +98,7 @@ Description:
 
 What:           /sys/devices/.../power/wakeup_abort_count
 Date:           February 2012
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../wakeup_abort_count attribute contains the
                 number of times the processing of a wakeup event associated with
@@ -109,7 +109,7 @@ Description:
 
 What:           /sys/devices/.../power/wakeup_expire_count
 Date:           February 2012
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../wakeup_expire_count attribute contains the
                 number of times a wakeup event associated with the device has
@@ -119,7 +119,7 @@ Description:
 
 What:           /sys/devices/.../power/wakeup_active
 Date:           September 2010
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../wakeup_active attribute contains either 1,
                 or 0, depending on whether or not a wakeup event associated with
@@ -129,7 +129,7 @@ Description:
 
 What:           /sys/devices/.../power/wakeup_total_time_ms
 Date:           September 2010
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../wakeup_total_time_ms attribute contains
                 the total time of processing wakeup events associated with the
@@ -139,7 +139,7 @@ Description:
 
 What:           /sys/devices/.../power/wakeup_max_time_ms
 Date:           September 2010
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../wakeup_max_time_ms attribute contains
                 the maximum time of processing a single wakeup event associated
@@ -149,7 +149,7 @@ Description:
 
 What:           /sys/devices/.../power/wakeup_last_time_ms
 Date:           September 2010
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../wakeup_last_time_ms attribute contains
                 the value of the monotonic clock corresponding to the time of
@@ -160,7 +160,7 @@ Description:
 
 What:           /sys/devices/.../power/wakeup_prevent_sleep_time_ms
 Date:           February 2012
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../wakeup_prevent_sleep_time_ms attribute
                 contains the total time the device has been preventing
@@ -189,7 +189,7 @@ Description:
 
 What:           /sys/devices/.../power/pm_qos_latency_us
 Date:           March 2012
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../power/pm_qos_resume_latency_us attribute
                 contains the PM QoS resume latency limit for the given device,
@@ -207,7 +207,7 @@ Description:
 
 What:           /sys/devices/.../power/pm_qos_no_power_off
 Date:           September 2012
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../power/pm_qos_no_power_off attribute
                 is used for manipulating the PM QoS "no power off" flag.  If
@@ -222,7 +222,7 @@ Description:
 
 What:           /sys/devices/.../power/pm_qos_remote_wakeup
 Date:           September 2012
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/devices/.../power/pm_qos_remote_wakeup attribute
                 is used for manipulating the PM QoS "remote wakeup required"
diff --git a/Documentation/ABI/testing/sysfs-driver-sunxi-sid b/Documentation/ABI/testing/sysfs-driver-sunxi-sid
new file mode 100644
index 000000000000..ffb9536f6ecc
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-sunxi-sid
@@ -0,0 +1,22 @@
+What:           /sys/devices/*/<our-device>/eeprom
+Date:           August 2013
+Contact:        Oliver Schinagl <oliver@schinagl.nl>
+Description:    read-only access to the SID (Security-ID) on current
+                A-series SoC's from Allwinner. Currently supports A10, A10s, A13
+                and A20 CPU's. The earlier A1x series of SoCs exports 16 bytes,
+                whereas the newer A20 SoC exposes 512 bytes split into sections.
+                Besides the 16 bytes of SID, there's also an SJTAG area,
+                HDMI-HDCP key and some custom keys. Below a quick overview, for
+                details see the user manual:
+                0x000  128 bit root-key (sun[457]i)
+                0x010  128 bit boot-key (sun7i)
+                0x020   64 bit security-jtag-key (sun7i)
+                0x028   16 bit key configuration (sun7i)
+                0x02b   16 bit custom-vendor-key (sun7i)
+                0x02c  320 bit low general key (sun7i)
+                0x040   32 bit read-control access (sun7i)
+                0x064  224 bit low general key (sun7i)
+                0x080 2304 bit HDCP-key (sun7i)
+                0x1a0  768 bit high general key (sun7i)
+Users:          any user space application which wants to read the SID on
+                Allwinner's A-series of CPU's.
diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs
new file mode 100644
index 000000000000..31942efcaf0e
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-fs-f2fs
@@ -0,0 +1,26 @@
+What:           /sys/fs/f2fs/<disk>/gc_max_sleep_time
+Date:           July 2013
+Contact:        "Namjae Jeon" <namjae.jeon@samsung.com>
+Description:
+                 Controls the maximun sleep time for gc_thread. Time
+                 is in milliseconds.
+
+What:           /sys/fs/f2fs/<disk>/gc_min_sleep_time
+Date:           July 2013
+Contact:        "Namjae Jeon" <namjae.jeon@samsung.com>
+Description:
+                 Controls the minimum sleep time for gc_thread. Time
+                 is in milliseconds.
+
+What:           /sys/fs/f2fs/<disk>/gc_no_gc_sleep_time
+Date:           July 2013
+Contact:        "Namjae Jeon" <namjae.jeon@samsung.com>
+Description:
+                 Controls the default sleep time for gc_thread. Time
+                 is in milliseconds.
+
+What:           /sys/fs/f2fs/<disk>/gc_idle
+Date:           July 2013
+Contact:        "Namjae Jeon" <namjae.jeon@samsung.com>
+Description:
+                 Controls the victim selection policy for garbage collection.
diff --git a/Documentation/ABI/testing/sysfs-power b/Documentation/ABI/testing/sysfs-power
index 217772615d02..205a73878441 100644
--- a/Documentation/ABI/testing/sysfs-power
+++ b/Documentation/ABI/testing/sysfs-power
@@ -1,6 +1,6 @@
 What:           /sys/power/
 Date:           August 2006
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power directory will contain files that will
                 provide a unified interface to the power management
@@ -8,7 +8,7 @@ Description:
 
 What:           /sys/power/state
 Date:           August 2006
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power/state file controls the system power state.
                 Reading from this file returns what states are supported,
@@ -22,7 +22,7 @@ Description:
 
 What:           /sys/power/disk
 Date:           September 2006
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power/disk file controls the operating mode of the
                 suspend-to-disk mechanism.  Reading from this file returns
@@ -67,7 +67,7 @@ Description:
 
 What:           /sys/power/image_size
 Date:           August 2006
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power/image_size file controls the size of the image
                 created by the suspend-to-disk mechanism.  It can be written a
@@ -84,7 +84,7 @@ Description:
 
 What:           /sys/power/pm_trace
 Date:           August 2006
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power/pm_trace file controls the code which saves the
                 last PM event point in the RTC across reboots, so that you can
@@ -133,7 +133,7 @@ Description:
 
 What:           /sys/power/pm_async
 Date:           January 2009
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power/pm_async file controls the switch allowing the
                 user space to enable or disable asynchronous suspend and resume
@@ -146,7 +146,7 @@ Description:
 
 What:           /sys/power/wakeup_count
 Date:           July 2010
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power/wakeup_count file allows user space to put the
                 system into a sleep state while taking into account the
@@ -161,7 +161,7 @@ Description:
 
 What:           /sys/power/reserved_size
 Date:           May 2011
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power/reserved_size file allows user space to control
                 the amount of memory reserved for allocations made by device
@@ -175,7 +175,7 @@ Description:
 
 What:           /sys/power/autosleep
 Date:           April 2012
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power/autosleep file can be written one of the strings
                 returned by reads from /sys/power/state.  If that happens, a
@@ -192,7 +192,7 @@ Description:
 
 What:           /sys/power/wake_lock
 Date:           February 2012
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power/wake_lock file allows user space to create
                 wakeup source objects and activate them on demand (if one of
@@ -219,7 +219,7 @@ Description:
 
 What:           /sys/power/wake_unlock
 Date:           February 2012
-Contact:        Rafael J. Wysocki <rjw@sisk.pl>
+Contact:        Rafael J. Wysocki <rjw@rjwysocki.net>
 Description:
                 The /sys/power/wake_unlock file allows user space to deactivate
                 wakeup sources created with the help of /sys/power/wake_lock.
diff --git a/Documentation/DocBook/80211.tmpl b/Documentation/DocBook/80211.tmpl
index 49267ea97568..f403ec3c5c9a 100644
--- a/Documentation/DocBook/80211.tmpl
+++ b/Documentation/DocBook/80211.tmpl
@@ -325,6 +325,7 @@
           <title>functions/definitions</title>
 !Finclude/net/mac80211.h ieee80211_rx_status
 !Finclude/net/mac80211.h mac80211_rx_flags
+!Finclude/net/mac80211.h mac80211_tx_info_flags
 !Finclude/net/mac80211.h mac80211_tx_control_flags
 !Finclude/net/mac80211.h mac80211_rate_control_flags
 !Finclude/net/mac80211.h ieee80211_tx_rate
diff --git a/Documentation/DocBook/device-drivers.tmpl b/Documentation/DocBook/device-drivers.tmpl
index fe397f90a34f..6c9d9d37c83a 100644
--- a/Documentation/DocBook/device-drivers.tmpl
+++ b/Documentation/DocBook/device-drivers.tmpl
@@ -87,7 +87,10 @@ X!Iinclude/linux/kobject.h
 !Ekernel/printk/printk.c
 !Ekernel/panic.c
 !Ekernel/sys.c
-!Ekernel/rcupdate.c
+!Ekernel/rcu/srcu.c
+!Ekernel/rcu/tree.c
+!Ekernel/rcu/tree_plugin.h
+!Ekernel/rcu/update.c
      </sect1>
 
      <sect1><title>Device Resource Management</title>
diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
index 7d1278e7a434..ed1d6d289022 100644
--- a/Documentation/DocBook/drm.tmpl
+++ b/Documentation/DocBook/drm.tmpl
@@ -156,13 +156,6 @@
             </para></listitem>
           </varlistentry>
           <varlistentry>
-            <term>DRIVER_USE_MTRR</term>
-            <listitem><para>
-              Driver uses MTRR interface for mapping memory, the DRM core will
-              manage MTRR resources. Deprecated.
-            </para></listitem>
-          </varlistentry>
-          <varlistentry>
             <term>DRIVER_PCI_DMA</term>
             <listitem><para>
               Driver is capable of PCI DMA, mapping of PCI DMA buffers to
@@ -195,28 +188,6 @@
             </para></listitem>
           </varlistentry>
           <varlistentry>
-            <term>DRIVER_IRQ_VBL</term>
-            <listitem><para>Unused. Deprecated.</para></listitem>
-          </varlistentry>
-          <varlistentry>
-            <term>DRIVER_DMA_QUEUE</term>
-            <listitem><para>
-              Should be set if the driver queues DMA requests and completes them
-              asynchronously.  Deprecated.
-            </para></listitem>
-          </varlistentry>
-          <varlistentry>
-            <term>DRIVER_FB_DMA</term>
-            <listitem><para>
-              Driver supports DMA to/from the framebuffer, mapping of frambuffer
-              DMA buffers to userspace will be supported. Deprecated.
-            </para></listitem>
-          </varlistentry>
-          <varlistentry>
-            <term>DRIVER_IRQ_VBL2</term>
-            <listitem><para>Unused. Deprecated.</para></listitem>
-          </varlistentry>
-          <varlistentry>
             <term>DRIVER_GEM</term>
             <listitem><para>
               Driver use the GEM memory manager.
@@ -234,6 +205,12 @@
               Driver implements DRM PRIME buffer sharing.
             </para></listitem>
           </varlistentry>
+          <varlistentry>
+            <term>DRIVER_RENDER</term>
+            <listitem><para>
+              Driver supports dedicated render nodes.
+            </para></listitem>
+          </varlistentry>
         </variablelist>
       </sect3>
       <sect3>
@@ -2212,6 +2189,18 @@ void intel_crt_init(struct drm_device *dev)
 !Iinclude/drm/drm_rect.h
 !Edrivers/gpu/drm/drm_rect.c
     </sect2>
+    <sect2>
+      <title>Flip-work Helper Reference</title>
+!Pinclude/drm/drm_flip_work.h flip utils
+!Iinclude/drm/drm_flip_work.h
+!Edrivers/gpu/drm/drm_flip_work.c
+    </sect2>
+    <sect2>
+      <title>VMA Offset Manager</title>
+!Pdrivers/gpu/drm/drm_vma_manager.c vma offset manager
+!Edrivers/gpu/drm/drm_vma_manager.c
+!Iinclude/drm/drm_vma_manager.h
+    </sect2>
   </sect1>
 
   <!-- Internals: kms properties -->
@@ -2422,18 +2411,18 @@ void (*postclose) (struct drm_device *, struct drm_file *);</synopsis>
       </abstract>
       <para>
         The <methodname>firstopen</methodname> method is called by the DRM core
-        when an application opens a device that has no other opened file handle.
-        Similarly the <methodname>lastclose</methodname> method is called when
-        the last application holding a file handle opened on the device closes
-        it. Both methods are mostly used for UMS (User Mode Setting) drivers to
-        acquire and release device resources which should be done in the
-        <methodname>load</methodname> and <methodname>unload</methodname>
-        methods for KMS drivers.
+        for legacy UMS (User Mode Setting) drivers only when an application
+        opens a device that has no other opened file handle. UMS drivers can
+        implement it to acquire device resources. KMS drivers can't use the
+        method and must acquire resources in the <methodname>load</methodname>
+        method instead.
       </para>
       <para>
-        Note that the <methodname>lastclose</methodname> method is also called
-        at module unload time or, for hot-pluggable devices, when the device is
-        unplugged. The <methodname>firstopen</methodname> and
+        Similarly the <methodname>lastclose</methodname> method is called when
+        the last application holding a file handle opened on the device closes
+        it, for both UMS and KMS drivers. Additionally, the method is also
+        called at module unload time or, for hot-pluggable devices, when the
+        device is unplugged. The <methodname>firstopen</methodname> and
         <methodname>lastclose</methodname> calls can thus be unbalanced.
       </para>
       <para>
@@ -2462,7 +2451,12 @@ void (*postclose) (struct drm_device *, struct drm_file *);</synopsis>
       <para>
         The <methodname>lastclose</methodname> method should restore CRTC and
         plane properties to default value, so that a subsequent open of the
-        device will not inherit state from the previous user.
+        device will not inherit state from the previous user. It can also be
+        used to execute delayed power switching state changes, e.g. in
+        conjunction with the vga-switcheroo infrastructure. Beyond that KMS
+        drivers should not do any further cleanup. Only legacy UMS drivers might
+        need to clean up device state so that the vga console or an independent
+        fbdev driver could take over.
       </para>
     </sect2>
     <sect2>
@@ -2498,7 +2492,6 @@ void (*postclose) (struct drm_device *, struct drm_file *);</synopsis>
         <programlisting>
         .poll = drm_poll,
         .read = drm_read,
-        .fasync = drm_fasync,
         .llseek = no_llseek,
         </programlisting>
       </para>
@@ -2657,6 +2650,69 @@ int (*resume) (struct drm_device *);</synopsis>
       info, since man pages should cover the rest.
     </para>
 
+  <!-- External: render nodes -->
+
+    <sect1>
+      <title>Render nodes</title>
+      <para>
+        DRM core provides multiple character-devices for user-space to use.
+        Depending on which device is opened, user-space can perform a different
+        set of operations (mainly ioctls). The primary node is always created
+        and called <term>card&lt;num&gt;</term>. Additionally, a currently
+        unused control node, called <term>controlD&lt;num&gt;</term> is also
+        created. The primary node provides all legacy operations and
+        historically was the only interface used by userspace. With KMS, the
+        control node was introduced. However, the planned KMS control interface
+        has never been written and so the control node stays unused to date.
+      </para>
+      <para>
+        With the increased use of offscreen renderers and GPGPU applications,
+        clients no longer require running compositors or graphics servers to
+        make use of a GPU. But the DRM API required unprivileged clients to
+        authenticate to a DRM-Master prior to getting GPU access. To avoid this
+        step and to grant clients GPU access without authenticating, render
+        nodes were introduced. Render nodes solely serve render clients, that
+        is, no modesetting or privileged ioctls can be issued on render nodes.
+        Only non-global rendering commands are allowed. If a driver supports
+        render nodes, it must advertise it via the <term>DRIVER_RENDER</term>
+        DRM driver capability. If not supported, the primary node must be used
+        for render clients together with the legacy drmAuth authentication
+        procedure.
+      </para>
+      <para>
+        If a driver advertises render node support, DRM core will create a
+        separate render node called <term>renderD&lt;num&gt;</term>. There will
+        be one render node per device. No ioctls except  PRIME-related ioctls
+        will be allowed on this node. Especially <term>GEM_OPEN</term> will be
+        explicitly prohibited. Render nodes are designed to avoid the
+        buffer-leaks, which occur if clients guess the flink names or mmap
+        offsets on the legacy interface. Additionally to this basic interface,
+        drivers must mark their driver-dependent render-only ioctls as
+        <term>DRM_RENDER_ALLOW</term> so render clients can use them. Driver
+        authors must be careful not to allow any privileged ioctls on render
+        nodes.
+      </para>
+      <para>
+        With render nodes, user-space can now control access to the render node
+        via basic file-system access-modes. A running graphics server which
+        authenticates clients on the privileged primary/legacy node is no longer
+        required. Instead, a client can open the render node and is immediately
+        granted GPU access. Communication between clients (or servers) is done
+        via PRIME. FLINK from render node to legacy node is not supported. New
+        clients must not use the insecure FLINK interface.
+      </para>
+      <para>
+        Besides dropping all modeset/global ioctls, render nodes also drop the
+        DRM-Master concept. There is no reason to associate render clients with
+        a DRM-Master as they are independent of any graphics server. Besides,
+        they must work without any running master, anyway.
+        Drivers must be able to run without a master object if they support
+        render nodes. If, on the other hand, a driver requires shared state
+        between clients which is visible to user-space and accessible beyond
+        open-file boundaries, they cannot support render nodes.
+      </para>
+    </sect1>
+
   <!-- External: vblank handling -->
 
     <sect1>
diff --git a/Documentation/DocBook/filesystems.tmpl b/Documentation/DocBook/filesystems.tmpl
index 25b58efd955d..4f676838da06 100644
--- a/Documentation/DocBook/filesystems.tmpl
+++ b/Documentation/DocBook/filesystems.tmpl
@@ -91,7 +91,6 @@
      <title>The Filesystem for Exporting Kernel Objects</title>
 !Efs/sysfs/file.c
 !Efs/sysfs/symlink.c
-!Efs/sysfs/bin.c
   </chapter>
 
   <chapter id="debugfs">
diff --git a/Documentation/DocBook/genericirq.tmpl b/Documentation/DocBook/genericirq.tmpl
index d16d21b7a3b7..46347f603353 100644
--- a/Documentation/DocBook/genericirq.tmpl
+++ b/Documentation/DocBook/genericirq.tmpl
@@ -87,7 +87,7 @@
   <chapter id="rationale">
     <title>Rationale</title>
         <para>
-        The original implementation of interrupt handling in Linux is using
+        The original implementation of interrupt handling in Linux uses
         the __do_IRQ() super-handler, which is able to deal with every
         type of interrupt logic.
         </para>
@@ -111,19 +111,19 @@
         </itemizedlist>
         </para>
         <para>
-        This split implementation of highlevel IRQ handlers allows us to
+        This split implementation of high-level IRQ handlers allows us to
         optimize the flow of the interrupt handling for each specific
-        interrupt type. This reduces complexity in that particular codepath
+        interrupt type. This reduces complexity in that particular code path
         and allows the optimized handling of a given type.
         </para>
         <para>
         The original general IRQ implementation used hw_interrupt_type
         structures and their ->ack(), ->end() [etc.] callbacks to
         differentiate the flow control in the super-handler. This leads to
-        a mix of flow logic and lowlevel hardware logic, and it also leads
-        to unnecessary code duplication: for example in i386, there is a
-        ioapic_level_irq and a ioapic_edge_irq irq-type which share many
-        of the lowlevel details but have different flow handling.
+        a mix of flow logic and low-level hardware logic, and it also leads
+        to unnecessary code duplication: for example in i386, there is an
+        ioapic_level_irq and an ioapic_edge_irq IRQ-type which share many
+        of the low-level details but have different flow handling.
         </para>
         <para>
         A more natural abstraction is the clean separation of the
@@ -132,23 +132,23 @@
         <para>
         Analysing a couple of architecture's IRQ subsystem implementations
         reveals that most of them can use a generic set of 'irq flow'
-        methods and only need to add the chip level specific code.
+        methods and only need to add the chip-level specific code.
         The separation is also valuable for (sub)architectures
-        which need specific quirks in the irq flow itself but not in the
-        chip-details - and thus provides a more transparent IRQ subsystem
+        which need specific quirks in the IRQ flow itself but not in the
+        chip details - and thus provides a more transparent IRQ subsystem
         design.
         </para>
         <para>
-        Each interrupt descriptor is assigned its own highlevel flow
+        Each interrupt descriptor is assigned its own high-level flow
         handler, which is normally one of the generic
-        implementations. (This highlevel flow handler implementation also
+        implementations. (This high-level flow handler implementation also
         makes it simple to provide demultiplexing handlers which can be
         found in embedded platforms on various architectures.)
         </para>
         <para>
         The separation makes the generic interrupt handling layer more
         flexible and extensible. For example, an (sub)architecture can
-        use a generic irq-flow implementation for 'level type' interrupts
+        use a generic IRQ-flow implementation for 'level type' interrupts
         and add a (sub)architecture specific 'edge type' implementation.
         </para>
         <para>
@@ -172,9 +172,9 @@
     <para>
         There are three main levels of abstraction in the interrupt code:
         <orderedlist>
-          <listitem><para>Highlevel driver API</para></listitem>
-          <listitem><para>Highlevel IRQ flow handlers</para></listitem>
-          <listitem><para>Chiplevel hardware encapsulation</para></listitem>
+          <listitem><para>High-level driver API</para></listitem>
+          <listitem><para>High-level IRQ flow handlers</para></listitem>
+          <listitem><para>Chip-level hardware encapsulation</para></listitem>
         </orderedlist>
     </para>
     <sect1 id="Interrupt_control_flow">
@@ -189,16 +189,16 @@
         which are assigned to this interrupt.
         </para>
         <para>
-        Whenever an interrupt triggers, the lowlevel arch code calls into
-        the generic interrupt code by calling desc->handle_irq().
-        This highlevel IRQ handling function only uses desc->irq_data.chip
+        Whenever an interrupt triggers, the low-level architecture code calls
+        into the generic interrupt code by calling desc->handle_irq().
+        This high-level IRQ handling function only uses desc->irq_data.chip
         primitives referenced by the assigned chip descriptor structure.
         </para>
     </sect1>
     <sect1 id="Highlevel_Driver_API">
-        <title>Highlevel Driver API</title>
+        <title>High-level Driver API</title>
         <para>
-          The highlevel Driver API consists of following functions:
+          The high-level Driver API consists of following functions:
           <itemizedlist>
           <listitem><para>request_irq()</para></listitem>
           <listitem><para>free_irq()</para></listitem>
@@ -216,7 +216,7 @@
         </para>
     </sect1>
     <sect1 id="Highlevel_IRQ_flow_handlers">
-        <title>Highlevel IRQ flow handlers</title>
+        <title>High-level IRQ flow handlers</title>
         <para>
           The generic layer provides a set of pre-defined irq-flow methods:
           <itemizedlist>
@@ -228,7 +228,7 @@
           <listitem><para>handle_edge_eoi_irq</para></listitem>
           <listitem><para>handle_bad_irq</para></listitem>
           </itemizedlist>
-          The interrupt flow handlers (either predefined or architecture
+          The interrupt flow handlers (either pre-defined or architecture
           specific) are assigned to specific interrupts by the architecture
           either during bootup or during device initialization.
         </para>
@@ -297,7 +297,7 @@ desc->irq_data.chip->irq_unmask();
                 <para>
                 handle_fasteoi_irq provides a generic implementation
                 for interrupts, which only need an EOI at the end of
-                the handler
+                the handler.
                 </para>
                 <para>
                 The following control flow is implemented (simplified excerpt):
@@ -394,7 +394,7 @@ if (desc->irq_data.chip->irq_eoi)
         The generic functions are intended for 'clean' architectures and chips,
         which have no platform-specific IRQ handling quirks. If an architecture
         needs to implement quirks on the 'flow' level then it can do so by
-        overriding the highlevel irq-flow handler.
+        overriding the high-level irq-flow handler.
         </para>
         </sect2>
         <sect2 id="Delayed_interrupt_disable">
@@ -419,9 +419,9 @@ if (desc->irq_data.chip->irq_eoi)
         </sect2>
     </sect1>
     <sect1 id="Chiplevel_hardware_encapsulation">
-        <title>Chiplevel hardware encapsulation</title>
+        <title>Chip-level hardware encapsulation</title>
         <para>
-        The chip level hardware descriptor structure irq_chip
+        The chip-level hardware descriptor structure irq_chip
         contains all the direct chip relevant functions, which
         can be utilized by the irq flow implementations.
           <itemizedlist>
@@ -429,14 +429,14 @@ if (desc->irq_data.chip->irq_eoi)
           <listitem><para>irq_mask_ack() - Optional, recommended for performance</para></listitem>
           <listitem><para>irq_mask()</para></listitem>
           <listitem><para>irq_unmask()</para></listitem>
-          <listitem><para>irq_eoi() - Optional, required for eoi flow handlers</para></listitem>
+          <listitem><para>irq_eoi() - Optional, required for EOI flow handlers</para></listitem>
           <listitem><para>irq_retrigger() - Optional</para></listitem>
           <listitem><para>irq_set_type() - Optional</para></listitem>
           <listitem><para>irq_set_wake() - Optional</para></listitem>
           </itemizedlist>
         These primitives are strictly intended to mean what they say: ack means
         ACK, masking means masking of an IRQ line, etc. It is up to the flow
-        handler(s) to use these basic units of lowlevel functionality.
+        handler(s) to use these basic units of low-level functionality.
         </para>
     </sect1>
   </chapter>
@@ -445,7 +445,7 @@ if (desc->irq_data.chip->irq_eoi)
      <title>__do_IRQ entry point</title>
      <para>
         The original implementation __do_IRQ() was an alternative entry
-        point for all types of interrupts. It not longer exists.
+        point for all types of interrupts. It no longer exists.
      </para>
      <para>
         This handler turned out to be not suitable for all
@@ -468,11 +468,11 @@ if (desc->irq_data.chip->irq_eoi)
   <chapter id="genericchip">
      <title>Generic interrupt chip</title>
      <para>
-       To avoid copies of identical implementations of irq chips the
+       To avoid copies of identical implementations of IRQ chips the
        core provides a configurable generic interrupt chip
        implementation. Developers should check carefuly whether the
        generic chip fits their needs before implementing the same
-       functionality slightly different themself.
+       functionality slightly differently themselves.
      </para>
 !Ekernel/irq/generic-chip.c
   </chapter>
diff --git a/Documentation/DocBook/media/v4l/controls.xml b/Documentation/DocBook/media/v4l/controls.xml
index c2fc9ec1417e..7a3b49b3cc3b 100644
--- a/Documentation/DocBook/media/v4l/controls.xml
+++ b/Documentation/DocBook/media/v4l/controls.xml
@@ -722,17 +722,22 @@ for more details.</para>
     </section>
 
     <section id="mpeg-controls">
-      <title>MPEG Control Reference</title>
+      <title>Codec Control Reference</title>
 
-      <para>Below all controls within the MPEG control class are
+      <para>Below all controls within the Codec control class are
 described. First the generic controls, then controls specific for
 certain hardware.</para>
 
+      <para>Note: These controls are applicable to all codecs and
+not just MPEG. The defines are prefixed with V4L2_CID_MPEG/V4L2_MPEG
+as the controls were originally made for MPEG codecs and later
+extended to cover all encoding formats.</para>
+
       <section>
-        <title>Generic MPEG Controls</title>
+        <title>Generic Codec Controls</title>
 
         <table pgwide="1" frame="none" id="mpeg-control-id">
-          <title>MPEG Control IDs</title>
+          <title>Codec Control IDs</title>
           <tgroup cols="4">
             <colspec colname="c1" colwidth="1*" />
             <colspec colname="c2" colwidth="6*" />
@@ -752,7 +757,7 @@ certain hardware.</para>
               <row>
                 <entry spanname="id"><constant>V4L2_CID_MPEG_CLASS</constant>&nbsp;</entry>
                 <entry>class</entry>
-              </row><row><entry spanname="descr">The MPEG class
+              </row><row><entry spanname="descr">The Codec class
 descriptor. Calling &VIDIOC-QUERYCTRL; for this control will return a
 description of this control class. This description can be used as the
 caption of a Tab page in a GUI, for example.</entry>
@@ -3009,6 +3014,159 @@ in by the application. 0 = do not insert, 1 = insert packets.</entry>
           </tgroup>
         </table>
       </section>
+
+    <section>
+      <title>VPX Control Reference</title>
+
+      <para>The VPX controls include controls for encoding parameters
+      of VPx video codec.</para>
+
+      <table pgwide="1" frame="none" id="vpx-control-id">
+      <title>VPX Control IDs</title>
+
+      <tgroup cols="4">
+        <colspec colname="c1" colwidth="1*" />
+        <colspec colname="c2" colwidth="6*" />
+        <colspec colname="c3" colwidth="2*" />
+        <colspec colname="c4" colwidth="6*" />
+        <spanspec namest="c1" nameend="c2" spanname="id" />
+        <spanspec namest="c2" nameend="c4" spanname="descr" />
+        <thead>
+          <row>
+            <entry spanname="id" align="left">ID</entry>
+            <entry align="left">Type</entry>
+          </row><row rowsep="1"><entry spanname="descr" align="left">Description</entry>
+          </row>
+        </thead>
+        <tbody valign="top">
+          <row><entry></entry></row>
+
+              <row><entry></entry></row>
+              <row id="v4l2-vpx-num-partitions">
+                <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS</constant></entry>
+                <entry>enum v4l2_vp8_num_partitions</entry>
+              </row>
+              <row><entry spanname="descr">The number of token partitions to use in VP8 encoder.
+Possible values are:</entry>
+              </row>
+              <row>
+                <entrytbl spanname="descr" cols="2">
+                  <tbody valign="top">
+                    <row>
+                      <entry><constant>V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION</constant></entry>
+                      <entry>1 coefficient partition</entry>
+                    </row>
+                    <row>
+                      <entry><constant>V4L2_CID_MPEG_VIDEO_VPX_2_PARTITIONS</constant></entry>
+                      <entry>2 coefficient partitions</entry>
+                    </row>
+                    <row>
+                      <entry><constant>V4L2_CID_MPEG_VIDEO_VPX_4_PARTITIONS</constant></entry>
+                      <entry>4 coefficient partitions</entry>
+                    </row>
+                    <row>
+                      <entry><constant>V4L2_CID_MPEG_VIDEO_VPX_8_PARTITIONS</constant></entry>
+                      <entry>8 coefficient partitions</entry>
+                    </row>
+                  </tbody>
+                </entrytbl>
+              </row>
+
+              <row><entry></entry></row>
+              <row>
+                <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4</constant></entry>
+                <entry>boolean</entry>
+              </row>
+              <row><entry spanname="descr">Setting this prevents intra 4x4 mode in the intra mode decision.</entry>
+              </row>
+
+              <row><entry></entry></row>
+              <row id="v4l2-vpx-num-ref-frames">
+                <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES</constant></entry>
+                <entry>enum v4l2_vp8_num_ref_frames</entry>
+              </row>
+              <row><entry spanname="descr">The number of reference pictures for encoding P frames.
+Possible values are:</entry>
+              </row>
+              <row>
+                <entrytbl spanname="descr" cols="2">
+                  <tbody valign="top">
+                    <row>
+                      <entry><constant>V4L2_CID_MPEG_VIDEO_VPX_1_REF_FRAME</constant></entry>
+                      <entry>Last encoded frame will be searched</entry>
+                    </row>
+                    <row>
+                      <entry><constant>V4L2_CID_MPEG_VIDEO_VPX_2_REF_FRAME</constant></entry>
+                      <entry>Two frames will be searched among the last encoded frame, the golden frame
+and the alternate reference (altref) frame. The encoder implementation will decide which two are chosen.</entry>
+                    </row>
+                    <row>
+                      <entry><constant>V4L2_CID_MPEG_VIDEO_VPX_3_REF_FRAME</constant></entry>
+                      <entry>The last encoded frame, the golden frame and the altref frame will be searched.</entry>
+                    </row>
+                  </tbody>
+                </entrytbl>
+              </row>
+
+              <row><entry></entry></row>
+              <row>
+                <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL</constant></entry>
+                <entry>integer</entry>
+              </row>
+              <row><entry spanname="descr">Indicates the loop filter level. The adjustment of the loop
+filter level is done via a delta value against a baseline loop filter value.</entry>
+              </row>
+
+              <row><entry></entry></row>
+              <row>
+                <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS</constant></entry>
+                <entry>integer</entry>
+              </row>
+              <row><entry spanname="descr">This parameter affects the loop filter. Anything above
+zero weakens the deblocking effect on the loop filter.</entry>
+              </row>
+
+              <row><entry></entry></row>
+              <row>
+                <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD</constant></entry>
+                <entry>integer</entry>
+              </row>
+              <row><entry spanname="descr">Sets the refresh period for the golden frame. The period is defined
+in number of frames. For a value of 'n', every nth frame starting from the first key frame will be taken as a golden frame.
+For eg. for encoding sequence of 0, 1, 2, 3, 4, 5, 6, 7 where the golden frame refresh period is set as 4, the frames
+0, 4, 8 etc will be taken as the golden frames as frame 0 is always a key frame.</entry>
+              </row>
+
+              <row><entry></entry></row>
+              <row id="v4l2-vpx-golden-frame-sel">
+                <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL</constant></entry>
+                <entry>enum v4l2_vp8_golden_frame_sel</entry>
+              </row>
+              <row><entry spanname="descr">Selects the golden frame for encoding.
+Possible values are:</entry>
+              </row>
+              <row>
+                <entrytbl spanname="descr" cols="2">
+                  <tbody valign="top">
+                    <row>
+                      <entry><constant>V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV</constant></entry>
+                      <entry>Use the (n-2)th frame as a golden frame, current frame index being 'n'.</entry>
+                    </row>
+                    <row>
+                      <entry><constant>V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_REF_PERIOD</constant></entry>
+                      <entry>Use the previous specific frame indicated by
+V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD as a golden frame.</entry>
+                    </row>
+                  </tbody>
+                </entrytbl>
+              </row>
+
+          <row><entry></entry></row>
+        </tbody>
+      </tgroup>
+      </table>
+
+      </section>
     </section>
 
     <section id="camera-controls">
diff --git a/Documentation/DocBook/media/v4l/lirc_device_interface.xml b/Documentation/DocBook/media/v4l/lirc_device_interface.xml
index 8d7eb6bf6312..34cada2ca710 100644
--- a/Documentation/DocBook/media/v4l/lirc_device_interface.xml
+++ b/Documentation/DocBook/media/v4l/lirc_device_interface.xml
@@ -46,7 +46,9 @@ describing an IR signal are read from the chardev.</para>
 values. Pulses and spaces are only marked implicitly by their position. The
 data must start and end with a pulse, therefore, the data must always include
 an uneven number of samples. The write function must block until the data has
-been transmitted by the hardware.</para>
+been transmitted by the hardware. If more data is provided than the hardware
+can send, the driver returns EINVAL.</para>
+
 </section>
 
 <section id="lirc_ioctl">
diff --git a/Documentation/DocBook/media/v4l/pixfmt-nv16m.xml b/Documentation/DocBook/media/v4l/pixfmt-nv16m.xml
new file mode 100644
index 000000000000..c51d5a4cda09
--- /dev/null
+++ b/Documentation/DocBook/media/v4l/pixfmt-nv16m.xml
@@ -0,0 +1,171 @@
+    <refentry>
+      <refmeta>
+        <refentrytitle>V4L2_PIX_FMT_NV16M ('NM16'), V4L2_PIX_FMT_NV61M ('NM61')</refentrytitle>
+        &manvol;
+      </refmeta>
+      <refnamediv>
+        <refname id="V4L2-PIX-FMT-NV16M"><constant>V4L2_PIX_FMT_NV16M</constant></refname>
+        <refname id="V4L2-PIX-FMT-NV61M"><constant>V4L2_PIX_FMT_NV61M</constant></refname>
+        <refpurpose>Variation of <constant>V4L2_PIX_FMT_NV16</constant> and <constant>V4L2_PIX_FMT_NV61</constant> with planes
+          non contiguous in memory. </refpurpose>
+      </refnamediv>
+      <refsect1>
+        <title>Description</title>
+
+        <para>This is a multi-planar, two-plane version of the YUV 4:2:0 format.
+The three components are separated into two sub-images or planes.
+<constant>V4L2_PIX_FMT_NV16M</constant> differs from <constant>V4L2_PIX_FMT_NV16
+</constant> in that the two planes are non-contiguous in memory, i.e. the chroma
+plane does not necessarily immediately follows the luma plane.
+The luminance data occupies the first plane. The Y plane has one byte per pixel.
+In the second plane there is chrominance data with alternating chroma samples.
+The CbCr plane is the same width and height, in bytes, as the Y plane.
+Each CbCr pair belongs to four pixels. For example,
+Cb<subscript>0</subscript>/Cr<subscript>0</subscript> belongs to
+Y'<subscript>00</subscript>, Y'<subscript>01</subscript>,
+Y'<subscript>10</subscript>, Y'<subscript>11</subscript>.
+<constant>V4L2_PIX_FMT_NV61M</constant> is the same as <constant>V4L2_PIX_FMT_NV16M</constant>
+except the Cb and Cr bytes are swapped, the CrCb plane starts with a Cr byte.</para>
+
+        <para><constant>V4L2_PIX_FMT_NV16M</constant> and
+<constant>V4L2_PIX_FMT_NV61M</constant> are intended to be used only in drivers
+and applications that support the multi-planar API, described in
+<xref linkend="planar-apis"/>. </para>
+
+        <example>
+          <title><constant>V4L2_PIX_FMT_NV16M</constant> 4 &times; 4 pixel image</title>
+
+          <formalpara>
+            <title>Byte Order.</title>
+            <para>Each cell is one byte.
+                <informaltable frame="none">
+                <tgroup cols="5" align="center">
+                  <colspec align="left" colwidth="2*" />
+                  <tbody valign="top">
+                    <row>
+                      <entry>start0&nbsp;+&nbsp;0:</entry>
+                      <entry>Y'<subscript>00</subscript></entry>
+                      <entry>Y'<subscript>01</subscript></entry>
+                      <entry>Y'<subscript>02</subscript></entry>
+                      <entry>Y'<subscript>03</subscript></entry>
+                    </row>
+                    <row>
+                      <entry>start0&nbsp;+&nbsp;4:</entry>
+                      <entry>Y'<subscript>10</subscript></entry>
+                      <entry>Y'<subscript>11</subscript></entry>
+                      <entry>Y'<subscript>12</subscript></entry>
+                      <entry>Y'<subscript>13</subscript></entry>
+                    </row>
+                    <row>
+                      <entry>start0&nbsp;+&nbsp;8:</entry>
+                      <entry>Y'<subscript>20</subscript></entry>
+                      <entry>Y'<subscript>21</subscript></entry>
+                      <entry>Y'<subscript>22</subscript></entry>
+                      <entry>Y'<subscript>23</subscript></entry>
+                    </row>
+                    <row>
+                      <entry>start0&nbsp;+&nbsp;12:</entry>
+                      <entry>Y'<subscript>30</subscript></entry>
+                      <entry>Y'<subscript>31</subscript></entry>
+                      <entry>Y'<subscript>32</subscript></entry>
+                      <entry>Y'<subscript>33</subscript></entry>
+                    </row>
+                    <row>
+                      <entry></entry>
+                    </row>
+                    <row>
+                      <entry>start1&nbsp;+&nbsp;0:</entry>
+                      <entry>Cb<subscript>00</subscript></entry>
+                      <entry>Cr<subscript>00</subscript></entry>
+                      <entry>Cb<subscript>02</subscript></entry>
+                      <entry>Cr<subscript>02</subscript></entry>
+                    </row>
+                    <row>
+                      <entry>start1&nbsp;+&nbsp;4:</entry>
+                      <entry>Cb<subscript>10</subscript></entry>
+                      <entry>Cr<subscript>10</subscript></entry>
+                      <entry>Cb<subscript>12</subscript></entry>
+                      <entry>Cr<subscript>12</subscript></entry>
+                    </row>
+                    <row>
+                      <entry>start1&nbsp;+&nbsp;8:</entry>
+                      <entry>Cb<subscript>20</subscript></entry>
+                      <entry>Cr<subscript>20</subscript></entry>
+                      <entry>Cb<subscript>22</subscript></entry>
+                      <entry>Cr<subscript>22</subscript></entry>
+                    </row>
+                    <row>
+                      <entry>start1&nbsp;+&nbsp;12:</entry>
+                      <entry>Cb<subscript>30</subscript></entry>
+                      <entry>Cr<subscript>30</subscript></entry>
+                      <entry>Cb<subscript>32</subscript></entry>
+                      <entry>Cr<subscript>32</subscript></entry>
+                    </row>
+                  </tbody>
+                </tgroup>
+                </informaltable>
+              </para>
+          </formalpara>
+
+          <formalpara>
+            <title>Color Sample Location.</title>
+            <para>
+                <informaltable frame="none">
+                <tgroup cols="7" align="center">
+                  <tbody valign="top">
+                    <row>
+                      <entry></entry>
+                      <entry>0</entry><entry></entry><entry>1</entry><entry></entry>
+                      <entry>2</entry><entry></entry><entry>3</entry>
+                    </row>
+                    <row>
+                      <entry>0</entry>
+                      <entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
+                      <entry>Y</entry><entry></entry><entry>Y</entry>
+                    </row>
+                    <row>
+                      <entry></entry>
+                      <entry></entry><entry>C</entry><entry></entry><entry></entry>
+                      <entry></entry><entry>C</entry><entry></entry>
+                    </row>
+                    <row>
+                      <entry>1</entry>
+                      <entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
+                      <entry>Y</entry><entry></entry><entry>Y</entry>
+                    </row>
+                    <row>
+                      <entry></entry>
+                      <entry></entry><entry>C</entry><entry></entry><entry></entry>
+                      <entry></entry><entry>C</entry><entry></entry>
+                    </row>
+                    <row>
+                      <entry></entry>
+                    </row>
+                    <row>
+                      <entry>2</entry>
+                      <entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
+                      <entry>Y</entry><entry></entry><entry>Y</entry>
+                    </row>
+                    <row>
+                      <entry></entry>
+                      <entry></entry><entry>C</entry><entry></entry><entry></entry>
+                      <entry></entry><entry>C</entry><entry></entry>
+                    </row>
+                    <row>
+                      <entry>3</entry>
+                      <entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
+                      <entry>Y</entry><entry></entry><entry>Y</entry>
+                    </row>
+                    <row>
+                      <entry></entry>
+                      <entry></entry><entry>C</entry><entry></entry><entry></entry>
+                      <entry></entry><entry>C</entry><entry></entry>
+                    </row>
+                  </tbody>
+                </tgroup>
+                </informaltable>
+              </para>
+          </formalpara>
+        </example>
+      </refsect1>
+    </refentry>
diff --git a/Documentation/DocBook/media/v4l/pixfmt.xml b/Documentation/DocBook/media/v4l/pixfmt.xml
index 99b8d2ad6e4f..72d72bd67d0a 100644
--- a/Documentation/DocBook/media/v4l/pixfmt.xml
+++ b/Documentation/DocBook/media/v4l/pixfmt.xml
@@ -391,9 +391,9 @@ clamp (double x)
         else               return r;
 }
 
-y1 = (255 / 219.0) * (Y1 - 16);
-pb = (255 / 224.0) * (Cb - 128);
-pr = (255 / 224.0) * (Cr - 128);
+y1 = (Y1 - 16) / 219.0;
+pb = (Cb - 128) / 224.0;
+pr = (Cr - 128) / 224.0;
 
 r = 1.0 * y1 + 0     * pb + 1.402 * pr;
 g = 1.0 * y1 - 0.344 * pb - 0.714 * pr;
@@ -718,6 +718,7 @@ information.</para>
     &sub-nv12m;
     &sub-nv12mt;
     &sub-nv16;
+    &sub-nv16m;
     &sub-nv24;
     &sub-m420;
   </section>
diff --git a/Documentation/DocBook/media/v4l/subdev-formats.xml b/Documentation/DocBook/media/v4l/subdev-formats.xml
index adc61982df7b..f72c1cc93a9b 100644
--- a/Documentation/DocBook/media/v4l/subdev-formats.xml
+++ b/Documentation/DocBook/media/v4l/subdev-formats.xml
@@ -97,31 +97,39 @@
           <colspec colname="id" align="left" />
           <colspec colname="code" align="center"/>
           <colspec colname="bit" />
-          <colspec colnum="4" colname="b23" align="center" />
-          <colspec colnum="5" colname="b22" align="center" />
-          <colspec colnum="6" colname="b21" align="center" />
-          <colspec colnum="7" colname="b20" align="center" />
-          <colspec colnum="8" colname="b19" align="center" />
-          <colspec colnum="9" colname="b18" align="center" />
-          <colspec colnum="10" colname="b17" align="center" />
-          <colspec colnum="11" colname="b16" align="center" />
-          <colspec colnum="12" colname="b15" align="center" />
-          <colspec colnum="13" colname="b14" align="center" />
-          <colspec colnum="14" colname="b13" align="center" />
-          <colspec colnum="15" colname="b12" align="center" />
-          <colspec colnum="16" colname="b11" align="center" />
-          <colspec colnum="17" colname="b10" align="center" />
-          <colspec colnum="18" colname="b09" align="center" />
-          <colspec colnum="19" colname="b08" align="center" />
-          <colspec colnum="20" colname="b07" align="center" />
-          <colspec colnum="21" colname="b06" align="center" />
-          <colspec colnum="22" colname="b05" align="center" />
-          <colspec colnum="23" colname="b04" align="center" />
-          <colspec colnum="24" colname="b03" align="center" />
-          <colspec colnum="25" colname="b02" align="center" />
-          <colspec colnum="26" colname="b01" align="center" />
-          <colspec colnum="27" colname="b00" align="center" />
-          <spanspec namest="b23" nameend="b00" spanname="b0" />
+          <colspec colnum="4" colname="b31" align="center" />
+          <colspec colnum="5" colname="b20" align="center" />
+          <colspec colnum="6" colname="b29" align="center" />
+          <colspec colnum="7" colname="b28" align="center" />
+          <colspec colnum="8" colname="b27" align="center" />
+          <colspec colnum="9" colname="b26" align="center" />
+          <colspec colnum="10" colname="b25" align="center" />
+          <colspec colnum="11" colname="b24" align="center" />
+          <colspec colnum="12" colname="b23" align="center" />
+          <colspec colnum="13" colname="b22" align="center" />
+          <colspec colnum="14" colname="b21" align="center" />
+          <colspec colnum="15" colname="b20" align="center" />
+          <colspec colnum="16" colname="b19" align="center" />
+          <colspec colnum="17" colname="b18" align="center" />
+          <colspec colnum="18" colname="b17" align="center" />
+          <colspec colnum="19" colname="b16" align="center" />
+          <colspec colnum="20" colname="b15" align="center" />
+          <colspec colnum="21" colname="b14" align="center" />
+          <colspec colnum="22" colname="b13" align="center" />
+          <colspec colnum="23" colname="b12" align="center" />
+          <colspec colnum="24" colname="b11" align="center" />
+          <colspec colnum="25" colname="b10" align="center" />
+          <colspec colnum="26" colname="b09" align="center" />
+          <colspec colnum="27" colname="b08" align="center" />
+          <colspec colnum="28" colname="b07" align="center" />
+          <colspec colnum="29" colname="b06" align="center" />
+          <colspec colnum="30" colname="b05" align="center" />
+          <colspec colnum="31" colname="b04" align="center" />
+          <colspec colnum="32" colname="b03" align="center" />
+          <colspec colnum="33" colname="b02" align="center" />
+          <colspec colnum="34" colname="b01" align="center" />
+          <colspec colnum="35" colname="b00" align="center" />
+          <spanspec namest="b31" nameend="b00" spanname="b0" />
           <thead>
             <row>
               <entry>Identifier</entry>
@@ -133,6 +141,14 @@
               <entry></entry>
               <entry></entry>
               <entry>Bit</entry>
+              <entry>31</entry>
+              <entry>30</entry>
+              <entry>29</entry>
+              <entry>28</entry>
+              <entry>27</entry>
+              <entry>26</entry>
+              <entry>25</entry>
+              <entry>24</entry>
               <entry>23</entry>
               <entry>22</entry>
               <entry>21</entry>
@@ -164,7 +180,7 @@
               <entry>V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE</entry>
               <entry>0x1001</entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>0</entry>
               <entry>0</entry>
               <entry>0</entry>
@@ -178,7 +194,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>g<subscript>3</subscript></entry>
               <entry>g<subscript>2</subscript></entry>
               <entry>g<subscript>1</subscript></entry>
@@ -192,7 +208,7 @@
               <entry>V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE</entry>
               <entry>0x1002</entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>g<subscript>3</subscript></entry>
               <entry>g<subscript>2</subscript></entry>
               <entry>g<subscript>1</subscript></entry>
@@ -206,7 +222,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>0</entry>
               <entry>0</entry>
               <entry>0</entry>
@@ -220,7 +236,7 @@
               <entry>V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE</entry>
               <entry>0x1003</entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>0</entry>
               <entry>r<subscript>4</subscript></entry>
               <entry>r<subscript>3</subscript></entry>
@@ -234,7 +250,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>g<subscript>2</subscript></entry>
               <entry>g<subscript>1</subscript></entry>
               <entry>g<subscript>0</subscript></entry>
@@ -248,7 +264,7 @@
               <entry>V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE</entry>
               <entry>0x1004</entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>g<subscript>2</subscript></entry>
               <entry>g<subscript>1</subscript></entry>
               <entry>g<subscript>0</subscript></entry>
@@ -262,7 +278,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>0</entry>
               <entry>r<subscript>4</subscript></entry>
               <entry>r<subscript>3</subscript></entry>
@@ -276,7 +292,7 @@
               <entry>V4L2_MBUS_FMT_BGR565_2X8_BE</entry>
               <entry>0x1005</entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>b<subscript>4</subscript></entry>
               <entry>b<subscript>3</subscript></entry>
               <entry>b<subscript>2</subscript></entry>
@@ -290,7 +306,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>g<subscript>2</subscript></entry>
               <entry>g<subscript>1</subscript></entry>
               <entry>g<subscript>0</subscript></entry>
@@ -304,7 +320,7 @@
               <entry>V4L2_MBUS_FMT_BGR565_2X8_LE</entry>
               <entry>0x1006</entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>g<subscript>2</subscript></entry>
               <entry>g<subscript>1</subscript></entry>
               <entry>g<subscript>0</subscript></entry>
@@ -318,7 +334,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>b<subscript>4</subscript></entry>
               <entry>b<subscript>3</subscript></entry>
               <entry>b<subscript>2</subscript></entry>
@@ -332,7 +348,7 @@
               <entry>V4L2_MBUS_FMT_RGB565_2X8_BE</entry>
               <entry>0x1007</entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>r<subscript>4</subscript></entry>
               <entry>r<subscript>3</subscript></entry>
               <entry>r<subscript>2</subscript></entry>
@@ -346,7 +362,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>g<subscript>2</subscript></entry>
               <entry>g<subscript>1</subscript></entry>
               <entry>g<subscript>0</subscript></entry>
@@ -360,7 +376,7 @@
               <entry>V4L2_MBUS_FMT_RGB565_2X8_LE</entry>
               <entry>0x1008</entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>g<subscript>2</subscript></entry>
               <entry>g<subscript>1</subscript></entry>
               <entry>g<subscript>0</subscript></entry>
@@ -374,7 +390,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-16;
+              &dash-ent-24;
               <entry>r<subscript>4</subscript></entry>
               <entry>r<subscript>3</subscript></entry>
               <entry>r<subscript>2</subscript></entry>
@@ -388,12 +404,7 @@
               <entry>V4L2_MBUS_FMT_RGB666_1X18</entry>
               <entry>0x1009</entry>
               <entry></entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-14;
               <entry>r<subscript>5</subscript></entry>
               <entry>r<subscript>4</subscript></entry>
               <entry>r<subscript>3</subscript></entry>
@@ -417,6 +428,7 @@
               <entry>V4L2_MBUS_FMT_RGB888_1X24</entry>
               <entry>0x100a</entry>
               <entry></entry>
+              &dash-ent-8;
               <entry>r<subscript>7</subscript></entry>
               <entry>r<subscript>6</subscript></entry>
               <entry>r<subscript>5</subscript></entry>
@@ -446,9 +458,7 @@
               <entry>V4L2_MBUS_FMT_RGB888_2X12_BE</entry>
               <entry>0x100b</entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-20;
               <entry>r<subscript>7</subscript></entry>
               <entry>r<subscript>6</subscript></entry>
               <entry>r<subscript>5</subscript></entry>
@@ -466,9 +476,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-20;
               <entry>g<subscript>3</subscript></entry>
               <entry>g<subscript>2</subscript></entry>
               <entry>g<subscript>1</subscript></entry>
@@ -486,9 +494,7 @@
               <entry>V4L2_MBUS_FMT_RGB888_2X12_LE</entry>
               <entry>0x100c</entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-20;
               <entry>g<subscript>3</subscript></entry>
               <entry>g<subscript>2</subscript></entry>
               <entry>g<subscript>1</subscript></entry>
@@ -506,9 +512,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-20;
               <entry>r<subscript>7</subscript></entry>
               <entry>r<subscript>6</subscript></entry>
               <entry>r<subscript>5</subscript></entry>
@@ -522,6 +526,43 @@
               <entry>g<subscript>5</subscript></entry>
               <entry>g<subscript>4</subscript></entry>
             </row>
+            <row id="V4L2-MBUS-FMT-ARGB888-1X32">
+              <entry>V4L2_MBUS_FMT_ARGB888_1X32</entry>
+              <entry>0x100d</entry>
+              <entry></entry>
+              <entry>a<subscript>7</subscript></entry>
+              <entry>a<subscript>6</subscript></entry>
+              <entry>a<subscript>5</subscript></entry>
+              <entry>a<subscript>4</subscript></entry>
+              <entry>a<subscript>3</subscript></entry>
+              <entry>a<subscript>2</subscript></entry>
+              <entry>a<subscript>1</subscript></entry>
+              <entry>a<subscript>0</subscript></entry>
+              <entry>r<subscript>7</subscript></entry>
+              <entry>r<subscript>6</subscript></entry>
+              <entry>r<subscript>5</subscript></entry>
+              <entry>r<subscript>4</subscript></entry>
+              <entry>r<subscript>3</subscript></entry>
+              <entry>r<subscript>2</subscript></entry>
+              <entry>r<subscript>1</subscript></entry>
+              <entry>r<subscript>0</subscript></entry>
+              <entry>g<subscript>7</subscript></entry>
+              <entry>g<subscript>6</subscript></entry>
+              <entry>g<subscript>5</subscript></entry>
+              <entry>g<subscript>4</subscript></entry>
+              <entry>g<subscript>3</subscript></entry>
+              <entry>g<subscript>2</subscript></entry>
+              <entry>g<subscript>1</subscript></entry>
+              <entry>g<subscript>0</subscript></entry>
+              <entry>b<subscript>7</subscript></entry>
+              <entry>b<subscript>6</subscript></entry>
+              <entry>b<subscript>5</subscript></entry>
+              <entry>b<subscript>4</subscript></entry>
+              <entry>b<subscript>3</subscript></entry>
+              <entry>b<subscript>2</subscript></entry>
+              <entry>b<subscript>1</subscript></entry>
+              <entry>b<subscript>0</subscript></entry>
+            </row>
           </tbody>
         </tgroup>
       </table>
@@ -1149,6 +1190,7 @@
            <listitem><para>y<subscript>x</subscript> for luma component bit number x</para></listitem>
            <listitem><para>u<subscript>x</subscript> for blue chroma component bit number x</para></listitem>
            <listitem><para>v<subscript>x</subscript> for red chroma component bit number x</para></listitem>
+           <listitem><para>a<subscript>x</subscript> for alpha component bit number x</para></listitem>
            <listitem><para>- for non-available bits (for positions higher than the bus width)</para></listitem>
            <listitem><para>d for dummy bits</para></listitem>
         </itemizedlist>
@@ -1159,37 +1201,39 @@
           <colspec colname="id" align="left" />
           <colspec colname="code" align="center"/>
           <colspec colname="bit" />
-          <colspec colnum="4" colname="b29" align="center" />
-          <colspec colnum="5" colname="b28" align="center" />
-          <colspec colnum="6" colname="b27" align="center" />
-          <colspec colnum="7" colname="b26" align="center" />
-          <colspec colnum="8" colname="b25" align="center" />
-          <colspec colnum="9" colname="b24" align="center" />
-          <colspec colnum="10" colname="b23" align="center" />
-          <colspec colnum="11" colname="b22" align="center" />
-          <colspec colnum="12" colname="b21" align="center" />
-          <colspec colnum="13" colname="b20" align="center" />
-          <colspec colnum="14" colname="b19" align="center" />
-          <colspec colnum="15" colname="b18" align="center" />
-          <colspec colnum="16" colname="b17" align="center" />
-          <colspec colnum="17" colname="b16" align="center" />
-          <colspec colnum="18" colname="b15" align="center" />
-          <colspec colnum="19" colname="b14" align="center" />
-          <colspec colnum="20" colname="b13" align="center" />
-          <colspec colnum="21" colname="b12" align="center" />
-          <colspec colnum="22" colname="b11" align="center" />
-          <colspec colnum="23" colname="b10" align="center" />
-          <colspec colnum="24" colname="b09" align="center" />
-          <colspec colnum="25" colname="b08" align="center" />
-          <colspec colnum="26" colname="b07" align="center" />
-          <colspec colnum="27" colname="b06" align="center" />
-          <colspec colnum="28" colname="b05" align="center" />
-          <colspec colnum="29" colname="b04" align="center" />
-          <colspec colnum="30" colname="b03" align="center" />
-          <colspec colnum="31" colname="b02" align="center" />
-          <colspec colnum="32" colname="b01" align="center" />
-          <colspec colnum="33" colname="b00" align="center" />
-          <spanspec namest="b29" nameend="b00" spanname="b0" />
+          <colspec colnum="4" colname="b31" align="center" />
+          <colspec colnum="5" colname="b20" align="center" />
+          <colspec colnum="6" colname="b29" align="center" />
+          <colspec colnum="7" colname="b28" align="center" />
+          <colspec colnum="8" colname="b27" align="center" />
+          <colspec colnum="9" colname="b26" align="center" />
+          <colspec colnum="10" colname="b25" align="center" />
+          <colspec colnum="11" colname="b24" align="center" />
+          <colspec colnum="12" colname="b23" align="center" />
+          <colspec colnum="13" colname="b22" align="center" />
+          <colspec colnum="14" colname="b21" align="center" />
+          <colspec colnum="15" colname="b20" align="center" />
+          <colspec colnum="16" colname="b19" align="center" />
+          <colspec colnum="17" colname="b18" align="center" />
+          <colspec colnum="18" colname="b17" align="center" />
+          <colspec colnum="19" colname="b16" align="center" />
+          <colspec colnum="20" colname="b15" align="center" />
+          <colspec colnum="21" colname="b14" align="center" />
+          <colspec colnum="22" colname="b13" align="center" />
+          <colspec colnum="23" colname="b12" align="center" />
+          <colspec colnum="24" colname="b11" align="center" />
+          <colspec colnum="25" colname="b10" align="center" />
+          <colspec colnum="26" colname="b09" align="center" />
+          <colspec colnum="27" colname="b08" align="center" />
+          <colspec colnum="28" colname="b07" align="center" />
+          <colspec colnum="29" colname="b06" align="center" />
+          <colspec colnum="30" colname="b05" align="center" />
+          <colspec colnum="31" colname="b04" align="center" />
+          <colspec colnum="32" colname="b03" align="center" />
+          <colspec colnum="33" colname="b02" align="center" />
+          <colspec colnum="34" colname="b01" align="center" />
+          <colspec colnum="35" colname="b00" align="center" />
+          <spanspec namest="b31" nameend="b00" spanname="b0" />
           <thead>
             <row>
               <entry>Identifier</entry>
@@ -1201,6 +1245,8 @@
               <entry></entry>
               <entry></entry>
               <entry>Bit</entry>
+              <entry>31</entry>
+              <entry>30</entry>
               <entry>29</entry>
               <entry>28</entry>
               <entry>27</entry>
@@ -1238,10 +1284,7 @@
               <entry>V4L2_MBUS_FMT_Y8_1X8</entry>
               <entry>0x2001</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1255,18 +1298,7 @@
               <entry>V4L2_MBUS_FMT_UV8_1X8</entry>
               <entry>0x2015</entry>
               <entry></entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -1280,18 +1312,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -1305,10 +1326,7 @@
               <entry>V4L2_MBUS_FMT_UYVY8_1_5X8</entry>
               <entry>0x2002</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -1322,10 +1340,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1339,10 +1354,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1356,10 +1368,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -1373,10 +1382,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1390,10 +1396,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1407,10 +1410,7 @@
               <entry>V4L2_MBUS_FMT_VYUY8_1_5X8</entry>
               <entry>0x2003</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -1424,10 +1424,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1441,10 +1438,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1458,10 +1452,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -1475,10 +1466,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1492,10 +1480,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1509,10 +1494,7 @@
               <entry>V4L2_MBUS_FMT_YUYV8_1_5X8</entry>
               <entry>0x2004</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1526,10 +1508,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1543,10 +1522,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -1560,10 +1536,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1577,10 +1550,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1594,10 +1564,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -1611,10 +1578,7 @@
               <entry>V4L2_MBUS_FMT_YVYU8_1_5X8</entry>
               <entry>0x2005</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1628,10 +1592,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1645,10 +1606,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -1662,10 +1620,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1679,10 +1634,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1696,10 +1648,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -1713,10 +1662,7 @@
               <entry>V4L2_MBUS_FMT_UYVY8_2X8</entry>
               <entry>0x2006</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -1730,10 +1676,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1747,10 +1690,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -1764,10 +1704,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1781,10 +1718,7 @@
               <entry>V4L2_MBUS_FMT_VYUY8_2X8</entry>
               <entry>0x2007</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -1798,10 +1732,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1815,10 +1746,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -1832,10 +1760,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1849,10 +1774,7 @@
               <entry>V4L2_MBUS_FMT_YUYV8_2X8</entry>
               <entry>0x2008</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1866,10 +1788,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -1883,10 +1802,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1900,10 +1816,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -1917,10 +1830,7 @@
               <entry>V4L2_MBUS_FMT_YVYU8_2X8</entry>
               <entry>0x2009</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1934,10 +1844,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -1951,10 +1858,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -1968,10 +1872,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-24;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -1985,8 +1886,7 @@
               <entry>V4L2_MBUS_FMT_Y10_1X10</entry>
               <entry>0x200a</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
+              &dash-ent-22;
               <entry>y<subscript>9</subscript></entry>
               <entry>y<subscript>8</subscript></entry>
               <entry>y<subscript>7</subscript></entry>
@@ -2002,8 +1902,7 @@
               <entry>V4L2_MBUS_FMT_YUYV10_2X10</entry>
               <entry>0x200b</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
+              &dash-ent-22;
               <entry>y<subscript>9</subscript></entry>
               <entry>y<subscript>8</subscript></entry>
               <entry>y<subscript>7</subscript></entry>
@@ -2019,8 +1918,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
+              &dash-ent-22;
               <entry>u<subscript>9</subscript></entry>
               <entry>u<subscript>8</subscript></entry>
               <entry>u<subscript>7</subscript></entry>
@@ -2036,8 +1934,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
+              &dash-ent-22;
               <entry>y<subscript>9</subscript></entry>
               <entry>y<subscript>8</subscript></entry>
               <entry>y<subscript>7</subscript></entry>
@@ -2053,8 +1950,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
+              &dash-ent-22;
               <entry>v<subscript>9</subscript></entry>
               <entry>v<subscript>8</subscript></entry>
               <entry>v<subscript>7</subscript></entry>
@@ -2070,8 +1966,7 @@
               <entry>V4L2_MBUS_FMT_YVYU10_2X10</entry>
               <entry>0x200c</entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
+              &dash-ent-22;
               <entry>y<subscript>9</subscript></entry>
               <entry>y<subscript>8</subscript></entry>
               <entry>y<subscript>7</subscript></entry>
@@ -2087,8 +1982,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
+              &dash-ent-22;
               <entry>v<subscript>9</subscript></entry>
               <entry>v<subscript>8</subscript></entry>
               <entry>v<subscript>7</subscript></entry>
@@ -2104,8 +1998,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
+              &dash-ent-22;
               <entry>y<subscript>9</subscript></entry>
               <entry>y<subscript>8</subscript></entry>
               <entry>y<subscript>7</subscript></entry>
@@ -2121,8 +2014,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              &dash-ent-10;
+              &dash-ent-22;
               <entry>u<subscript>9</subscript></entry>
               <entry>u<subscript>8</subscript></entry>
               <entry>u<subscript>7</subscript></entry>
@@ -2138,15 +2030,7 @@
               <entry>V4L2_MBUS_FMT_Y12_1X12</entry>
               <entry>0x2013</entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-20;
               <entry>y<subscript>11</subscript></entry>
               <entry>y<subscript>10</subscript></entry>
               <entry>y<subscript>9</subscript></entry>
@@ -2164,11 +2048,7 @@
               <entry>V4L2_MBUS_FMT_UYVY8_1X16</entry>
               <entry>0x200f</entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -2190,11 +2070,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -2216,11 +2092,7 @@
               <entry>V4L2_MBUS_FMT_VYUY8_1X16</entry>
               <entry>0x2010</entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>v<subscript>7</subscript></entry>
               <entry>v<subscript>6</subscript></entry>
               <entry>v<subscript>5</subscript></entry>
@@ -2242,11 +2114,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>u<subscript>7</subscript></entry>
               <entry>u<subscript>6</subscript></entry>
               <entry>u<subscript>5</subscript></entry>
@@ -2268,11 +2136,7 @@
               <entry>V4L2_MBUS_FMT_YUYV8_1X16</entry>
               <entry>0x2011</entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -2294,11 +2158,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -2320,11 +2180,7 @@
               <entry>V4L2_MBUS_FMT_YVYU8_1X16</entry>
               <entry>0x2012</entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -2346,11 +2202,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -2372,10 +2224,7 @@
               <entry>V4L2_MBUS_FMT_YDYUYDYV8_1X16</entry>
               <entry>0x2014</entry>
               <entry></entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -2397,10 +2246,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -2422,10 +2268,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -2447,10 +2290,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
-              <entry>-</entry>
+              &dash-ent-16;
               <entry>y<subscript>7</subscript></entry>
               <entry>y<subscript>6</subscript></entry>
               <entry>y<subscript>5</subscript></entry>
@@ -2472,7 +2312,7 @@
               <entry>V4L2_MBUS_FMT_YUYV10_1X20</entry>
               <entry>0x200d</entry>
               <entry></entry>
-              &dash-ent-10;
+              &dash-ent-12;
               <entry>y<subscript>9</subscript></entry>
               <entry>y<subscript>8</subscript></entry>
               <entry>y<subscript>7</subscript></entry>
@@ -2498,7 +2338,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
+              &dash-ent-12;
               <entry>y<subscript>9</subscript></entry>
               <entry>y<subscript>8</subscript></entry>
               <entry>y<subscript>7</subscript></entry>
@@ -2524,7 +2364,7 @@
               <entry>V4L2_MBUS_FMT_YVYU10_1X20</entry>
               <entry>0x200e</entry>
               <entry></entry>
-              &dash-ent-10;
+              &dash-ent-12;
               <entry>y<subscript>9</subscript></entry>
               <entry>y<subscript>8</subscript></entry>
               <entry>y<subscript>7</subscript></entry>
@@ -2550,7 +2390,7 @@
               <entry></entry>
               <entry></entry>
               <entry></entry>
-              &dash-ent-10;
+              &dash-ent-12;
               <entry>y<subscript>9</subscript></entry>
               <entry>y<subscript>8</subscript></entry>
               <entry>y<subscript>7</subscript></entry>
@@ -2574,8 +2414,10 @@
             </row>
             <row id="V4L2-MBUS-FMT-YUV10-1X30">
               <entry>V4L2_MBUS_FMT_YUV10_1X30</entry>
-              <entry>0x2014</entry>
+              <entry>0x2016</entry>
               <entry></entry>
+              <entry>-</entry>
+              <entry>-</entry>
               <entry>y<subscript>9</subscript></entry>
               <entry>y<subscript>8</subscript></entry>
               <entry>y<subscript>7</subscript></entry>
@@ -2607,6 +2449,43 @@
               <entry>v<subscript>1</subscript></entry>
               <entry>v<subscript>0</subscript></entry>
             </row>
+            <row id="V4L2-MBUS-FMT-AYUV8-1X32">
+              <entry>V4L2_MBUS_FMT_AYUV8_1X32</entry>
+              <entry>0x2017</entry>
+              <entry></entry>
+              <entry>a<subscript>7</subscript></entry>
+              <entry>a<subscript>6</subscript></entry>
+              <entry>a<subscript>5</subscript></entry>
+              <entry>a<subscript>4</subscript></entry>
+              <entry>a<subscript>3</subscript></entry>
+              <entry>a<subscript>2</subscript></entry>
+              <entry>a<subscript>1</subscript></entry>
+              <entry>a<subscript>0</subscript></entry>
+              <entry>y<subscript>7</subscript></entry>
+              <entry>y<subscript>6</subscript></entry>
+              <entry>y<subscript>5</subscript></entry>
+              <entry>y<subscript>4</subscript></entry>
+              <entry>y<subscript>3</subscript></entry>
+              <entry>y<subscript>2</subscript></entry>
+              <entry>y<subscript>1</subscript></entry>
+              <entry>y<subscript>0</subscript></entry>
+              <entry>u<subscript>7</subscript></entry>
+              <entry>u<subscript>6</subscript></entry>
+              <entry>u<subscript>5</subscript></entry>
+              <entry>u<subscript>4</subscript></entry>
+              <entry>u<subscript>3</subscript></entry>
+              <entry>u<subscript>2</subscript></entry>
+              <entry>u<subscript>1</subscript></entry>
+              <entry>u<subscript>0</subscript></entry>
+              <entry>v<subscript>7</subscript></entry>
+              <entry>v<subscript>6</subscript></entry>
+              <entry>v<subscript>5</subscript></entry>
+              <entry>v<subscript>4</subscript></entry>
+              <entry>v<subscript>3</subscript></entry>
+              <entry>v<subscript>2</subscript></entry>
+              <entry>v<subscript>1</subscript></entry>
+              <entry>v<subscript>0</subscript></entry>
+            </row>
           </tbody>
         </tgroup>
       </table>
diff --git a/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml b/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml
index cd9943672434..9b700a5f4df7 100644
--- a/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml
@@ -62,18 +62,29 @@ addition to the <constant>VIDIOC_REQBUFS</constant> ioctl, when a tighter
 control over buffers is required. This ioctl can be called multiple times to
 create buffers of different sizes.</para>
 
-    <para>To allocate device buffers applications initialize relevant fields of
-the <structname>v4l2_create_buffers</structname> structure. They set the
-<structfield>type</structfield> field in the
-&v4l2-format; structure, embedded in this
-structure, to the respective stream or buffer type.
-<structfield>count</structfield> must be set to the number of required buffers.
-<structfield>memory</structfield> specifies the required I/O method. The
-<structfield>format</structfield> field shall typically be filled in using
-either the <constant>VIDIOC_TRY_FMT</constant> or
-<constant>VIDIOC_G_FMT</constant> ioctl(). Additionally, applications can adjust
-<structfield>sizeimage</structfield> fields to fit their specific needs. The
-<structfield>reserved</structfield> array must be zeroed.</para>
+    <para>To allocate the device buffers applications must initialize the
+relevant fields of the <structname>v4l2_create_buffers</structname> structure.
+The <structfield>count</structfield> field must be set to the number of
+requested buffers, the <structfield>memory</structfield> field specifies the
+requested I/O method and the <structfield>reserved</structfield> array must be
+zeroed.</para>
+
+    <para>The <structfield>format</structfield> field specifies the image format
+that the buffers must be able to handle. The application has to fill in this
+&v4l2-format;. Usually this will be done using the
+<constant>VIDIOC_TRY_FMT</constant> or <constant>VIDIOC_G_FMT</constant> ioctl()
+to ensure that the requested format is supported by the driver. Unsupported
+formats will result in an error.</para>
+
+    <para>The buffers created by this ioctl will have as minimum size the size
+defined by the <structfield>format.pix.sizeimage</structfield> field. If the
+<structfield>format.pix.sizeimage</structfield> field is less than the minimum
+required for the given format, then <structfield>sizeimage</structfield> will be
+increased by the driver to that minimum to allocate the buffers. If it is
+larger, then the value will be used as-is. The same applies to the
+<structfield>sizeimage</structfield> field of the
+<structname>v4l2_plane_pix_format</structname> structure in the case of
+multiplanar formats.</para>
 
     <para>When the ioctl is called with a pointer to this structure the driver
 will attempt to allocate up to the requested number of buffers and store the
@@ -144,9 +155,9 @@ mapped</link> I/O.</para>
       <varlistentry>
         <term><errorcode>EINVAL</errorcode></term>
         <listitem>
-          <para>The buffer type (<structfield>type</structfield> field) or the
-requested I/O method (<structfield>memory</structfield>) is not
-supported.</para>
+          <para>The buffer type (<structfield>format.type</structfield> field),
+requested I/O method (<structfield>memory</structfield>) or format
+(<structfield>format</structfield> field) is not valid.</para>
         </listitem>
       </varlistentry>
     </variablelist>
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml b/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml
index 72369707bd77..c4336577ff06 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml
@@ -156,19 +156,19 @@ bit 0 (V4L2_DV_VSYNC_POS_POL) is for vertical sync polarity and bit 1 (V4L2_DV_H
             <entry>__u32</entry>
             <entry><structfield>il_vfrontporch</structfield></entry>
             <entry>Vertical front porch in lines for the even field (aka field 2) of
-            interlaced field formats.</entry>
+            interlaced field formats. Must be 0 for progressive formats.</entry>
           </row>
           <row>
             <entry>__u32</entry>
             <entry><structfield>il_vsync</structfield></entry>
             <entry>Vertical sync length in lines for the even field (aka field 2) of
-            interlaced field formats.</entry>
+            interlaced field formats. Must be 0 for progressive formats.</entry>
           </row>
           <row>
             <entry>__u32</entry>
             <entry><structfield>il_vbackporch</structfield></entry>
             <entry>Vertical back porch in lines for the even field (aka field 2) of
-            interlaced field formats.</entry>
+            interlaced field formats. Must be 0 for progressive formats.</entry>
           </row>
           <row>
             <entry>__u32</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-jpegcomp.xml b/Documentation/DocBook/media/v4l/vidioc-g-jpegcomp.xml
index 48748499c097..098ff483802e 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-jpegcomp.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-jpegcomp.xml
@@ -92,8 +92,8 @@ to add them.</para>
             <entry>int</entry>
             <entry><structfield>quality</structfield></entry>
             <entry>Deprecated. If <link linkend="jpeg-quality-control"><constant>
-            V4L2_CID_JPEG_IMAGE_QUALITY</constant></link> control is exposed by
-            a driver applications should use it instead and ignore this field.
+            V4L2_CID_JPEG_COMPRESSION_QUALITY</constant></link> control is exposed
+            by a driver applications should use it instead and ignore this field.
             </entry>
           </row>
           <row>
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-parm.xml b/Documentation/DocBook/media/v4l/vidioc-g-parm.xml
index 9058224d1bbf..f4e28e7d4751 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-parm.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-parm.xml
@@ -132,7 +132,7 @@ devices.</para>
           <row>
             <entry>&v4l2-fract;</entry>
             <entry><structfield>timeperframe</structfield></entry>
-            <entry><para>This is is the desired period between
+            <entry><para>This is the desired period between
 successive frames captured by the driver, in seconds. The
 field is intended to skip frames on the driver side, saving I/O
 bandwidth.</para><para>Applications store here the desired frame
@@ -193,7 +193,7 @@ applications must set the array to zero.</entry>
           <row>
             <entry>&v4l2-fract;</entry>
             <entry><structfield>timeperframe</structfield></entry>
-            <entry>This is is the desired period between
+            <entry>This is the desired period between
 successive frames output by the driver, in seconds.</entry>
           </row>
           <row>
diff --git a/Documentation/DocBook/media_api.tmpl b/Documentation/DocBook/media_api.tmpl
index 9c92bb879b6d..4c8d282545a2 100644
--- a/Documentation/DocBook/media_api.tmpl
+++ b/Documentation/DocBook/media_api.tmpl
@@ -22,8 +22,14 @@
 
 <!-- LinuxTV v4l-dvb repository. -->
 <!ENTITY v4l-dvb                "<ulink url='http://linuxtv.org/repo/'>http://linuxtv.org/repo/</ulink>">
+<!ENTITY dash-ent-8             "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
 <!ENTITY dash-ent-10            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
+<!ENTITY dash-ent-12            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
+<!ENTITY dash-ent-14            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
 <!ENTITY dash-ent-16            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
+<!ENTITY dash-ent-20            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
+<!ENTITY dash-ent-22            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
+<!ENTITY dash-ent-24            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
 ]>
 
 <book id="media_api">
diff --git a/Documentation/DocBook/mtdnand.tmpl b/Documentation/DocBook/mtdnand.tmpl
index fe122d6e686f..a248f42a121e 100644
--- a/Documentation/DocBook/mtdnand.tmpl
+++ b/Documentation/DocBook/mtdnand.tmpl
@@ -1224,8 +1224,6 @@ in this page</entry>
 #define NAND_BBT_CREATE         0x00000200
 /* Search good / bad pattern through all pages of a block */
 #define NAND_BBT_SCANALLPAGES   0x00000400
-/* Scan block empty during good / bad block scan */
-#define NAND_BBT_SCANEMPTY      0x00000800
 /* Write bbt if neccecary */
 #define NAND_BBT_WRITE          0x00001000
 /* Read and write back block contents when writing bbt */
diff --git a/Documentation/IRQ-affinity.txt b/Documentation/IRQ-affinity.txt
index 7890fae18529..01a675175a36 100644
--- a/Documentation/IRQ-affinity.txt
+++ b/Documentation/IRQ-affinity.txt
@@ -57,8 +57,8 @@ i.e counters for the CPU0-3 did not change.
 
 Here is an example of limiting that same irq (44) to cpus 1024 to 1031:
 
-[root@moon 44]# echo 1024-1031 > smp_affinity
-[root@moon 44]# cat smp_affinity
+[root@moon 44]# echo 1024-1031 > smp_affinity_list
+[root@moon 44]# cat smp_affinity_list
 1024-1031
 
 Note that to do this with a bitmask would require 32 bitmasks of zero
diff --git a/Documentation/RCU/RTFP.txt b/Documentation/RCU/RTFP.txt
index 7f40c72a9c51..273e654d7d08 100644
--- a/Documentation/RCU/RTFP.txt
+++ b/Documentation/RCU/RTFP.txt
@@ -39,7 +39,7 @@ in read-mostly situations.  This algorithm does take pains to avoid
 write-side contention and parallelize the other write-side overheads by
 providing a fine-grained locking design, however, it would be interesting
 to see how much of the performance advantage reported in 1990 remains
-in 2004.
+today.
 
 At about this same time, Adams [Adams91] described ``chaotic relaxation'',
 where the normal barriers between successive iterations of convergent
@@ -86,9 +86,9 @@ DYNIX/ptx kernel.  The corresponding conference paper appeared in 1998
 [McKenney98].
 
 In 1999, the Tornado and K42 groups described their "generations"
-mechanism, which quite similar to RCU [Gamsa99].  These operating systems
-made pervasive use of RCU in place of "existence locks", which greatly
-simplifies locking hierarchies.
+mechanism, which is quite similar to RCU [Gamsa99].  These operating
+systems made pervasive use of RCU in place of "existence locks", which
+greatly simplifies locking hierarchies and helps avoid deadlocks.
 
 2001 saw the first RCU presentation involving Linux [McKenney01a]
 at OLS.  The resulting abundance of RCU patches was presented the
@@ -106,8 +106,11 @@ these techniques still impose significant read-side overhead in the
 form of memory barriers.  Researchers at Sun worked along similar lines
 in the same timeframe [HerlihyLM02].  These techniques can be thought
 of as inside-out reference counts, where the count is represented by the
-number of hazard pointers referencing a given data structure (rather than
-the more conventional counter field within the data structure itself).
+number of hazard pointers referencing a given data structure rather than
+the more conventional counter field within the data structure itself.
+The key advantage of inside-out reference counts is that they can be
+stored in immortal variables, thus allowing races between access and
+deletion to be avoided.
 
 By the same token, RCU can be thought of as a "bulk reference count",
 where some form of reference counter covers all reference by a given CPU
@@ -179,7 +182,25 @@ tree using software transactional memory to protect concurrent updates
 (strange, but true!) [PhilHoward2011RCUTMRBTree], yet another variant of
 RCU-protected resizeable hash tables [Triplett:2011:RPHash], the 3.0 RCU
 trainwreck [PaulEMcKenney2011RCU3.0trainwreck], and Neil Brown's "Meet the
-Lockers" LWN article [NeilBrown2011MeetTheLockers].
+Lockers" LWN article [NeilBrown2011MeetTheLockers].  Some academic
+work looked at debugging uses of RCU [Seyster:2011:RFA:2075416.2075425].
+
+In 2012, Josh Triplett received his Ph.D. with his dissertation
+covering RCU-protected resizable hash tables and the relationship
+between memory barriers and read-side traversal order:  If the updater
+is making changes in the opposite direction from the read-side traveral
+order, the updater need only execute a memory-barrier instruction,
+but if in the same direction, the updater needs to wait for a grace
+period between the individual updates [JoshTriplettPhD].  Also in 2012,
+after seventeen years of attempts, an RCU paper made it into a top-flight
+academic journal, IEEE Transactions on Parallel and Distributed Systems
+[MathieuDesnoyers2012URCU].  A group of researchers in Spain applied
+user-level RCU to crowd simulation [GuillermoVigueras2012RCUCrowd], and
+another group of researchers in Europe produced a formal description of
+RCU based on separation logic [AlexeyGotsman2012VerifyGraceExtended],
+which was published in the 2013 European Symposium on Programming
+[AlexeyGotsman2013ESOPRCU].
+
 
 
 Bibtex Entries
@@ -193,13 +214,12 @@ Bibtex Entries
 ,volume="5"
 ,number="3"
 ,pages="354-382"
-,note="Available:
-\url{http://portal.acm.org/citation.cfm?id=320619&dl=GUIDE,}
-[Viewed December 3, 2007]"
 ,annotation={
         Use garbage collector to clean up data after everyone is done with it.
         .
         Oldest use of something vaguely resembling RCU that I have found.
+        http://portal.acm.org/citation.cfm?id=320619&dl=GUIDE,
+        [Viewed December 3, 2007]
 }
 }
 
@@ -309,7 +329,7 @@ for Programming Languages and Operating Systems}"
 ,doi = {http://doi.acm.org/10.1145/42392.42399}
 ,publisher = {ACM}
 ,address = {New York, NY, USA}
-,annotation= {
+,annotation={
         At the top of page 307: "Conflicts with deposits and withdrawals
         are necessary if the reported total is to be up to date.  They
         could be avoided by having total return a sum that is slightly
@@ -346,8 +366,9 @@ for Programming Languages and Operating Systems}"
 }
 }
 
-@Book{Adams91
-,Author="Gregory R. Adams"
+# Was Adams91, see also syncrefs.bib.
+@Book{Andrews91textbook
+,Author="Gregory R. Andrews"
 ,title="Concurrent Programming, Principles, and Practices"
 ,Publisher="Benjamin Cummins"
 ,Year="1991"
@@ -398,39 +419,39 @@ for Programming Languages and Operating Systems}"
 }
 }
 
-@conference{Pu95a,
-Author = "Calton Pu and Tito Autrey and Andrew Black and Charles Consel and
+@conference{Pu95a
+,Author = "Calton Pu and Tito Autrey and Andrew Black and Charles Consel and
 Crispin Cowan and Jon Inouye and Lakshmi Kethana and Jonathan Walpole and
-Ke Zhang",
-Title = "Optimistic Incremental Specialization: Streamlining a Commercial
-Operating System",
-Booktitle = "15\textsuperscript{th} ACM Symposium on
-Operating Systems Principles (SOSP'95)",
-address = "Copper Mountain, CO",
-month="December",
-year="1995",
-pages="314-321",
-annotation="
+Ke Zhang"
+,Title = "Optimistic Incremental Specialization: Streamlining a Commercial
+,Operating System"
+,Booktitle = "15\textsuperscript{th} ACM Symposium on
+,Operating Systems Principles (SOSP'95)"
+,address = "Copper Mountain, CO"
+,month="December"
+,year="1995"
+,pages="314-321"
+,annotation={
         Uses a replugger, but with a flag to signal when people are
         using the resource at hand.  Only one reader at a time.
-"
-}
-
-@conference{Cowan96a,
-Author = "Crispin Cowan and Tito Autrey and Charles Krasic and
-Calton Pu and Jonathan Walpole",
-Title = "Fast Concurrent Dynamic Linking for an Adaptive Operating System",
-Booktitle = "International Conference on Configurable Distributed Systems
-(ICCDS'96)",
-address = "Annapolis, MD",
-month="May",
-year="1996",
-pages="108",
-isbn="0-8186-7395-8",
-annotation="
+}
+}
+
+@conference{Cowan96a
+,Author = "Crispin Cowan and Tito Autrey and Charles Krasic and
+,Calton Pu and Jonathan Walpole"
+,Title = "Fast Concurrent Dynamic Linking for an Adaptive Operating System"
+,Booktitle = "International Conference on Configurable Distributed Systems
+(ICCDS'96)"
+,address = "Annapolis, MD"
+,month="May"
+,year="1996"
+,pages="108"
+,isbn="0-8186-7395-8"
+,annotation={
         Uses a replugger, but with a counter to signal when people are
         using the resource at hand.  Allows multiple readers.
-"
+}
 }
 
 @techreport{Slingwine95
@@ -493,14 +514,13 @@ Problems"
 ,Year="1998"
 ,pages="509-518"
 ,Address="Las Vegas, NV"
-,note="Available:
-\url{http://www.rdrop.com/users/paulmck/RCU/rclockpdcsproof.pdf}
-[Viewed December 3, 2007]"
 ,annotation={
         Describes and analyzes RCU mechanism in DYNIX/ptx.  Describes
         application to linked list update and log-buffer flushing.
         Defines 'quiescent state'.  Includes both measured and analytic
         evaluation.
+        http://www.rdrop.com/users/paulmck/RCU/rclockpdcsproof.pdf
+        [Viewed December 3, 2007]
 }
 }
 
@@ -514,13 +534,12 @@ Operating System Design and Implementation}"
 ,Year="1999"
 ,pages="87-100"
 ,Address="New Orleans, LA"
-,note="Available:
-\url{http://www.usenix.org/events/osdi99/full_papers/gamsa/gamsa.pdf}
-[Viewed August 30, 2006]"
 ,annotation={
         Use of RCU-like facility in K42/Tornado.  Another independent
         invention of RCU.
         See especially pages 7-9 (Section 5).
+        http://www.usenix.org/events/osdi99/full_papers/gamsa/gamsa.pdf
+        [Viewed August 30, 2006]
 }
 }
 
@@ -611,9 +630,9 @@ Orran Krieger and Rusty Russell and Dipankar Sarma and Maneesh Soni"
 ,note="Available:
 \url{http://marc.theaimsgroup.com/?l=linux-kernel&m=100259266316456&w=2}
 [Viewed June 23, 2004]"
-,annotation="
+,annotation={
         Memory-barrier and Alpha thread.  100 messages, not too bad...
-"
+}
 }
 
 @unpublished{Spraul01
@@ -624,10 +643,10 @@ Orran Krieger and Rusty Russell and Dipankar Sarma and Maneesh Soni"
 ,note="Available:
 \url{http://marc.theaimsgroup.com/?l=linux-kernel&m=100264675012867&w=2}
 [Viewed June 23, 2004]"
-,annotation="
+,annotation={
         Suggested burying memory barriers in Linux's list-manipulation
         primitives.
-"
+}
 }
 
 @unpublished{LinusTorvalds2001a
@@ -638,6 +657,8 @@ Orran Krieger and Rusty Russell and Dipankar Sarma and Maneesh Soni"
 ,note="Available:
 \url{http://lkml.org/lkml/2001/10/13/105}
 [Viewed August 21, 2004]"
+,annotation={
+}
 }
 
 @unpublished{Blanchard02a
@@ -657,10 +678,10 @@ Orran Krieger and Rusty Russell and Dipankar Sarma and Maneesh Soni"
 ,Month="June"
 ,Year="2002"
 ,pages="289-300"
-,annotation="
+,annotation={
         Measured scalability of Linux 2.4 kernel's directory-entry cache
         (dcache), and measured some scalability enhancements.
-"
+}
 }
 
 @Conference{McKenney02a
@@ -674,10 +695,10 @@ Andrea Arcangeli and Andi Kleen and Orran Krieger and Rusty Russell"
 ,note="Available:
 \url{http://www.linux.org.uk/~ajh/ols2002_proceedings.pdf.gz}
 [Viewed June 23, 2004]"
-,annotation="
+,annotation={
         Presented and compared a number of RCU implementations for the
         Linux kernel.
-"
+}
 }
 
 @unpublished{Sarma02a
@@ -688,9 +709,9 @@ Andrea Arcangeli and Andi Kleen and Orran Krieger and Rusty Russell"
 ,note="Available:
 \url{http://marc.theaimsgroup.com/?l=linux-kernel&m=102645767914212&w=2}
 [Viewed June 23, 2004]"
-,annotation="
+,annotation={
         Compare fastwalk and RCU for dcache.  RCU won.
-"
+}
 }
 
 @unpublished{Barbieri02
@@ -701,9 +722,9 @@ Andrea Arcangeli and Andi Kleen and Orran Krieger and Rusty Russell"
 ,note="Available:
 \url{http://marc.theaimsgroup.com/?l=linux-kernel&m=103082050621241&w=2}
 [Viewed: June 23, 2004]"
-,annotation="
+,annotation={
         Suggested RCU for vfs\_shared\_cred.
-"
+}
 }
 
 @unpublished{Dickins02a
@@ -722,10 +743,10 @@ Andrea Arcangeli and Andi Kleen and Orran Krieger and Rusty Russell"
 ,note="Available:
 \url{http://marc.theaimsgroup.com/?l=linux-kernel&m=103462075416638&w=2}
 [Viewed June 23, 2004]"
-,annotation="
+,annotation={
         Performance of dcache RCU on kernbench for 16x NUMA-Q and 1x,
         2x, and 4x systems.  RCU does no harm, and helps on 16x.
-"
+}
 }
 
 @unpublished{LinusTorvalds2003a
@@ -736,14 +757,14 @@ Andrea Arcangeli and Andi Kleen and Orran Krieger and Rusty Russell"
 ,note="Available:
 \url{http://lkml.org/lkml/2003/3/9/205}
 [Viewed March 13, 2006]"
-,annotation="
+,annotation={
         Linus suggests replacing brlock with RCU and/or seqlocks:
         .
         'It's entirely possible that the current user could be replaced
         by RCU and/or seqlocks, and we could get rid of brlocks entirely.'
         .
         Steve Hemminger responds by replacing them with RCU.
-"
+}
 }
 
 @article{Appavoo03a
@@ -758,9 +779,9 @@ B. Rosenburg and M. Stumm and J. Xenidis"
 ,volume="42"
 ,number="1"
 ,pages="60-76"
-,annotation="
+,annotation={
         Use of RCU to enable hot-swapping for autonomic behavior in K42.
-"
+}
 }
 
 @unpublished{Seigh03
@@ -769,9 +790,9 @@ B. Rosenburg and M. Stumm and J. Xenidis"
 ,Year="2003"
 ,Month="March"
 ,note="email correspondence"
-,annotation="
+,annotation={
         Described the relationship of the VM/XA passive serialization to RCU.
-"
+}
 }
 
 @Conference{Arcangeli03
@@ -785,14 +806,12 @@ Dipankar Sarma"
 ,year="2003"
 ,month="June"
 ,pages="297-310"
-,note="Available:
-\url{http://www.rdrop.com/users/paulmck/RCU/rcu.FREENIX.2003.06.14.pdf}
-[Viewed November 21, 2007]"
-,annotation="
+,annotation={
         Compared updated RCU implementations for the Linux kernel, and
         described System V IPC use of RCU, including order-of-magnitude
         performance improvements.
-"
+        http://www.rdrop.com/users/paulmck/RCU/rcu.FREENIX.2003.06.14.pdf
+}
 }
 
 @Conference{Soules03a
@@ -820,10 +839,10 @@ Michal Ostrowski and Bryan Rosenburg and Jimi Xenidis"
 ,note="Available:
 \url{http://www.linuxjournal.com/article/6993}
 [Viewed November 14, 2007]"
-,annotation="
+,annotation={
         Reader-friendly intro to RCU, with the infamous old-man-and-brat
         cartoon.
-"
+}
 }
 
 @unpublished{Sarma03a
@@ -832,7 +851,9 @@ Michal Ostrowski and Bryan Rosenburg and Jimi Xenidis"
 ,month="December"
 ,year="2003"
 ,note="Message ID: 20031222180114.GA2248@in.ibm.com"
-,annotation="dipankar/ct.2004.03.27/RCUll.2003.12.22.patch"
+,annotation={
+        dipankar/ct.2004.03.27/RCUll.2003.12.22.patch
+}
 }
 
 @techreport{Friedberg03a
@@ -844,11 +865,11 @@ Michal Ostrowski and Bryan Rosenburg and Jimi Xenidis"
 ,number="US Patent 6,662,184"
 ,month="December"
 ,pages="112"
-,annotation="
+,annotation={
         Applies RCU to a wildcard-search Patricia tree in order to permit
         synchronization-free lookup.  RCU is used to retain removed nodes
         for a grace period before freeing them.
-"
+}
 }
 
 @article{McKenney04a
@@ -860,12 +881,11 @@ Michal Ostrowski and Bryan Rosenburg and Jimi Xenidis"
 ,volume="1"
 ,number="118"
 ,pages="38-46"
-,note="Available:
-\url{http://www.linuxjournal.com/node/7124}
-[Viewed December 26, 2010]"
-,annotation="
+,annotation={
         Reader friendly intro to dcache and RCU.
-"
+        http://www.linuxjournal.com/node/7124
+        [Viewed December 26, 2010]
+}
 }
 
 @Conference{McKenney04b
@@ -879,10 +899,10 @@ Michal Ostrowski and Bryan Rosenburg and Jimi Xenidis"
 \url{http://www.linux.org.au/conf/2004/abstracts.html#90}
 \url{http://www.rdrop.com/users/paulmck/RCU/lockperf.2004.01.17a.pdf}
 [Viewed June 23, 2004]"
-,annotation="
+,annotation={
         Compares performance of RCU to that of other locking primitives
         over a number of CPUs (x86, Opteron, Itanium, and PPC).
-"
+}
 }
 
 @unpublished{Sarma04a
@@ -891,7 +911,9 @@ Michal Ostrowski and Bryan Rosenburg and Jimi Xenidis"
 ,month="March"
 ,year="2004"
 ,note="\url{http://marc.theaimsgroup.com/?l=linux-kernel&m=108003746402892&w=2}"
-,annotation="Head of thread: dipankar/2004.03.23/rcu-low-lat.1.patch"
+,annotation={
+        Head of thread: dipankar/2004.03.23/rcu-low-lat.1.patch
+}
 }
 
 @unpublished{Sarma04b
@@ -900,7 +922,9 @@ Michal Ostrowski and Bryan Rosenburg and Jimi Xenidis"
 ,month="March"
 ,year="2004"
 ,note="\url{http://marc.theaimsgroup.com/?l=linux-kernel&m=108016474829546&w=2}"
-,annotation="dipankar/rcuth.2004.03.24/rcu-throttle.patch"
+,annotation={
+        dipankar/rcuth.2004.03.24/rcu-throttle.patch
+}
 }
 
 @unpublished{Spraul04a
@@ -911,9 +935,9 @@ Michal Ostrowski and Bryan Rosenburg and Jimi Xenidis"
 ,note="Available:
 \url{http://marc.theaimsgroup.com/?l=linux-kernel&m=108546407726602&w=2}
 [Viewed June 23, 2004]"
-,annotation="
+,annotation={
         Hierarchical-bitmap patch for RCU infrastructure.
-"
+}
 }
 
 @unpublished{Steiner04a
@@ -950,10 +974,12 @@ Realtime Applications"
 ,year="2004"
 ,month="June"
 ,pages="182-191"
-,annotation="
+,annotation={
         Describes and compares a number of modifications to the Linux RCU
         implementation that make it friendly to realtime applications.
-"
+        https://www.usenix.org/conference/2004-usenix-annual-technical-conference/making-rcu-safe-deep-sub-millisecond-response
+        [Viewed July 26, 2012]
+}
 }
 
 @phdthesis{PaulEdwardMcKenneyPhD
@@ -964,14 +990,13 @@ in Operating System Kernels"
 ,school="OGI School of Science and Engineering at
 Oregon Health and Sciences University"
 ,year="2004"
-,note="Available:
-\url{http://www.rdrop.com/users/paulmck/RCU/RCUdissertation.2004.07.14e1.pdf}
-[Viewed October 15, 2004]"
-,annotation="
+,annotation={
         Describes RCU implementations and presents design patterns
         corresponding to common uses of RCU in several operating-system
         kernels.
-"
+        http://www.rdrop.com/users/paulmck/RCU/RCUdissertation.2004.07.14e1.pdf
+        [Viewed October 15, 2004]
+}
 }
 
 @unpublished{PaulEMcKenney2004rcu:dereference
@@ -982,9 +1007,9 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://lkml.org/lkml/2004/8/6/237}
 [Viewed June 8, 2010]"
-,annotation="
+,annotation={
         Introduce rcu_dereference().
-"
+}
 }
 
 @unpublished{JimHouston04a
@@ -995,11 +1020,11 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://lkml.org/lkml/2004/8/30/87}
 [Viewed February 17, 2005]"
-,annotation="
+,annotation={
         Uses active code in rcu_read_lock() and rcu_read_unlock() to
         make RCU happen, allowing RCU to function on CPUs that do not
         receive a scheduling-clock interrupt.
-"
+}
 }
 
 @unpublished{TomHart04a
@@ -1010,9 +1035,9 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://www.cs.toronto.edu/~tomhart/masters_thesis.html}
 [Viewed October 15, 2004]"
-,annotation="
+,annotation={
         Proposes comparing RCU to lock-free methods for the Linux kernel.
-"
+}
 }
 
 @unpublished{Vaddagiri04a
@@ -1023,9 +1048,9 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://marc.theaimsgroup.com/?t=109395731700004&r=1&w=2}
 [Viewed October 18, 2004]"
-,annotation="
+,annotation={
         Srivatsa's RCU patch for tcp_ehash lookup.
-"
+}
 }
 
 @unpublished{Thirumalai04a
@@ -1036,9 +1061,9 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://marc.theaimsgroup.com/?t=109144217400003&r=1&w=2}
 [Viewed October 18, 2004]"
-,annotation="
+,annotation={
         Ravikiran's lockfree FD patch.
-"
+}
 }
 
 @unpublished{Thirumalai04b
@@ -1049,9 +1074,9 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://marc.theaimsgroup.com/?l=linux-kernel&m=109152521410459&w=2}
 [Viewed October 18, 2004]"
-,annotation="
+,annotation={
         Ravikiran's lockfree FD patch.
-"
+}
 }
 
 @unpublished{PaulEMcKenney2004rcu:assign:pointer
@@ -1062,9 +1087,9 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://lkml.org/lkml/2004/10/23/241}
 [Viewed June 8, 2010]"
-,annotation="
+,annotation={
         Introduce rcu_assign_pointer().
-"
+}
 }
 
 @unpublished{JamesMorris04a
@@ -1073,12 +1098,12 @@ Oregon Health and Sciences University"
 ,day="15"
 ,month="November"
 ,year="2004"
-,note="Available:
-\url{http://marc.theaimsgroup.com/?l=linux-kernel&m=110054979416004&w=2}
-[Viewed December 10, 2004]"
-,annotation="
+,note="\url{http://marc.theaimsgroup.com/?l=linux-kernel&m=110054979416004&w=2}"
+,annotation={
         James Morris posts Kaigai Kohei's patch to LKML.
-"
+        [Viewed December 10, 2004]
+        Kaigai's patch is at https://lkml.org/lkml/2004/9/27/52
+}
 }
 
 @unpublished{JamesMorris04b
@@ -1089,9 +1114,9 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://www.livejournal.com/users/james_morris/2153.html}
 [Viewed December 10, 2004]"
-,annotation="
+,annotation={
         RCU helps SELinux performance.  ;-)  Made LWN.
-"
+}
 }
 
 @unpublished{PaulMcKenney2005RCUSemantics
@@ -1103,9 +1128,9 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://www.rdrop.com/users/paulmck/RCU/rcu-semantics.2005.01.30a.pdf}
 [Viewed December 6, 2009]"
-,annotation="
+,annotation={
         Early derivation of RCU semantics.
-"
+}
 }
 
 @unpublished{PaulMcKenney2005e
@@ -1117,10 +1142,10 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://lkml.org/lkml/2005/3/17/199}
 [Viewed September 5, 2005]"
-,annotation="
+,annotation={
         First posting showing how RCU can be safely adapted for
         preemptable RCU read side critical sections.
-"
+}
 }
 
 @unpublished{EsbenNeilsen2005a
@@ -1132,12 +1157,12 @@ Oregon Health and Sciences University"
 ,note="Available:
 \url{http://lkml.org/lkml/2005/3/18/122}
 [Viewed March 30, 2006]"
-,annotation="
+,annotation={
         Esben Neilsen suggests read-side suppression of grace-period
         processing for crude-but-workable realtime RCU.  The downside
-        is indefinite grace periods...But this is OK for experimentation
+        is indefinite grace periods...  But this is OK for experimentation
         and testing.
-"
+}
 }
 
 @unpublished{TomHart05a
@@ -1149,10 +1174,10 @@ Data Structures"
 ,note="Available:
 \url{ftp://ftp.cs.toronto.edu/csrg-technical-reports/515/}
 [Viewed March 4, 2005]"
-,annotation="
+,annotation={
         Comparison of RCU, QBSR, and EBSR.  RCU wins for read-mostly
         workloads.  ;-)
-"
+}
 }
 
 @unpublished{JonCorbet2005DeprecateSyncKernel
@@ -1164,10 +1189,10 @@ Data Structures"
 ,note="Available:
 \url{http://lwn.net/Articles/134484/}
 [Viewed May 3, 2005]"
-,annotation="
+,annotation={
         Jon Corbet describes deprecation of synchronize_kernel()
         in favor of synchronize_rcu() and synchronize_sched().
-"
+}
 }
 
 @unpublished{PaulMcKenney05a
@@ -1178,10 +1203,10 @@ Data Structures"
 ,note="Available:
 \url{http://lkml.org/lkml/2005/5/9/185}
 [Viewed May 13, 2005]"
-,annotation="
+,annotation={
         First publication of working lock-based deferred free patches
         for the CONFIG_PREEMPT_RT environment.
-"
+}
 }
 
 @conference{PaulMcKenney05b
@@ -1194,10 +1219,10 @@ Data Structures"
 ,note="Available:
 \url{http://www.rdrop.com/users/paulmck/RCU/realtimeRCU.2005.04.23a.pdf}
 [Viewed May 13, 2005]"
-,annotation="
+,annotation={
         Realtime turns into making RCU yet more realtime friendly.
         http://lca2005.linux.org.au/Papers/Paul%20McKenney/Towards%20Hard%20Realtime%20Response%20from%20the%20Linux%20Kernel/LKS.2005.04.22a.pdf
-"
+}
 }
 
 @unpublished{PaulEMcKenneyHomePage
@@ -1208,9 +1233,9 @@ Data Structures"
 ,note="Available:
 \url{http://www.rdrop.com/users/paulmck/}
 [Viewed May 25, 2005]"
-,annotation="
+,annotation={
         Paul McKenney's home page.
-"
+}
 }
 
 @unpublished{PaulEMcKenneyRCUPage
@@ -1221,9 +1246,9 @@ Data Structures"
 ,note="Available:
 \url{http://www.rdrop.com/users/paulmck/RCU}
 [Viewed May 25, 2005]"
-,annotation="
+,annotation={
         Paul McKenney's RCU page.
-"
+}
 }
 
 @unpublished{JosephSeigh2005a
@@ -1232,10 +1257,10 @@ Data Structures"
 ,month="July"
 ,year="2005"
 ,note="Personal communication"
-,annotation="
+,annotation={
         Joe Seigh announcing his atomic-ptr-plus project.
         http://sourceforge.net/projects/atomic-ptr-plus/
-"
+}
 }
 
 @unpublished{JosephSeigh2005b
@@ -1247,9 +1272,9 @@ Data Structures"
 ,note="Available:
 \url{http://sourceforge.net/projects/atomic-ptr-plus/}
 [Viewed August 8, 2005]"
-,annotation="
+,annotation={
         Joe Seigh's atomic-ptr-plus project.
-"
+}
 }
 
 @unpublished{PaulMcKenney2005c
@@ -1261,9 +1286,9 @@ Data Structures"
 ,note="Available:
 \url{http://lkml.org/lkml/2005/8/1/155}
 [Viewed March 14, 2006]"
-,annotation="
+,annotation={
         First operating counter-based realtime RCU patch posted to LKML.
-"
+}
 }
 
 @unpublished{PaulMcKenney2005d
@@ -1275,11 +1300,11 @@ Data Structures"
 ,note="Available:
 \url{http://lkml.org/lkml/2005/8/8/108}
 [Viewed March 14, 2006]"
-,annotation="
+,annotation={
         First operating counter-based realtime RCU patch posted to LKML,
         but fixed so that various unusual combinations of configuration
         parameters all function properly.
-"
+}
 }
 
 @unpublished{PaulMcKenney2005rcutorture
@@ -1291,9 +1316,25 @@ Data Structures"
 ,note="Available:
 \url{http://lkml.org/lkml/2005/10/1/70}
 [Viewed March 14, 2006]"
-,annotation="
+,annotation={
         First rcutorture patch.
-"
+}
+}
+
+@unpublished{DavidSMiller2006HashedLocking
+,Author="David S. Miller"
+,Title="Re: [{PATCH}, {RFC}] {RCU} : {OOM} avoidance and lower latency"
+,month="January"
+,day="6"
+,year="2006"
+,note="Available:
+\url{https://lkml.org/lkml/2006/1/7/22}
+[Viewed February 29, 2012]"
+,annotation={
+        David Miller's view on hashed arrays of locks: used to really
+        like it, but time he saw an opportunity for this technique,
+        something else always proved superior.  Partitioning or RCU.  ;-)
+}
 }
 
 @conference{ThomasEHart2006a
@@ -1309,10 +1350,10 @@ Distributed Processing Symposium"
 ,note="Available:
 \url{http://www.rdrop.com/users/paulmck/RCU/hart_ipdps06.pdf}
 [Viewed April 28, 2008]"
-,annotation="
+,annotation={
         Compares QSBR, HPBR, EBR, and lock-free reference counting.
         http://www.cs.toronto.edu/~tomhart/perflab/ipdps06.tgz
-"
+}
 }
 
 @unpublished{NickPiggin2006radixtree
@@ -1324,9 +1365,9 @@ Distributed Processing Symposium"
 ,note="Available:
 \url{http://lkml.org/lkml/2006/6/20/238}
 [Viewed March 25, 2008]"
-,annotation="
+,annotation={
         RCU-protected radix tree.
-"
+}
 }
 
 @Conference{PaulEMcKenney2006b
@@ -1341,9 +1382,9 @@ Suparna Bhattacharya"
 \url{http://www.linuxsymposium.org/2006/view_abstract.php?content_key=184}
 \url{http://www.rdrop.com/users/paulmck/RCU/OLSrtRCU.2006.08.11a.pdf}
 [Viewed January 1, 2007]"
-,annotation="
+,annotation={
         Described how to improve the -rt implementation of realtime RCU.
-"
+}
 }
 
 @unpublished{WikipediaRCU
@@ -1354,12 +1395,11 @@ Canis Rufus and Zoicon5 and Anome and Hal Eisen"
 ,month="July"
 ,day="8"
 ,year="2006"
-,note="Available:
-\url{http://en.wikipedia.org/wiki/Read-copy-update}
-[Viewed August 21, 2006]"
-,annotation="
+,note="\url{http://en.wikipedia.org/wiki/Read-copy-update}"
+,annotation={
         Wikipedia RCU page as of July 8 2006.
-"
+        [Viewed August 21, 2006]
+}
 }
 
 @Conference{NickPiggin2006LocklessPageCache
@@ -1372,9 +1412,9 @@ Canis Rufus and Zoicon5 and Anome and Hal Eisen"
 ,note="Available:
 \url{http://www.linuxsymposium.org/2006/view_abstract.php?content_key=184}
 [Viewed January 11, 2009]"
-,annotation="
+,annotation={
         Uses RCU-protected radix tree for a lockless page cache.
-"
+}
 }
 
 @unpublished{PaulEMcKenney2006c
@@ -1388,9 +1428,9 @@ Canis Rufus and Zoicon5 and Anome and Hal Eisen"
 Revised:
 \url{http://www.rdrop.com/users/paulmck/RCU/srcu.2007.01.14a.pdf}
 [Viewed August 21, 2006]"
-,annotation="
+,annotation={
         LWN article introducing SRCU.
-"
+}
 }
 
 @unpublished{RobertOlsson2006a
@@ -1399,12 +1439,11 @@ Revised:
 ,month="August"
 ,day="18"
 ,year="2006"
-,note="Available:
-\url{http://www.nada.kth.se/~snilsson/publications/TRASH/trash.pdf}
-[Viewed March 4, 2011]"
-,annotation="
+,note="\url{http://www.nada.kth.se/~snilsson/publications/TRASH/trash.pdf}"
+,annotation={
         RCU-protected dynamic trie-hash combination.
-"
+        [Viewed March 4, 2011]
+}
 }
 
 @unpublished{ChristophHellwig2006RCU2SRCU
@@ -1426,10 +1465,10 @@ Revised:
 ,note="Available:
 \url{http://www.rdrop.com/users/paulmck/RCU/linuxusage.html}
 [Viewed January 14, 2007]"
-,annotation="
+,annotation={
         Paul McKenney's RCU page showing graphs plotting Linux-kernel
         usage of RCU.
-"
+}
 }
 
 @unpublished{PaulEMcKenneyRCUusageRawDataPage
@@ -1440,10 +1479,10 @@ Revised:
 ,note="Available:
 \url{http://www.rdrop.com/users/paulmck/RCU/linuxusage/rculocktab.html}
 [Viewed January 14, 2007]"
-,annotation="
+,annotation={
         Paul McKenney's RCU page showing Linux usage of RCU in tabular
         form, with links to corresponding cscope databases.
-"
+}
 }
 
 @unpublished{GauthamShenoy2006RCUrwlock
@@ -1455,13 +1494,13 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2006/10/26/73}
 [Viewed January 26, 2009]"
-,annotation="
+,annotation={
         RCU-based reader-writer lock that allows readers to proceed with
         no memory barriers or atomic instruction in absence of writers.
         If writer do show up, readers must of course wait as required by
         the semantics of reader-writer locking.  This is a recursive
         lock.
-"
+}
 }
 
 @unpublished{JensAxboe2006SlowSRCU
@@ -1474,11 +1513,11 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2006/11/17/56}
 [Viewed May 28, 2007]"
-,annotation="
+,annotation={
         SRCU's grace periods are too slow for Jens, even after a
         factor-of-three speedup.
         Sped-up version of SRCU at http://lkml.org/lkml/2006/11/17/359.
-"
+}
 }
 
 @unpublished{OlegNesterov2006QRCU
@@ -1491,10 +1530,10 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2006/11/19/69}
 [Viewed May 28, 2007]"
-,annotation="
+,annotation={
         First cut of QRCU.  Expanded/corrected versions followed.
         Used to be OlegNesterov2007QRCU, now time-corrected.
-"
+}
 }
 
 @unpublished{OlegNesterov2006aQRCU
@@ -1506,10 +1545,10 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2006/11/29/330}
 [Viewed November 26, 2008]"
-,annotation="
+,annotation={
         Expanded/corrected version of QRCU.
         Used to be OlegNesterov2007aQRCU, now time-corrected.
-"
+}
 }
 
 @unpublished{EvgeniyPolyakov2006RCUslowdown
@@ -1521,10 +1560,10 @@ Revised:
 ,note="Available:
 \url{http://www.ioremap.net/node/41}
 [Viewed October 28, 2008]"
-,annotation="
+,annotation={
         Using RCU as a pure delay leads to a 2.5x slowdown in skbs in
         the Linux kernel.
-"
+}
 }
 
 @inproceedings{ChrisMatthews2006ClusteredObjectsRCU
@@ -1541,7 +1580,8 @@ Revised:
 ,annotation={
         Uses K42's RCU-like functionality to manage clustered-object
         lifetimes.
-}}
+}
+}
 
 @article{DilmaDaSilva2006K42
 ,author = {Silva, Dilma Da and Krieger, Orran and Wisniewski, Robert W. and Waterland, Amos and Tam, David and Baumann, Andrew}
@@ -1557,7 +1597,8 @@ Revised:
 ,address = {New York, NY, USA}
 ,annotation={
         Describes relationship of K42 generations to RCU.
-}}
+}
+}
 
 # CoreyMinyard2007list_splice_rcu
 @unpublished{CoreyMinyard2007list:splice:rcu
@@ -1569,9 +1610,9 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2007/1/3/112}
 [Viewed May 28, 2007]"
-,annotation="
+,annotation={
         Patch for list_splice_rcu().
-"
+}
 }
 
 @unpublished{PaulEMcKenney2007rcubarrier
@@ -1583,9 +1624,9 @@ Revised:
 ,note="Available:
 \url{http://lwn.net/Articles/217484/}
 [Viewed November 22, 2007]"
-,annotation="
+,annotation={
         LWN article introducing the rcu_barrier() primitive.
-"
+}
 }
 
 @unpublished{PeterZijlstra2007SyncBarrier
@@ -1597,10 +1638,10 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2007/1/28/34}
 [Viewed March 27, 2008]"
-,annotation="
+,annotation={
         RCU-like implementation for frequent updaters and rare readers(!).
         Subsumed into QRCU.  Maybe...
-"
+}
 }
 
 @unpublished{PaulEMcKenney2007BoostRCU
@@ -1609,14 +1650,13 @@ Revised:
 ,month="February"
 ,day="5"
 ,year="2007"
-,note="Available:
-\url{http://lwn.net/Articles/220677/}
-Revised:
-\url{http://www.rdrop.com/users/paulmck/RCU/RCUbooststate.2007.04.16a.pdf}
-[Viewed September 7, 2007]"
-,annotation="
+,note="\url{http://lwn.net/Articles/220677/}"
+,annotation={
         LWN article introducing RCU priority boosting.
-"
+        Revised:
+        http://www.rdrop.com/users/paulmck/RCU/RCUbooststate.2007.04.16a.pdf
+        [Viewed September 7, 2007]
+}
 }
 
 @unpublished{PaulMcKenney2007QRCUpatch
@@ -1628,9 +1668,9 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2007/2/25/18}
 [Viewed March 27, 2008]"
-,annotation="
+,annotation={
         Patch for QRCU supplying lock-free fast path.
-"
+}
 }
 
 @article{JonathanAppavoo2007K42RCU
@@ -1647,7 +1687,8 @@ Revised:
 ,address = {New York, NY, USA}
 ,annotation={
         Role of RCU in K42.
-}}
+}
+}
 
 @conference{RobertOlsson2007Trash
 ,Author="Robert Olsson and Stefan Nilsson"
@@ -1658,9 +1699,9 @@ Revised:
 ,note="Available:
 \url{http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4281239}
 [Viewed October 1, 2010]"
-,annotation="
+,annotation={
         RCU-protected dynamic trie-hash combination.
-"
+}
 }
 
 @conference{PeterZijlstra2007ConcurrentPagecacheRCU
@@ -1673,10 +1714,10 @@ Revised:
 ,note="Available:
 \url{http://ols.108.redhat.com/2007/Reprints/zijlstra-Reprint.pdf}
 [Viewed April 14, 2008]"
-,annotation="
+,annotation={
         Page-cache modifications permitting RCU readers and concurrent
         updates.
-"
+}
 }
 
 @unpublished{PaulEMcKenney2007whatisRCU
@@ -1701,11 +1742,11 @@ Revised:
 ,note="Available:
 \url{http://lwn.net/Articles/243851/}
 [Viewed September 8, 2007]"
-,annotation="
+,annotation={
         LWN article describing Promela and spin, and also using Oleg
         Nesterov's QRCU as an example (with Paul McKenney's fastpath).
         Merged patch at: http://lkml.org/lkml/2007/2/25/18
-"
+}
 }
 
 @unpublished{PaulEMcKenney2007WG21DDOatomics
@@ -1714,12 +1755,12 @@ Revised:
 ,month="August"
 ,day="3"
 ,year="2007"
-,note="Preprint:
+,note="Available:
 \url{http://open-std.org/jtc1/sc22/wg21/docs/papers/2008/n2664.htm}
 [Viewed December 7, 2009]"
-,annotation="
+,annotation={
         RCU for C++, parts 1 and 2.
-"
+}
 }
 
 @unpublished{PaulEMcKenney2007WG21DDOannotation
@@ -1728,12 +1769,12 @@ Revised:
 ,month="September"
 ,day="18"
 ,year="2008"
-,note="Preprint:
+,note="Available:
 \url{http://open-std.org/jtc1/sc22/wg21/docs/papers/2008/n2782.htm}
 [Viewed December 7, 2009]"
-,annotation="
+,annotation={
         RCU for C++, part 2, updated many times.
-"
+}
 }
 
 @unpublished{PaulEMcKenney2007PreemptibleRCUPatch
@@ -1745,10 +1786,10 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2007/9/10/213}
 [Viewed October 25, 2007]"
-,annotation="
+,annotation={
         Final patch for preemptable RCU to -rt.  (Later patches were
         to mainline, eventually incorporated.)
-"
+}
 }
 
 @unpublished{PaulEMcKenney2007PreemptibleRCU
@@ -1760,9 +1801,9 @@ Revised:
 ,note="Available:
 \url{http://lwn.net/Articles/253651/}
 [Viewed October 25, 2007]"
-,annotation="
+,annotation={
         LWN article describing the design of preemptible RCU.
-"
+}
 }
 
 @article{ThomasEHart2007a
@@ -1783,6 +1824,7 @@ Revised:
 }
 }
 
+# MathieuDesnoyers2007call_rcu_schedNeeded
 @unpublished{MathieuDesnoyers2007call:rcu:schedNeeded
 ,Author="Mathieu Desnoyers"
 ,Title="Re: [patch 1/2] {Linux} Kernel Markers - Support Multiple Probes"
@@ -1792,9 +1834,9 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2007/12/20/244}
 [Viewed March 27, 2008]"
-,annotation="
+,annotation={
         Request for call_rcu_sched() and rcu_barrier_sched().
-"
+}
 }
 
 
@@ -1815,11 +1857,11 @@ Revised:
 ,note="Available:
 \url{http://lwn.net/Articles/262464/}
 [Viewed December 27, 2007]"
-,annotation="
+,annotation={
         Lays out the three basic components of RCU: (1) publish-subscribe,
         (2) wait for pre-existing readers to complete, and (2) maintain
         multiple versions.
-"
+}
 }
 
 @unpublished{PaulEMcKenney2008WhatIsRCUUsage
@@ -1831,7 +1873,7 @@ Revised:
 ,note="Available:
 \url{http://lwn.net/Articles/263130/}
 [Viewed January 4, 2008]"
-,annotation="
+,annotation={
         Lays out six uses of RCU:
         1. RCU is a Reader-Writer Lock Replacement
         2. RCU is a Restricted Reference-Counting Mechanism
@@ -1839,7 +1881,7 @@ Revised:
         4. RCU is a Poor Man's Garbage Collector
         5. RCU is a Way of Providing Existence Guarantees
         6. RCU is a Way of Waiting for Things to Finish
-"
+}
 }
 
 @unpublished{PaulEMcKenney2008WhatIsRCUAPI
@@ -1851,10 +1893,10 @@ Revised:
 ,note="Available:
 \url{http://lwn.net/Articles/264090/}
 [Viewed January 10, 2008]"
-,annotation="
+,annotation={
         Gives an overview of the Linux-kernel RCU API and a brief annotated RCU
         bibliography.
-"
+}
 }
 
 #
@@ -1872,10 +1914,10 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2008/1/29/208}
 [Viewed March 27, 2008]"
-,annotation="
+,annotation={
         Patch that prevents preemptible RCU from unnecessarily waking
         up dynticks-idle CPUs.
-"
+}
 }
 
 @unpublished{PaulEMcKenney2008LKMLDependencyOrdering
@@ -1887,9 +1929,9 @@ Revised:
 ,note="Available:
 \url{http://lkml.org/lkml/2008/2/2/255}
 [Viewed October 18, 2008]"
-,annotation="
+,annotation={
         Explanation of compilers violating dependency ordering.
-"
+}
 }
 
 @Conference{PaulEMcKenney2008Beijing
@@ -1916,24 +1958,26 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://lwn.net/Articles/279077/}
 [Viewed April 24, 2008]"
-,annotation="
+,annotation={
         Describes use of Promela and Spin to validate (and fix!) the
         dynticks/RCU interface.
-"
+}
 }
 
 @article{DinakarGuniguntala2008IBMSysJ
 ,author="D. Guniguntala and P. E. McKenney and J. Triplett and J. Walpole"
 ,title="The read-copy-update mechanism for supporting real-time applications on shared-memory multiprocessor systems with {Linux}"
 ,Year="2008"
-,Month="April-June"
+,Month="May"
 ,journal="IBM Systems Journal"
 ,volume="47"
 ,number="2"
 ,pages="221-236"
-,annotation="
+,annotation={
         RCU, realtime RCU, sleepable RCU, performance.
-"
+        http://www.research.ibm.com/journal/sj/472/guniguntala.pdf
+        [Viewed April 24, 2008]
+}
 }
 
 @unpublished{LaiJiangshan2008NewClassicAlgorithm
@@ -1945,11 +1989,11 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://lkml.org/lkml/2008/6/2/539}
 [Viewed December 10, 2008]"
-,annotation="
+,annotation={
         Updated RCU classic algorithm.  Introduced multi-tailed list
         for RCU callbacks and also pulling common code into
         __call_rcu().
-"
+}
 }
 
 @article{PaulEMcKenney2008RCUOSR
@@ -1966,6 +2010,7 @@ lot of {Linux} into your technology!!!"
 ,address="New York, NY, USA"
 ,annotation={
         Linux changed RCU to a far greater degree than RCU has changed Linux.
+        http://portal.acm.org/citation.cfm?doid=1400097.1400099
 }
 }
 
@@ -1978,10 +2023,10 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://lkml.org/lkml/2008/8/21/336}
 [Viewed December 8, 2008]"
-,annotation="
+,annotation={
         State-based RCU.  One key thing that this patch does is to
         separate the dynticks handling of NMIs and IRQs.
-"
+}
 }
 
 @unpublished{ManfredSpraul2008dyntickIRQNMI
@@ -1993,12 +2038,13 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://lkml.org/lkml/2008/9/6/86}
 [Viewed December 8, 2008]"
-,annotation="
+,annotation={
         Manfred notes a fix required to my attempt to separate irq
         and NMI processing for hierarchical RCU's dynticks interface.
-"
+}
 }
 
+# Was PaulEMcKenney2011cyclicRCU
 @techreport{PaulEMcKenney2008cyclicRCU
 ,author="Paul E. McKenney"
 ,title="Efficient Support of Consistent Cyclic Search With Read-Copy Update"
@@ -2008,11 +2054,11 @@ lot of {Linux} into your technology!!!"
 ,number="US Patent 7,426,511"
 ,month="September"
 ,pages="23"
-,annotation="
+,annotation={
         Maintains an additional level of indirection to allow
         readers to confine themselves to the desired snapshot of the
         data structure.  Only permits one update at a time.
-"
+}
 }
 
 @unpublished{PaulEMcKenney2008HierarchicalRCU
@@ -2021,13 +2067,12 @@ lot of {Linux} into your technology!!!"
 ,month="November"
 ,day="3"
 ,year="2008"
-,note="Available:
-\url{http://lwn.net/Articles/305782/}
-[Viewed November 6, 2008]"
-,annotation="
+,note="\url{http://lwn.net/Articles/305782/}"
+,annotation={
         RCU with combining-tree-based grace-period detection,
         permitting it to handle thousands of CPUs.
-"
+        [Viewed November 6, 2008]
+}
 }
 
 @unpublished{PaulEMcKenney2009BloatwatchRCU
@@ -2039,10 +2084,10 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://lkml.org/lkml/2009/1/14/449}
 [Viewed January 15, 2009]"
-,annotation="
+,annotation={
         Small-footprint implementation of RCU for uniprocessor
         embedded applications -- and also for exposition purposes.
-"
+}
 }
 
 @conference{PaulEMcKenney2009MaliciousURCU
@@ -2055,9 +2100,9 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://www.rdrop.com/users/paulmck/RCU/urcutorture.2009.01.22a.pdf}
 [Viewed February 2, 2009]"
-,annotation="
+,annotation={
         Realtime RCU and torture-testing RCU uses.
-"
+}
 }
 
 @unpublished{MathieuDesnoyers2009URCU
@@ -2066,16 +2111,14 @@ lot of {Linux} into your technology!!!"
 ,month="February"
 ,day="5"
 ,year="2009"
-,note="Available:
-\url{http://lkml.org/lkml/2009/2/5/572}
-\url{http://lttng.org/urcu}
-[Viewed February 20, 2009]"
-,annotation="
+,note="\url{http://lttng.org/urcu}"
+,annotation={
         Mathieu Desnoyers's user-space RCU implementation.
         git://lttng.org/userspace-rcu.git
         http://lttng.org/cgi-bin/gitweb.cgi?p=userspace-rcu.git
         http://lttng.org/urcu
-"
+        http://lkml.org/lkml/2009/2/5/572
+}
 }
 
 @unpublished{PaulEMcKenney2009LWNBloatWatchRCU
@@ -2087,9 +2130,24 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://lwn.net/Articles/323929/}
 [Viewed March 20, 2009]"
-,annotation="
+,annotation={
         Uniprocessor assumptions allow simplified RCU implementation.
-"
+}
+}
+
+@unpublished{EvgeniyPolyakov2009EllipticsNetwork
+,Author="Evgeniy Polyakov"
+,Title="The Elliptics Network"
+,month="April"
+,day="17"
+,year="2009"
+,note="Available:
+\url{http://www.ioremap.net/projects/elliptics}
+[Viewed April 30, 2009]"
+,annotation={
+        Distributed hash table with transactions, using elliptic
+        hash functions to distribute data.
+}
 }
 
 @unpublished{PaulEMcKenney2009expeditedRCU
@@ -2101,9 +2159,9 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://lkml.org/lkml/2009/6/25/306}
 [Viewed August 16, 2009]"
-,annotation="
+,annotation={
         First posting of expedited RCU to be accepted into -tip.
-"
+}
 }
 
 @unpublished{PaulEMcKenney2009fastRTRCU
@@ -2115,21 +2173,21 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://lkml.org/lkml/2009/7/23/294}
 [Viewed August 15, 2009]"
-,annotation="
+,annotation={
         First posting of simple and fast preemptable RCU.
-"
+}
 }
 
-@InProceedings{JoshTriplett2009RPHash
+@unpublished{JoshTriplett2009RPHash
 ,Author="Josh Triplett"
 ,Title="Scalable concurrent hash tables via relativistic programming"
 ,month="September"
 ,year="2009"
-,booktitle="Linux Plumbers Conference 2009"
-,annotation="
+,note="Linux Plumbers Conference presentation"
+,annotation={
         RP fun with hash tables.
-        See also JoshTriplett2010RPHash
-"
+        Superseded by JoshTriplett2010RPHash
+}
 }
 
 @phdthesis{MathieuDesnoyersPhD
@@ -2154,9 +2212,9 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://wiki.cs.pdx.edu/rp/}
 [Viewed December 9, 2009]"
-,annotation="
+,annotation={
         Main Relativistic Programming Wiki.
-"
+}
 }
 
 @conference{PaulEMcKenney2009DeterministicRCU
@@ -2180,9 +2238,9 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://paulmck.livejournal.com/14639.html}
 [Viewed June 4, 2010]"
-,annotation="
+,annotation={
         Day-one bug in Tree RCU that took forever to track down.
-"
+}
 }
 
 @unpublished{MathieuDesnoyers2009defer:rcu
@@ -2193,10 +2251,10 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://lkml.org/lkml/2009/10/18/129}
 [Viewed December 29, 2009]"
-,annotation="
+,annotation={
         Mathieu proposed defer_rcu() with fixed-size per-thread pool
         of RCU callbacks.
-"
+}
 }
 
 @unpublished{MathieuDesnoyers2009VerifPrePub
@@ -2205,10 +2263,10 @@ lot of {Linux} into your technology!!!"
 ,month="December"
 ,year="2009"
 ,note="Submitted to IEEE TPDS"
-,annotation="
+,annotation={
         OOMem model for Mathieu's user-level RCU mechanical proof of
         correctness.
-"
+}
 }
 
 @unpublished{MathieuDesnoyers2009URCUPrePub
@@ -2216,15 +2274,15 @@ lot of {Linux} into your technology!!!"
 ,Title="User-Level Implementations of Read-Copy Update"
 ,month="December"
 ,year="2010"
-,url=\url{http://www.computer.org/csdl/trans/td/2012/02/ttd2012020375-abs.html}
-,annotation="
+,url={\url{http://www.computer.org/csdl/trans/td/2012/02/ttd2012020375-abs.html}}
+,annotation={
         RCU overview, desiderata, semi-formal semantics, user-level RCU
         usage scenarios, three classes of RCU implementation, wait-free
         RCU updates, RCU grace-period batching, update overhead,
         http://www.rdrop.com/users/paulmck/RCU/urcu-main-accepted.2011.08.30a.pdf
         http://www.rdrop.com/users/paulmck/RCU/urcu-supp-accepted.2011.08.30a.pdf
         Superseded by MathieuDesnoyers2012URCU.
-"
+}
 }
 
 @inproceedings{HariKannan2009DynamicAnalysisRCU
@@ -2240,7 +2298,8 @@ lot of {Linux} into your technology!!!"
 ,address = {New York, NY, USA}
 ,annotation={
         Uses RCU to protect metadata used in dynamic analysis.
-}}
+}
+}
 
 @conference{PaulEMcKenney2010SimpleOptRCU
 ,Author="Paul E. McKenney"
@@ -2252,10 +2311,10 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://www.rdrop.com/users/paulmck/RCU/SimplicityThruOptimization.2010.01.21f.pdf}
 [Viewed October 10, 2010]"
-,annotation="
+,annotation={
         TREE_PREEMPT_RCU optimizations greatly simplified the old
         PREEMPT_RCU implementation.
-"
+}
 }
 
 @unpublished{PaulEMcKenney2010LockdepRCU
@@ -2264,12 +2323,11 @@ lot of {Linux} into your technology!!!"
 ,month="February"
 ,year="2010"
 ,day="1"
-,note="Available:
-\url{https://lwn.net/Articles/371986/}
-[Viewed June 4, 2010]"
-,annotation="
+,note="\url{https://lwn.net/Articles/371986/}"
+,annotation={
         CONFIG_PROVE_RCU, or at least an early version.
-"
+        [Viewed June 4, 2010]
+}
 }
 
 @unpublished{AviKivity2010KVM2RCU
@@ -2280,10 +2338,10 @@ lot of {Linux} into your technology!!!"
 ,note="Available:
 \url{http://www.mail-archive.com/kvm@vger.kernel.org/msg28640.html}
 [Viewed March 20, 2010]"
-,annotation="
+,annotation={
         Use of RCU permits KVM to increase the size of guest OSes from
         16 CPUs to 64 CPUs.
-"
+}
 }
 
 @unpublished{HerbertXu2010RCUResizeHash
@@ -2297,7 +2355,19 @@ lot of {Linux} into your technology!!!"
 ,annotation={
         Use a pair of list_head structures to support RCU-protected
         resizable hash tables.
-}}
+}
+}
+
+@mastersthesis{AbhinavDuggal2010Masters
+,author="Abhinav Duggal"
+,title="Stopping Data Races Using Redflag"
+,school="Stony Brook University"
+,year="2010"
+,annotation={
+        Data-race detector incorporating RCU.
+        http://www.filesystems.org/docs/abhinav-thesis/abhinav_thesis.pdf
+}
+}
 
 @article{JoshTriplett2010RPHash
 ,author="Josh Triplett and Paul E. McKenney and Jonathan Walpole"
@@ -2310,7 +2380,8 @@ lot of {Linux} into your technology!!!"
 ,annotation={
         RP fun with hash tables.
         http://portal.acm.org/citation.cfm?id=1842733.1842750
-}}
+}
+}
 
 @unpublished{PaulEMcKenney2010RCUAPI
 ,Author="Paul E. McKenney"
@@ -2318,12 +2389,11 @@ lot of {Linux} into your technology!!!"
 ,month="December"
 ,day="8"
 ,year="2010"
-,note="Available:
-\url{http://lwn.net/Articles/418853/}
-[Viewed December 8, 2010]"
-,annotation="
+,note="\url{http://lwn.net/Articles/418853/}"
+,annotation={
         Includes updated software-engineering features.
-"
+        [Viewed December 8, 2010]
+}
 }
 
 @mastersthesis{AndrejPodzimek2010masters
@@ -2338,7 +2408,8 @@ lot of {Linux} into your technology!!!"
         Reviews RCU implementations and creates a few for OpenSolaris.
         Drives quiescent-state detection from RCU read-side primitives,
         in a manner roughly similar to that of Jim Houston.
-}}
+}
+}
 
 @unpublished{LinusTorvalds2011Linux2:6:38:rc1:NPigginVFS
 ,Author="Linus Torvalds"
@@ -2358,7 +2429,8 @@ lot of {Linux} into your technology!!!"
         of the most expensive parts of path component lookup, which was the
         d_lock on every component lookup. So I'm seeing improvements of 30-50%
         on some seriously pathname-lookup intensive loads."
-}}
+}
+}
 
 @techreport{JoshTriplett2011RPScalableCorrectOrdering
 ,author = {Josh Triplett and Philip W. Howard and Paul E. McKenney and Jonathan Walpole}
@@ -2392,12 +2464,12 @@ lot of {Linux} into your technology!!!"
 ,number="US Patent 7,953,778"
 ,month="May"
 ,pages="34"
-,annotation="
+,annotation={
         Maintains an array of generation numbers to track in-flight
         updates and keeps an additional level of indirection to allow
         readers to confine themselves to the desired snapshot of the
         data structure.
-"
+}
 }
 
 @inproceedings{Triplett:2011:RPHash
@@ -2408,7 +2480,7 @@ lot of {Linux} into your technology!!!"
 ,year = {2011}
 ,pages = {145--158}
 ,numpages = {14}
-,url={http://www.usenix.org/event/atc11/tech/final_files/atc11_proceedings.pdf}
+,url={http://www.usenix.org/event/atc11/tech/final_files/Triplett.pdf}
 ,publisher = {The USENIX Association}
 ,address = {Portland, OR USA}
 }
@@ -2419,27 +2491,58 @@ lot of {Linux} into your technology!!!"
 ,month="July"
 ,day="27"
 ,year="2011"
-,note="Available:
-\url{http://lwn.net/Articles/453002/}
-[Viewed July 27, 2011]"
-,annotation="
+,note="\url{http://lwn.net/Articles/453002/}"
+,annotation={
         Analysis of the RCU trainwreck in Linux kernel 3.0.
-"
+        [Viewed July 27, 2011]
+}
 }
 
 @unpublished{NeilBrown2011MeetTheLockers
 ,Author="Neil Brown"
-,Title="Meet the Lockers"
+,Title="Meet the {Lockers}"
 ,month="August"
 ,day="3"
 ,year="2011"
 ,note="Available:
 \url{http://lwn.net/Articles/453685/}
 [Viewed September 2, 2011]"
-,annotation="
+,annotation={
         The Locker family as an analogy for locking, reference counting,
         RCU, and seqlock.
-"
+}
+}
+
+@inproceedings{Seyster:2011:RFA:2075416.2075425
+,author = {Seyster, Justin and Radhakrishnan, Prabakar and Katoch, Samriti and Duggal, Abhinav and Stoller, Scott D. and Zadok, Erez}
+,title = {Redflag: a framework for analysis of Kernel-level concurrency}
+,booktitle = {Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part I}
+,series = {ICA3PP'11}
+,year = {2011}
+,isbn = {978-3-642-24649-4}
+,location = {Melbourne, Australia}
+,pages = {66--79}
+,numpages = {14}
+,url = {http://dl.acm.org/citation.cfm?id=2075416.2075425}
+,acmid = {2075425}
+,publisher = {Springer-Verlag}
+,address = {Berlin, Heidelberg}
+}
+
+@phdthesis{JoshTriplettPhD
+,author="Josh Triplett"
+,title="Relativistic Causal Ordering: A Memory Model for Scalable Concurrent Data Structures"
+,school="Portland State University"
+,year="2012"
+,annotation={
+        RCU-protected hash tables, barriers vs. read-side traversal order.
+        .
+        If the updater is making changes in the opposite direction from
+        the read-side traveral order, the updater need only execute a
+        memory-barrier instruction, but if in the same direction, the
+        updater needs to wait for a grace period between the individual
+        updates.
+}
 }
 
 @article{MathieuDesnoyers2012URCU
@@ -2459,5 +2562,150 @@ lot of {Linux} into your technology!!!"
         RCU updates, RCU grace-period batching, update overhead,
         http://www.rdrop.com/users/paulmck/RCU/urcu-main-accepted.2011.08.30a.pdf
         http://www.rdrop.com/users/paulmck/RCU/urcu-supp-accepted.2011.08.30a.pdf
+        http://www.computer.org/cms/Computer.org/dl/trans/td/2012/02/extras/ttd2012020375s.pdf
+}
+}
+
+@inproceedings{AustinClements2012RCULinux:mmapsem
+,author = {Austin Clements and Frans Kaashoek and Nickolai Zeldovich}
+,title = {Scalable Address Spaces Using {RCU} Balanced Trees}
+,booktitle = {Architectural Support for Programming Languages and Operating Systems (ASPLOS 2012)}
+,month = {March}
+,year = {2012}
+,pages = {199--210}
+,numpages = {12}
+,publisher = {ACM}
+,address = {London, UK}
+,url="http://people.csail.mit.edu/nickolai/papers/clements-bonsai.pdf"
+}
+
+@unpublished{PaulEMcKenney2012ELCbattery
+,Author="Paul E. McKenney"
+,Title="Making {RCU} Safe For Battery-Powered Devices"
+,month="February"
+,day="15"
+,year="2012"
+,note="Available:
+\url{http://www.rdrop.com/users/paulmck/RCU/RCUdynticks.2012.02.15b.pdf}
+[Viewed March 1, 2012]"
+,annotation={
+        RCU_FAST_NO_HZ, round 2.
+}
+}
+
+@article{GuillermoVigueras2012RCUCrowd
+,author = {Vigueras, Guillermo and Ordu\~{n}a, Juan M. and Lozano, Miguel}
+,day = {25}
+,doi = {10.1007/s11227-012-0766-x}
+,issn = {0920-8542}
+,journal = {The Journal of Supercomputing}
+,keywords = {linux, simulation}
+,month = apr
+,posted-at = {2012-05-03 09:12:04}
+,priority = {2}
+,title = {{A Read-Copy Update based parallel server for distributed crowd simulations}}
+,url = {http://dx.doi.org/10.1007/s11227-012-0766-x}
+,year = {2012}
+}
+
+
+@unpublished{JonCorbet2012ACCESS:ONCE
+,Author="Jon Corbet"
+,Title="{ACCESS\_ONCE()}"
+,month="August"
+,day="1"
+,year="2012"
+,note="\url{http://lwn.net/Articles/508991/}"
+,annotation={
+        A couple of simple specific compiler optimizations that motivate
+        ACCESS_ONCE().
+}
+}
+
+@unpublished{AlexeyGotsman2012VerifyGraceExtended
+,Author="Alexey Gotsman and Noam Rinetzky and Hongseok Yang"
+,Title="Verifying Highly Concurrent Algorithms with Grace (extended version)"
+,month="July"
+,day="10"
+,year="2012"
+,note="\url{http://software.imdea.org/~gotsman/papers/recycling-esop13-ext.pdf}"
+,annotation={
+        Separation-logic formulation of RCU uses.
+}
+}
+
+@unpublished{PaulMcKenney2012RCUUsage
+,Author="Paul E. McKenney and Silas Boyd-Wickizer and Jonathan Walpole"
+,Title="{RCU} Usage In the Linux Kernel: One Decade Later"
+,month="September"
+,day="17"
+,year="2012"
+,url=http://rdrop.com/users/paulmck/techreports/survey.2012.09.17a.pdf
+,note="Technical report paulmck.2012.09.17"
+,annotation={
+        Overview of the first variant of no-CBs CPUs for RCU.
+}
+}
+
+@unpublished{JonCorbet2012NOCB
+,Author="Jon Corbet"
+,Title="Relocating RCU callbacks"
+,month="October"
+,day="31"
+,year="2012"
+,note="\url{http://lwn.net/Articles/522262/}"
+,annotation={
+        Overview of the first variant of no-CBs CPUs for RCU.
+}
+}
+
+@phdthesis{JustinSeyster2012PhD
+,author="Justin Seyster"
+,title="Runtime Verification of Kernel-Level Concurrency Using Compiler-Based Instrumentation"
+,school="Stony Brook University"
+,year="2012"
+,annotation={
+        Looking for data races, including those involving RCU.
+        Proposal:
+        http://www.fsl.cs.sunysb.edu/docs/jseyster-proposal/redflag.pdf
+        Dissertation:
+        http://www.fsl.cs.sunysb.edu/docs/jseyster-dissertation/redflag.pdf
+}
+}
+
+@unpublished{PaulEMcKenney2013RCUUsage
+,Author="Paul E. McKenney and Silas Boyd-Wickizer and Jonathan Walpole"
+,Title="{RCU} Usage in the {Linux} Kernel: One Decade Later"
+,month="February"
+,day="24"
+,year="2013"
+,note="\url{http://rdrop.com/users/paulmck/techreports/RCUUsage.2013.02.24a.pdf}"
+,annotation={
+        Usage of RCU within the Linux kernel.
+}
+}
+
+@inproceedings{AlexeyGotsman2013ESOPRCU
+,author = {Alexey Gotsman and Noam Rinetzky and Hongseok Yang}
+,title = {Verifying concurrent memory reclamation algorithms with grace}
+,booktitle = {ESOP'13: European Symposium on Programming}
+,year = {2013}
+,pages = {249--269}
+,publisher = {Springer}
+,address = {Rome, Italy}
+,annotation={
+        http://software.imdea.org/~gotsman/papers/recycling-esop13.pdf
+}
+}
+
+@unpublished{PaulEMcKenney2013NoTinyPreempt
+,Author="Paul E. McKenney"
+,Title="Simplifying RCU"
+,month="March"
+,day="6"
+,year="2013"
+,note="\url{http://lwn.net/Articles/541037/}"
+,annotation={
+        Getting rid of TINY_PREEMPT_RCU.
 }
 }
diff --git a/Documentation/RCU/checklist.txt b/Documentation/RCU/checklist.txt
index 7703ec73a9bb..91266193b8f4 100644
--- a/Documentation/RCU/checklist.txt
+++ b/Documentation/RCU/checklist.txt
@@ -202,8 +202,8 @@ over a rather long period of time, but improvements are always welcome!
         updater uses call_rcu_sched() or synchronize_sched(), then
         the corresponding readers must disable preemption, possibly
         by calling rcu_read_lock_sched() and rcu_read_unlock_sched().
-        If the updater uses synchronize_srcu() or call_srcu(),
-        the the corresponding readers must use srcu_read_lock() and
+        If the updater uses synchronize_srcu() or call_srcu(), then
+        the corresponding readers must use srcu_read_lock() and
         srcu_read_unlock(), and with the same srcu_struct.  The rules for
         the expedited primitives are the same as for their non-expedited
         counterparts.  Mixing things up will result in confusion and
diff --git a/Documentation/RCU/rcubarrier.txt b/Documentation/RCU/rcubarrier.txt
index 2e319d1b9ef2..b10cfe711e68 100644
--- a/Documentation/RCU/rcubarrier.txt
+++ b/Documentation/RCU/rcubarrier.txt
@@ -70,10 +70,14 @@ in realtime kernels in order to avoid excessive scheduling latencies.
 
 rcu_barrier()
 
-We instead need the rcu_barrier() primitive. This primitive is similar
-to synchronize_rcu(), but instead of waiting solely for a grace
-period to elapse, it also waits for all outstanding RCU callbacks to
-complete. Pseudo-code using rcu_barrier() is as follows:
+We instead need the rcu_barrier() primitive.  Rather than waiting for
+a grace period to elapse, rcu_barrier() waits for all outstanding RCU
+callbacks to complete.  Please note that rcu_barrier() does -not- imply
+synchronize_rcu(), in particular, if there are no RCU callbacks queued
+anywhere, rcu_barrier() is within its rights to return immediately,
+without waiting for a grace period to elapse.
+
+Pseudo-code using rcu_barrier() is as follows:
 
    1. Prevent any new RCU callbacks from being posted.
    2. Execute rcu_barrier().
diff --git a/Documentation/RCU/stallwarn.txt b/Documentation/RCU/stallwarn.txt
index 8e9359de1d28..6f3a0057548e 100644
--- a/Documentation/RCU/stallwarn.txt
+++ b/Documentation/RCU/stallwarn.txt
@@ -12,12 +12,12 @@ CONFIG_RCU_CPU_STALL_TIMEOUT
         This kernel configuration parameter defines the period of time
         that RCU will wait from the beginning of a grace period until it
         issues an RCU CPU stall warning.  This time period is normally
-        sixty seconds.
+        21 seconds.
 
         This configuration parameter may be changed at runtime via the
         /sys/module/rcutree/parameters/rcu_cpu_stall_timeout, however
         this parameter is checked only at the beginning of a cycle.
-        So if you are 30 seconds into a 70-second stall, setting this
+        So if you are 10 seconds into a 40-second stall, setting this
         sysfs parameter to (say) five will shorten the timeout for the
         -next- stall, or the following warning for the current stall
         (assuming the stall lasts long enough).  It will not affect the
@@ -32,7 +32,7 @@ CONFIG_RCU_CPU_STALL_VERBOSE
         also dump the stacks of any tasks that are blocking the current
         RCU-preempt grace period.
 
-RCU_CPU_STALL_INFO
+CONFIG_RCU_CPU_STALL_INFO
 
         This kernel configuration parameter causes the stall warning to
         print out additional per-CPU diagnostic information, including
@@ -43,7 +43,8 @@ RCU_STALL_DELAY_DELTA
         Although the lockdep facility is extremely useful, it does add
         some overhead.  Therefore, under CONFIG_PROVE_RCU, the
         RCU_STALL_DELAY_DELTA macro allows five extra seconds before
-        giving an RCU CPU stall warning message.
+        giving an RCU CPU stall warning message.  (This is a cpp
+        macro, not a kernel configuration parameter.)
 
 RCU_STALL_RAT_DELAY
 
@@ -52,7 +53,8 @@ RCU_STALL_RAT_DELAY
         However, if the offending CPU does not detect its own stall in
         the number of jiffies specified by RCU_STALL_RAT_DELAY, then
         some other CPU will complain.  This delay is normally set to
-        two jiffies.
+        two jiffies.  (This is a cpp macro, not a kernel configuration
+        parameter.)
 
 When a CPU detects that it is stalling, it will print a message similar
 to the following:
@@ -86,7 +88,12 @@ printing, there will be a spurious stall-warning message:
 
 INFO: rcu_bh_state detected stalls on CPUs/tasks: { } (detected by 4, 2502 jiffies)
 
-This is rare, but does happen from time to time in real life.
+This is rare, but does happen from time to time in real life.  It is also
+possible for a zero-jiffy stall to be flagged in this case, depending
+on how the stall warning and the grace-period initialization happen to
+interact.  Please note that it is not possible to entirely eliminate this
+sort of false positive without resorting to things like stop_machine(),
+which is overkill for this sort of problem.
 
 If the CONFIG_RCU_CPU_STALL_INFO kernel configuration parameter is set,
 more information is printed with the stall-warning message, for example:
@@ -216,4 +223,5 @@ that portion of the stack which remains the same from trace to trace.
 If you can reliably trigger the stall, ftrace can be quite helpful.
 
 RCU bugs can often be debugged with the help of CONFIG_RCU_TRACE
-and with RCU's event tracing.
+and with RCU's event tracing.  For information on RCU's event tracing,
+see include/trace/events/rcu.h.
diff --git a/Documentation/RCU/torture.txt b/Documentation/RCU/torture.txt
index d8a502387397..dac02a6219b1 100644
--- a/Documentation/RCU/torture.txt
+++ b/Documentation/RCU/torture.txt
@@ -42,6 +42,16 @@ fqs_holdoff	Holdoff time (in microseconds) between consecutive calls
 fqs_stutter     Wait time (in seconds) between consecutive bursts
                 of calls to force_quiescent_state().
 
+gp_normal       Make the fake writers use normal synchronous grace-period
+                primitives.
+
+gp_exp          Make the fake writers use expedited synchronous grace-period
+                primitives.  If both gp_normal and gp_exp are set, or
+                if neither gp_normal nor gp_exp are set, then randomly
+                choose the primitive so that about 50% are normal and
+                50% expedited.  By default, neither are set, which
+                gives best overall test coverage.
+
 irqreader       Says to invoke RCU readers from irq level.  This is currently
                 done via timers.  Defaults to "1" for variants of RCU that
                 permit this.  (Or, more accurately, variants of RCU that do
diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches
index 6e97e73d87b5..26b1e31d5a13 100644
--- a/Documentation/SubmittingPatches
+++ b/Documentation/SubmittingPatches
@@ -109,6 +109,16 @@ probably didn't even receive earlier versions of the patch.
 If the patch fixes a logged bug entry, refer to that bug entry by
 number and URL.
 
+If you want to refer to a specific commit, don't just refer to the
+SHA-1 ID of the commit. Please also include the oneline summary of
+the commit, to make it easier for reviewers to know what it is about.
+Example:
+
+        Commit e21d2170f36602ae2708 ("video: remove unnecessary
+        platform_set_drvdata()") removed the unnecessary
+        platform_set_drvdata(), but left the variable "dev" unused,
+        delete it.
+
 
 3) Separate your changes.
 
diff --git a/Documentation/acpi/dsdt-override.txt b/Documentation/acpi/dsdt-override.txt
index febbb1ba4d23..784841caa6e6 100644
--- a/Documentation/acpi/dsdt-override.txt
+++ b/Documentation/acpi/dsdt-override.txt
@@ -4,4 +4,4 @@ CONFIG_ACPI_CUSTOM_DSDT builds the image into the kernel.
 
 When to use this method is described in detail on the
 Linux/ACPI home page:
-http://www.lesswatts.org/projects/acpi/overridingDSDT.php
+https://01.org/linux-acpi/documentation/overriding-dsdt
diff --git a/Documentation/acpi/enumeration.txt b/Documentation/acpi/enumeration.txt
index d9be7a97dff3..b994bcb32b92 100644
--- a/Documentation/acpi/enumeration.txt
+++ b/Documentation/acpi/enumeration.txt
@@ -207,7 +207,7 @@ passing those. One idea is to return this in _DSM method like:
                         Return (Local0)
                 }
 
-Then the at25 SPI driver can get this configation by calling _DSM on its
+Then the at25 SPI driver can get this configuration by calling _DSM on its
 ACPI handle like:
 
         struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
@@ -228,19 +228,9 @@ ACPI handle like:
 I2C serial bus support
 ~~~~~~~~~~~~~~~~~~~~~~
 The slaves behind I2C bus controller only need to add the ACPI IDs like
-with the platform and SPI drivers. However the I2C bus controller driver
-needs to call acpi_i2c_register_devices() after it has added the adapter.
-
-An I2C bus (controller) driver does:
-
-        ...
-        ret = i2c_add_numbered_adapter(adapter);
-        if (ret)
-                /* handle error */
-
-        of_i2c_register_devices(adapter);
-        /* Enumerate the slave devices behind this bus via ACPI */
-        acpi_i2c_register_devices(adapter);
+with the platform and SPI drivers. The I2C core automatically enumerates
+any slave devices behind the controller device once the adapter is
+registered.
 
 Below is an example of how to add ACPI support to the existing mpu3050
 input driver:
@@ -305,10 +295,6 @@ These GPIO numbers are controller relative and path "\\_SB.PCI0.GPI0"
 specifies the path to the controller. In order to use these GPIOs in Linux
 we need to translate them to the Linux GPIO numbers.
 
-The driver can do this by including <linux/acpi_gpio.h> and then calling
-acpi_get_gpio(path, gpio). This will return the Linux GPIO number or
-negative errno if there was no translation found.
-
 In a simple case of just getting the Linux GPIO number from device
 resources one can use acpi_get_gpio_by_index() helper function. It takes
 pointer to the device and index of the GpioIo/GpioInt descriptor in the
@@ -332,3 +318,25 @@ suitable to the gpiolib before passing them.
 
 In case of GpioInt resource an additional call to gpio_to_irq() must be
 done before calling request_irq().
+
+Note that the above API is ACPI specific and not recommended for drivers
+that need to support non-ACPI systems. The recommended way is to use
+the descriptor based GPIO interfaces. The above example looks like this
+when converted to the GPIO desc:
+
+        #include <linux/gpio/consumer.h>
+        ...
+
+        struct gpio_desc *irq_desc, *power_desc;
+
+        irq_desc = gpiod_get_index(dev, NULL, 1);
+        if (IS_ERR(irq_desc))
+                /* handle error */
+
+        power_desc = gpiod_get_index(dev, NULL, 0);
+        if (IS_ERR(power_desc))
+                /* handle error */
+
+        /* Now we can use the GPIO descriptors */
+
+See also Documentation/gpio.txt.
diff --git a/Documentation/aoe/udev.txt b/Documentation/aoe/udev.txt
index 8686e789542e..1f06daf03f5b 100644
--- a/Documentation/aoe/udev.txt
+++ b/Documentation/aoe/udev.txt
@@ -23,4 +23,4 @@ SUBSYSTEM=="aoe", KERNEL=="revalidate",	NAME="etherd/%k", GROUP="disk", MODE="02
 SUBSYSTEM=="aoe", KERNEL=="flush",      NAME="etherd/%k", GROUP="disk", MODE="0220"
 
 # aoe block devices     
-KERNEL=="etherd*",       NAME="%k", GROUP="disk"
+KERNEL=="etherd*",       GROUP="disk"
diff --git a/Documentation/arm/Booting b/Documentation/arm/Booting
index 0c1f475fdf36..371814a36719 100644
--- a/Documentation/arm/Booting
+++ b/Documentation/arm/Booting
@@ -18,7 +18,8 @@ following:
 2. Initialise one serial port.
 3. Detect the machine type.
 4. Setup the kernel tagged list.
-5. Call the kernel image.
+5. Load initramfs.
+6. Call the kernel image.
 
 
 1. Setup and initialise RAM
@@ -120,12 +121,27 @@ tagged list.
 The boot loader must pass at a minimum the size and location of the
 system memory, and the root filesystem location.  The dtb must be
 placed in a region of memory where the kernel decompressor will not
-overwrite it.  The recommended placement is in the first 16KiB of RAM
-with the caveat that it may not be located at physical address 0 since
-the kernel interprets a value of 0 in r2 to mean neither a tagged list
-nor a dtb were passed.
+overwrite it, whilst remaining within the region which will be covered
+by the kernel's low-memory mapping.
 
-5. Calling the kernel image
+A safe location is just above the 128MiB boundary from start of RAM.
+
+5. Load initramfs.
+------------------
+
+Existing boot loaders:          OPTIONAL
+New boot loaders:               OPTIONAL
+
+If an initramfs is in use then, as with the dtb, it must be placed in
+a region of memory where the kernel decompressor will not overwrite it
+while also with the region which will be covered by the kernel's
+low-memory mapping.
+
+A safe location is just above the device tree blob which itself will
+be loaded just above the 128MiB boundary from the start of RAM as
+recommended above.
+
+6. Calling the kernel image
 ---------------------------
 
 Existing boot loaders:          MANDATORY
@@ -136,11 +152,17 @@ is stored in flash, and is linked correctly to be run from flash,
 then it is legal for the boot loader to call the zImage in flash
 directly.
 
-The zImage may also be placed in system RAM (at any location) and
-called there.  Note that the kernel uses 16K of RAM below the image
-to store page tables.  The recommended placement is 32KiB into RAM.
+The zImage may also be placed in system RAM and called there.  The
+kernel should be placed in the first 128MiB of RAM.  It is recommended
+that it is loaded above 32MiB in order to avoid the need to relocate
+prior to decompression, which will make the boot process slightly
+faster.
+
+When booting a raw (non-zImage) kernel the constraints are tighter.
+In this case the kernel must be loaded at an offset into system equal
+to TEXT_OFFSET - PAGE_OFFSET.
 
-In either case, the following conditions must be met:
+In any case, the following conditions must be met:
 
 - Quiesce all DMA capable devices so that memory does not get
   corrupted by bogus network packets or disk data. This will save
diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README
index 8f08a86e03b7..da0151db9964 100644
--- a/Documentation/arm/Marvell/README
+++ b/Documentation/arm/Marvell/README
@@ -88,6 +88,7 @@ EBU Armada family
         MV78230
         MV78260
         MV78460
+    NOTE: not to be confused with the non-SMP 78xx0 SoCs
 
   Product Brief: http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf
   No public datasheet available.
diff --git a/Documentation/arm/OMAP/omap_pm b/Documentation/arm/OMAP/omap_pm
index 9012bb039094..4ae915a9f899 100644
--- a/Documentation/arm/OMAP/omap_pm
+++ b/Documentation/arm/OMAP/omap_pm
@@ -78,7 +78,7 @@ to NULL.  Drivers should use the following idiom:
 The most common usage of these functions will probably be to specify
 the maximum time from when an interrupt occurs, to when the device
 becomes accessible.  To accomplish this, driver writers should use the
-set_max_mpu_wakeup_lat() function to to constrain the MPU wakeup
+set_max_mpu_wakeup_lat() function to constrain the MPU wakeup
 latency, and the set_max_dev_wakeup_lat() function to constrain the
 device wakeup latency (from clk_enable() to accessibility).  For
 example,
diff --git a/Documentation/arm/kernel_mode_neon.txt b/Documentation/arm/kernel_mode_neon.txt
new file mode 100644
index 000000000000..525452726d31
--- /dev/null
+++ b/Documentation/arm/kernel_mode_neon.txt
@@ -0,0 +1,121 @@
+Kernel mode NEON
+================
+
+TL;DR summary
+-------------
+* Use only NEON instructions, or VFP instructions that don't rely on support
+  code
+* Isolate your NEON code in a separate compilation unit, and compile it with
+  '-mfpu=neon -mfloat-abi=softfp'
+* Put kernel_neon_begin() and kernel_neon_end() calls around the calls into your
+  NEON code
+* Don't sleep in your NEON code, and be aware that it will be executed with
+  preemption disabled
+
+
+Introduction
+------------
+It is possible to use NEON instructions (and in some cases, VFP instructions) in
+code that runs in kernel mode. However, for performance reasons, the NEON/VFP
+register file is not preserved and restored at every context switch or taken
+exception like the normal register file is, so some manual intervention is
+required. Furthermore, special care is required for code that may sleep [i.e.,
+may call schedule()], as NEON or VFP instructions will be executed in a
+non-preemptible section for reasons outlined below.
+
+
+Lazy preserve and restore
+-------------------------
+The NEON/VFP register file is managed using lazy preserve (on UP systems) and
+lazy restore (on both SMP and UP systems). This means that the register file is
+kept 'live', and is only preserved and restored when multiple tasks are
+contending for the NEON/VFP unit (or, in the SMP case, when a task migrates to
+another core). Lazy restore is implemented by disabling the NEON/VFP unit after
+every context switch, resulting in a trap when subsequently a NEON/VFP
+instruction is issued, allowing the kernel to step in and perform the restore if
+necessary.
+
+Any use of the NEON/VFP unit in kernel mode should not interfere with this, so
+it is required to do an 'eager' preserve of the NEON/VFP register file, and
+enable the NEON/VFP unit explicitly so no exceptions are generated on first
+subsequent use. This is handled by the function kernel_neon_begin(), which
+should be called before any kernel mode NEON or VFP instructions are issued.
+Likewise, the NEON/VFP unit should be disabled again after use to make sure user
+mode will hit the lazy restore trap upon next use. This is handled by the
+function kernel_neon_end().
+
+
+Interruptions in kernel mode
+----------------------------
+For reasons of performance and simplicity, it was decided that there shall be no
+preserve/restore mechanism for the kernel mode NEON/VFP register contents. This
+implies that interruptions of a kernel mode NEON section can only be allowed if
+they are guaranteed not to touch the NEON/VFP registers. For this reason, the
+following rules and restrictions apply in the kernel:
+* NEON/VFP code is not allowed in interrupt context;
+* NEON/VFP code is not allowed to sleep;
+* NEON/VFP code is executed with preemption disabled.
+
+If latency is a concern, it is possible to put back to back calls to
+kernel_neon_end() and kernel_neon_begin() in places in your code where none of
+the NEON registers are live. (Additional calls to kernel_neon_begin() should be
+reasonably cheap if no context switch occurred in the meantime)
+
+
+VFP and support code
+--------------------
+Earlier versions of VFP (prior to version 3) rely on software support for things
+like IEEE-754 compliant underflow handling etc. When the VFP unit needs such
+software assistance, it signals the kernel by raising an undefined instruction
+exception. The kernel responds by inspecting the VFP control registers and the
+current instruction and arguments, and emulates the instruction in software.
+
+Such software assistance is currently not implemented for VFP instructions
+executed in kernel mode. If such a condition is encountered, the kernel will
+fail and generate an OOPS.
+
+
+Separating NEON code from ordinary code
+---------------------------------------
+The compiler is not aware of the special significance of kernel_neon_begin() and
+kernel_neon_end(), i.e., that it is only allowed to issue NEON/VFP instructions
+between calls to these respective functions. Furthermore, GCC may generate NEON
+instructions of its own at -O3 level if -mfpu=neon is selected, and even if the
+kernel is currently compiled at -O2, future changes may result in NEON/VFP
+instructions appearing in unexpected places if no special care is taken.
+
+Therefore, the recommended and only supported way of using NEON/VFP in the
+kernel is by adhering to the following rules:
+* isolate the NEON code in a separate compilation unit and compile it with
+  '-mfpu=neon -mfloat-abi=softfp';
+* issue the calls to kernel_neon_begin(), kernel_neon_end() as well as the calls
+  into the unit containing the NEON code from a compilation unit which is *not*
+  built with the GCC flag '-mfpu=neon' set.
+
+As the kernel is compiled with '-msoft-float', the above will guarantee that
+both NEON and VFP instructions will only ever appear in designated compilation
+units at any optimization level.
+
+
+NEON assembler
+--------------
+NEON assembler is supported with no additional caveats as long as the rules
+above are followed.
+
+
+NEON code generated by GCC
+--------------------------
+The GCC option -ftree-vectorize (implied by -O3) tries to exploit implicit
+parallelism, and generates NEON code from ordinary C source code. This is fully
+supported as long as the rules above are followed.
+
+
+NEON intrinsics
+---------------
+NEON intrinsics are also supported. However, as code using NEON intrinsics
+relies on the GCC header <arm_neon.h>, (which #includes <stdint.h>), you should
+observe the following in addition to the rules above:
+* Compile the unit containing the NEON intrinsics with '-ffreestanding' so GCC
+  uses its builtin version of <stdint.h> (this is a C99 header which the kernel
+  does not supply);
+* Include <arm_neon.h> last, or at least after <linux/types.h>
diff --git a/Documentation/arm/sunxi/README b/Documentation/arm/sunxi/README
index e3f93fb9224e..7945238453ed 100644
--- a/Documentation/arm/sunxi/README
+++ b/Documentation/arm/sunxi/README
@@ -10,6 +10,10 @@ SunXi family
   Linux kernel mach directory: arch/arm/mach-sunxi
 
   Flavors:
+    * ARM926 based SoCs
+      - Allwinner F20 (sun3i)
+        + Not Supported
+
     * ARM Cortex-A8 based SoCs
       - Allwinner A10 (sun4i)
         + Datasheet
@@ -25,4 +29,24 @@ SunXi family
         + Datasheet
           http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
         + User Manual
-          http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-08-08%29.pdf
+          http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-01-08%29.pdf
+
+    * Dual ARM Cortex-A7 based SoCs
+      - Allwinner A20 (sun7i)
+        + User Manual
+          http://dl.linux-sunxi.org/A20/A20%20User%20Manual%202013-03-22.pdf
+
+      - Allwinner A23
+        + Not Supported
+
+    * Quad ARM Cortex-A7 based SoCs
+      - Allwinner A31 (sun6i)
+        + Datasheet
+          http://dl.linux-sunxi.org/A31/A31%20Datasheet%20-%20v1.00%20(2012-12-24).pdf
+
+      - Allwinner A31s (sun6i)
+        + Not Supported
+
+    * Quad ARM Cortex-A15, Quad ARM Cortex-A7 based SoCs
+      - Allwinner A80
+        + Not Supported
\ No newline at end of file
diff --git a/Documentation/arm64/booting.txt b/Documentation/arm64/booting.txt
index 9c4d388daddc..a9691cc48fe3 100644
--- a/Documentation/arm64/booting.txt
+++ b/Documentation/arm64/booting.txt
@@ -45,9 +45,9 @@ sees fit.)
 
 Requirement: MANDATORY
 
-The device tree blob (dtb) must be no bigger than 2 megabytes in size
-and placed at a 2-megabyte boundary within the first 512 megabytes from
-the start of the kernel image. This is to allow the kernel to map the
+The device tree blob (dtb) must be placed on an 8-byte boundary within
+the first 512 megabytes from the start of the kernel image and must not
+cross a 2-megabyte boundary. This is to allow the kernel to map the
 blob using a single section mapping in the initial page tables.
 
 
@@ -68,13 +68,23 @@ Image target is available instead.
 
 Requirement: MANDATORY
 
-The decompressed kernel image contains a 32-byte header as follows:
+The decompressed kernel image contains a 64-byte header as follows:
 
-  u32 magic     = 0x14000008;   /* branch to stext, little-endian */
-  u32 res0      = 0;            /* reserved */
+  u32 code0;                    /* Executable code */
+  u32 code1;                    /* Executable code */
   u64 text_offset;              /* Image load offset */
+  u64 res0      = 0;            /* reserved */
   u64 res1      = 0;            /* reserved */
   u64 res2      = 0;            /* reserved */
+  u64 res3      = 0;            /* reserved */
+  u64 res4      = 0;            /* reserved */
+  u32 magic     = 0x644d5241;   /* Magic number, little endian, "ARM\x64" */
+  u32 res5 = 0;                 /* reserved */
+
+
+Header notes:
+
+- code0/code1 are responsible for branching to stext.
 
 The image must be placed at the specified offset (currently 0x80000)
 from the start of the system RAM and called there. The start of the
@@ -105,9 +115,10 @@ Before jumping into the kernel, the following conditions must be met:
   External caches (if present) must be configured and disabled.
 
 - Architected timers
-  CNTFRQ must be programmed with the timer frequency.
-  If entering the kernel at EL1, CNTHCTL_EL2 must have EL1PCTEN (bit 0)
-  set where available.
+  CNTFRQ must be programmed with the timer frequency and CNTVOFF must
+  be programmed with a consistent value on all CPUs.  If entering the
+  kernel at EL1, CNTHCTL_EL2 must have EL1PCTEN (bit 0) set where
+  available.
 
 - Coherency
   All CPUs to be booted by the kernel must be part of the same coherency
@@ -120,30 +131,46 @@ Before jumping into the kernel, the following conditions must be met:
   the kernel image will be entered must be initialised by software at a
   higher exception level to prevent execution in an UNKNOWN state.
 
+The requirements described above for CPU mode, caches, MMUs, architected
+timers, coherency and system registers apply to all CPUs.  All CPUs must
+enter the kernel in the same exception level.
+
 The boot loader is expected to enter the kernel on each CPU in the
 following manner:
 
 - The primary CPU must jump directly to the first instruction of the
   kernel image.  The device tree blob passed by this CPU must contain
-  for each CPU node:
-
-    1. An 'enable-method' property. Currently, the only supported value
-       for this field is the string "spin-table".
-
-    2. A 'cpu-release-addr' property identifying a 64-bit,
-       zero-initialised memory location.
+  an 'enable-method' property for each cpu node.  The supported
+  enable-methods are described below.
 
   It is expected that the bootloader will generate these device tree
   properties and insert them into the blob prior to kernel entry.
 
-- Any secondary CPUs must spin outside of the kernel in a reserved area
-  of memory (communicated to the kernel by a /memreserve/ region in the
+- CPUs with a "spin-table" enable-method must have a 'cpu-release-addr'
+  property in their cpu node.  This property identifies a
+  naturally-aligned 64-bit zero-initalised memory location.
+
+  These CPUs should spin outside of the kernel in a reserved area of
+  memory (communicated to the kernel by a /memreserve/ region in the
   device tree) polling their cpu-release-addr location, which must be
   contained in the reserved region.  A wfe instruction may be inserted
   to reduce the overhead of the busy-loop and a sev will be issued by
   the primary CPU.  When a read of the location pointed to by the
-  cpu-release-addr returns a non-zero value, the CPU must jump directly
-  to this value.
+  cpu-release-addr returns a non-zero value, the CPU must jump to this
+  value.  The value will be written as a single 64-bit little-endian
+  value, so CPUs must convert the read value to their native endianness
+  before jumping to it.
+
+- CPUs with a "psci" enable method should remain outside of
+  the kernel (i.e. outside of the regions of memory described to the
+  kernel in the memory node, or in a reserved area of memory described
+  to the kernel by a /memreserve/ region in the device tree).  The
+  kernel will issue CPU_ON calls as described in ARM document number ARM
+  DEN 0022A ("Power State Coordination Interface System Software on ARM
+  processors") to bring CPUs into the kernel.
+
+  The device tree should contain a 'psci' node, as described in
+  Documentation/devicetree/bindings/arm/psci.txt.
 
 - Secondary CPU general-purpose register settings
   x0 = 0 (reserved for future use)
diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt
index 78a377124ef0..5e054bfe4dde 100644
--- a/Documentation/arm64/memory.txt
+++ b/Documentation/arm64/memory.txt
@@ -21,7 +21,7 @@ The swapper_pgd_dir address is written to TTBR1 and never written to
 TTBR0.
 
 
-AArch64 Linux memory layout:
+AArch64 Linux memory layout with 4KB pages:
 
 Start                   End                     Size            Use
 -----------------------------------------------------------------------
@@ -39,13 +39,38 @@ ffffffbffbc00000	ffffffbffbdfffff	   2MB		earlyprintk device
 
 ffffffbffbe00000        ffffffbffbe0ffff          64KB          PCI I/O space
 
-ffffffbbffff0000        ffffffbcffffffff          ~2MB          [guard]
+ffffffbffbe10000        ffffffbcffffffff          ~2MB          [guard]
 
 ffffffbffc000000        ffffffbfffffffff          64MB          modules
 
 ffffffc000000000        ffffffffffffffff         256GB          kernel logical memory map
 
 
+AArch64 Linux memory layout with 64KB pages:
+
+Start                   End                     Size            Use
+-----------------------------------------------------------------------
+0000000000000000        000003ffffffffff           4TB          user
+
+fffffc0000000000        fffffdfbfffeffff          ~2TB          vmalloc
+
+fffffdfbffff0000        fffffdfbffffffff          64KB          [guard page]
+
+fffffdfc00000000        fffffdfdffffffff           8GB          vmemmap
+
+fffffdfe00000000        fffffdfffbbfffff          ~8GB          [guard, future vmmemap]
+
+fffffdfffbc00000        fffffdfffbdfffff           2MB          earlyprintk device
+
+fffffdfffbe00000        fffffdfffbe0ffff          64KB          PCI I/O space
+
+fffffdfffbe10000        fffffdfffbffffff          ~2MB          [guard]
+
+fffffdfffc000000        fffffdffffffffff          64MB          modules
+
+fffffe0000000000        ffffffffffffffff           2TB          kernel logical memory map
+
+
 Translation table lookup with 4KB pages:
 
 +--------+--------+--------+--------+--------+--------+--------+--------+
diff --git a/Documentation/arm64/tagged-pointers.txt b/Documentation/arm64/tagged-pointers.txt
new file mode 100644
index 000000000000..d9995f1f51b3
--- /dev/null
+++ b/Documentation/arm64/tagged-pointers.txt
@@ -0,0 +1,34 @@
+                Tagged virtual addresses in AArch64 Linux
+                =========================================
+
+Author: Will Deacon <will.deacon@arm.com>
+Date  : 12 June 2013
+
+This document briefly describes the provision of tagged virtual
+addresses in the AArch64 translation system and their potential uses
+in AArch64 Linux.
+
+The kernel configures the translation tables so that translations made
+via TTBR0 (i.e. userspace mappings) have the top byte (bits 63:56) of
+the virtual address ignored by the translation hardware. This frees up
+this byte for application use, with the following caveats:
+
+        (1) The kernel requires that all user addresses passed to EL1
+            are tagged with tag 0x00. This means that any syscall
+            parameters containing user virtual addresses *must* have
+            their top byte cleared before trapping to the kernel.
+
+        (2) Non-zero tags are not preserved when delivering signals.
+            This means that signal handlers in applications making use
+            of tags cannot rely on the tag information for user virtual
+            addresses being maintained for fields inside siginfo_t.
+            One exception to this rule is for signals raised in response
+            to watchpoint debug exceptions, where the tag information
+            will be preserved.
+
+        (3) Special care should be taken when using tagged pointers,
+            since it is likely that C compilers will not hazard two
+            virtual addresses differing only in the upper byte.
+
+The architecture prevents the use of a tagged PC, so the upper byte will
+be set to a sign-extension of bit 55 on exception return.
diff --git a/Documentation/block/00-INDEX b/Documentation/block/00-INDEX
index d18ecd827c40..929d9904f74b 100644
--- a/Documentation/block/00-INDEX
+++ b/Documentation/block/00-INDEX
@@ -6,6 +6,8 @@ capability.txt
         - Generic Block Device Capability (/sys/block/<device>/capability)
 cfq-iosched.txt
         - CFQ IO scheduler tunables
+cmdline-partition.txt
+        - how to specify block device partitions on kernel command line
 data-integrity.txt
         - Block data integrity
 deadline-iosched.txt
diff --git a/Documentation/block/cfq-iosched.txt b/Documentation/block/cfq-iosched.txt
index 9887f0414c16..f3bc72945cbd 100644
--- a/Documentation/block/cfq-iosched.txt
+++ b/Documentation/block/cfq-iosched.txt
@@ -69,7 +69,7 @@ one, this value should be decreased relative to fifo_expire_async.
 group_idle
 -----------
 This parameter forces idling at the CFQ group level instead of CFQ
-queue level. This was introduced after after a bottleneck was observed
+queue level. This was introduced after a bottleneck was observed
 in higher end storage due to idle on sequential queue and allow dispatch
 from a single queue. The idea with this parameter is that it can be run with
 slice_idle=0 and group_idle=8, so that idling does not happen on individual
diff --git a/Documentation/block/cmdline-partition.txt b/Documentation/block/cmdline-partition.txt
new file mode 100644
index 000000000000..525b9f6d7fb4
--- /dev/null
+++ b/Documentation/block/cmdline-partition.txt
@@ -0,0 +1,39 @@
+Embedded device command line partition parsing
+=====================================================================
+
+Support for reading the block device partition table from the command line.
+It is typically used for fixed block (eMMC) embedded devices.
+It has no MBR, so saves storage space. Bootloader can be easily accessed
+by absolute address of data on the block device.
+Users can easily change the partition.
+
+The format for the command line is just like mtdparts:
+
+blkdevparts=<blkdev-def>[;<blkdev-def>]
+  <blkdev-def> := <blkdev-id>:<partdef>[,<partdef>]
+    <partdef> := <size>[@<offset>](part-name)
+
+<blkdev-id>
+    block device disk name, embedded device used fixed block device,
+    it's disk name also fixed. such as: mmcblk0, mmcblk1, mmcblk0boot0.
+
+<size>
+    partition size, in bytes, such as: 512, 1m, 1G.
+
+<offset>
+    partition start address, in bytes.
+
+(part-name)
+    partition name, kernel send uevent with "PARTNAME". application can create
+    a link to block device partition with the name "PARTNAME".
+    user space application can access partition by partition name.
+
+Example:
+    eMMC disk name is "mmcblk0" and "mmcblk0boot0"
+
+  bootargs:
+    'blkdevparts=mmcblk0:1G(data0),1G(data1),-;mmcblk0boot0:1m(boot),-(kernel)'
+
+  dmesg:
+    mmcblk0: p1(data0) p2(data1) p3()
+    mmcblk0boot0: p1(boot) p2(kernel)
diff --git a/Documentation/cachetlb.txt b/Documentation/cachetlb.txt
index 9b728dc17535..d79b008e4a32 100644
--- a/Documentation/cachetlb.txt
+++ b/Documentation/cachetlb.txt
@@ -57,7 +57,7 @@ changes occur:
         interface must make sure that any previous page table
         modifications for the address space 'vma->vm_mm' in the range
         'start' to 'end-1' will be visible to the cpu.  That is, after
-        running, here will be no entries in the TLB for 'mm' for
+        running, there will be no entries in the TLB for 'mm' for
         virtual addresses in the range 'start' to 'end-1'.
 
         The "vma" is the backing store being used for the region.
@@ -375,8 +375,8 @@ maps this page at its virtual address.
 
   void flush_icache_page(struct vm_area_struct *vma, struct page *page)
         All the functionality of flush_icache_page can be implemented in
-        flush_dcache_page and update_mmu_cache. In 2.7 the hope is to
-        remove this interface completely.
+        flush_dcache_page and update_mmu_cache. In the future, the hope
+        is to remove this interface completely.
 
 The final category of APIs is for I/O to deliberately aliased address
 ranges inside the kernel.  Such aliases are set up by use of the
diff --git a/Documentation/cgroups/memory.txt b/Documentation/cgroups/memory.txt
index 2a3330696372..8af4ad121828 100644
--- a/Documentation/cgroups/memory.txt
+++ b/Documentation/cgroups/memory.txt
@@ -490,6 +490,8 @@ pgpgin		- # of charging events to the memory cgroup. The charging
 pgpgout         - # of uncharging events to the memory cgroup. The uncharging
                 event happens each time a page is unaccounted from the cgroup.
 swap            - # of bytes of swap usage
+writeback       - # of bytes of file/anon cache that are queued for syncing to
+                disk.
 inactive_anon   - # of bytes of anonymous and swap cache memory on inactive
                 LRU list.
 active_anon     - # of bytes of anonymous and swap cache memory on active
diff --git a/Documentation/clk.txt b/Documentation/clk.txt
index 6f68ba0d1e01..3aeb5c440442 100644
--- a/Documentation/clk.txt
+++ b/Documentation/clk.txt
@@ -70,6 +70,10 @@ the operations defined in clk.h:
                                                 unsigned long parent_rate);
                 long            (*round_rate)(struct clk_hw *hw, unsigned long,
                                                 unsigned long *);
+                long            (*determine_rate)(struct clk_hw *hw,
+                                                unsigned long rate,
+                                                unsigned long *best_parent_rate,
+                                                struct clk **best_parent_clk);
                 int             (*set_parent)(struct clk_hw *hw, u8 index);
                 u8              (*get_parent)(struct clk_hw *hw);
                 int             (*set_rate)(struct clk_hw *hw, unsigned long);
@@ -179,26 +183,28 @@ mandatory, a cell marked as "n" implies that either including that
 callback is invalid or otherwise unnecessary.  Empty cells are either
 optional or must be evaluated on a case-by-case basis.
 
-                           clock hardware characteristics
-             -----------------------------------------------------------
-             | gate | change rate | single parent | multiplexer | root |
-             |------|-------------|---------------|-------------|------|
-.prepare     |      |             |               |             |      |
-.unprepare   |      |             |               |             |      |
-             |      |             |               |             |      |
-.enable      | y    |             |               |             |      |
-.disable     | y    |             |               |             |      |
-.is_enabled  | y    |             |               |             |      |
-             |      |             |               |             |      |
-.recalc_rate |      | y           |               |             |      |
-.round_rate  |      | y           |               |             |      |
-.set_rate    |      | y           |               |             |      |
-             |      |             |               |             |      |
-.set_parent  |      |             | n             | y           | n    |
-.get_parent  |      |             | n             | y           | n    |
-             |      |             |               |             |      |
-.init        |      |             |               |             |      |
-             -----------------------------------------------------------
+                              clock hardware characteristics
+                -----------------------------------------------------------
+                | gate | change rate | single parent | multiplexer | root |
+                |------|-------------|---------------|-------------|------|
+.prepare        |      |             |               |             |      |
+.unprepare      |      |             |               |             |      |
+                |      |             |               |             |      |
+.enable         | y    |             |               |             |      |
+.disable        | y    |             |               |             |      |
+.is_enabled     | y    |             |               |             |      |
+                |      |             |               |             |      |
+.recalc_rate    |      | y           |               |             |      |
+.round_rate     |      | y [1]       |               |             |      |
+.determine_rate |      | y [1]       |               |             |      |
+.set_rate       |      | y           |               |             |      |
+                |      |             |               |             |      |
+.set_parent     |      |             | n             | y           | n    |
+.get_parent     |      |             | n             | y           | n    |
+                |      |             |               |             |      |
+.init           |      |             |               |             |      |
+                -----------------------------------------------------------
+[1] either one of round_rate or determine_rate is required.
 
 Finally, register your clock at run-time with a hardware-specific
 registration function.  This function simply populates struct clk_foo's
diff --git a/Documentation/connector/ucon.c b/Documentation/connector/ucon.c
index 4848db8c71ff..8a4da64e02a8 100644
--- a/Documentation/connector/ucon.c
+++ b/Documentation/connector/ucon.c
@@ -71,7 +71,7 @@ static int netlink_send(int s, struct cn_msg *msg)
         nlh->nlmsg_seq = seq++;
         nlh->nlmsg_pid = getpid();
         nlh->nlmsg_type = NLMSG_DONE;
-        nlh->nlmsg_len = NLMSG_LENGTH(size - sizeof(*nlh));
+        nlh->nlmsg_len = size;
         nlh->nlmsg_flags = 0;
 
         m = NLMSG_DATA(nlh);
diff --git a/Documentation/cpu-freq/cpu-drivers.txt b/Documentation/cpu-freq/cpu-drivers.txt
index 19fa98e07bf7..40282e617913 100644
--- a/Documentation/cpu-freq/cpu-drivers.txt
+++ b/Documentation/cpu-freq/cpu-drivers.txt
@@ -50,8 +50,6 @@ What shall this struct cpufreq_driver contain?
 
 cpufreq_driver.name -           The name of this driver.
 
-cpufreq_driver.owner -          THIS_MODULE;
-
 cpufreq_driver.init -           A pointer to the per-CPU initialization 
                                 function.
 
diff --git a/Documentation/cputopology.txt b/Documentation/cputopology.txt
index 902d3151f527..0aad6deb2d96 100644
--- a/Documentation/cputopology.txt
+++ b/Documentation/cputopology.txt
@@ -22,7 +22,7 @@ to /proc/cpuinfo.
 
 4) /sys/devices/system/cpu/cpuX/topology/thread_siblings:
 
-        internel kernel map of cpuX's hardware threads within the same
+        internal kernel map of cpuX's hardware threads within the same
         core as cpuX
 
 5) /sys/devices/system/cpu/cpuX/topology/core_siblings:
diff --git a/Documentation/development-process/2.Process b/Documentation/development-process/2.Process
index 4823577c6509..2e0617936e8f 100644
--- a/Documentation/development-process/2.Process
+++ b/Documentation/development-process/2.Process
@@ -276,7 +276,7 @@ mainline get there via -mm.
 The current -mm patch is available in the "mmotm" (-mm of the moment)
 directory at:
 
-        http://userweb.kernel.org/~akpm/mmotm/
+        http://www.ozlabs.org/~akpm/mmotm/
 
 Use of the MMOTM tree is likely to be a frustrating experience, though;
 there is a definite chance that it will not even compile.
@@ -287,7 +287,7 @@ the mainline is expected to look like after the next merge window closes.
 Linux-next trees are announced on the linux-kernel and linux-next mailing
 lists when they are assembled; they can be downloaded from:
 
-        http://www.kernel.org/pub/linux/kernel/people/sfr/linux-next/
+        http://www.kernel.org/pub/linux/kernel/next/
 
 Some information about linux-next has been gathered at:
 
diff --git a/Documentation/device-mapper/cache.txt b/Documentation/device-mapper/cache.txt
index e8cdf7241b66..33d45ee0b737 100644
--- a/Documentation/device-mapper/cache.txt
+++ b/Documentation/device-mapper/cache.txt
@@ -50,14 +50,16 @@ other parameters detailed later):
    which are dirty, and extra hints for use by the policy object.
    This information could be put on the cache device, but having it
    separate allows the volume manager to configure it differently,
-   e.g. as a mirror for extra robustness.
+   e.g. as a mirror for extra robustness.  This metadata device may only
+   be used by a single cache device.
 
 Fixed block size
 ----------------
 
 The origin is divided up into blocks of a fixed size.  This block size
 is configurable when you first create the cache.  Typically we've been
-using block sizes of 256k - 1024k.
+using block sizes of 256KB - 1024KB.  The block size must be between 64
+(32KB) and 2097152 (1GB) and a multiple of 64 (32KB).
 
 Having a fixed block size simplifies the target a lot.  But it is
 something of a compromise.  For instance, a small part of a block may be
diff --git a/Documentation/device-mapper/statistics.txt b/Documentation/device-mapper/statistics.txt
new file mode 100644
index 000000000000..2a1673adc200
--- /dev/null
+++ b/Documentation/device-mapper/statistics.txt
@@ -0,0 +1,186 @@
+DM statistics
+=============
+
+Device Mapper supports the collection of I/O statistics on user-defined
+regions of a DM device.  If no regions are defined no statistics are
+collected so there isn't any performance impact.  Only bio-based DM
+devices are currently supported.
+
+Each user-defined region specifies a starting sector, length and step.
+Individual statistics will be collected for each step-sized area within
+the range specified.
+
+The I/O statistics counters for each step-sized area of a region are
+in the same format as /sys/block/*/stat or /proc/diskstats (see:
+Documentation/iostats.txt).  But two extra counters (12 and 13) are
+provided: total time spent reading and writing in milliseconds.  All
+these counters may be accessed by sending the @stats_print message to
+the appropriate DM device via dmsetup.
+
+Each region has a corresponding unique identifier, which we call a
+region_id, that is assigned when the region is created.  The region_id
+must be supplied when querying statistics about the region, deleting the
+region, etc.  Unique region_ids enable multiple userspace programs to
+request and process statistics for the same DM device without stepping
+on each other's data.
+
+The creation of DM statistics will allocate memory via kmalloc or
+fallback to using vmalloc space.  At most, 1/4 of the overall system
+memory may be allocated by DM statistics.  The admin can see how much
+memory is used by reading
+/sys/module/dm_mod/parameters/stats_current_allocated_bytes
+
+Messages
+========
+
+    @stats_create <range> <step> [<program_id> [<aux_data>]]
+
+        Create a new region and return the region_id.
+
+        <range>
+          "-" - whole device
+          "<start_sector>+<length>" - a range of <length> 512-byte sectors
+                                      starting with <start_sector>.
+
+        <step>
+          "<area_size>" - the range is subdivided into areas each containing
+                          <area_size> sectors.
+          "/<number_of_areas>" - the range is subdivided into the specified
+                                 number of areas.
+
+        <program_id>
+          An optional parameter.  A name that uniquely identifies
+          the userspace owner of the range.  This groups ranges together
+          so that userspace programs can identify the ranges they
+          created and ignore those created by others.
+          The kernel returns this string back in the output of
+          @stats_list message, but it doesn't use it for anything else.
+
+        <aux_data>
+          An optional parameter.  A word that provides auxiliary data
+          that is useful to the client program that created the range.
+          The kernel returns this string back in the output of
+          @stats_list message, but it doesn't use this value for anything.
+
+    @stats_delete <region_id>
+
+        Delete the region with the specified id.
+
+        <region_id>
+          region_id returned from @stats_create
+
+    @stats_clear <region_id>
+
+        Clear all the counters except the in-flight i/o counters.
+
+        <region_id>
+          region_id returned from @stats_create
+
+    @stats_list [<program_id>]
+
+        List all regions registered with @stats_create.
+
+        <program_id>
+          An optional parameter.
+          If this parameter is specified, only matching regions
+          are returned.
+          If it is not specified, all regions are returned.
+
+        Output format:
+          <region_id>: <start_sector>+<length> <step> <program_id> <aux_data>
+
+    @stats_print <region_id> [<starting_line> <number_of_lines>]
+
+        Print counters for each step-sized area of a region.
+
+        <region_id>
+          region_id returned from @stats_create
+
+        <starting_line>
+          The index of the starting line in the output.
+          If omitted, all lines are returned.
+
+        <number_of_lines>
+          The number of lines to include in the output.
+          If omitted, all lines are returned.
+
+        Output format for each step-sized area of a region:
+
+          <start_sector>+<length> counters
+
+          The first 11 counters have the same meaning as
+          /sys/block/*/stat or /proc/diskstats.
+
+          Please refer to Documentation/iostats.txt for details.
+
+          1. the number of reads completed
+          2. the number of reads merged
+          3. the number of sectors read
+          4. the number of milliseconds spent reading
+          5. the number of writes completed
+          6. the number of writes merged
+          7. the number of sectors written
+          8. the number of milliseconds spent writing
+          9. the number of I/Os currently in progress
+          10. the number of milliseconds spent doing I/Os
+          11. the weighted number of milliseconds spent doing I/Os
+
+          Additional counters:
+          12. the total time spent reading in milliseconds
+          13. the total time spent writing in milliseconds
+
+    @stats_print_clear <region_id> [<starting_line> <number_of_lines>]
+
+        Atomically print and then clear all the counters except the
+        in-flight i/o counters.  Useful when the client consuming the
+        statistics does not want to lose any statistics (those updated
+        between printing and clearing).
+
+        <region_id>
+          region_id returned from @stats_create
+
+        <starting_line>
+          The index of the starting line in the output.
+          If omitted, all lines are printed and then cleared.
+
+        <number_of_lines>
+          The number of lines to process.
+          If omitted, all lines are printed and then cleared.
+
+    @stats_set_aux <region_id> <aux_data>
+
+        Store auxiliary data aux_data for the specified region.
+
+        <region_id>
+          region_id returned from @stats_create
+
+        <aux_data>
+          The string that identifies data which is useful to the client
+          program that created the range.  The kernel returns this
+          string back in the output of @stats_list message, but it
+          doesn't use this value for anything.
+
+Examples
+========
+
+Subdivide the DM device 'vol' into 100 pieces and start collecting
+statistics on them:
+
+  dmsetup message vol 0 @stats_create - /100
+
+Set the auxillary data string to "foo bar baz" (the escape for each
+space must also be escaped, otherwise the shell will consume them):
+
+  dmsetup message vol 0 @stats_set_aux 0 foo\\ bar\\ baz
+
+List the statistics:
+
+  dmsetup message vol 0 @stats_list
+
+Print the statistics:
+
+  dmsetup message vol 0 @stats_print 0
+
+Delete the statistics:
+
+  dmsetup message vol 0 @stats_delete 0
diff --git a/Documentation/device-mapper/thin-provisioning.txt b/Documentation/device-mapper/thin-provisioning.txt
index 30b8b83bd333..50c44cf79b0e 100644
--- a/Documentation/device-mapper/thin-provisioning.txt
+++ b/Documentation/device-mapper/thin-provisioning.txt
@@ -99,13 +99,14 @@ Using an existing pool device
                  $data_block_size $low_water_mark"
 
 $data_block_size gives the smallest unit of disk space that can be
-allocated at a time expressed in units of 512-byte sectors.  People
-primarily interested in thin provisioning may want to use a value such
-as 1024 (512KB).  People doing lots of snapshotting may want a smaller value
-such as 128 (64KB).  If you are not zeroing newly-allocated data,
-a larger $data_block_size in the region of 256000 (128MB) is suggested.
-$data_block_size must be the same for the lifetime of the
-metadata device.
+allocated at a time expressed in units of 512-byte sectors.
+$data_block_size must be between 128 (64KB) and 2097152 (1GB) and a
+multiple of 128 (64KB).  $data_block_size cannot be changed after the
+thin-pool is created.  People primarily interested in thin provisioning
+may want to use a value such as 1024 (512KB).  People doing lots of
+snapshotting may want a smaller value such as 128 (64KB).  If you are
+not zeroing newly-allocated data, a larger $data_block_size in the
+region of 256000 (128MB) is suggested.
 
 $low_water_mark is expressed in blocks of size $data_block_size.  If
 free space on the data device drops below this level then a dm event
diff --git a/Documentation/devices.txt b/Documentation/devices.txt
index 23721d3be3e6..80b72419ffd8 100644
--- a/Documentation/devices.txt
+++ b/Documentation/devices.txt
@@ -414,6 +414,7 @@ Your cooperation is appreciated.
                 200 = /dev/net/tun      TAP/TUN network device
                 201 = /dev/button/gulpb Transmeta GULP-B buttons
                 202 = /dev/emd/ctl      Enhanced Metadisk RAID (EMD) control
+                203 = /dev/cuse         Cuse (character device in user-space)
                 204 = /dev/video/em8300         EM8300 DVD decoder control
                 205 = /dev/video/em8300_mv      EM8300 DVD decoder video
                 206 = /dev/video/em8300_ma      EM8300 DVD decoder audio
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
index 20746e5abe6f..06fc7602593a 100644
--- a/Documentation/devicetree/bindings/arm/arch_timer.txt
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -1,10 +1,14 @@
 * ARM architected timer
 
-ARM cores may have a per-core architected timer, which provides per-cpu timers.
+ARM cores may have a per-core architected timer, which provides per-cpu timers,
+or a memory mapped architected timer, which provides up to 8 frames with a
+physical and optional virtual timer per frame.
 
-The timer is attached to a GIC to deliver its per-processor interrupts.
+The per-core architected timer is attached to a GIC to deliver its
+per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
+to deliver its interrupts via SPIs.
 
-** Timer node properties:
+** CP15 Timer node properties:
 
 - compatible : Should at least contain one of
         "arm,armv7-timer"
@@ -26,3 +30,52 @@ Example:
                              <1 10 0xf08>;
                 clock-frequency = <100000000>;
         };
+
+** Memory mapped timer node properties:
+
+- compatible : Should at least contain "arm,armv7-timer-mem".
+
+- clock-frequency : The frequency of the main counter, in Hz. Optional.
+
+- reg : The control frame base address.
+
+Note that #address-cells, #size-cells, and ranges shall be present to ensure
+the CPU can address a frame's registers.
+
+A timer node has up to 8 frame sub-nodes, each with the following properties:
+
+- frame-number: 0 to 7.
+
+- interrupts : Interrupt list for physical and virtual timers in that order.
+  The virtual timer interrupt is optional.
+
+- reg : The first and second view base addresses in that order. The second view
+  base address is optional.
+
+- status : "disabled" indicates the frame is not available for use. Optional.
+
+Example:
+
+        timer@f0000000 {
+                compatible = "arm,armv7-timer-mem";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                reg = <0xf0000000 0x1000>;
+                clock-frequency = <50000000>;
+
+                frame@f0001000 {
+                        frame-number = <0>
+                        interrupts = <0 13 0x8>,
+                                     <0 14 0x8>;
+                        reg = <0xf0001000 0x1000>,
+                              <0xf0002000 0x1000>;
+                };
+
+                frame@f0003000 {
+                        frame-number = <1>
+                        interrupts = <0 15 0x8>;
+                        reg = <0xf0003000 0x1000>;
+                        status = "disabled";
+                };
+        };
diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards
index db5858e32d3f..5fac246a9530 100644
--- a/Documentation/devicetree/bindings/arm/arm-boards
+++ b/Documentation/devicetree/bindings/arm/arm-boards
@@ -9,9 +9,53 @@ Required properties (in root node):
 
 FPGA type interrupt controllers, see the versatile-fpga-irq binding doc.
 
-In the root node the Integrator/CP must have a /cpcon node pointing
-to the CP control registers, and the Integrator/AP must have a
-/syscon node pointing to the Integrator/AP system controller.
+Required nodes:
+
+- core-module: the root node to the Integrator platforms must have
+  a core-module with regs and the compatible string
+  "arm,core-module-integrator"
+
+  Required properties for the core module:
+  - regs: the location and size of the core module registers, one
+    range of 0x200 bytes.
+
+- syscon: the root node of the Integrator platforms must have a
+  system controller node pointong to the control registers,
+  with the compatible string
+  "arm,integrator-ap-syscon"
+  "arm,integrator-cp-syscon"
+  respectively.
+
+  Required properties for the system controller:
+  - regs: the location and size of the system controller registers,
+    one range of 0x100 bytes.
+
+  Required properties for the AP system controller:
+  - interrupts: the AP syscon node must include the logical module
+    interrupts, stated in order of module instance <module 0>,
+    <module 1>, <module 2> ... for the CP system controller this
+    is not required not of any use.
+
+/dts-v1/;
+/include/ "integrator.dtsi"
+
+/ {
+        model = "ARM Integrator/AP";
+        compatible = "arm,integrator-ap";
+
+        core-module@10000000 {
+                compatible = "arm,core-module-integrator";
+                reg = <0x10000000 0x200>;
+        };
+
+        syscon {
+                compatible = "arm,integrator-ap-syscon";
+                reg = <0x11000000 0x100>;
+                interrupt-parent = <&pic>;
+                /* These are the logic module IRQs */
+                interrupts = <9>, <10>, <11>, <12>;
+        };
+};
 
 
 ARM Versatile Application and Platform Baseboards
diff --git a/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt b/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt
index 61df564c0d23..d74091a8a3bf 100644
--- a/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt
+++ b/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt
@@ -4,6 +4,8 @@ Marvell Armada 370 and Armada XP Interrupt Controller
 Required properties:
 - compatible: Should be "marvell,mpic"
 - interrupt-controller: Identifies the node as an interrupt controller.
+- msi-controller: Identifies the node as an PCI Message Signaled
+  Interrupt controller.
 - #interrupt-cells: The number of cells to define the interrupts. Should be 1.
   The cell is the IRQ number
 
@@ -24,6 +26,7 @@ Example:
               #address-cells = <1>;
               #size-cells = <1>;
               interrupt-controller;
+              msi-controller;
               reg = <0xd0020a00 0x1d0>,
                     <0xd0021070 0x58>;
         };
diff --git a/Documentation/devicetree/bindings/arm/atmel-adc.txt b/Documentation/devicetree/bindings/arm/atmel-adc.txt
index 16769d9cedd6..d1061469f63d 100644
--- a/Documentation/devicetree/bindings/arm/atmel-adc.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-adc.txt
@@ -1,18 +1,14 @@
 * AT91's Analog to Digital Converter (ADC)
 
 Required properties:
-  - compatible: Should be "atmel,at91sam9260-adc"
+  - compatible: Should be "atmel,<chip>-adc"
+    <chip> can be "at91sam9260", "at91sam9g45" or "at91sam9x5"
   - reg: Should contain ADC registers location and length
   - interrupts: Should contain the IRQ line for the ADC
-  - atmel,adc-channel-base: Offset of the first channel data register
   - atmel,adc-channels-used: Bitmask of the channels muxed and enable for this
     device
-  - atmel,adc-drdy-mask: Mask of the DRDY interruption in the ADC
-  - atmel,adc-num-channels: Number of channels available in the ADC
   - atmel,adc-startup-time: Startup Time of the ADC in microseconds as
     defined in the datasheet
-  - atmel,adc-status-register: Offset of the Interrupt Status Register
-  - atmel,adc-trigger-register: Offset of the Trigger Register
   - atmel,adc-vref: Reference voltage in millivolts for the conversions
   - atmel,adc-res: List of resolution in bits supported by the ADC. List size
                    must be two at least.
@@ -27,6 +23,13 @@ Optional properties:
                        resolution will be used.
   - atmel,adc-sleep-mode: Boolean to enable sleep mode when no conversion
   - atmel,adc-sample-hold-time: Sample and Hold Time in microseconds
+  - atmel,adc-ts-wires: Number of touch screen wires. Should be 4 or 5. If this
+                        value is set, then adc driver will enable touch screen
+                        support.
+    NOTE: when adc touch screen enabled, the adc hardware trigger will be
+          disabled. Since touch screen will occupied the trigger register.
+  - atmel,adc-ts-pressure-threshold: a pressure threshold for touchscreen. It
+                                     make touch detect more precision.
  
 Optional trigger Nodes:
   - Required properties:
diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt b/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
index fb7b5cd2652f..0ff6560e6094 100644
--- a/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
@@ -6,4 +6,5 @@ bcm11351, bcm28145, bcm28155 SoCs) shall have the following properties:
 
 Required root node property:
 
-compatible = "bcm,bcm11351";
+compatible = "brcm,bcm11351";
+DEPRECATED: compatible = "bcm,bcm11351";
diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt b/Documentation/devicetree/bindings/arm/bcm/kona-timer.txt
index 59fa6e68d4f6..17d88b233d1b 100644
--- a/Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/kona-timer.txt
@@ -4,14 +4,15 @@ This timer is used in the following Broadcom SoCs:
  BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
 
 Required properties:
-- compatible : "bcm,kona-timer"
+- compatible : "brcm,kona-timer"
+- DEPRECATED: compatible : "bcm,kona-timer"
 - reg : Register range for the timer
 - interrupts : interrupt for the timer
 - clock-frequency: frequency that the clock operates
 
 Example:
         timer@35006000 {
-                compatible = "bcm,kona-timer";
+                compatible = "brcm,kona-timer";
                 reg = <0x35006000 0x1000>;
                 interrupts = <0x0 7 0x4>;
                 clock-frequency = <32768>;
diff --git a/Documentation/devicetree/bindings/arm/bcm/kona-wdt.txt b/Documentation/devicetree/bindings/arm/bcm/kona-wdt.txt
new file mode 100644
index 000000000000..2b86a00e351d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/kona-wdt.txt
@@ -0,0 +1,15 @@
+Broadcom Kona Family Watchdog Timer
+-----------------------------------
+
+This watchdog timer is used in the following Broadcom SoCs:
+  BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
+
+Required properties:
+  - compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
+  - reg: memory address & range
+
+Example:
+        watchdog@35002f40 {
+                compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
+                reg = <0x35002f40 0x6c>;
+        };
diff --git a/Documentation/devicetree/bindings/arm/cci.txt b/Documentation/devicetree/bindings/arm/cci.txt
index 92d36e2aa877..f28d82bbbc56 100644
--- a/Documentation/devicetree/bindings/arm/cci.txt
+++ b/Documentation/devicetree/bindings/arm/cci.txt
@@ -36,14 +36,18 @@ specific to ARM.
 
         - reg
                 Usage: required
-                Value type: <prop-encoded-array>
+                Value type: Integer cells. A register entry, expressed as a pair
+                            of cells, containing base and size.
                 Definition: A standard property. Specifies base physical
                             address of CCI control registers common to all
                             interfaces.
 
         - ranges:
                 Usage: required
-                Value type: <prop-encoded-array>
+                Value type: Integer cells. An array of range entries, expressed
+                            as a tuple of cells, containing child address,
+                            parent address and the size of the region in the
+                            child address space.
                 Definition: A standard property. Follow rules in the ePAPR for
                             hierarchical bus addressing. CCI interfaces
                             addresses refer to the parent node addressing
@@ -74,11 +78,49 @@ specific to ARM.
 
                 - reg:
                         Usage: required
-                        Value type: <prop-encoded-array>
+                        Value type: Integer cells. A register entry, expressed
+                                    as a pair of cells, containing base and
+                                    size.
                         Definition: the base address and size of the
                                     corresponding interface programming
                                     registers.
 
+        - CCI PMU node
+
+                Parent node must be CCI interconnect node.
+
+                A CCI pmu node must contain the following properties:
+
+                - compatible
+                        Usage: required
+                        Value type: <string>
+                        Definition: must be "arm,cci-400-pmu"
+
+                - reg:
+                        Usage: required
+                        Value type: Integer cells. A register entry, expressed
+                                    as a pair of cells, containing base and
+                                    size.
+                        Definition: the base address and size of the
+                                    corresponding interface programming
+                                    registers.
+
+                - interrupts:
+                        Usage: required
+                        Value type: Integer cells. Array of interrupt specifier
+                                    entries, as defined in
+                                    ../interrupt-controller/interrupts.txt.
+                        Definition: list of counter overflow interrupts, one per
+                                    counter. The interrupts must be specified
+                                    starting with the cycle counter overflow
+                                    interrupt, followed by counter0 overflow
+                                    interrupt, counter1 overflow interrupt,...
+                                    ,counterN overflow interrupt.
+
+                                    The CCI PMU has an interrupt signal for each
+                                    counter. The number of interrupts must be
+                                    equal to the number of counters.
+
 * CCI interconnect bus masters
 
         Description: masters in the device tree connected to a CCI port
@@ -144,7 +186,7 @@ Example:
                 #address-cells = <1>;
                 #size-cells = <1>;
                 reg = <0x0 0x2c090000 0 0x1000>;
-                ranges = <0x0 0x0 0x2c090000 0x6000>;
+                ranges = <0x0 0x0 0x2c090000 0x10000>;
 
                 cci_control0: slave-if@1000 {
                         compatible = "arm,cci-400-ctrl-if";
@@ -163,6 +205,16 @@ Example:
                         interface-type = "ace";
                         reg = <0x5000 0x1000>;
                 };
+
+                pmu@9000 {
+                         compatible = "arm,cci-400-pmu";
+                         reg = <0x9000 0x5000>;
+                         interrupts = <0 101 4>,
+                                      <0 102 4>,
+                                      <0 103 4>,
+                                      <0 104 4>,
+                                      <0 105 4>;
+                };
         };
 
 This CCI node corresponds to a CCI component whose control registers sits
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index f32494dbfe19..91304353eea4 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -1,77 +1,384 @@
-* ARM CPUs binding description
+=================
+ARM CPUs bindings
+=================
 
 The device tree allows to describe the layout of CPUs in a system through
 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
 defining properties for every cpu.
 
-Bindings for CPU nodes follow the ePAPR standard, available from:
-
-http://devicetree.org
-
-For the ARM architecture every CPU node must contain the following properties:
-
-- device_type:  must be "cpu"
-- reg:          property matching the CPU MPIDR[23:0] register bits
-                reg[31:24] bits must be set to 0
-- compatible:   should be one of:
-                "arm,arm1020"
-                "arm,arm1020e"
-                "arm,arm1022"
-                "arm,arm1026"
-                "arm,arm720"
-                "arm,arm740"
-                "arm,arm7tdmi"
-                "arm,arm920"
-                "arm,arm922"
-                "arm,arm925"
-                "arm,arm926"
-                "arm,arm940"
-                "arm,arm946"
-                "arm,arm9tdmi"
-                "arm,cortex-a5"
-                "arm,cortex-a7"
-                "arm,cortex-a8"
-                "arm,cortex-a9"
-                "arm,cortex-a15"
-                "arm,arm1136"
-                "arm,arm1156"
-                "arm,arm1176"
-                "arm,arm11mpcore"
-                "faraday,fa526"
-                "intel,sa110"
-                "intel,sa1100"
-                "marvell,feroceon"
-                "marvell,mohawk"
-                "marvell,xsc3"
-                "marvell,xscale"
-
-Example:
+Bindings for CPU nodes follow the ePAPR v1.1 standard, available from:
+
+https://www.power.org/documentation/epapr-version-1-1/
+
+with updates for 32-bit and 64-bit ARM systems provided in this document.
+
+================================
+Convention used in this document
+================================
+
+This document follows the conventions described in the ePAPR v1.1, with
+the addition:
+
+- square brackets define bitfields, eg reg[7:0] value of the bitfield in
+  the reg property contained in bits 7 down to 0
+
+=====================================
+cpus and cpu node bindings definition
+=====================================
+
+The ARM architecture, in accordance with the ePAPR, requires the cpus and cpu
+nodes to be present and contain the properties described below.
+
+- cpus node
+
+        Description: Container of cpu nodes
+
+        The node name must be "cpus".
+
+        A cpus node must define the following properties:
+
+        - #address-cells
+                Usage: required
+                Value type: <u32>
+
+                Definition depends on ARM architecture version and
+                configuration:
+
+                        # On uniprocessor ARM architectures previous to v7
+                          value must be 1, to enable a simple enumeration
+                          scheme for processors that do not have a HW CPU
+                          identification register.
+                        # On 32-bit ARM 11 MPcore, ARM v7 or later systems
+                          value must be 1, that corresponds to CPUID/MPIDR
+                          registers sizes.
+                        # On ARM v8 64-bit systems value should be set to 2,
+                          that corresponds to the MPIDR_EL1 register size.
+                          If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
+                          in the system, #address-cells can be set to 1, since
+                          MPIDR_EL1[63:32] bits are not used for CPUs
+                          identification.
+        - #size-cells
+                Usage: required
+                Value type: <u32>
+                Definition: must be set to 0
+
+- cpu node
+
+        Description: Describes a CPU in an ARM based system
+
+        PROPERTIES
+
+        - device_type
+                Usage: required
+                Value type: <string>
+                Definition: must be "cpu"
+        - reg
+                Usage and definition depend on ARM architecture version and
+                configuration:
+
+                        # On uniprocessor ARM architectures previous to v7
+                          this property is required and must be set to 0.
+
+                        # On ARM 11 MPcore based systems this property is
+                          required and matches the CPUID[11:0] register bits.
+
+                          Bits [11:0] in the reg cell must be set to
+                          bits [11:0] in CPU ID register.
+
+                          All other bits in the reg cell must be set to 0.
+
+                        # On 32-bit ARM v7 or later systems this property is
+                          required and matches the CPU MPIDR[23:0] register
+                          bits.
+
+                          Bits [23:0] in the reg cell must be set to
+                          bits [23:0] in MPIDR.
+
+                          All other bits in the reg cell must be set to 0.
+
+                        # On ARM v8 64-bit systems this property is required
+                          and matches the MPIDR_EL1 register affinity bits.
+
+                          * If cpus node's #address-cells property is set to 2
+
+                            The first reg cell bits [7:0] must be set to
+                            bits [39:32] of MPIDR_EL1.
+
+                            The second reg cell bits [23:0] must be set to
+                            bits [23:0] of MPIDR_EL1.
+
+                          * If cpus node's #address-cells property is set to 1
+
+                            The reg cell bits [23:0] must be set to bits [23:0]
+                            of MPIDR_EL1.
+
+                          All other bits in the reg cells must be set to 0.
+
+        - compatible:
+                Usage: required
+                Value type: <string>
+                Definition: should be one of:
+                            "arm,arm710t"
+                            "arm,arm720t"
+                            "arm,arm740t"
+                            "arm,arm7ej-s"
+                            "arm,arm7tdmi"
+                            "arm,arm7tdmi-s"
+                            "arm,arm9es"
+                            "arm,arm9ej-s"
+                            "arm,arm920t"
+                            "arm,arm922t"
+                            "arm,arm925"
+                            "arm,arm926e-s"
+                            "arm,arm926ej-s"
+                            "arm,arm940t"
+                            "arm,arm946e-s"
+                            "arm,arm966e-s"
+                            "arm,arm968e-s"
+                            "arm,arm9tdmi"
+                            "arm,arm1020e"
+                            "arm,arm1020t"
+                            "arm,arm1022e"
+                            "arm,arm1026ej-s"
+                            "arm,arm1136j-s"
+                            "arm,arm1136jf-s"
+                            "arm,arm1156t2-s"
+                            "arm,arm1156t2f-s"
+                            "arm,arm1176jzf"
+                            "arm,arm1176jz-s"
+                            "arm,arm1176jzf-s"
+                            "arm,arm11mpcore"
+                            "arm,cortex-a5"
+                            "arm,cortex-a7"
+                            "arm,cortex-a8"
+                            "arm,cortex-a9"
+                            "arm,cortex-a15"
+                            "arm,cortex-a53"
+                            "arm,cortex-a57"
+                            "arm,cortex-m0"
+                            "arm,cortex-m0+"
+                            "arm,cortex-m1"
+                            "arm,cortex-m3"
+                            "arm,cortex-m4"
+                            "arm,cortex-r4"
+                            "arm,cortex-r5"
+                            "arm,cortex-r7"
+                            "faraday,fa526"
+                            "intel,sa110"
+                            "intel,sa1100"
+                            "marvell,feroceon"
+                            "marvell,mohawk"
+                            "marvell,pj4a"
+                            "marvell,pj4b"
+                            "marvell,sheeva-v5"
+                            "qcom,krait"
+                            "qcom,scorpion"
+        - enable-method
+                Value type: <stringlist>
+                Usage and definition depend on ARM architecture version.
+                        # On ARM v8 64-bit this property is required and must
+                          be one of:
+                             "spin-table"
+                             "psci"
+                        # On ARM 32-bit systems this property is optional.
+
+        - cpu-release-addr
+                Usage: required for systems that have an "enable-method"
+                       property value of "spin-table".
+                Value type: <prop-encoded-array>
+                Definition:
+                        # On ARM v8 64-bit systems must be a two cell
+                          property identifying a 64-bit zero-initialised
+                          memory location.
+
+Example 1 (dual-cluster big.LITTLE system 32-bit):
 
         cpus {
                 #size-cells = <0>;
                 #address-cells = <1>;
 
-                CPU0: cpu@0 {
+                cpu@0 {
                         device_type = "cpu";
                         compatible = "arm,cortex-a15";
                         reg = <0x0>;
                 };
 
-                CPU1: cpu@1 {
+                cpu@1 {
                         device_type = "cpu";
                         compatible = "arm,cortex-a15";
                         reg = <0x1>;
                 };
 
-                CPU2: cpu@100 {
+                cpu@100 {
                         device_type = "cpu";
                         compatible = "arm,cortex-a7";
                         reg = <0x100>;
                 };
 
-                CPU3: cpu@101 {
+                cpu@101 {
                         device_type = "cpu";
                         compatible = "arm,cortex-a7";
                         reg = <0x101>;
                 };
         };
+
+Example 2 (Cortex-A8 uniprocessor 32-bit system):
+
+        cpus {
+                #size-cells = <0>;
+                #address-cells = <1>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a8";
+                        reg = <0x0>;
+                };
+        };
+
+Example 3 (ARM 926EJ-S uniprocessor 32-bit system):
+
+        cpus {
+                #size-cells = <0>;
+                #address-cells = <1>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,arm926ej-s";
+                        reg = <0x0>;
+                };
+        };
+
+Example 4 (ARM Cortex-A57 64-bit system):
+
+cpus {
+        #size-cells = <0>;
+        #address-cells = <2>;
+
+        cpu@0 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x0>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@1 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x1>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@100 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x100>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@101 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x101>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@10000 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x10000>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@10001 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x10001>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@10100 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x10100>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@10101 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x10101>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@100000000 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x0>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@100000001 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x1>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@100000100 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x100>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@100000101 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x101>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@100010000 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x10000>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@100010001 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x10001>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@100010100 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x10100>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        cpu@100010101 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x10101>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+};
diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt
index 69ddf9fad2dc..c0c7626fd0ff 100644
--- a/Documentation/devicetree/bindings/arm/l2cc.txt
+++ b/Documentation/devicetree/bindings/arm/l2cc.txt
@@ -16,9 +16,11 @@ Required properties:
      performs the same operation).
         "marvell,"aurora-outer-cache: Marvell Controller designed to be
          compatible with the ARM one with outer cache mode.
-        "bcm,bcm11351-a2-pl310-cache": For Broadcom bcm11351 chipset where an
+        "brcm,bcm11351-a2-pl310-cache": For Broadcom bcm11351 chipset where an
         offset needs to be added to the address before passing down to the L2
         cache controller
+        "bcm,bcm11351-a2-pl310-cache": DEPRECATED by
+                                       "brcm,bcm11351-a2-pl310-cache"
 - cache-unified : Specifies the cache is a unified cache.
 - cache-level : Should be set to 2 for a level 2 cache.
 - reg : Physical base address and size of cache controller's memory mapped
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 6d498c758b45..808c1543b0f8 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -21,7 +21,8 @@ Required properties:
 Optional properties:
 - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module
   during suspend.
-
+- ti,no-reset-on-init: When present, the module should not be reset at init
+- ti,no-idle-on-init: When present, the module should not be idled at init
 
 Example:
 
@@ -59,3 +60,6 @@ Boards:
 
 - AM43x EPOS EVM
   compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43"
+
+- DRA7 EVM:  Software Developement Board for DRA7XX
+  compatible = "ti,dra7-evm", "ti,dra7"
diff --git a/Documentation/devicetree/bindings/arm/ste-u300.txt b/Documentation/devicetree/bindings/arm/ste-u300.txt
index 69b5ab0b5f4b..d11d80006a19 100644
--- a/Documentation/devicetree/bindings/arm/ste-u300.txt
+++ b/Documentation/devicetree/bindings/arm/ste-u300.txt
@@ -22,7 +22,7 @@ This contains the board-specific information.
 - compatible: must be "stericsson,s365".
 - vana15-supply: the regulator supplying the 1.5V to drive the
   board.
-- syscon: a pointer to the syscon node so we can acccess the
+- syscon: a pointer to the syscon node so we can access the
   syscon registers to set the board as self-powered.
 
 Example:
diff --git a/Documentation/devicetree/bindings/arm/topology.txt b/Documentation/devicetree/bindings/arm/topology.txt
new file mode 100644
index 000000000000..4aa20e7a424e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/topology.txt
@@ -0,0 +1,474 @@
+===========================================
+ARM topology binding description
+===========================================
+
+===========================================
+1 - Introduction
+===========================================
+
+In an ARM system, the hierarchy of CPUs is defined through three entities that
+are used to describe the layout of physical CPUs in the system:
+
+- cluster
+- core
+- thread
+
+The cpu nodes (bindings defined in [1]) represent the devices that
+correspond to physical CPUs and are to be mapped to the hierarchy levels.
+
+The bottom hierarchy level sits at core or thread level depending on whether
+symmetric multi-threading (SMT) is supported or not.
+
+For instance in a system where CPUs support SMT, "cpu" nodes represent all
+threads existing in the system and map to the hierarchy level "thread" above.
+In systems where SMT is not supported "cpu" nodes represent all cores present
+in the system and map to the hierarchy level "core" above.
+
+ARM topology bindings allow one to associate cpu nodes with hierarchical groups
+corresponding to the system hierarchy; syntactically they are defined as device
+tree nodes.
+
+The remainder of this document provides the topology bindings for ARM, based
+on the ePAPR standard, available from:
+
+http://www.power.org/documentation/epapr-version-1-1/
+
+If not stated otherwise, whenever a reference to a cpu node phandle is made its
+value must point to a cpu node compliant with the cpu node bindings as
+documented in [1].
+A topology description containing phandles to cpu nodes that are not compliant
+with bindings standardized in [1] is therefore considered invalid.
+
+===========================================
+2 - cpu-map node
+===========================================
+
+The ARM CPU topology is defined within the cpu-map node, which is a direct
+child of the cpus node and provides a container where the actual topology
+nodes are listed.
+
+- cpu-map node
+
+        Usage: Optional - On ARM SMP systems provide CPUs topology to the OS.
+                          ARM uniprocessor systems do not require a topology
+                          description and therefore should not define a
+                          cpu-map node.
+
+        Description: The cpu-map node is just a container node where its
+                     subnodes describe the CPU topology.
+
+        Node name must be "cpu-map".
+
+        The cpu-map node's parent node must be the cpus node.
+
+        The cpu-map node's child nodes can be:
+
+        - one or more cluster nodes
+
+        Any other configuration is considered invalid.
+
+The cpu-map node can only contain three types of child nodes:
+
+- cluster node
+- core node
+- thread node
+
+whose bindings are described in paragraph 3.
+
+The nodes describing the CPU topology (cluster/core/thread) can only be
+defined within the cpu-map node.
+Any other configuration is consider invalid and therefore must be ignored.
+
+===========================================
+2.1 - cpu-map child nodes naming convention
+===========================================
+
+cpu-map child nodes must follow a naming convention where the node name
+must be "clusterN", "coreN", "threadN" depending on the node type (ie
+cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes which
+are siblings within a single common parent node must be given a unique and
+sequential N value, starting from 0).
+cpu-map child nodes which do not share a common parent node can have the same
+name (ie same number N as other cpu-map child nodes at different device tree
+levels) since name uniqueness will be guaranteed by the device tree hierarchy.
+
+===========================================
+3 - cluster/core/thread node bindings
+===========================================
+
+Bindings for cluster/cpu/thread nodes are defined as follows:
+
+- cluster node
+
+         Description: must be declared within a cpu-map node, one node
+                      per cluster. A system can contain several layers of
+                      clustering and cluster nodes can be contained in parent
+                      cluster nodes.
+
+        The cluster node name must be "clusterN" as described in 2.1 above.
+        A cluster node can not be a leaf node.
+
+        A cluster node's child nodes must be:
+
+        - one or more cluster nodes; or
+        - one or more core nodes
+
+        Any other configuration is considered invalid.
+
+- core node
+
+        Description: must be declared in a cluster node, one node per core in
+                     the cluster. If the system does not support SMT, core
+                     nodes are leaf nodes, otherwise they become containers of
+                     thread nodes.
+
+        The core node name must be "coreN" as described in 2.1 above.
+
+        A core node must be a leaf node if SMT is not supported.
+
+        Properties for core nodes that are leaf nodes:
+
+        - cpu
+                Usage: required
+                Value type: <phandle>
+                Definition: a phandle to the cpu node that corresponds to the
+                            core node.
+
+        If a core node is not a leaf node (CPUs supporting SMT) a core node's
+        child nodes can be:
+
+        - one or more thread nodes
+
+        Any other configuration is considered invalid.
+
+- thread node
+
+        Description: must be declared in a core node, one node per thread
+                     in the core if the system supports SMT. Thread nodes are
+                     always leaf nodes in the device tree.
+
+        The thread node name must be "threadN" as described in 2.1 above.
+
+        A thread node must be a leaf node.
+
+        A thread node must contain the following property:
+
+        - cpu
+                Usage: required
+                Value type: <phandle>
+                Definition: a phandle to the cpu node that corresponds to
+                            the thread node.
+
+===========================================
+4 - Example dts
+===========================================
+
+Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters):
+
+cpus {
+        #size-cells = <0>;
+        #address-cells = <2>;
+
+        cpu-map {
+                cluster0 {
+                        cluster0 {
+                                core0 {
+                                        thread0 {
+                                                cpu = <&CPU0>;
+                                        };
+                                        thread1 {
+                                                cpu = <&CPU1>;
+                                        };
+                                };
+
+                                core1 {
+                                        thread0 {
+                                                cpu = <&CPU2>;
+                                        };
+                                        thread1 {
+                                                cpu = <&CPU3>;
+                                        };
+                                };
+                        };
+
+                        cluster1 {
+                                core0 {
+                                        thread0 {
+                                                cpu = <&CPU4>;
+                                        };
+                                        thread1 {
+                                                cpu = <&CPU5>;
+                                        };
+                                };
+
+                                core1 {
+                                        thread0 {
+                                                cpu = <&CPU6>;
+                                        };
+                                        thread1 {
+                                                cpu = <&CPU7>;
+                                        };
+                                };
+                        };
+                };
+
+                cluster1 {
+                        cluster0 {
+                                core0 {
+                                        thread0 {
+                                                cpu = <&CPU8>;
+                                        };
+                                        thread1 {
+                                                cpu = <&CPU9>;
+                                        };
+                                };
+                                core1 {
+                                        thread0 {
+                                                cpu = <&CPU10>;
+                                        };
+                                        thread1 {
+                                                cpu = <&CPU11>;
+                                        };
+                                };
+                        };
+
+                        cluster1 {
+                                core0 {
+                                        thread0 {
+                                                cpu = <&CPU12>;
+                                        };
+                                        thread1 {
+                                                cpu = <&CPU13>;
+                                        };
+                                };
+                                core1 {
+                                        thread0 {
+                                                cpu = <&CPU14>;
+                                        };
+                                        thread1 {
+                                                cpu = <&CPU15>;
+                                        };
+                                };
+                        };
+                };
+        };
+
+        CPU0: cpu@0 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x0>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU1: cpu@1 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x1>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU2: cpu@100 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x100>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU3: cpu@101 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x101>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU4: cpu@10000 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x10000>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU5: cpu@10001 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x10001>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU6: cpu@10100 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x10100>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU7: cpu@10101 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x0 0x10101>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU8: cpu@100000000 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x0>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU9: cpu@100000001 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x1>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU10: cpu@100000100 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x100>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU11: cpu@100000101 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x101>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU12: cpu@100010000 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x10000>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU13: cpu@100010001 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x10001>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU14: cpu@100010100 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x10100>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+
+        CPU15: cpu@100010101 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a57";
+                reg = <0x1 0x10101>;
+                enable-method = "spin-table";
+                cpu-release-addr = <0 0x20000000>;
+        };
+};
+
+Example 2 (ARM 32-bit, dual-cluster, 8-cpu system, no SMT):
+
+cpus {
+        #size-cells = <0>;
+        #address-cells = <1>;
+
+        cpu-map {
+                cluster0 {
+                        core0 {
+                                cpu = <&CPU0>;
+                        };
+                        core1 {
+                                cpu = <&CPU1>;
+                        };
+                        core2 {
+                                cpu = <&CPU2>;
+                        };
+                        core3 {
+                                cpu = <&CPU3>;
+                        };
+                };
+
+                cluster1 {
+                        core0 {
+                                cpu = <&CPU4>;
+                        };
+                        core1 {
+                                cpu = <&CPU5>;
+                        };
+                        core2 {
+                                cpu = <&CPU6>;
+                        };
+                        core3 {
+                                cpu = <&CPU7>;
+                        };
+                };
+        };
+
+        CPU0: cpu@0 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a15";
+                reg = <0x0>;
+        };
+
+        CPU1: cpu@1 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a15";
+                reg = <0x1>;
+        };
+
+        CPU2: cpu@2 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a15";
+                reg = <0x2>;
+        };
+
+        CPU3: cpu@3 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a15";
+                reg = <0x3>;
+        };
+
+        CPU4: cpu@100 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a7";
+                reg = <0x100>;
+        };
+
+        CPU5: cpu@101 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a7";
+                reg = <0x101>;
+        };
+
+        CPU6: cpu@102 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a7";
+                reg = <0x102>;
+        };
+
+        CPU7: cpu@103 {
+                device_type = "cpu";
+                compatible = "arm,cortex-a7";
+                reg = <0x103>;
+        };
+};
+
+===============================================================================
+[1] ARM Linux kernel documentation
+    Documentation/devicetree/bindings/arm/cpus.txt
diff --git a/Documentation/devicetree/bindings/arm/vexpress-scc.txt b/Documentation/devicetree/bindings/arm/vexpress-scc.txt
new file mode 100644
index 000000000000..ae5043e42e5d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vexpress-scc.txt
@@ -0,0 +1,33 @@
+ARM Versatile Express Serial Configuration Controller
+-----------------------------------------------------
+
+Test chips for ARM Versatile Express platform implement SCC (Serial
+Configuration Controller) interface, used to set initial conditions
+for the test chip.
+
+In some cases its registers are also mapped in normal address space
+and can be used to obtain runtime information about the chip internals
+(like silicon temperature sensors) and as interface to other subsystems
+like platform configuration control and power management.
+
+Required properties:
+
+- compatible value: "arm,vexpress-scc,<model>", "arm,vexpress-scc";
+                    where <model> is the full tile model name (as used
+                    in the tile's Technical Reference Manual),
+                    eg. for Coretile Express A15x2 A7x3 (V2P-CA15_A7):
+        compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
+
+Optional properties:
+
+- reg: when the SCC is memory mapped, physical address and size of the
+       registers window
+- interrupts: when the SCC can generate a system-level interrupt
+
+Example:
+
+        scc@7fff0000 {
+                compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
+                reg = <0 0x7fff0000 0 0x1000>;
+                interrupts = <0 95 4>;
+        };
diff --git a/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt b/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
index 9cf3f25544c7..5580e9c4bd85 100644
--- a/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
+++ b/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
@@ -32,8 +32,8 @@ numbers - see motherboard's TRM for more details.
 The node describing a config device must refer to the sysreg node via
 "arm,vexpress,config-bridge" phandle (can be also defined in the node's
 parent) and relies on the board topology properties - see main vexpress
-node documentation for more details. It must must also define the
-following property:
+node documentation for more details. It must also define the following
+property:
 - arm,vexpress-sysreg,func : must contain two cells:
   - first cell defines function number (eg. 1 for clock generator,
     2 for voltage regulators etc.)
diff --git a/Documentation/devicetree/bindings/arm/vic.txt b/Documentation/devicetree/bindings/arm/vic.txt
index 266716b23437..dd527216c5fb 100644
--- a/Documentation/devicetree/bindings/arm/vic.txt
+++ b/Documentation/devicetree/bindings/arm/vic.txt
@@ -18,6 +18,15 @@ Required properties:
 Optional properties:
 
 - interrupts : Interrupt source for parent controllers if the VIC is nested.
+- valid-mask : A one cell big bit mask of valid interrupt sources. Each bit
+  represents single interrupt source, starting from source 0 at LSb and ending
+  at source 31 at MSb. A bit that is set means that the source is wired and
+  clear means otherwise. If unspecified, defaults to all valid.
+- valid-wakeup-mask : A one cell big bit mask of interrupt sources that can be
+  configured as wake up source for the system. Order of bits is the same as for
+  valid-mask property. A set bit means that this interrupt source can be
+  configured as a wake up source for the system. If unspecied, defaults to all
+  interrupt sources configurable as wake up sources.
 
 Example:
 
@@ -26,4 +35,7 @@ Example:
                 interrupt-controller;
                 #interrupt-cells = <1>;
                 reg = <0x60000 0x1000>;
+
+                valid-mask = <0xffffff7f>;
+                valid-wakeup-mask = <0x0000ff7f>;
         };
diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 3ec0c5c4f0e9..89de1564950c 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -4,27 +4,17 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
 Each SATA controller should have its own node.
 
 Required properties:
-- compatible        : compatible list, contains "calxeda,hb-ahci" or "snps,spear-ahci"
+- compatible        : compatible list, contains "snps,spear-ahci"
 - interrupts        : <interrupt mapping for SATA IRQ>
 - reg               : <registers mapping>
 
 Optional properties:
-- calxeda,port-phys: phandle-combophy and lane assignment, which maps each
-                        SATA port to a combophy and a lane within that
-                        combophy
-- calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
-                        which indicates that the driver supports SGPIO
-                        indicator lights using the indicated GPIOs
-- calxeda,led-order : a u32 array that map port numbers to offsets within the
-                        SGPIO bitstream.
 - dma-coherent      : Present if dma operations are coherent
 
 Example:
         sata@ffe08000 {
-                compatible = "calxeda,hb-ahci";
-                reg = <0xffe08000 0x1000>;
-                interrupts = <115>;
-                calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1
-                                        &combophy0 2 &combophy0 3>;
+                compatible = "snps,spear-ahci";
+                reg = <0xffe08000 0x1000>;
+                interrupts = <115>;
 
         };
diff --git a/Documentation/devicetree/bindings/ata/sata_highbank.txt b/Documentation/devicetree/bindings/ata/sata_highbank.txt
new file mode 100644
index 000000000000..aa83407cb7a4
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/sata_highbank.txt
@@ -0,0 +1,44 @@
+* Calxeda AHCI SATA Controller
+
+SATA nodes are defined to describe on-chip Serial ATA controllers.
+The Calxeda SATA controller mostly conforms to the AHCI interface
+with some special extensions to add functionality.
+Each SATA controller should have its own node.
+
+Required properties:
+- compatible        : compatible list, contains "calxeda,hb-ahci"
+- interrupts        : <interrupt mapping for SATA IRQ>
+- reg               : <registers mapping>
+
+Optional properties:
+- dma-coherent      : Present if dma operations are coherent
+- calxeda,port-phys : phandle-combophy and lane assignment, which maps each
+                        SATA port to a combophy and a lane within that
+                        combophy
+- calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
+                        which indicates that the driver supports SGPIO
+                        indicator lights using the indicated GPIOs
+- calxeda,led-order : a u32 array that map port numbers to offsets within the
+                        SGPIO bitstream.
+- calxeda,tx-atten  : a u32 array that contains TX attenuation override
+                        codes, one per port. The upper 3 bytes are always
+                        0 and thus ignored.
+- calxeda,pre-clocks : a u32 that indicates the number of additional clock
+                        cycles to transmit before sending an SGPIO pattern
+- calxeda,post-clocks: a u32 that indicates the number of additional clock
+                        cycles to transmit after sending an SGPIO pattern
+
+Example:
+        sata@ffe08000 {
+                compatible = "calxeda,hb-ahci";
+                reg = <0xffe08000 0x1000>;
+                interrupts = <115>;
+                dma-coherent;
+                calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1
+                                        &combophy0 2 &combophy0 3>;
+                calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
+                calxeda,led-order = <4 0 1 2 3>;
+                calxeda,tx-atten = <0xff 22 0xff 0xff 23>;
+                calxeda,pre-clocks = <10>;
+                calxeda,post-clocks = <0>;
+        };
diff --git a/Documentation/devicetree/bindings/bus/imx-weim.txt b/Documentation/devicetree/bindings/bus/imx-weim.txt
index cedc2a9c4785..0fd76c405208 100644
--- a/Documentation/devicetree/bindings/bus/imx-weim.txt
+++ b/Documentation/devicetree/bindings/bus/imx-weim.txt
@@ -8,7 +8,7 @@ The actual devices are instantiated from the child nodes of a WEIM node.
 
 Required properties:
 
- - compatible:          Should be set to "fsl,imx6q-weim"
+ - compatible:          Should be set to "fsl,<soc>-weim"
  - reg:                 A resource specifier for the register space
                         (see the example below)
  - clocks:              the clock, see the example below.
@@ -21,11 +21,18 @@ Required properties:
 
 Timing property for child nodes. It is mandatory, not optional.
 
- - fsl,weim-cs-timing:  The timing array, contains 6 timing values for the
+ - fsl,weim-cs-timing:  The timing array, contains timing values for the
                         child node. We can get the CS index from the child
-                        node's "reg" property. This property contains the values
-                        for the registers EIM_CSnGCR1, EIM_CSnGCR2, EIM_CSnRCR1,
-                        EIM_CSnRCR2, EIM_CSnWCR1, EIM_CSnWCR2 in this order.
+                        node's "reg" property. The number of registers depends
+                        on the selected chip.
+                        For i.MX1, i.MX21 ("fsl,imx1-weim") there are two
+                        registers: CSxU, CSxL.
+                        For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")
+                        there are three registers: CSCRxU, CSCRxL, CSCRxA.
+                        For i.MX50, i.MX53 ("fsl,imx50-weim"),
+                        i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim")
+                        there are six registers: CSxGCR1, CSxGCR2, CSxRCR1,
+                        CSxRCR2, CSxWCR1, CSxWCR2.
 
 Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM:
 
diff --git a/Documentation/devicetree/bindings/bus/mvebu-mbus.txt b/Documentation/devicetree/bindings/bus/mvebu-mbus.txt
new file mode 100644
index 000000000000..7586fb68c072
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/mvebu-mbus.txt
@@ -0,0 +1,276 @@
+
+* Marvell MBus
+
+Required properties:
+
+- compatible:    Should be set to one of the following:
+                 marvell,armada370-mbus
+                 marvell,armadaxp-mbus
+                 marvell,armada370-mbus
+                 marvell,armadaxp-mbus
+                 marvell,kirkwood-mbus
+                 marvell,dove-mbus
+                 marvell,orion5x-88f5281-mbus
+                 marvell,orion5x-88f5182-mbus
+                 marvell,orion5x-88f5181-mbus
+                 marvell,orion5x-88f6183-mbus
+                 marvell,mv78xx0-mbus
+
+- address-cells: Must be '2'. The first cell for the MBus ID encoding,
+                 the second cell for the address offset within the window.
+
+- size-cells:    Must be '1'.
+
+- ranges:        Must be set up to provide a proper translation for each child.
+                 See the examples below.
+
+- controller:    Contains a single phandle referring to the MBus controller
+                 node. This allows to specify the node that contains the
+                 registers that control the MBus, which is typically contained
+                 within the internal register window (see below).
+
+Optional properties:
+
+- pcie-mem-aperture:    This optional property contains the aperture for
+                        the memory region of the PCIe driver.
+                        If it's defined, it must encode the base address and
+                        size for the address decoding windows allocated for
+                        the PCIe memory region.
+
+- pcie-io-aperture:     Just as explained for the above property, this
+                        optional property contains the aperture for the
+                        I/O region of the PCIe driver.
+
+* Marvell MBus controller
+
+Required properties:
+
+- compatible:   Should be set to "marvell,mbus-controller".
+
+- reg:          Device's register space.
+                Two entries are expected (see the examples below):
+                the first one controls the devices decoding window and
+                the second one controls the SDRAM decoding window.
+
+Example:
+
+        soc {
+                compatible = "marvell,armada370-mbus", "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                controller = <&mbusc>;
+                pcie-mem-aperture = <0xe0000000 0x8000000>;
+                pcie-io-aperture  = <0xe8000000 0x100000>;
+
+                internal-regs {
+                        compatible = "simple-bus";
+
+                        mbusc: mbus-controller@20000 {
+                                compatible = "marvell,mbus-controller";
+                                reg = <0x20000 0x100>, <0x20180 0x20>;
+                        };
+
+                        /* more children ...*/
+                };
+        };
+
+** MBus address decoding window specification
+
+The MBus children address space is comprised of two cells: the first one for
+the window ID and the second one for the offset within the window.
+In order to allow to describe valid and non-valid window entries, the
+following encoding is used:
+
+  0xSIAA0000 0x00oooooo
+
+Where:
+
+  S = 0x0 for a MBus valid window
+  S = 0xf for a non-valid window (see below)
+
+If S = 0x0, then:
+
+   I = 4-bit window target ID
+  AA = windpw attribute
+
+If S = 0xf, then:
+
+   I = don't care
+   AA = 1 for internal register
+
+Following the above encoding, for each ranges entry for a MBus valid window
+(S = 0x0), an address decoding window is allocated. On the other side,
+entries for translation that do not correspond to valid windows (S = 0xf)
+are skipped.
+
+        soc {
+                compatible = "marvell,armada370-mbus", "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                controller = <&mbusc>;
+
+                ranges = <0xf0010000 0 0 0xd0000000 0x100000
+                          0x01e00000 0 0 0xfff00000 0x100000>;
+
+                bootrom {
+                        compatible = "marvell,bootrom";
+                        reg = <0x01e00000 0 0x100000>;
+                };
+
+                /* other children */
+                ...
+
+                internal-regs {
+                        compatible = "simple-bus";
+                        ranges = <0 0xf0010000 0 0x100000>;
+
+                        mbusc: mbus-controller@20000 {
+                                compatible = "marvell,mbus-controller";
+                                reg = <0x20000 0x100>, <0x20180 0x20>;
+                        };
+
+                        /* more children ...*/
+                };
+        };
+
+In the shown example, the translation entry in the 'ranges' property is what
+makes the MBus driver create a static decoding window for the corresponding
+given child device. Note that the binding does not require child nodes to be
+present. Of course, child nodes are needed to probe the devices.
+
+Since each window is identified by its target ID and attribute ID there's
+a special macro that can be use to simplify the translation entries:
+
+#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
+
+Using this macro, the above example would be:
+
+        soc {
+                compatible = "marvell,armada370-mbus", "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                controller = <&mbusc>;
+
+                ranges = < MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
+                           MBUS_ID(0x01, 0xe0) 0 0 0xfff00000 0x100000>;
+
+                bootrom {
+                        compatible = "marvell,bootrom";
+                        reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>;
+                };
+
+                /* other children */
+                ...
+
+                internal-regs {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
+
+                        mbusc: mbus-controller@20000 {
+                                compatible = "marvell,mbus-controller";
+                                reg = <0x20000 0x100>, <0x20180 0x20>;
+                        };
+
+                        /* other children */
+                        ...
+                };
+        };
+
+
+** About the window base address
+
+Remember the MBus controller allows a great deal of flexibility for choosing
+the decoding window base address. When planning the device tree layout it's
+possible to choose any address as the base address, provided of course there's
+a region large enough available, and with the required alignment.
+
+Yet in other words: there's nothing preventing us from setting a base address
+of 0xf0000000, or 0xd0000000 for the NOR device shown above, if such region is
+unused.
+
+** Window allocation policy
+
+The mbus-node ranges property defines a set of mbus windows that are expected
+to be set by the operating system and that are guaranteed to be free of overlaps
+with one another or with the system memory ranges.
+
+Each entry in the property refers to exactly one window. If the operating system
+choses to use a different set of mbus windows, it must ensure that any address
+translations performed from downstream devices are adapted accordingly.
+
+The operating system may insert additional mbus windows that do not conflict
+with the ones listed in the ranges, e.g. for mapping PCIe devices.
+As a special case, the internal register window must be set up by the boot
+loader at the address listed in the ranges property, since access to that region
+is needed to set up the other windows.
+
+** Example
+
+See the example below, where a more complete device tree is shown:
+
+        soc {
+                compatible = "marvell,armadaxp-mbus", "simple-bus";
+                controller = <&mbusc>;
+
+                ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000   /* internal-regs */
+                          MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
+                          MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000>;
+
+                bootrom {
+                        compatible = "marvell,bootrom";
+                        reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
+                };
+
+                devbus-bootcs {
+                        status = "okay";
+                        ranges = <0 MBUS_ID(0x01, 0x2f) 0 0x8000000>;
+
+                        /* NOR */
+                        nor {
+                                compatible = "cfi-flash";
+                                reg = <0 0x8000000>;
+                                bank-width = <2>;
+                        };
+                };
+
+                pcie-controller {
+                        compatible = "marvell,armada-xp-pcie";
+                        status = "okay";
+                        device_type = "pci";
+
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+
+                        ranges =
+                               <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000   /* Port 0.0 registers */
+                                0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000   /* Port 2.0 registers */
+                                0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000   /* Port 0.1 registers */
+                                0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000   /* Port 0.2 registers */
+                                0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000   /* Port 0.3 registers */
+                                0x82000800 0 0xe0000000 MBUS_ID(0x04, 0xe8) 0xe0000000 0 0x08000000 /* Port 0.0 MEM */
+                                0x81000800 0 0          MBUS_ID(0x04, 0xe0) 0xe8000000 0 0x00100000 /* Port 0.0 IO */>;
+
+
+                        pcie@1,0 {
+                                /* Port 0, Lane 0 */
+                                status = "okay";
+                        };
+                };
+
+                internal-regs {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
+
+                        mbusc: mbus-controller@20000 {
+                                reg = <0x20000 0x100>, <0x20180 0x20>;
+                        };
+
+                        interrupt-controller@20000 {
+                              reg = <0x20a00 0x2d0>, <0x21070 0x58>;
+                        };
+                };
+        };
diff --git a/Documentation/devicetree/bindings/c6x/dscr.txt b/Documentation/devicetree/bindings/c6x/dscr.txt
index d847758f2b20..b0e97144cfb1 100644
--- a/Documentation/devicetree/bindings/c6x/dscr.txt
+++ b/Documentation/devicetree/bindings/c6x/dscr.txt
@@ -5,7 +5,7 @@ TI C6X SoCs contain a region of miscellaneous registers which provide various
 function for SoC control or status. Details vary considerably among from SoC
 to SoC with no two being alike.
 
-In general, the Device State Configuraion Registers (DSCR) will provide one or
+In general, the Device State Configuration Registers (DSCR) will provide one or
 more configuration registers often protected by a lock register where one or
 more key values must be written to a lock register in order to unlock the
 configuration register for writes. These configuration register may be used to
diff --git a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
index a1201802f90d..75e2e1999f87 100644
--- a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
+++ b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
@@ -2,7 +2,7 @@
 
 The Samsung Audio Subsystem clock controller generates and supplies clocks
 to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock
-binding described here is applicable to all SoC's in Exynos family.
+binding described here is applicable to all SoCs in Exynos family.
 
 Required Properties:
 
diff --git a/Documentation/devicetree/bindings/clock/efm32-clock.txt b/Documentation/devicetree/bindings/clock/efm32-clock.txt
new file mode 100644
index 000000000000..263d293f6a10
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/efm32-clock.txt
@@ -0,0 +1,11 @@
+* Clock bindings for Energy Micro efm32 Giant Gecko's Clock Management Unit
+
+Required properties:
+- compatible: Should be "efm32gg,cmu"
+- reg: Base address and length of the register set
+- interrupts: Interrupt used by the CMU
+- #clock-cells: Should be <1>
+
+The clock consumer should specify the desired clock by having the clock ID in
+its "clocks" phandle cell. The header efm32-clk.h contains a list of available
+IDs.
diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
index 14d5c2af26f4..c6bf8a6c8f52 100644
--- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
@@ -236,6 +236,7 @@ Exynos4 SoC and this is specified where applicable.
   spi0_isp_sclk       380     Exynos4x12
   spi1_isp_sclk       381     Exynos4x12
   uart_isp_sclk       382     Exynos4x12
+  tmu_apbif           383
 
                 [Mux Clocks]
 
diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
index 781a6276adf7..24765c146e31 100644
--- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
@@ -59,6 +59,9 @@ clock which they consume.
   sclk_spi0             154
   sclk_spi1             155
   sclk_spi2             156
+  div_i2s1              157
+  div_i2s2              158
+  sclk_hdmiphy          159
 
 
    [Peripheral Clock Gates]
@@ -154,7 +157,16 @@ clock which they consume.
   dsim0                 341
   dp                    342
   mixer                 343
-  hdmi                  345
+  hdmi                  344
+  g2d                   345
+
+
+   [Clock Muxes]
+
+  Clock                 ID
+  ----------------------------
+  mout_hdmi             1024
+
 
 Example 1: An example of a clock controller node is listed below.
 
diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
index 9bcc4b1bff51..32aa34ecad36 100644
--- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
@@ -59,6 +59,7 @@ clock which they consume.
   sclk_pwm              155
   sclk_gscl_wa          156
   sclk_gscl_wb          157
+  sclk_hdmiphy          158
 
    [Peripheral Clock Gates]
 
@@ -179,6 +180,17 @@ clock which they consume.
   fimc_lite3            495
   aclk_g3d              500
   g3d                   501
+  smmu_mixer            502
+
+  Mux                   ID
+  ----------------------------
+
+  mout_hdmi             640
+
+  Divider               ID
+  ----------------------------
+
+  dout_pixel            768
 
 Example 1: An example of a clock controller node is listed below.
 
diff --git a/Documentation/devicetree/bindings/clock/imx5-clock.txt b/Documentation/devicetree/bindings/clock/imx5-clock.txt
index f46f5625d8ad..4c029a8739d3 100644
--- a/Documentation/devicetree/bindings/clock/imx5-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx5-clock.txt
@@ -197,6 +197,7 @@ clocks and IDs.
         spdif0_gate             183
         spdif1_gate             184
         spdif_ipg_gate          185
+        ocram                   186
 
 Examples (for mx53):
 
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index a0e104f0527e..6aab72bf67ea 100644
--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
@@ -209,6 +209,17 @@ clocks and IDs.
         pll5_post_div           194
         pll5_video_div          195
         eim_slow                196
+        spdif                   197
+        cko2_sel                198
+        cko2_podf               199
+        cko2                    200
+        cko                     201
+        vdoa                    202
+        pll4_audio_div          203
+        lvds1_sel               204
+        lvds2_sel               205
+        lvds1_gate              206
+        lvds2_gate              207
 
 Examples:
 
diff --git a/Documentation/devicetree/bindings/clock/keystone-gate.txt b/Documentation/devicetree/bindings/clock/keystone-gate.txt
new file mode 100644
index 000000000000..c5aa187026e3
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/keystone-gate.txt
@@ -0,0 +1,29 @@
+Status: Unstable - ABI compatibility may be broken in the future
+
+Binding for Keystone gate control driver which uses PSC controller IP.
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be "ti,keystone,psc-clock".
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : parent clock phandle
+- reg : psc control and domain address address space
+- reg-names : psc control and domain registers
+- domain-id : psc domain id needed to check the transition state register
+
+Optional properties:
+- clock-output-names : From common clock binding to override the
+                        default output clock name
+Example:
+        clkusb: clkusb {
+                #clock-cells = <0>;
+                compatible = "ti,keystone,psc-clock";
+                clocks = <&chipclk16>;
+                clock-output-names = "usb";
+                reg = <0x02350008 0xb00>, <0x02350000 0x400>;
+                reg-names = "control", "domain";
+                domain-id = <0>;
+        };
diff --git a/Documentation/devicetree/bindings/clock/keystone-pll.txt b/Documentation/devicetree/bindings/clock/keystone-pll.txt
new file mode 100644
index 000000000000..12bd72605a31
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/keystone-pll.txt
@@ -0,0 +1,84 @@
+Status: Unstable - ABI compatibility may be broken in the future
+
+Binding for keystone PLLs. The main PLL IP typically has a multiplier,
+a divider and a post divider. The additional PLL IPs like ARMPLL, DDRPLL
+and PAPLL are controlled by the memory mapped register where as the Main
+PLL is controlled by a PLL controller registers along with memory mapped
+registers.
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- #clock-cells : from common clock binding; shall be set to 0.
+- compatible : shall be "ti,keystone,main-pll-clock" or "ti,keystone,pll-clock"
+- clocks : parent clock phandle
+- reg - pll control0 and pll multipler registers
+- reg-names : control and multiplier. The multiplier is applicable only for
+                main pll clock
+- fixed-postdiv : fixed post divider value
+
+Example:
+        mainpllclk: mainpllclk@2310110 {
+                #clock-cells = <0>;
+                compatible = "ti,keystone,main-pll-clock";
+                clocks = <&refclkmain>;
+                reg = <0x02620350 4>, <0x02310110 4>;
+                reg-names = "control", "multiplier";
+                fixed-postdiv = <2>;
+        };
+
+        papllclk: papllclk@2620358 {
+                #clock-cells = <0>;
+                compatible = "ti,keystone,pll-clock";
+                clocks = <&refclkmain>;
+                clock-output-names = "pa-pll-clk";
+                reg = <0x02620358 4>;
+                reg-names = "control";
+                fixed-postdiv = <6>;
+        };
+
+Required properties:
+- #clock-cells : from common clock binding; shall be set to 0.
+- compatible : shall be "ti,keystone,pll-mux-clock"
+- clocks : link phandles of parent clocks
+- reg - pll mux register
+- bit-shift : number of bits to shift the bit-mask
+- bit-mask : arbitrary bitmask for programming the mux
+
+Optional properties:
+- clock-output-names : From common clock binding.
+
+Example:
+        mainmuxclk: mainmuxclk@2310108 {
+                #clock-cells = <0>;
+                compatible = "ti,keystone,pll-mux-clock";
+                clocks = <&mainpllclk>, <&refclkmain>;
+                reg = <0x02310108 4>;
+                bit-shift = <23>;
+                bit-mask = <1>;
+                clock-output-names = "mainmuxclk";
+        };
+
+Required properties:
+- #clock-cells : from common clock binding; shall be set to 0.
+- compatible : shall be "ti,keystone,pll-divider-clock"
+- clocks : parent clock phandle
+- reg - pll mux register
+- bit-shift : number of bits to shift the bit-mask
+- bit-mask : arbitrary bitmask for programming the divider
+
+Optional properties:
+- clock-output-names : From common clock binding.
+
+Example:
+        gemtraceclk: gemtraceclk@2310120 {
+                #clock-cells = <0>;
+                compatible = "ti,keystone,pll-divider-clock";
+                clocks = <&mainmuxclk>;
+                reg = <0x02310120 4>;
+                bit-shift = <0>;
+                bit-mask = <8>;
+                clock-output-names = "gemtraceclk";
+        };
diff --git a/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt
new file mode 100644
index 000000000000..c62391fc0e39
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt
@@ -0,0 +1,19 @@
+* Core Divider Clock bindings for Marvell MVEBU SoCs
+
+The following is a list of provided IDs and clock names on Armada 370/XP:
+ 0 = nand (NAND clock)
+
+Required properties:
+- compatible : must be "marvell,armada-370-corediv-clock"
+- reg : must be the register address of Core Divider control register
+- #clock-cells : from common clock binding; shall be set to 1
+- clocks : must be set to the parent's phandle
+
+Example:
+
+corediv_clk: corediv-clocks@18740 {
+        compatible = "marvell,armada-370-corediv-clock";
+        reg = <0x18740 0xc>;
+        #clock-cells = <1>;
+        clocks = <&pll>;
+};
diff --git a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
index cffc93d97f54..fc2910fa7e45 100644
--- a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
+++ b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
@@ -1,10 +1,10 @@
-* Gated Clock bindings for Marvell Orion SoCs
+* Gated Clock bindings for Marvell EBU SoCs
 
-Marvell Dove and Kirkwood allow some peripheral clocks to be gated to save
-some power. The clock consumer should specify the desired clock by having
-the clock ID in its "clocks" phandle cell. The clock ID is directly mapped to
-the corresponding clock gating control bit in HW to ease manual clock lookup
-in datasheet.
+Marvell Armada 370/XP, Dove and Kirkwood allow some peripheral clocks to be
+gated to save some power. The clock consumer should specify the desired clock
+by having the clock ID in its "clocks" phandle cell. The clock ID is directly
+mapped to the corresponding clock gating control bit in HW to ease manual clock
+lookup in datasheet.
 
 The following is a list of provided IDs for Armada 370:
 ID      Clock   Peripheral
@@ -94,6 +94,8 @@ ID	Clock	Peripheral
 
 Required properties:
 - compatible : shall be one of the following:
+        "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
+        "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
         "marvell,dove-gating-clock" - for Dove SoC clock gating
         "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
 - reg : shall be the register address of the Clock Gating Control register
diff --git a/Documentation/devicetree/bindings/clock/samsung,s3c64xx-clock.txt b/Documentation/devicetree/bindings/clock/samsung,s3c64xx-clock.txt
new file mode 100644
index 000000000000..fa171dc4bd3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/samsung,s3c64xx-clock.txt
@@ -0,0 +1,77 @@
+* Samsung S3C64xx Clock Controller
+
+The S3C64xx clock controller generates and supplies clock to various controllers
+within the SoC. The clock binding described here is applicable to all SoCs in
+the S3C64xx family.
+
+Required Properties:
+
+- compatible: should be one of the following.
+  - "samsung,s3c6400-clock" - controller compatible with S3C6400 SoC.
+  - "samsung,s3c6410-clock" - controller compatible with S3C6410 SoC.
+
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+- #clock-cells: should be 1.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. Some of the clocks are available only
+on a particular S3C64xx SoC and this is specified where applicable.
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/samsung,s3c64xx-clock.h header and can be used in device
+tree sources.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - "fin_pll" - PLL input clock (xtal/extclk) - required,
+ - "xusbxti" - USB xtal - required,
+ - "iiscdclk0" - I2S0 codec clock - optional,
+ - "iiscdclk1" - I2S1 codec clock - optional,
+ - "iiscdclk2" - I2S2 codec clock - optional,
+ - "pcmcdclk0" - PCM0 codec clock - optional,
+ - "pcmcdclk1" - PCM1 codec clock - optional, only S3C6410.
+
+Example: Clock controller node:
+
+        clock: clock-controller@7e00f000 {
+                compatible = "samsung,s3c6410-clock";
+                reg = <0x7e00f000 0x1000>;
+                #clock-cells = <1>;
+        };
+
+Example: Required external clocks:
+
+        fin_pll: clock-fin-pll {
+                compatible = "fixed-clock";
+                clock-output-names = "fin_pll";
+                clock-frequency = <12000000>;
+                #clock-cells = <0>;
+        };
+
+        xusbxti: clock-xusbxti {
+                compatible = "fixed-clock";
+                clock-output-names = "xusbxti";
+                clock-frequency = <48000000>;
+                #clock-cells = <0>;
+        };
+
+Example: UART controller node that consumes the clock generated by the clock
+  controller (refer to the standard clock bindings for information about
+  "clocks" and "clock-names" properties):
+
+                uart0: serial@7f005000 {
+                        compatible = "samsung,s3c6400-uart";
+                        reg = <0x7f005000 0x100>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <5>;
+                        clock-names = "uart", "clk_uart_baud2",
+                                        "clk_uart_baud3";
+                        clocks = <&clock PCLK_UART0>, <&clocks PCLK_UART0>,
+                                        <&clock SCLK_UART>;
+                        status = "disabled";
+                };
diff --git a/Documentation/devicetree/bindings/clock/st,nomadik.txt b/Documentation/devicetree/bindings/clock/st,nomadik.txt
index 7fc09773de46..40e0cf1f7b99 100644
--- a/Documentation/devicetree/bindings/clock/st,nomadik.txt
+++ b/Documentation/devicetree/bindings/clock/st,nomadik.txt
@@ -17,7 +17,7 @@ Optional properties for the SRC node:
 - disable-mxtal: if present this will disable the MXTALO,
   i.e. the driver output for the main (~19.2 MHz) chrystal,
   if the board has its own circuitry for providing this
-  osciallator
+  oscillator
 
 
 PLL nodes: these nodes represent the two PLLs on the system,
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index d495521a79d2..91a748fed13d 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -8,19 +8,31 @@ Required properties:
 - compatible : shall be one of the following:
         "allwinner,sun4i-osc-clk" - for a gatable oscillator
         "allwinner,sun4i-pll1-clk" - for the main PLL clock
+        "allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
         "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock
         "allwinner,sun4i-axi-clk" - for the AXI clock
         "allwinner,sun4i-axi-gates-clk" - for the AXI gates
         "allwinner,sun4i-ahb-clk" - for the AHB clock
         "allwinner,sun4i-ahb-gates-clk" - for the AHB gates on A10
         "allwinner,sun5i-a13-ahb-gates-clk" - for the AHB gates on A13
+        "allwinner,sun5i-a10s-ahb-gates-clk" - for the AHB gates on A10s
+        "allwinner,sun7i-a20-ahb-gates-clk" - for the AHB gates on A20
+        "allwinner,sun6i-a31-ahb1-mux-clk" - for the AHB1 multiplexer on A31
+        "allwinner,sun6i-a31-ahb1-gates-clk" - for the AHB1 gates on A31
         "allwinner,sun4i-apb0-clk" - for the APB0 clock
         "allwinner,sun4i-apb0-gates-clk" - for the APB0 gates on A10
         "allwinner,sun5i-a13-apb0-gates-clk" - for the APB0 gates on A13
+        "allwinner,sun5i-a10s-apb0-gates-clk" - for the APB0 gates on A10s
+        "allwinner,sun7i-a20-apb0-gates-clk" - for the APB0 gates on A20
         "allwinner,sun4i-apb1-clk" - for the APB1 clock
         "allwinner,sun4i-apb1-mux-clk" - for the APB1 clock muxing
         "allwinner,sun4i-apb1-gates-clk" - for the APB1 gates on A10
         "allwinner,sun5i-a13-apb1-gates-clk" - for the APB1 gates on A13
+        "allwinner,sun5i-a10s-apb1-gates-clk" - for the APB1 gates on A10s
+        "allwinner,sun6i-a31-apb1-gates-clk" - for the APB1 gates on A31
+        "allwinner,sun7i-a20-apb1-gates-clk" - for the APB1 gates on A20
+        "allwinner,sun6i-a31-apb2-div-clk" - for the APB2 gates on A31
+        "allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
 
 Required properties for all clocks:
 - reg : shall be the control register address for the clock.
@@ -33,8 +45,8 @@ Additionally, "allwinner,*-gates-clk" clocks require:
 
 Clock consumers should specify the desired clocks they use with a
 "clocks" phandle cell. Consumers that are using a gated clock should
-provide an additional ID in their clock property. The values of this
-ID are documented in sunxi/<soc>-gates.txt.
+provide an additional ID in their clock property. This ID is the
+offset of the bit controlling this particular gate in the register.
 
 For example:
 
diff --git a/Documentation/devicetree/bindings/clock/sunxi/sun4i-a10-gates.txt b/Documentation/devicetree/bindings/clock/sunxi/sun4i-a10-gates.txt
deleted file mode 100644
index 6a03475bbfe2..000000000000
--- a/Documentation/devicetree/bindings/clock/sunxi/sun4i-a10-gates.txt
+++ /dev/null
@@ -1,93 +0,0 @@
-Gate clock outputs
-------------------
-
-  * AXI gates ("allwinner,sun4i-axi-gates-clk")
-
-    DRAM                                        0
-
-  * AHB gates ("allwinner,sun4i-ahb-gates-clk")
-
-    USB0                                        0
-    EHCI0                                       1
-    OHCI0                                       2*
-    EHCI1                                       3
-    OHCI1                                       4*
-    SS                                          5
-    DMA                                         6
-    BIST                                        7
-    MMC0                                        8
-    MMC1                                        9
-    MMC2                                        10
-    MMC3                                        11
-    MS                                          12**
-    NAND                                        13
-    SDRAM                                       14
-
-    ACE                                         16
-    EMAC                                        17
-    TS                                          18
-
-    SPI0                                        20
-    SPI1                                        21
-    SPI2                                        22
-    SPI3                                        23
-    PATA                                        24
-    SATA                                        25**
-    GPS                                         26*
-
-    VE                                          32
-    TVD                                         33
-    TVE0                                        34
-    TVE1                                        35
-    LCD0                                        36
-    LCD1                                        37
-
-    CSI0                                        40
-    CSI1                                        41
-
-    HDMI                                        43
-    DE_BE0                                      44
-    DE_BE1                                      45
-    DE_FE1                                      46
-    DE_FE1                                      47
-
-    MP                                          50
-
-    MALI400                                     52
-
-  * APB0 gates ("allwinner,sun4i-apb0-gates-clk")
-
-    CODEC                                       0
-    SPDIF                                       1*
-    AC97                                        2
-    IIS                                         3
-
-    PIO                                         5
-    IR0                                         6
-    IR1                                         7
-
-    KEYPAD                                      10
-
-  * APB1 gates ("allwinner,sun4i-apb1-gates-clk")
-
-    I2C0                                        0
-    I2C1                                        1
-    I2C2                                        2
-
-    CAN                                         4
-    SCR                                         5
-    PS20                                        6
-    PS21                                        7
-
-    UART0                                       16
-    UART1                                       17
-    UART2                                       18
-    UART3                                       19
-    UART4                                       20
-    UART5                                       21
-    UART6                                       22
-    UART7                                       23
-
-Notation:
- [*]:  The datasheet didn't mention these, but they are present on AW code
- [**]: The datasheet had this marked as "NC" but they are used on AW code
diff --git a/Documentation/devicetree/bindings/clock/sunxi/sun5i-a13-gates.txt b/Documentation/devicetree/bindings/clock/sunxi/sun5i-a13-gates.txt
deleted file mode 100644
index 006b6dfc4703..000000000000
--- a/Documentation/devicetree/bindings/clock/sunxi/sun5i-a13-gates.txt
+++ /dev/null
@@ -1,58 +0,0 @@
-Gate clock outputs
-------------------
-
-  * AXI gates ("allwinner,sun4i-axi-gates-clk")
-
-    DRAM                                        0
-
-  * AHB gates ("allwinner,sun5i-a13-ahb-gates-clk")
-
-    USBOTG                                      0
-    EHCI                                        1
-    OHCI                                        2
-
-    SS                                          5
-    DMA                                         6
-    BIST                                        7
-    MMC0                                        8
-    MMC1                                        9
-    MMC2                                        10
-
-    NAND                                        13
-    SDRAM                                       14
-
-    SPI0                                        20
-    SPI1                                        21
-    SPI2                                        22
-
-    STIMER                                      28
-
-    VE                                          32
-
-    LCD                                         36
-
-    CSI                                         40
-
-    DE_BE                                       44
-
-    DE_FE                                       46
-
-    IEP                                         51
-    MALI400                                     52
-
-  * APB0 gates ("allwinner,sun5i-a13-apb0-gates-clk")
-
-    CODEC                                       0
-
-    PIO                                         5
-    IR                                          6
-
-  * APB1 gates ("allwinner,sun5i-a13-apb1-gates-clk")
-
-    I2C0                                        0
-    I2C1                                        1
-    I2C2                                        2
-
-    UART1                                       17
-
-    UART3                                       19
diff --git a/Documentation/devicetree/bindings/clock/xgene.txt b/Documentation/devicetree/bindings/clock/xgene.txt
new file mode 100644
index 000000000000..1c4ef773feea
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/xgene.txt
@@ -0,0 +1,111 @@
+Device Tree Clock bindings for APM X-Gene
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be one of the following:
+        "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
+        "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
+        "apm,xgene-device-clock" - for a X-Gene device clock
+
+Required properties for SoC or PCP PLL clocks:
+- reg : shall be the physical PLL register address for the pll clock.
+- clocks : shall be the input parent clock phandle for the clock. This should
+        be the reference clock.
+- #clock-cells : shall be set to 1.
+- clock-output-names : shall be the name of the PLL referenced by derive
+  clock.
+Optional properties for PLL clocks:
+- clock-names : shall be the name of the PLL. If missing, use the device name.
+
+Required properties for device clocks:
+- reg : shall be a list of address and length pairs describing the CSR
+         reset and/or the divider. Either may be omitted, but at least
+         one must be present.
+ - reg-names : shall be a string list describing the reg resource. This
+               may include "csr-reg" and/or "div-reg". If this property
+               is not present, the reg property is assumed to describe
+               only "csr-reg".
+- clocks : shall be the input parent clock phandle for the clock.
+- #clock-cells : shall be set to 1.
+- clock-output-names : shall be the name of the device referenced.
+Optional properties for device clocks:
+- clock-names : shall be the name of the device clock. If missing, use the
+                device name.
+- csr-offset : Offset to the CSR reset register from the reset address base.
+               Default is 0.
+- csr-mask : CSR reset mask bit. Default is 0xF.
+- enable-offset : Offset to the enable register from the reset address base.
+                  Default is 0x8.
+- enable-mask : CSR enable mask bit. Default is 0xF.
+- divider-offset : Offset to the divider CSR register from the divider base.
+                   Default is 0x0.
+- divider-width : Width of the divider register. Default is 0.
+- divider-shift : Bit shift of the divider register. Default is 0.
+
+For example:
+
+        pcppll: pcppll@17000100 {
+                compatible = "apm,xgene-pcppll-clock";
+                #clock-cells = <1>;
+                clocks = <&refclk 0>;
+                clock-names = "pcppll";
+                reg = <0x0 0x17000100 0x0 0x1000>;
+                clock-output-names = "pcppll";
+                type = <0>;
+        };
+
+        socpll: socpll@17000120 {
+                compatible = "apm,xgene-socpll-clock";
+                #clock-cells = <1>;
+                clocks = <&refclk 0>;
+                clock-names = "socpll";
+                reg = <0x0 0x17000120 0x0 0x1000>;
+                clock-output-names = "socpll";
+                type = <1>;
+        };
+
+        qmlclk: qmlclk {
+                compatible = "apm,xgene-device-clock";
+                #clock-cells = <1>;
+                clocks = <&socplldiv2 0>;
+                clock-names = "qmlclk";
+                reg = <0x0 0x1703C000 0x0 0x1000>;
+                reg-name = "csr-reg";
+                clock-output-names = "qmlclk";
+        };
+
+        ethclk: ethclk {
+                compatible = "apm,xgene-device-clock";
+                #clock-cells = <1>;
+                clocks = <&socplldiv2 0>;
+                clock-names = "ethclk";
+                reg = <0x0 0x17000000 0x0 0x1000>;
+                reg-names = "div-reg";
+                divider-offset = <0x238>;
+                divider-width = <0x9>;
+                divider-shift = <0x0>;
+                clock-output-names = "ethclk";
+        };
+
+        apbclk: apbclk {
+                compatible = "apm,xgene-device-clock";
+                #clock-cells = <1>;
+                clocks = <&ahbclk 0>;
+                clock-names = "apbclk";
+                reg = <0x0 0x1F2AC000 0x0 0x1000
+                        0x0 0x1F2AC000 0x0 0x1000>;
+                reg-names = "csr-reg", "div-reg";
+                csr-offset = <0x0>;
+                csr-mask = <0x200>;
+                enable-offset = <0x8>;
+                enable-mask = <0x200>;
+                divider-offset = <0x10>;
+                divider-width = <0x2>;
+                divider-shift = <0x0>;
+                flags = <0x8>;
+                clock-output-names = "apbclk";
+        };
+
diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec6.txt b/Documentation/devicetree/bindings/crypto/fsl-sec6.txt
new file mode 100644
index 000000000000..c0a20cd972e3
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/fsl-sec6.txt
@@ -0,0 +1,157 @@
+SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).
+Currently Freescale powerpc chip C29X is embeded with SEC 6.
+SEC 6 device tree binding include:
+   -SEC 6 Node
+   -Job Ring Node
+   -Full Example
+
+=====================================================================
+SEC 6 Node
+
+Description
+
+    Node defines the base address of the SEC 6 block.
+    This block specifies the address range of all global
+    configuration registers for the SEC 6 block.
+    For example, In C293, we could see three SEC 6 node.
+
+PROPERTIES
+
+   - compatible
+      Usage: required
+      Value type: <string>
+      Definition: Must include "fsl,sec-v6.0".
+
+   - fsl,sec-era
+      Usage: optional
+      Value type: <u32>
+      Definition: A standard property. Define the 'ERA' of the SEC
+          device.
+
+   - #address-cells
+       Usage: required
+       Value type: <u32>
+       Definition: A standard property.  Defines the number of cells
+           for representing physical addresses in child nodes.
+
+   - #size-cells
+       Usage: required
+       Value type: <u32>
+       Definition: A standard property.  Defines the number of cells
+           for representing the size of physical addresses in
+           child nodes.
+
+   - reg
+      Usage: required
+      Value type: <prop-encoded-array>
+      Definition: A standard property.  Specifies the physical
+          address and length of the SEC 6 configuration registers.
+
+   - ranges
+       Usage: required
+       Value type: <prop-encoded-array>
+       Definition: A standard property.  Specifies the physical address
+           range of the SEC 6.0 register space (-SNVS not included).  A
+           triplet that includes the child address, parent address, &
+           length.
+
+   Note: All other standard properties (see the ePAPR) are allowed
+   but are optional.
+
+EXAMPLE
+        crypto@a0000 {
+                compatible = "fsl,sec-v6.0";
+                fsl,sec-era = <6>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0xa0000 0x20000>;
+                ranges = <0 0xa0000 0x20000>;
+        };
+
+=====================================================================
+Job Ring (JR) Node
+
+    Child of the crypto node defines data processing interface to SEC 6
+    across the peripheral bus for purposes of processing
+    cryptographic descriptors. The specified address
+    range can be made visible to one (or more) cores.
+    The interrupt defined for this node is controlled within
+    the address range of this node.
+
+  - compatible
+      Usage: required
+      Value type: <string>
+      Definition: Must include "fsl,sec-v6.0-job-ring".
+
+  - reg
+      Usage: required
+      Value type: <prop-encoded-array>
+      Definition: Specifies a two JR parameters:  an offset from
+           the parent physical address and the length the JR registers.
+
+   - interrupts
+      Usage: required
+      Value type: <prop_encoded-array>
+      Definition:  Specifies the interrupts generated by this
+           device.  The value of the interrupts property
+           consists of one interrupt specifier. The format
+           of the specifier is defined by the binding document
+           describing the node's interrupt parent.
+
+EXAMPLE
+        jr@1000 {
+                compatible = "fsl,sec-v6.0-job-ring";
+                reg = <0x1000 0x1000>;
+                interrupts = <49 2 0 0>;
+        };
+
+===================================================================
+Full Example
+
+Since some chips may contain more than one SEC, the dtsi contains
+only the node contents, not the node itself.  A chip using the SEC
+should include the dtsi inside each SEC node.  Example:
+
+In qoriq-sec6.0.dtsi:
+
+        compatible = "fsl,sec-v6.0";
+        fsl,sec-era = <6>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        jr@1000 {
+                compatible = "fsl,sec-v6.0-job-ring",
+                             "fsl,sec-v5.2-job-ring",
+                             "fsl,sec-v5.0-job-ring",
+                             "fsl,sec-v4.4-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg        = <0x1000 0x1000>;
+        };
+
+        jr@2000 {
+                compatible = "fsl,sec-v6.0-job-ring",
+                             "fsl,sec-v5.2-job-ring",
+                             "fsl,sec-v5.0-job-ring",
+                             "fsl,sec-v4.4-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg        = <0x2000 0x1000>;
+        };
+
+In the C293 device tree, we add the include of public property:
+
+        crypto@a0000 {
+                /include/ "qoriq-sec6.0.dtsi"
+        }
+
+        crypto@a0000 {
+                reg = <0xa0000 0x20000>;
+                ranges = <0 0xa0000 0x20000>;
+
+                jr@1000 {
+                        interrupts = <49 2 0 0>;
+                };
+
+                jr@2000 {
+                        interrupts = <50 2 0 0>;
+                };
+        };
diff --git a/Documentation/devicetree/bindings/crypto/omap-aes.txt b/Documentation/devicetree/bindings/crypto/omap-aes.txt
new file mode 100644
index 000000000000..fd9717653cbb
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/omap-aes.txt
@@ -0,0 +1,31 @@
+OMAP SoC AES crypto Module
+
+Required properties:
+
+- compatible : Should contain entries for this and backward compatible
+  AES versions:
+  - "ti,omap2-aes" for OMAP2.
+  - "ti,omap3-aes" for OMAP3.
+  - "ti,omap4-aes" for OMAP4 and AM33XX.
+  Note that the OMAP2 and 3 versions are compatible (OMAP3 supports
+  more algorithms) but they are incompatible with OMAP4.
+- ti,hwmods: Name of the hwmod associated with the AES module
+- reg : Offset and length of the register set for the module
+- interrupts : the interrupt-specifier for the AES module.
+
+Optional properties:
+- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
+        Documentation/devicetree/bindings/dma/dma.txt
+- dma-names: DMA request names should include "tx" and "rx" if present.
+
+Example:
+        /* AM335x */
+        aes: aes@53500000 {
+                compatible = "ti,omap4-aes";
+                ti,hwmods = "aes";
+                reg = <0x53500000 0xa0>;
+                interrupts = <102>;
+                dmas = <&edma 6>,
+                       <&edma 5>;
+                dma-names = "tx", "rx";
+        };
diff --git a/Documentation/devicetree/bindings/crypto/omap-sham.txt b/Documentation/devicetree/bindings/crypto/omap-sham.txt
new file mode 100644
index 000000000000..f839acd6f0ee
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/omap-sham.txt
@@ -0,0 +1,28 @@
+OMAP SoC SHA crypto Module
+
+Required properties:
+
+- compatible : Should contain entries for this and backward compatible
+  SHAM versions:
+  - "ti,omap2-sham" for OMAP2 & OMAP3.
+  - "ti,omap4-sham" for OMAP4 and AM33XX.
+  Note that these two versions are incompatible.
+- ti,hwmods: Name of the hwmod associated with the SHAM module
+- reg : Offset and length of the register set for the module
+- interrupts : the interrupt-specifier for the SHAM module.
+
+Optional properties:
+- dmas: DMA specifiers for the rx dma. See the DMA client binding,
+        Documentation/devicetree/bindings/dma/dma.txt
+- dma-names: DMA request name. Should be "rx" if a dma is present.
+
+Example:
+        /* AM335x */
+        sham: sham@53100000 {
+                compatible = "ti,omap4-sham";
+                ti,hwmods = "sham";
+                reg = <0x53100000 0x200>;
+                interrupts = <109>;
+                dmas = <&edma 36>;
+                dma-names = "rx";
+        };
diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt b/Documentation/devicetree/bindings/dma/atmel-dma.txt
index c280a0e6f42d..e1f343c7a34b 100644
--- a/Documentation/devicetree/bindings/dma/atmel-dma.txt
+++ b/Documentation/devicetree/bindings/dma/atmel-dma.txt
@@ -18,14 +18,14 @@ dma0: dma@ffffec00 {
 
 DMA clients connected to the Atmel DMA controller must use the format
 described in the dma.txt file, using a three-cell specifier for each channel:
-a phandle plus two interger cells.
+a phandle plus two integer cells.
 The three cells in order are:
 
 1. A phandle pointing to the DMA controller.
 2. The memory interface (16 most significant bits), the peripheral interface
 (16 less significant bits).
 3. Parameters for the at91 DMA configuration register which are device
-dependant:
+dependent:
   - bit 7-0: peripheral identifier for the hardware handshaking interface. The
   identifier can be different for tx and rx.
   - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP.
diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt
index 2717ecb47db9..7bd8847d6394 100644
--- a/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt
@@ -34,7 +34,7 @@ Clients have to specify the DMA requests with phandles in a list.
 Required properties:
 - dmas: List of one or more DMA request specifiers. One DMA request specifier
     consists of a phandle to the DMA controller followed by the integer
-    specifiying the request line.
+    specifying the request line.
 - dma-names: List of string identifiers for the DMA requests. For the correct
     names, have a look at the specific client driver.
 
diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
index 68cee4f5539f..4fa814d38321 100644
--- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
@@ -1,7 +1,12 @@
 * Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
 
 Required properties:
-- compatible : Should be "fsl,<chip>-sdma"
+- compatible : Should be "fsl,imx31-sdma", "fsl,imx31-to1-sdma",
+  "fsl,imx31-to2-sdma", "fsl,imx35-sdma", "fsl,imx35-to1-sdma",
+  "fsl,imx35-to2-sdma", "fsl,imx51-sdma", "fsl,imx53-sdma" or
+  "fsl,imx6q-sdma". The -to variants should be preferred since they
+  allow to determnine the correct ROM script addresses needed for
+  the driver to work without additional firmware.
 - reg : Should contain SDMA registers location and length
 - interrupts : Should contain SDMA interrupt
 - #dma-cells : Must be <3>.
diff --git a/Documentation/devicetree/bindings/dma/k3dma.txt b/Documentation/devicetree/bindings/dma/k3dma.txt
new file mode 100644
index 000000000000..23f8d712c3ce
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/k3dma.txt
@@ -0,0 +1,46 @@
+* Hisilicon K3 DMA controller
+
+See dma.txt first
+
+Required properties:
+- compatible: Should be "hisilicon,k3-dma-1.0"
+- reg: Should contain DMA registers location and length.
+- interrupts: Should contain one interrupt shared by all channel
+- #dma-cells: see dma.txt, should be 1, para number
+- dma-channels: physical channels supported
+- dma-requests: virtual channels supported, each virtual channel
+                have specific request line
+- clocks: clock required
+
+Example:
+
+Controller:
+                dma0: dma@fcd02000 {
+                        compatible = "hisilicon,k3-dma-1.0";
+                        reg = <0xfcd02000 0x1000>;
+                        #dma-cells = <1>;
+                        dma-channels = <16>;
+                        dma-requests = <27>;
+                        interrupts = <0 12 4>;
+                        clocks = <&pclk>;
+                        status = "disable";
+                };
+
+Client:
+Use specific request line passing from dmax
+For example, i2c0 read channel request line is 18, while write channel use 19
+
+                i2c0: i2c@fcb08000 {
+                        compatible = "snps,designware-i2c";
+                        dmas =  <&dma0 18          /* read channel */
+                                 &dma0 19>;        /* write channel */
+                        dma-names = "rx", "tx";
+                };
+
+                i2c1: i2c@fcb09000 {
+                        compatible = "snps,designware-i2c";
+                        dmas =  <&dma0 20          /* read channel */
+                                 &dma0 21>;        /* write channel */
+                        dma-names = "rx", "tx";
+                };
+
diff --git a/Documentation/devicetree/bindings/dma/shdma.txt b/Documentation/devicetree/bindings/dma/shdma.txt
index c15994aa1939..2a3f3b8946b9 100644
--- a/Documentation/devicetree/bindings/dma/shdma.txt
+++ b/Documentation/devicetree/bindings/dma/shdma.txt
@@ -22,42 +22,51 @@ Optional properties (currently unused):
 * DMA controller
 
 Required properties:
-- compatible:   should be "renesas,shdma"
+- compatible:   should be of the form "renesas,shdma-<soc>", where <soc> should
+                be replaced with the desired SoC model, e.g.
+                "renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC
 
 Example:
-        dmac: dma-mux0 {
+        dmac: dma-multiplexer@0 {
                 compatible = "renesas,shdma-mux";
                 #dma-cells = <1>;
-                dma-channels = <6>;
+                dma-channels = <20>;
                 dma-requests = <256>;
-                reg = <0 0>;    /* Needed for AUXDATA */
-                #address-cells = <1>;
-                #size-cells = <1>;
+                #address-cells = <2>;
+                #size-cells = <2>;
                 ranges;
 
-                dma0: shdma@fe008020 {
-                        compatible = "renesas,shdma";
-                        reg = <0xfe008020 0x270>,
-                                <0xfe009000 0xc>;
+                dma0: dma-controller@e6700020 {
+                        compatible = "renesas,shdma-r8a73a4";
+                        reg = <0 0xe6700020 0 0x89e0>;
                         interrupt-parent = <&gic>;
-                        interrupts = <0 34 4
-                                        0 28 4
-                                        0 29 4
-                                        0 30 4
-                                        0 31 4
-                                        0 32 4
-                                        0 33 4>;
+                        interrupts = <0 220 4
+                                        0 200 4
+                                        0 201 4
+                                        0 202 4
+                                        0 203 4
+                                        0 204 4
+                                        0 205 4
+                                        0 206 4
+                                        0 207 4
+                                        0 208 4
+                                        0 209 4
+                                        0 210 4
+                                        0 211 4
+                                        0 212 4
+                                        0 213 4
+                                        0 214 4
+                                        0 215 4
+                                        0 216 4
+                                        0 217 4
+                                        0 218 4
+                                        0 219 4>;
                         interrupt-names = "error",
                                         "ch0", "ch1", "ch2", "ch3",
-                                        "ch4", "ch5";
-                };
-
-                dma1: shdma@fe018020 {
-                        ...
-                };
-
-                dma2: shdma@fe028020 {
-                        ...
+                                        "ch4", "ch5", "ch6", "ch7",
+                                        "ch8", "ch9", "ch10", "ch11",
+                                        "ch12", "ch13", "ch14", "ch15",
+                                        "ch16", "ch17", "ch18", "ch19";
                 };
         };
 
diff --git a/Documentation/devicetree/bindings/dma/ste-dma40.txt b/Documentation/devicetree/bindings/dma/ste-dma40.txt
index bea5b73a7390..a8c21c256baa 100644
--- a/Documentation/devicetree/bindings/dma/ste-dma40.txt
+++ b/Documentation/devicetree/bindings/dma/ste-dma40.txt
@@ -37,14 +37,14 @@ Each dmas request consists of 4 cells:
   1. A phandle pointing to the DMA controller
   2. Device Type
   3. The DMA request line number (only when 'use fixed channel' is set)
-  4. A 32bit mask specifying; mode, direction and endianess [NB: This list will grow]
+  4. A 32bit mask specifying; mode, direction and endianness [NB: This list will grow]
         0x00000001: Mode:
                 Logical channel when unset
                 Physical channel when set
         0x00000002: Direction:
                 Memory to Device when unset
                 Device to Memory when set
-        0x00000004: Endianess:
+        0x00000004: Endianness:
                 Little endian when unset
                 Big endian when set
         0x00000008: Use fixed channel:
diff --git a/Documentation/devicetree/bindings/extcon/extcon-twl.txt b/Documentation/devicetree/bindings/extcon/extcon-palmas.txt
index 58f531ab4df3..7dab6a8f4a0e 100644
--- a/Documentation/devicetree/bindings/extcon/extcon-twl.txt
+++ b/Documentation/devicetree/bindings/extcon/extcon-palmas.txt
@@ -1,15 +1,15 @@
-EXTCON FOR TWL CHIPS
+EXTCON FOR PALMAS/TWL CHIPS
 
 PALMAS USB COMPARATOR
 Required Properties:
  - compatible : Should be "ti,palmas-usb" or "ti,twl6035-usb"
- - vbus-supply : phandle to the regulator device tree node.
 
 Optional Properties:
  - ti,wakeup : To enable the wakeup comparator in probe
+ - ti,enable-id-detection: Perform ID detection.
+ - ti,enable-vbus-detection: Perform VBUS detection.
 
 palmas-usb {
        compatible = "ti,twl6035-usb", "ti,palmas-usb";
-       vbus-supply = <&smps10_reg>;
        ti,wakeup;
 };
diff --git a/Documentation/devicetree/bindings/gpio/abilis,tb10x-gpio.txt b/Documentation/devicetree/bindings/gpio/abilis,tb10x-gpio.txt
new file mode 100644
index 000000000000..00611aceed3e
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/abilis,tb10x-gpio.txt
@@ -0,0 +1,36 @@
+* Abilis TB10x GPIO controller
+
+Required Properties:
+- compatible: Should be "abilis,tb10x-gpio"
+- reg: Address and length of the register set for the device
+- gpio-controller: Marks the device node as a gpio controller.
+- #gpio-cells: Should be <2>. The first cell is the pin number and the
+  second cell is used to specify optional parameters:
+   - bit 0 specifies polarity (0 for normal, 1 for inverted).
+- abilis,ngpio: the number of GPIO pins this driver controls.
+
+Optional Properties:
+- interrupt-controller: Marks the device node as an interrupt controller.
+- #interrupt-cells: Should be <1>. Interrupts are triggered on both edges.
+- interrupts: Defines the interrupt line connecting this GPIO controller to
+  its parent interrupt controller.
+- interrupt-parent: Defines the parent interrupt controller.
+
+GPIO ranges are specified as described in
+Documentation/devicetree/bindings/gpio/gpio.txt
+
+Example:
+
+        gpioa: gpio@FF140000 {
+                compatible = "abilis,tb10x-gpio";
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                interrupt-parent = <&tb10x_ictl>;
+                interrupts = <27 2>;
+                reg = <0xFF140000 0x1000>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                abilis,ngpio = <3>;
+                gpio-ranges = <&iomux 0 0 0>;
+                gpio-ranges-group-names = "gpioa_pins";
+        };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-bcm-kona.txt b/Documentation/devicetree/bindings/gpio/gpio-bcm-kona.txt
new file mode 100644
index 000000000000..4a63bc96b687
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-bcm-kona.txt
@@ -0,0 +1,52 @@
+Broadcom Kona Family GPIO
+=========================
+
+This GPIO driver is used in the following Broadcom SoCs:
+  BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
+
+The Broadcom GPIO Controller IP can be configured prior to synthesis to
+support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The
+GPIO controller only supports edge, not level, triggering of interrupts.
+
+Required properties
+-------------------
+
+- compatible: "brcm,bcm11351-gpio", "brcm,kona-gpio"
+- reg: Physical base address and length of the controller's registers.
+- interrupts: The interrupt outputs from the controller. There is one GPIO
+  interrupt per GPIO bank. The number of interrupts listed depends on the
+  number of GPIO banks on the SoC. The interrupts must be ordered by bank,
+  starting with bank 0. There is always a 1:1 mapping between banks and
+  IRQs.
+- #gpio-cells: Should be <2>. The first cell is the pin number, the second
+  cell is used to specify optional parameters:
+  - bit 0 specifies polarity (0 for normal, 1 for inverted)
+  See also "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.
+- #interrupt-cells: Should be <2>. The first cell is the GPIO number. The
+  second cell is used to specify flags. The following subset of flags is
+  supported:
+  - trigger type (bits[1:0]):
+      1 = low-to-high edge triggered.
+      2 = high-to-low edge triggered.
+      3 = low-to-high or high-to-low edge triggered
+      Valid values are 1, 2, 3
+  See also .../devicetree/bindings/interrupt-controller/interrupts.txt.
+- gpio-controller: Marks the device node as a GPIO controller.
+- interrupt-controller: Marks the device node as an interrupt controller.
+
+Example:
+        gpio: gpio@35003000 {
+                compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
+                reg = <0x35003000 0x800>;
+                interrupts =
+                       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
+                        GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
+                        GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
+                        GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+                        GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
+                        GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+                #gpio-cells = <2>;
+                #interrupt-cells = <2>;
+                gpio-controller;
+                interrupt-controller;
+        };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mcp23s08.txt b/Documentation/devicetree/bindings/gpio/gpio-mcp23s08.txt
index 629d0ef17308..daa30174bcc1 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mcp23s08.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mcp23s08.txt
@@ -3,10 +3,17 @@ Microchip MCP2308/MCP23S08/MCP23017/MCP23S17 driver for
 
 Required properties:
 - compatible : Should be
-    - "mcp,mcp23s08" for  8 GPIO SPI version
-    - "mcp,mcp23s17" for 16 GPIO SPI version
-    - "mcp,mcp23008" for  8 GPIO I2C version or
-    - "mcp,mcp23017" for 16 GPIO I2C version of the chip
+    - "mcp,mcp23s08" (DEPRECATED) for  8 GPIO SPI version
+    - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version
+    - "mcp,mcp23008" (DEPRECATED) for  8 GPIO I2C version or
+    - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip
+
+    - "microchip,mcp23s08" for  8 GPIO SPI version
+    - "microchip,mcp23s17" for 16 GPIO SPI version
+    - "microchip,mcp23008" for  8 GPIO I2C version or
+    - "microchip,mcp23017" for 16 GPIO I2C version of the chip
+    NOTE: Do not use the old mcp prefix any more. It is deprecated and will be
+    removed.
 - #gpio-cells : Should be two.
   - first cell is the pin number
   - second cell is used to specify flags. Flags are currently unused.
@@ -15,10 +22,11 @@ Required properties:
         SPI uses this to specify the chipselect line which the chip is
         connected to. The driver and the SPI variant of the chip support
         multiple chips on the same chipselect. Have a look at
-        mcp,spi-present-mask below.
+        microchip,spi-present-mask below.
 
 Required device specific properties (only for SPI chips):
-- mcp,spi-present-mask : This is a present flag, that makes only sense for SPI
+- mcp,spi-present-mask (DEPRECATED)
+- microchip,spi-present-mask : This is a present flag, that makes only sense for SPI
         chips - as the name suggests. Multiple SPI chips can share the same
         SPI chipselect. Set a bit in bit0-7 in this mask to 1 if there is a
         chip connected with the corresponding spi address set. For example if
@@ -26,11 +34,13 @@ Required device specific properties (only for SPI chips):
         which is 0x08. mcp23s08 chip variant only supports bits 0-3. It is not
         possible to mix mcp23s08 and mcp23s17 on the same chipselect. Set at
         least one bit to 1 for SPI chips.
+    NOTE: Do not use the old mcp prefix any more. It is deprecated and will be
+    removed.
 - spi-max-frequency = The maximum frequency this chip is able to handle
 
 Example I2C:
 gpiom1: gpio@20 {
-        compatible = "mcp,mcp23017";
+        compatible = "microchip,mcp23017";
         gpio-controller;
         #gpio-cells = <2>;
         reg = <0x20>;
@@ -38,7 +48,7 @@ gpiom1: gpio@20 {
 
 Example SPI:
 gpiom1: gpio@0 {
-        compatible = "mcp,mcp23s17";
+        compatible = "microchip,mcp23s17";
         gpio-controller;
         #gpio-cells = <2>;
         spi-present-mask = <0x01>;
diff --git a/Documentation/devicetree/bindings/gpio/gpio-palmas.txt b/Documentation/devicetree/bindings/gpio/gpio-palmas.txt
new file mode 100644
index 000000000000..08b5b52a3ae0
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-palmas.txt
@@ -0,0 +1,27 @@
+Palmas GPIO controller bindings
+
+Required properties:
+- compatible:
+  - "ti,palams-gpio" for palma series of the GPIO controller
+  - "ti,tps80036-gpio" for Palma series device TPS80036.
+  - "ti,tps65913-gpio" for palma series device TPS65913.
+  - "ti,tps65914-gpio" for palma series device TPS65914.
+- #gpio-cells : Should be two.
+  - first cell is the gpio pin number
+  - second cell is used to specify the gpio polarity:
+      0 = active high
+      1 = active low
+- gpio-controller : Marks the device node as a GPIO controller.
+
+Note: This gpio node will be sub node of palmas node.
+
+Example:
+        palmas: tps65913@58 {
+                :::::::::::
+                palmas_gpio: palmas_gpio {
+                        compatible = "ti,palmas-gpio";
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+                :::::::::::
+        };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-pcf857x.txt b/Documentation/devicetree/bindings/gpio/gpio-pcf857x.txt
new file mode 100644
index 000000000000..d63194a2c848
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-pcf857x.txt
@@ -0,0 +1,71 @@
+* PCF857x-compatible I/O expanders
+
+The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
+driven high by a pull-up current source or driven low to ground. This combines
+the direction and output level into a single bit per line, which can't be read
+back. We can't actually know at initialization time whether a line is configured
+(a) as output and driving the signal low/high, or (b) as input and reporting a
+low/high value, without knowing the last value written since the chip came out
+of reset (if any). The only reliable solution for setting up line direction is
+thus to do it explicitly.
+
+Required Properties:
+
+  - compatible: should be one of the following.
+    - "maxim,max7328": For the Maxim MAX7378
+    - "maxim,max7329": For the Maxim MAX7329
+    - "nxp,pca8574": For the NXP PCA8574
+    - "nxp,pca8575": For the NXP PCA8575
+    - "nxp,pca9670": For the NXP PCA9670
+    - "nxp,pca9671": For the NXP PCA9671
+    - "nxp,pca9672": For the NXP PCA9672
+    - "nxp,pca9673": For the NXP PCA9673
+    - "nxp,pca9674": For the NXP PCA9674
+    - "nxp,pca9675": For the NXP PCA9675
+    - "nxp,pcf8574": For the NXP PCF8574
+    - "nxp,pcf8574a": For the NXP PCF8574A
+    - "nxp,pcf8575": For the NXP PCF8575
+    - "ti,tca9554": For the TI TCA9554
+
+  - reg: I2C slave address.
+
+  - gpio-controller: Marks the device node as a gpio controller.
+  - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
+    cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
+    GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
+
+Optional Properties:
+
+  - lines-initial-states: Bitmask that specifies the initial state of each
+  line. When a bit is set to zero, the corresponding line will be initialized to
+  the input (pulled-up) state. When the  bit is set to one, the line will be
+  initialized the the low-level output state. If the property is not specified
+  all lines will be initialized to the input state.
+
+  The I/O expander can detect input state changes, and thus optionally act as
+  an interrupt controller. When the expander interrupt line is connected all the
+  following properties must be set. For more information please see the
+  interrupt controller device tree bindings documentation available at
+  Documentation/devicetree/bindings/interrupt-controller/interrupts.txt.
+
+  - interrupt-controller: Identifies the node as an interrupt controller.
+  - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2.
+  - interrupt-parent: phandle of the parent interrupt controller.
+  - interrupts: Interrupt specifier for the controllers interrupt.
+
+
+Please refer to gpio.txt in this directory for details of the common GPIO
+bindings used by client devices.
+
+Example: PCF8575 I/O expander node
+
+        pcf8575: gpio@20 {
+                compatible = "nxp,pcf8575";
+                reg = <0x20>;
+                interrupt-parent = <&irqpin2>;
+                interrupts = <3 0>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-tz1090-pdc.txt b/Documentation/devicetree/bindings/gpio/gpio-tz1090-pdc.txt
new file mode 100644
index 000000000000..1fd98ffa8cb7
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-tz1090-pdc.txt
@@ -0,0 +1,45 @@
+ImgTec TZ1090 PDC GPIO Controller
+
+Required properties:
+- compatible: Compatible property value should be "img,tz1090-pdc-gpio".
+
+- reg: Physical base address of the controller and length of memory mapped
+  region. This starts at and cover the SOC_GPIO_CONTROL registers.
+
+- gpio-controller: Specifies that the node is a gpio controller.
+
+- #gpio-cells: Should be 2. The syntax of the gpio specifier used by client
+  nodes should have the following values.
+     <[phandle of the gpio controller node]
+      [PDC gpio number]
+      [gpio flags]>
+
+  Values for gpio specifier:
+  - GPIO number: a value in the range 0 to 6.
+  - GPIO flags: bit field of flags, as defined in <dt-bindings/gpio/gpio.h>.
+    Only the following flags are supported:
+      GPIO_ACTIVE_HIGH
+      GPIO_ACTIVE_LOW
+
+Optional properties:
+- gpio-ranges: Mapping to pin controller pins (as described in
+  Documentation/devicetree/bindings/gpio/gpio.txt)
+
+- interrupts: Individual syswake interrupts (other GPIOs cannot interrupt)
+
+
+Example:
+
+        pdc_gpios: gpio-controller@02006500 {
+                gpio-controller;
+                #gpio-cells = <2>;
+
+                compatible = "img,tz1090-pdc-gpio";
+                reg = <0x02006500 0x100>;
+
+                interrupt-parent = <&pdc>;
+                interrupts =    <8  IRQ_TYPE_NONE>,     /* Syswake 0 */
+                                <9  IRQ_TYPE_NONE>,     /* Syswake 1 */
+                                <10 IRQ_TYPE_NONE>;     /* Syswake 2 */
+                gpio-ranges = <&pdc_pinctrl 0 0 7>;
+        };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-tz1090.txt b/Documentation/devicetree/bindings/gpio/gpio-tz1090.txt
new file mode 100644
index 000000000000..174cdf309170
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-tz1090.txt
@@ -0,0 +1,88 @@
+ImgTec TZ1090 GPIO Controller
+
+Required properties:
+- compatible: Compatible property value should be "img,tz1090-gpio".
+
+- reg: Physical base address of the controller and length of memory mapped
+  region.
+
+- #address-cells: Should be 1 (for bank subnodes)
+
+- #size-cells: Should be 0 (for bank subnodes)
+
+- Each bank of GPIOs should have a subnode to represent it.
+
+  Bank subnode required properties:
+  - reg: Index of bank in the range 0 to 2.
+
+  - gpio-controller: Specifies that the node is a gpio controller.
+
+  - #gpio-cells: Should be 2. The syntax of the gpio specifier used by client
+    nodes should have the following values.
+       <[phandle of the gpio controller node]
+        [gpio number within the gpio bank]
+        [gpio flags]>
+
+    Values for gpio specifier:
+    - GPIO number: a value in the range 0 to 29.
+    - GPIO flags: bit field of flags, as defined in <dt-bindings/gpio/gpio.h>.
+      Only the following flags are supported:
+        GPIO_ACTIVE_HIGH
+        GPIO_ACTIVE_LOW
+
+  Bank subnode optional properties:
+  - gpio-ranges: Mapping to pin controller pins (as described in
+    Documentation/devicetree/bindings/gpio/gpio.txt)
+
+  - interrupts: Interrupt for the entire bank
+
+  - interrupt-controller: Specifies that the node is an interrupt controller
+
+  - #interrupt-cells: Should be 2. The syntax of the interrupt specifier used by
+    client nodes should have the following values.
+       <[phandle of the interurupt controller]
+        [gpio number within the gpio bank]
+        [irq flags]>
+
+    Values for irq specifier:
+    - GPIO number: a value in the range 0 to 29
+    - IRQ flags: value to describe edge and level triggering, as defined in
+      <dt-bindings/interrupt-controller/irq.h>. Only the following flags are
+      supported:
+        IRQ_TYPE_EDGE_RISING
+        IRQ_TYPE_EDGE_FALLING
+        IRQ_TYPE_EDGE_BOTH
+        IRQ_TYPE_LEVEL_HIGH
+        IRQ_TYPE_LEVEL_LOW
+
+
+
+Example:
+
+        gpios: gpio-controller@02005800 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "img,tz1090-gpio";
+                reg = <0x02005800 0x90>;
+
+                /* bank 0 with an interrupt */
+                gpios0: bank@0 {
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        reg = <0>;
+                        interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
+                        gpio-controller;
+                        gpio-ranges = <&pinctrl 0 0 30>;
+                        interrupt-controller;
+                };
+
+                /* bank 2 without interrupt */
+                gpios2: bank@2 {
+                        #gpio-cells = <2>;
+                        reg = <2>;
+                        gpio-controller;
+                        gpio-ranges = <&pinctrl 0 60 30>;
+                };
+        };
+
+
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
index d933af370697..0c85bb6e3a80 100644
--- a/Documentation/devicetree/bindings/gpio/gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio.txt
@@ -75,23 +75,51 @@ Example of two SOC GPIO banks defined as gpio-controller nodes:
                 gpio-controller;
         };
 
-2.1) gpio-controller and pinctrl subsystem
-------------------------------------------
-
-gpio-controller on a SOC might be tightly coupled with the pinctrl
-subsystem, in the sense that the pins can be used by other functions
-together with optional gpio feature.
-
-While the pin allocation is totally managed by the pin ctrl subsystem,
-gpio (under gpiolib) is still maintained by gpio drivers. It may happen
-that different pin ranges in a SoC is managed by different gpio drivers.
-
-This makes it logical to let gpio drivers announce their pin ranges to
-the pin ctrl subsystem and call 'pinctrl_request_gpio' in order to
-request the corresponding pin before any gpio usage.
-
-For this, the gpio controller can use a pinctrl phandle and pins to
-announce the pinrange to the pin ctrl subsystem. For example,
+2.1) gpio- and pin-controller interaction
+-----------------------------------------
+
+Some or all of the GPIOs provided by a GPIO controller may be routed to pins
+on the package via a pin controller. This allows muxing those pins between
+GPIO and other functions.
+
+It is useful to represent which GPIOs correspond to which pins on which pin
+controllers. The gpio-ranges property described below represents this, and
+contains information structures as follows:
+
+        gpio-range-list ::= <single-gpio-range> [gpio-range-list]
+        single-gpio-range ::= <numeric-gpio-range> | <named-gpio-range>
+        numeric-gpio-range ::=
+                        <pinctrl-phandle> <gpio-base> <pinctrl-base> <count>
+        named-gpio-range ::= <pinctrl-phandle> <gpio-base> '<0 0>'
+        gpio-phandle : phandle to pin controller node.
+        gpio-base : Base GPIO ID in the GPIO controller
+        pinctrl-base : Base pinctrl pin ID in the pin controller
+        count : The number of GPIOs/pins in this range
+
+The "pin controller node" mentioned above must conform to the bindings
+described in ../pinctrl/pinctrl-bindings.txt.
+
+In case named gpio ranges are used (ranges with both <pinctrl-base> and
+<count> set to 0), the property gpio-ranges-group-names contains one string
+for every single-gpio-range in gpio-ranges:
+        gpiorange-names-list ::= <gpiorange-name> [gpiorange-names-list]
+        gpiorange-name : Name of the pingroup associated to the GPIO range in
+                        the respective pin controller.
+
+Elements of gpiorange-names-list corresponding to numeric ranges contain
+the empty string. Elements of gpiorange-names-list corresponding to named
+ranges contain the name of a pin group defined in the respective pin
+controller. The number of pins/GPIOs in the range is the number of pins in
+that pin group.
+
+Previous versions of this binding required all pin controller nodes that
+were referenced by any gpio-ranges property to contain a property named
+#gpio-range-cells with value <3>. This requirement is now deprecated.
+However, that property may still exist in older device trees for
+compatibility reasons, and would still be required even in new device
+trees that need to be compatible with older software.
+
+Example 1:
 
         qe_pio_e: gpio-controller@1460 {
                 #gpio-cells = <2>;
@@ -99,16 +127,29 @@ announce the pinrange to the pin ctrl subsystem. For example,
                 reg = <0x1460 0x18>;
                 gpio-controller;
                 gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;
+        };
 
-    }
+Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
+pinctrl1's pins 20..29, and GPIOs 10..19 routed to pin controller pinctrl2's
+pins 50..59.
 
-where,
-   &pinctrl1 and &pinctrl2 is the phandle to the pinctrl DT node.
+Example 2:
 
-   Next values specify the base pin and number of pins for the range
-   handled by 'qe_pio_e' gpio. In the given example from base pin 20 to
-   pin 29 under pinctrl1 with gpio offset 0 and pin 50 to pin 69 under
-   pinctrl2 with gpio offset 10 is handled by this gpio controller.
+        gpio_pio_i: gpio-controller@14B0 {
+                #gpio-cells = <2>;
+                compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
+                reg = <0x1480 0x18>;
+                gpio-controller;
+                gpio-ranges =                   <&pinctrl1 0 20 10>,
+                                                <&pinctrl2 10 0 0>,
+                                                <&pinctrl1 15 0 10>,
+                                                <&pinctrl2 25 0 0>;
+                gpio-ranges-group-names =       "",
+                                                "foo",
+                                                "",
+                                                "bar";
+        };
 
-The pinctrl node must have "#gpio-range-cells" property to show number of
-arguments to pass with phandle from gpio controllers node.
+Here, three GPIO ranges are defined wrt. two pin controllers. pinctrl1 GPIO
+ranges are defined using pin numbers whereas the GPIO ranges wrt. pinctrl2
+are named "foo" and "bar".
diff --git a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt
index 9b3f1d4a88d6..66416261e14d 100644
--- a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt
@@ -10,8 +10,9 @@ Required properties:
   There're three gpio interrupts in arch-pxa, and they're gpio0,
   gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp,
   gpio_mux.
-- interrupt-name : Should be the name of irq resource. Each interrupt
-  binds its interrupt-name.
+- interrupt-names : Should be the names of irq resources. Each interrupt
+  uses its own interrupt name, so there should be as many interrupt names
+  as referenced interrups.
 - interrupt-controller : Identifies the node as an interrupt controller.
 - #interrupt-cells: Specifies the number of cells needed to encode an
   interrupt source.
@@ -24,7 +25,7 @@ Example:
                 compatible = "marvell,mmp-gpio";
                 reg = <0xd4019000 0x1000>;
                 interrupts = <49>;
-                interrupt-name = "gpio_mux";
+                interrupt-names = "gpio_mux";
                 gpio-controller;
                 #gpio-cells = <1>;
                 interrupt-controller;
diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
index cb3dc7bcd8e6..8655df9440d5 100644
--- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
@@ -23,6 +23,10 @@ Required Properties:
 Please refer to gpio.txt in this directory for details of gpio-ranges property
 and the common GPIO bindings used by client devices.
 
+The GPIO controller also acts as an interrupt controller. It uses the default
+two cells specifier as described in Documentation/devicetree/bindings/
+interrupt-controller/interrupts.txt.
+
 Example: R8A7779 (R-Car H1) GPIO controller nodes
 
         gpio0: gpio@ffc40000 {
@@ -33,6 +37,8 @@ Example: R8A7779 (R-Car H1) GPIO controller nodes
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 0 32>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
         };
         ...
         gpio6: gpio@ffc46000 {
@@ -43,4 +49,6 @@ Example: R8A7779 (R-Car H1) GPIO controller nodes
                 #gpio-cells = <2>;
                 gpio-controller;
                 gpio-ranges = <&pfc 0 192 9>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
         };
diff --git a/Documentation/devicetree/bindings/gpu/samsung-g2d.txt b/Documentation/devicetree/bindings/gpu/samsung-g2d.txt
index 3f454ffc654a..c4f358dafdaa 100644
--- a/Documentation/devicetree/bindings/gpu/samsung-g2d.txt
+++ b/Documentation/devicetree/bindings/gpu/samsung-g2d.txt
@@ -11,8 +11,11 @@ Required properties:
 
   - interrupts : G2D interrupt number to the CPU.
   - clocks : from common clock binding: handle to G2D clocks.
-  - clock-names : from common clock binding: must contain "sclk_fimg2d" and
-                  "fimg2d", corresponding to entries in the clocks property.
+  - clock-names : names of clocks listed in clocks property, in the same
+                  order, depending on SoC type:
+                  - for S5PV210 and Exynos4 based SoCs: "fimg2d" and
+                    "sclk_fimg2d"
+                  - for Exynos5250 SoC: "fimg2d".
 
 Example:
         g2d@12800000 {
diff --git a/Documentation/devicetree/bindings/gpu/samsung-rotator.txt b/Documentation/devicetree/bindings/gpu/samsung-rotator.txt
new file mode 100644
index 000000000000..82cd1ed0be93
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/samsung-rotator.txt
@@ -0,0 +1,27 @@
+* Samsung Image Rotator
+
+Required properties:
+  - compatible : value should be one of the following:
+        (a) "samsung,exynos4210-rotator" for Rotator IP in Exynos4210
+        (b) "samsung,exynos4212-rotator" for Rotator IP in Exynos4212/4412
+        (c) "samsung,exynos5250-rotator" for Rotator IP in Exynos5250
+
+  - reg : Physical base address of the IP registers and length of memory
+          mapped region.
+
+  - interrupts : Interrupt specifier for rotator interrupt, according to format
+                 specific to interrupt parent.
+
+  - clocks : Clock specifier for rotator clock, according to generic clock
+             bindings. (See Documentation/devicetree/bindings/clock/exynos*.txt)
+
+  - clock-names : Names of clocks. For exynos rotator, it should be "rotator".
+
+Example:
+        rotator@12810000 {
+                compatible = "samsung,exynos4210-rotator";
+                reg = <0x12810000 0x1000>;
+                interrupts = <0 83 0>;
+                clocks = <&clock 278>;
+                clock-names = "rotator";
+        };
diff --git a/Documentation/devicetree/bindings/hid/hid-over-i2c.txt b/Documentation/devicetree/bindings/hid/hid-over-i2c.txt
new file mode 100644
index 000000000000..488edcb264c4
--- /dev/null
+++ b/Documentation/devicetree/bindings/hid/hid-over-i2c.txt
@@ -0,0 +1,28 @@
+* HID over I2C Device-Tree bindings
+
+HID over I2C provides support for various Human Interface Devices over the
+I2C bus. These devices can be for example touchpads, keyboards, touch screens
+or sensors.
+
+The specification has been written by Microsoft and is currently available here:
+http://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx
+
+If this binding is used, the kernel module i2c-hid will handle the communication
+with the device and the generic hid core layer will handle the protocol.
+
+Required properties:
+- compatible: must be "hid-over-i2c"
+- reg: i2c slave address
+- hid-descr-addr: HID descriptor address
+- interrupt-parent: the phandle for the interrupt controller
+- interrupts: interrupt line
+
+Example:
+
+        i2c-hid-dev@2c {
+                compatible = "hid-over-i2c";
+                reg = <0x2c>;
+                hid-descr-addr = <0x0020>;
+                interrupt-parent = <&gpx3>;
+                interrupts = <3 2>;
+        };
diff --git a/Documentation/devicetree/bindings/hwrng/omap_rng.txt b/Documentation/devicetree/bindings/hwrng/omap_rng.txt
new file mode 100644
index 000000000000..6a62acd86953
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwrng/omap_rng.txt
@@ -0,0 +1,22 @@
+OMAP SoC HWRNG Module
+
+Required properties:
+
+- compatible : Should contain entries for this and backward compatible
+  RNG versions:
+  - "ti,omap2-rng" for OMAP2.
+  - "ti,omap4-rng" for OMAP4, OMAP5 and AM33XX.
+  Note that these two versions are incompatible.
+- ti,hwmods: Name of the hwmod associated with the RNG module
+- reg : Offset and length of the register set for the module
+- interrupts : the interrupt number for the RNG module.
+                Only used for "ti,omap4-rng".
+
+Example:
+/* AM335x */
+rng: rng@48310000 {
+        compatible = "ti,omap4-rng";
+        ti,hwmods = "rng";
+        reg = <0x48310000 0x2000>;
+        interrupts = <111>;
+};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.txt b/Documentation/devicetree/bindings/i2c/i2c-imx.txt
index 3614242e7732..4a8513e44740 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx.txt
@@ -1,7 +1,10 @@
 * Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
 
 Required properties:
-- compatible : Should be "fsl,<chip>-i2c"
+- compatible :
+  - "fsl,imx1-i2c" for I2C compatible with the one integrated on i.MX1 SoC
+  - "fsl,imx21-i2c" for I2C compatible with the one integrated on i.MX21 SoC
+  - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
 - reg : Should contain I2C/HS-I2C registers location and length
 - interrupts : Should contain I2C/HS-I2C interrupt
 
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
index 6113f9275f42..82e8f6f17179 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
@@ -5,6 +5,7 @@ Required properties :
 
  - reg             : Offset and length of the register set for the device
  - compatible      : Should be "marvell,mv64xxx-i2c" or "allwinner,sun4i-i2c"
+                     or "marvell,mv78230-i2c"
  - interrupts      : The interrupt number
 
 Optional properties :
@@ -20,3 +21,12 @@ Examples:
                 interrupts = <29>;
                 clock-frequency = <100000>;
         };
+
+For the Armada XP:
+
+        i2c@11000 {
+                compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
+                reg = <0x11000 0x100>;
+                interrupts = <29>;
+                clock-frequency = <100000>;
+        };
diff --git a/Documentation/devicetree/bindings/iio/accel/bma180.txt b/Documentation/devicetree/bindings/iio/accel/bma180.txt
new file mode 100644
index 000000000000..c5933573e0f6
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/accel/bma180.txt
@@ -0,0 +1,24 @@
+* Bosch BMA180 triaxial acceleration sensor
+
+http://omapworld.com/BMA180_111_1002839.pdf
+
+Required properties:
+
+  - compatible : should be "bosch,bma180"
+  - reg : the I2C address of the sensor
+
+Optional properties:
+
+  - interrupt-parent : should be the phandle for the interrupt controller
+
+  - interrupts : interrupt mapping for GPIO IRQ, it should by configured with
+                flags IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING
+
+Example:
+
+bma180@40 {
+        compatible = "bosch,bma180";
+        reg = <0x40>;
+        interrupt-parent = <&gpio6>;
+        interrupts = <18 (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)>;
+};
diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton-nau7802.txt b/Documentation/devicetree/bindings/iio/adc/nuvoton-nau7802.txt
new file mode 100644
index 000000000000..e9582e6fe350
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/nuvoton-nau7802.txt
@@ -0,0 +1,18 @@
+* Nuvoton NAU7802 Analog to Digital Converter (ADC)
+
+Required properties:
+  - compatible: Should be "nuvoton,nau7802"
+  - reg: Should contain the ADC I2C address
+
+Optional properties:
+  - nuvoton,vldo: Internal reference voltage in millivolts to be
+    configured valid values are between 2400 mV and 4500 mV.
+  - interrupts: IRQ line for the ADC. If not used the driver will use
+    polling.
+
+Example:
+adc2: nau7802@2a {
+        compatible = "nuvoton,nau7802";
+        reg = <0x2a>;
+        nuvoton,vldo = <3000>;
+};
diff --git a/Documentation/devicetree/bindings/iio/light/apds9300.txt b/Documentation/devicetree/bindings/iio/light/apds9300.txt
new file mode 100644
index 000000000000..d6f66c73ddbf
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/light/apds9300.txt
@@ -0,0 +1,22 @@
+* Avago APDS9300 ambient light sensor
+
+http://www.avagotech.com/docs/AV02-1077EN
+
+Required properties:
+
+  - compatible : should be "avago,apds9300"
+  - reg : the I2C address of the sensor
+
+Optional properties:
+
+  - interrupt-parent : should be the phandle for the interrupt controller
+  - interrupts : interrupt mapping for GPIO IRQ
+
+Example:
+
+apds9300@39 {
+        compatible = "avago,apds9300";
+        reg = <0x39>;
+        interrupt-parent = <&gpio2>;
+        interrupts = <29 8>;
+};
diff --git a/Documentation/devicetree/bindings/iio/light/cm36651.txt b/Documentation/devicetree/bindings/iio/light/cm36651.txt
new file mode 100644
index 000000000000..c03e19db4550
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/light/cm36651.txt
@@ -0,0 +1,26 @@
+* Capella CM36651 I2C Proximity and Color Light sensor
+
+Required properties:
+- compatible: must be "capella,cm36651"
+- reg: the I2C address of the device
+- interrupts: interrupt-specifier for the sole interrupt
+              generated by the device
+- vled-supply: regulator for the IR LED. IR_LED is a part
+              of the cm36651 for proximity detection.
+              As covered in ../../regulator/regulator.txt
+
+Example:
+
+        i2c_cm36651: i2c-gpio {
+                /* ... */
+
+                cm36651@18 {
+                        compatible = "capella,cm36651";
+                        reg = <0x18>;
+                        interrupt-parent = <&gpx0>;
+                        interrupts = <2 0>;
+                        vled-supply = <&ps_als_reg>;
+                };
+
+                /* ... */
+        };
diff --git a/Documentation/devicetree/bindings/iio/light/gp2ap020a00f.txt b/Documentation/devicetree/bindings/iio/light/gp2ap020a00f.txt
new file mode 100644
index 000000000000..9231c82317ad
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/light/gp2ap020a00f.txt
@@ -0,0 +1,21 @@
+* Sharp GP2AP020A00F I2C Proximity/ALS sensor
+
+The proximity detector sensor requires power supply
+for its built-in led. It is also defined by this binding.
+
+Required properties:
+
+  - compatible : should be "sharp,gp2ap020a00f"
+  - reg : the I2C slave address of the light sensor
+  - interrupts : interrupt specifier for the sole interrupt generated
+                 by the device
+  - vled-supply : VLED power supply, as covered in ../regulator/regulator.txt
+
+Example:
+
+gp2ap020a00f@39 {
+        compatible = "sharp,gp2ap020a00f";
+        reg = <0x39>;
+        interrupts = <2 0>;
+        vled-supply = <...>;
+};
diff --git a/Documentation/devicetree/bindings/input/input-reset.txt b/Documentation/devicetree/bindings/input/input-reset.txt
new file mode 100644
index 000000000000..2bb2626fdb78
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/input-reset.txt
@@ -0,0 +1,33 @@
+Input: sysrq reset sequence
+
+A simple binding to represent a set of keys as described in
+include/uapi/linux/input.h. This is to communicate a sequence of keys to the
+sysrq driver. Upon holding the keys for a specified amount of time (if
+specified) the system is sync'ed and reset.
+
+Key sequences are global to the system but all the keys in a set must be coming
+from the same input device.
+
+The /chosen node should contain a 'linux,sysrq-reset-seq' child node to define
+a set of keys.
+
+Required property:
+sysrq-reset-seq: array of Linux keycodes, one keycode per cell.
+
+Optional property:
+timeout-ms: duration keys must be pressed together in milliseconds before
+generating a sysrq. If omitted the system is rebooted immediately when a valid
+sequence has been recognized.
+
+Example:
+
+ chosen {
+                linux,sysrq-reset-seq {
+                        keyset = <0x03
+                                  0x04
+                                  0x0a>;
+                        timeout-ms = <3000>;
+                };
+         };
+
+Would represent KEY_2, KEY_3 and KEY_9.
diff --git a/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt b/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt
index df70318a617f..49fa14ed155c 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt
+++ b/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt
@@ -6,7 +6,7 @@ Required properties:
 - interrupt-parent: the phandle for the interrupt controller
 - interrupts: touch controller interrupt
 - wakeup-gpios: the gpio pin to be used for waking up the controller
-  as well as uased as irq pin
+  and also used as irq pin
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt
index 57edb30dbbca..3d3b2b91e333 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt
@@ -8,9 +8,6 @@ Required properties:
 - #interrupt-cells : Specifies the number of cells needed to encode an
   interrupt source. The value shall be 1.
 
-For the valid interrupt sources for your SoC, see the documentation in
-sunxi/<soc>.txt
-
 Example:
 
 intc: interrupt-controller {
diff --git a/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt b/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
index 72a06c0ab1db..1486497a24c1 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
@@ -4,16 +4,33 @@ Specifying interrupt information for devices
 1) Interrupt client nodes
 -------------------------
 
-Nodes that describe devices which generate interrupts must contain an
-"interrupts" property. This property must contain a list of interrupt
-specifiers, one per output interrupt. The format of the interrupt specifier is
-determined by the interrupt controller to which the interrupts are routed; see
-section 2 below for details.
+Nodes that describe devices which generate interrupts must contain an either an
+"interrupts" property or an "interrupts-extended" property. These properties
+contain a list of interrupt specifiers, one per output interrupt. The format of
+the interrupt specifier is determined by the interrupt controller to which the
+interrupts are routed; see section 2 below for details.
+
+  Example:
+        interrupt-parent = <&intc1>;
+        interrupts = <5 0>, <6 0>;
 
 The "interrupt-parent" property is used to specify the controller to which
 interrupts are routed and contains a single phandle referring to the interrupt
 controller node. This property is inherited, so it may be specified in an
-interrupt client node or in any of its parent nodes.
+interrupt client node or in any of its parent nodes. Interrupts listed in the
+"interrupts" property are always in reference to the node's interrupt parent.
+
+The "interrupts-extended" property is a special form for use when a node needs
+to reference multiple interrupt parents. Each entry in this property contains
+both the parent phandle and the interrupt specifier. "interrupts-extended"
+should only be used when a device has multiple interrupt parents.
+
+  Example:
+        interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
+
+A device node may contain either "interrupts" or "interrupts-extended", but not
+both. If both properties are present, then the operating system should log an
+error and use only the data in "interrupts".
 
 2) Interrupt controller nodes
 -----------------------------
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt b/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt
deleted file mode 100644
index 76b98c834499..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt
+++ /dev/null
@@ -1,89 +0,0 @@
-Allwinner A10 (sun4i) interrupt sources
----------------------------------------
-
-The interrupt sources available for the Allwinner A10 SoC are the
-following one:
-
-0: ENMI
-1: UART0
-2: UART1
-3: UART2
-4: UART3
-5: IR0
-6: IR1
-7: I2C0
-8: I2C1
-9: I2C2
-10: SPI0
-11: SPI1
-12: SPI2
-13: SPDIF
-14: AC97
-15: TS
-16: I2S
-17: UART4
-18: UART5
-19: UART6
-20: UART7
-21: KEYPAD
-22: TIMER0
-23: TIMER1
-24: TIMER2
-25: TIMER3
-26: CAN
-27: DMA
-28: PIO
-29: TOUCH_PANEL
-30: AUDIO_CODEC
-31: LRADC
-32: MMC0
-33: MMC1
-34: MMC2
-35: MMC3
-36: MEMSTICK
-37: NAND
-38: USB0
-39: USB1
-40: USB2
-41: SCR
-42: CSI0
-43: CSI1
-44: LCDCTRL0
-45: LCDCTRL1
-46: MP
-47: DEFEBE0
-48: DEFEBE1
-49: PMU
-50: SPI3
-51: TZASC
-52: PATA
-53: VE
-54: SS
-55: EMAC
-56: SATA
-57: GPS
-58: HDMI
-59: TVE
-60: ACE
-61: TVD
-62: PS2_0
-63: PS2_1
-64: USB3
-65: USB4
-66: PLE_PFM
-67: TIMER4
-68: TIMER5
-69: GPU_GP
-70: GPU_GPMMU
-71: GPU_PP0
-72: GPU_PPMMU0
-73: GPU_PMU
-74: GPU_RSV0
-75: GPU_RSV1
-76: GPU_RSV2
-77: GPU_RSV3
-78: GPU_RSV4
-79: GPU_RSV5
-80: GPU_RSV6
-82: SYNC_TIMER0
-83: SYNC_TIMER1
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt b/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt
deleted file mode 100644
index 2ec3b5ce1a0b..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt
+++ /dev/null
@@ -1,55 +0,0 @@
-Allwinner A13 (sun5i) interrupt sources
----------------------------------------
-
-The interrupt sources available for the Allwinner A13 SoC are the
-following one:
-
-0: ENMI
-2: UART1
-4: UART3
-5: IR
-7: I2C0
-8: I2C1
-9: I2C2
-10: SPI0
-11: SPI1
-12: SPI2
-22: TIMER0
-23: TIMER1
-24: TIMER2
-25: TIMER3
-27: DMA
-28: PIO
-29: TOUCH_PANEL
-30: AUDIO_CODEC
-31: LRADC
-32: MMC0
-33: MMC1
-34: MMC2
-37: NAND
-38: USB OTG
-39: USB EHCI
-40: USB OHCI
-42: CSI
-44: LCDCTRL
-47: DEFEBE
-49: PMU
-53: VE
-54: SS
-66: PLE_PFM
-67: TIMER4
-68: TIMER5
-69: GPU_GP
-70: GPU_GPMMU
-71: GPU_PP0
-72: GPU_PPMMU0
-73: GPU_PMU
-74: GPU_RSV0
-75: GPU_RSV1
-76: GPU_RSV2
-77: GPU_RSV3
-78: GPU_RSV4
-79: GPU_RSV5
-80: GPU_RSV6
-82: SYNC_TIMER0
-83: SYNC_TIMER1
diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt
index d5176882d8b9..c55b8c016a9e 100644
--- a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt
+++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt
@@ -1,7 +1,7 @@
 Binding for TI/National Semiconductor LP55xx Led Drivers
 
 Required properties:
-- compatible: "national,lp5521" or "national,lp5523" or "ti,lp5562"
+- compatible: "national,lp5521" or "national,lp5523" or "ti,lp5562" or "ti,lp8501"
 - reg: I2C slave address
 - clock-mode: Input clock mode, (0: automode, 1: internal, 2: external)
 
@@ -10,14 +10,23 @@ Each child has own specific current settings
 - max-cur: Maximun current at each led channel.
 
 Optional properties:
+- enable-gpio: GPIO attached to the chip's enable pin
 - label: Used for naming LEDs
+- pwr-sel: LP8501 specific property. Power selection for output channels.
+         0: D1~9 are connected to VDD
+         1: D1~6 with VDD, D7~9 with VOUT
+         2: D1~6 with VOUT, D7~9 with VDD
+         3: D1~9 are connected to VOUT
 
-Alternatively, each child can have specific channel name
-- chan-name: Name of each channel name
+Alternatively, each child can have a specific channel name and trigger:
+- chan-name (optional): name of channel
+- linux,default-trigger (optional): see
+  Documentation/devicetree/bindings/leds/common.txt
 
 example 1) LP5521
 3 LED channels, external clock used. Channel names are 'lp5521_pri:channel0',
-'lp5521_pri:channel1' and 'lp5521_pri:channel2'
+'lp5521_pri:channel1' and 'lp5521_pri:channel2', with a heartbeat trigger
+on channel 0.
 
 lp5521@32 {
         compatible = "national,lp5521";
@@ -28,6 +37,7 @@ lp5521@32 {
         chan0 {
                 led-cur = /bits/ 8 <0x2f>;
                 max-cur = /bits/ 8 <0x5f>;
+                linux,default-trigger = "heartbeat";
         };
 
         chan1 {
@@ -145,3 +155,68 @@ lp5562@30 {
                 max-cur = /bits/ 8 <0x60>;
         };
 };
+
+example 4) LP8501
+9 channels are defined. The 'pwr-sel' is LP8501 specific property.
+Others are same as LP5523.
+
+lp8501@32 {
+        compatible = "ti,lp8501";
+        reg = <0x32>;
+        clock-mode = /bits/ 8 <2>;
+        pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */
+
+        chan0 {
+                chan-name = "d1";
+                led-cur = /bits/ 8 <0x14>;
+                max-cur = /bits/ 8 <0x20>;
+        };
+
+        chan1 {
+                chan-name = "d2";
+                led-cur = /bits/ 8 <0x14>;
+                max-cur = /bits/ 8 <0x20>;
+        };
+
+        chan2 {
+                chan-name = "d3";
+                led-cur = /bits/ 8 <0x14>;
+                max-cur = /bits/ 8 <0x20>;
+        };
+
+        chan3 {
+                chan-name = "d4";
+                led-cur = /bits/ 8 <0x14>;
+                max-cur = /bits/ 8 <0x20>;
+        };
+
+        chan4 {
+                chan-name = "d5";
+                led-cur = /bits/ 8 <0x14>;
+                max-cur = /bits/ 8 <0x20>;
+        };
+
+        chan5 {
+                chan-name = "d6";
+                led-cur = /bits/ 8 <0x14>;
+                max-cur = /bits/ 8 <0x20>;
+        };
+
+        chan6 {
+                chan-name = "d7";
+                led-cur = /bits/ 8 <0x14>;
+                max-cur = /bits/ 8 <0x20>;
+        };
+
+        chan7 {
+                chan-name = "d8";
+                led-cur = /bits/ 8 <0x14>;
+                max-cur = /bits/ 8 <0x20>;
+        };
+
+        chan8 {
+                chan-name = "d9";
+                led-cur = /bits/ 8 <0x14>;
+                max-cur = /bits/ 8 <0x20>;
+        };
+};
diff --git a/Documentation/devicetree/bindings/leds/pca963x.txt b/Documentation/devicetree/bindings/leds/pca963x.txt
new file mode 100644
index 000000000000..aece3eac1b63
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/pca963x.txt
@@ -0,0 +1,47 @@
+LEDs connected to pca9632, pca9633 or pca9634
+
+Required properties:
+- compatible : should be : "nxp,pca9632", "nxp,pca9633" or "nxp,pca9634"
+
+Optional properties:
+- nxp,totem-pole : use totem pole (push-pull) instead of default open-drain
+- nxp,hw-blink : use hardware blinking instead of software blinking
+
+Each led is represented as a sub-node of the nxp,pca963x device.
+
+LED sub-node properties:
+- label : (optional) see Documentation/devicetree/bindings/leds/common.txt
+- reg : number of LED line (could be from 0 to 3  in pca9632 or pca9633
+                or 0 to 7 in pca9634)
+- linux,default-trigger : (optional)
+   see Documentation/devicetree/bindings/leds/common.txt
+
+Examples:
+
+pca9632: pca9632 {
+        compatible = "nxp,pca9632";
+        #address-cells = <1>;
+        #size-cells = <0>;
+        reg = <0x62>;
+
+        red@0 {
+                label = "red";
+                reg = <0>;
+                linux,default-trigger = "none";
+        };
+        green@1 {
+                label = "green";
+                reg = <1>;
+                linux,default-trigger = "none";
+        };
+        blue@2 {
+                label = "blue";
+                reg = <2>;
+                linux,default-trigger = "none";
+        };
+        unused@3 {
+                label = "unused";
+                reg = <3>;
+                linux,default-trigger = "none";
+        };
+};
diff --git a/Documentation/devicetree/bindings/media/i2c/adv7343.txt b/Documentation/devicetree/bindings/media/i2c/adv7343.txt
new file mode 100644
index 000000000000..5653bc2428b8
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/adv7343.txt
@@ -0,0 +1,48 @@
+* Analog Devices adv7343 video encoder
+
+The ADV7343 are high speed, digital-to-analog video encoders in a 64-lead LQFP
+package. Six high speed, 3.3 V, 11-bit video DACs provide support for composite
+(CVBS), S-Video (Y-C), and component (YPrPb/RGB) analog outputs in standard
+definition (SD), enhanced definition (ED), or high definition (HD) video
+formats.
+
+Required Properties :
+- compatible: Must be "adi,adv7343"
+
+Optional Properties :
+- adi,power-mode-sleep-mode: on enable the current consumption is reduced to
+                              micro ampere level. All DACs and the internal PLL
+                              circuit are disabled.
+- adi,power-mode-pll-ctrl: PLL and oversampling control. This control allows
+                           internal PLL 1 circuit to be powered down and the
+                           oversampling to be switched off.
+- ad,adv7343-power-mode-dac: array configuring the power on/off DAC's 1..6,
+                              0 = OFF and 1 = ON, Default value when this
+                              property is not specified is <0 0 0 0 0 0>.
+- ad,adv7343-sd-config-dac-out: array configure SD DAC Output's 1 and 2, 0 = OFF
+                                 and 1 = ON, Default value when this property is
+                                 not specified is <0 0>.
+
+Example:
+
+i2c0@1c22000 {
+        ...
+        ...
+
+        adv7343@2a {
+                compatible = "adi,adv7343";
+                reg = <0x2a>;
+
+                port {
+                        adv7343_1: endpoint {
+                                        adi,power-mode-sleep-mode;
+                                        adi,power-mode-pll-ctrl;
+                                        /* Use DAC1..3, DAC6 */
+                                        adi,dac-enable = <1 1 1 0 0 1>;
+                                        /* Use SD DAC output 1 */
+                                        adi,sd-dac-enable = <1 0>;
+                        };
+                };
+        };
+        ...
+};
diff --git a/Documentation/devicetree/bindings/media/i2c/ths8200.txt b/Documentation/devicetree/bindings/media/i2c/ths8200.txt
new file mode 100644
index 000000000000..285f6ae7dfa9
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/ths8200.txt
@@ -0,0 +1,19 @@
+* Texas Instruments THS8200 video encoder
+
+The ths8200 device is a digital to analog converter used in DVD players, video
+recorders, set-top boxes.
+
+Required Properties :
+- compatible : value must be "ti,ths8200"
+
+Example:
+
+        i2c0@1c22000 {
+                ...
+                ...
+                ths8200@5c {
+                        compatible = "ti,ths8200";
+                        reg = <0x5c>;
+                };
+                ...
+        };
diff --git a/Documentation/devicetree/bindings/media/i2c/tvp7002.txt b/Documentation/devicetree/bindings/media/i2c/tvp7002.txt
new file mode 100644
index 000000000000..5f28b5d9abcc
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/tvp7002.txt
@@ -0,0 +1,53 @@
+* Texas Instruments TV7002 video decoder
+
+The TVP7002 device supports digitizing of video and graphics signal in RGB and
+YPbPr color space.
+
+Required Properties :
+- compatible : Must be "ti,tvp7002"
+
+Optional Properties:
+- hsync-active: HSYNC Polarity configuration for the bus. Default value when
+  this property is not specified is <0>.
+
+- vsync-active: VSYNC Polarity configuration for the bus. Default value when
+  this property is not specified is <0>.
+
+- pclk-sample: Clock polarity of the bus. Default value when this property is
+  not specified is <0>.
+
+- sync-on-green-active: Active state of Sync-on-green signal property of the
+  endpoint.
+  0 = Normal Operation (Active Low, Default)
+  1 = Inverted operation
+
+- field-even-active: Active-high Field ID output polarity control of the bus.
+  Under normal operation, the field ID output is set to logic 1 for an odd field
+  (field 1) and set to logic 0 for an even field (field 0).
+  0 = Normal Operation (Active Low, Default)
+  1 = FID output polarity inverted
+
+For further reading of port node refer Documentation/devicetree/bindings/media/
+video-interfaces.txt.
+
+Example:
+
+        i2c0@1c22000 {
+                ...
+                ...
+                tvp7002@5c {
+                        compatible = "ti,tvp7002";
+                        reg = <0x5c>;
+
+                        port {
+                                tvp7002_1: endpoint {
+                                        hsync-active = <1>;
+                                        vsync-active = <1>;
+                                        pclk-sample = <0>;
+                                        sync-on-green-active = <1>;
+                                        field-even-active = <0>;
+                                };
+                        };
+                };
+                ...
+        };
diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index df37b0230c75..f4181680831b 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -10,14 +10,15 @@ Required properties:
   - compatible : value should be either one among the following
         (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
         (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
+        (b) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
 
   - reg : Physical base address of the IP registers and length of memory
           mapped region.
 
   - interrupts : MFC interrupt number to the CPU.
-  - clocks : from common clock binding: handle to mfc clocks.
-  - clock-names : from common clock binding: must contain "sclk_mfc" and "mfc",
-                  corresponding to entries in the clocks property.
+  - clocks : from common clock binding: handle to mfc clock.
+  - clock-names : from common clock binding: must contain "mfc",
+                  corresponding to entry in the clocks property.
 
   - samsung,mfc-r : Base address of the first memory bank used by MFC
                     for DMA contiguous memory allocation and its size.
@@ -37,8 +38,8 @@ mfc: codec@13400000 {
         reg = <0x13400000 0x10000>;
         interrupts = <0 94 0>;
         samsung,power-domain = <&pd_mfc>;
-        clocks = <&clock 170>, <&clock 273>;
-        clock-names = "sclk_mfc", "mfc";
+        clocks = <&clock 273>;
+        clock-names = "mfc";
 };
 
 Board specific DT entry:
diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt b/Documentation/devicetree/bindings/media/video-interfaces.txt
index e022d2dc4962..ce719f89dd1c 100644
--- a/Documentation/devicetree/bindings/media/video-interfaces.txt
+++ b/Documentation/devicetree/bindings/media/video-interfaces.txt
@@ -88,6 +88,8 @@ Optional endpoint properties
 - field-even-active: field signal level during the even field data transmission.
 - pclk-sample: sample data on rising (1) or falling (0) edge of the pixel clock
   signal.
+- sync-on-green-active: active state of Sync-on-green (SoG) signal, 0/1 for
+  LOW/HIGH respectively.
 - data-lanes: an array of physical data lane indexes. Position of an entry
   determines the logical lane number, while the value of an entry indicates
   physical lane, e.g. for 2-lane MIPI CSI-2 bus we could have
diff --git a/Documentation/devicetree/bindings/metag/pdc-intc.txt b/Documentation/devicetree/bindings/metag/pdc-intc.txt
new file mode 100644
index 000000000000..a69118550344
--- /dev/null
+++ b/Documentation/devicetree/bindings/metag/pdc-intc.txt
@@ -0,0 +1,105 @@
+* ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
+
+This binding specifies what properties must be available in the device tree
+representation of a PDC IRQ controller. This has a number of input interrupt
+lines which can wake the system, and are passed on through output interrupt
+lines.
+
+Required properties:
+
+    - compatible: Specifies the compatibility list for the interrupt controller.
+      The type shall be <string> and the value shall include "img,pdc-intc".
+
+    - reg: Specifies the base PDC physical address(s) and size(s) of the
+      addressable register space. The type shall be <prop-encoded-array>.
+
+    - interrupt-controller: The presence of this property identifies the node
+      as an interrupt controller. No property value shall be defined.
+
+    - #interrupt-cells: Specifies the number of cells needed to encode an
+      interrupt source. The type shall be a <u32> and the value shall be 2.
+
+    - num-perips: Number of waking peripherals.
+
+    - num-syswakes: Number of SysWake inputs.
+
+    - interrupts: List of interrupt specifiers. The first specifier shall be the
+      shared SysWake interrupt, and remaining specifies shall be PDC peripheral
+      interrupts in order.
+
+* Interrupt Specifier Definition
+
+  Interrupt specifiers consists of 2 cells encoded as follows:
+
+    - <1st-cell>: The interrupt-number that identifies the interrupt source.
+                    0-7:  Peripheral interrupts
+                    8-15: SysWake interrupts
+
+    - <2nd-cell>: The level-sense information, encoded using the Linux interrupt
+                  flags as follows (only 4 valid for peripheral interrupts):
+                    0 = none (decided by software)
+                    1 = low-to-high edge triggered
+                    2 = high-to-low edge triggered
+                    3 = both edge triggered
+                    4 = active-high level-sensitive (required for perip irqs)
+                    8 = active-low level-sensitive
+
+* Examples
+
+Example 1:
+
+        /*
+         * TZ1090 PDC block
+         */
+        pdc: pdc@0x02006000 {
+                // This is an interrupt controller node.
+                interrupt-controller;
+
+                // Three cells to encode interrupt sources.
+                #interrupt-cells = <2>;
+
+                // Offset address of 0x02006000 and size of 0x1000.
+                reg = <0x02006000 0x1000>;
+
+                // Compatible with Meta hardware trigger block.
+                compatible = "img,pdc-intc";
+
+                // Three peripherals are connected.
+                num-perips = <3>;
+
+                // Four SysWakes are connected.
+                num-syswakes = <4>;
+
+                interrupts = <18 4 /* level */>, /* Syswakes */
+                             <30 4 /* level */>, /* Peripheral 0 (RTC) */
+                             <29 4 /* level */>, /* Peripheral 1 (IR) */
+                             <31 4 /* level */>; /* Peripheral 2 (WDT) */
+        };
+
+Example 2:
+
+        /*
+         * An SoC peripheral that is wired through the PDC.
+         */
+        rtc0 {
+                // The interrupt controller that this device is wired to.
+                interrupt-parent = <&pdc>;
+
+                // Interrupt source Peripheral 0
+                interrupts = <0   /* Peripheral 0 (RTC) */
+                              4>  /* IRQ_TYPE_LEVEL_HIGH */
+        };
+
+Example 3:
+
+        /*
+         * An interrupt generating device that is wired to a SysWake pin.
+         */
+        touchscreen0 {
+                // The interrupt controller that this device is wired to.
+                interrupt-parent = <&pdc>;
+
+                // Interrupt source SysWake 0 that is active-low level-sensitive
+                interrupts = <8 /* SysWake0 */
+                              8 /* IRQ_TYPE_LEVEL_LOW */>;
+        };
diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt
index e0e59c58a1f9..5f229c5f6da9 100644
--- a/Documentation/devicetree/bindings/mfd/cros-ec.txt
+++ b/Documentation/devicetree/bindings/mfd/cros-ec.txt
@@ -4,7 +4,7 @@ Google's ChromeOS EC is a Cortex-M device which talks to the AP and
 implements various function such as keyboard and battery charging.
 
 The EC can be connect through various means (I2C, SPI, LPC) and the
-compatible string used depends on the inteface. Each connection method has
+compatible string used depends on the interface. Each connection method has
 its own driver which connects to the top level interface-agnostic EC driver.
 Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to
 the top-level driver.
diff --git a/Documentation/devicetree/bindings/mfd/palmas.txt b/Documentation/devicetree/bindings/mfd/palmas.txt
index 892537d1a48f..e5f0f8303461 100644
--- a/Documentation/devicetree/bindings/mfd/palmas.txt
+++ b/Documentation/devicetree/bindings/mfd/palmas.txt
@@ -5,6 +5,7 @@ twl6035 (palmas)
 twl6037 (palmas)
 tps65913 (palmas)
 tps65914 (palmas)
+tps659038
 
 Required properties:
 - compatible : Should be from the list
@@ -14,6 +15,7 @@ Required properties:
   ti,tps65913
   ti,tps65914
   ti,tps80036
+  ti,tps659038
 and also the generic series names
   ti,palmas
 - interrupt-controller : palmas has its own internal IRQs
diff --git a/Documentation/devicetree/bindings/mfd/s2mps11.txt b/Documentation/devicetree/bindings/mfd/s2mps11.txt
new file mode 100644
index 000000000000..c9332c626021
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/s2mps11.txt
@@ -0,0 +1,109 @@
+
+* Samsung S2MPS11 Voltage and Current Regulator
+
+The Samsung S2MP211 is a multi-function device which includes voltage and
+current regulators, RTC, charger controller and other sub-blocks. It is
+interfaced to the host controller using a I2C interface. Each sub-block is
+addressed by the host system using different I2C slave address.
+
+Required properties:
+- compatible: Should be "samsung,s2mps11-pmic".
+- reg: Specifies the I2C slave address of the pmic block. It should be 0x66.
+
+Optional properties:
+- interrupt-parent: Specifies the phandle of the interrupt controller to which
+  the interrupts from s2mps11 are delivered to.
+- interrupts: Interrupt specifiers for interrupt sources.
+
+Optional nodes:
+- clocks: s2mps11 provides three(AP/CP/BT) buffered 32.768 KHz outputs, so to
+  register these as clocks with common clock framework instantiate a sub-node
+  named "clocks". It uses the common clock binding documented in :
+  [Documentation/devicetree/bindings/clock/clock-bindings.txt]
+  - #clock-cells: should be 1.
+
+  - The following is the list of clocks generated by the controller. Each clock
+    is assigned an identifier and client nodes use this identifier to specify
+    the clock which they consume.
+    Clock               ID
+    ----------------------
+    32KhzAP             0
+    32KhzCP             1
+    32KhzBT             2
+
+- regulators: The regulators of s2mps11 that have to be instantiated should be
+included in a sub-node named 'regulators'. Regulator nodes included in this
+sub-node should be of the format as listed below.
+
+        regulator_name {
+                [standard regulator constraints....];
+        };
+
+ regulator-ramp-delay for BUCKs = [6250/12500/25000(default)/50000] uV/us
+
+ BUCK[2/3/4/6] supports disabling ramp delay on hardware, so explictly
+ regulator-ramp-delay = <0> can be used for them to disable ramp delay.
+ In absence of regulator-ramp-delay property, default ramp delay will be used.
+
+NOTE: Some BUCKs share the ramp rate setting i.e. same ramp value will be set
+for a particular group of BUCKs. So provide same regulator-ramp-delay<value>.
+Grouping of BUCKs sharing ramp rate setting is as follow : BUCK[1, 6],
+BUCK[3, 4], and BUCK[7, 8, 10]
+
+The regulator constraints inside the regulator nodes use the standard regulator
+bindings which are documented elsewhere.
+
+The following are the names of the regulators that the s2mps11 pmic block
+supports. Note: The 'n' in LDOn and BUCKn represents the LDO or BUCK number
+as per the datasheet of s2mps11.
+
+        - LDOn
+                  - valid values for n are 1 to 28
+                  - Example: LDO0, LD01, LDO28
+        - BUCKn
+                  - valid values for n are 1 to 9.
+                  - Example: BUCK1, BUCK2, BUCK9
+
+Example:
+
+        s2mps11_pmic@66 {
+                compatible = "samsung,s2mps11-pmic";
+                reg = <0x66>;
+
+                s2m_osc: clocks{
+                        #clock-cells = 1;
+                        clock-output-names = "xx", "yy", "zz";
+                };
+
+                regulators {
+                        ldo1_reg: LDO1 {
+                                regulator-name = "VDD_ABB_3.3V";
+                                regulator-min-microvolt = <3300000>;
+                                regulator-max-microvolt = <3300000>;
+                        };
+
+                        ldo2_reg: LDO2 {
+                                regulator-name = "VDD_ALIVE_1.1V";
+                                regulator-min-microvolt = <1100000>;
+                                regulator-max-microvolt = <1100000>;
+                                regulator-always-on;
+                        };
+
+                        buck1_reg: BUCK1 {
+                                regulator-name = "vdd_mif";
+                                regulator-min-microvolt = <950000>;
+                                regulator-max-microvolt = <1350000>;
+                                regulator-always-on;
+                                regulator-boot-on;
+                        };
+
+                        buck2_reg: BUCK2 {
+                                regulator-name = "vdd_arm";
+                                regulator-min-microvolt = <950000>;
+                                regulator-max-microvolt = <1350000>;
+                                regulator-always-on;
+                                regulator-boot-on;
+                                regulator-ramp-delay = <50000>;
+                        };
+                };
+        };
diff --git a/Documentation/devicetree/bindings/misc/allwinner,sunxi-sid.txt b/Documentation/devicetree/bindings/misc/allwinner,sunxi-sid.txt
new file mode 100644
index 000000000000..68ba37295565
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/allwinner,sunxi-sid.txt
@@ -0,0 +1,17 @@
+Allwinner sunxi-sid
+
+Required properties:
+- compatible: "allwinner,sun4i-sid" or "allwinner,sun7i-a20-sid".
+- reg: Should contain registers location and length
+
+Example for sun4i:
+        sid@01c23800 {
+                compatible = "allwinner,sun4i-sid";
+                reg = <0x01c23800 0x10>
+        };
+
+Example for sun7i:
+        sid@01c23800 {
+                compatible = "allwinner,sun7i-a20-sid";
+                reg = <0x01c23800 0x200>
+        };
diff --git a/Documentation/devicetree/bindings/misc/atmel-ssc.txt b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
index 38e51ad2e07e..a45ae08c8ed1 100644
--- a/Documentation/devicetree/bindings/misc/atmel-ssc.txt
+++ b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
@@ -7,9 +7,30 @@ Required properties:
 - reg: Should contain SSC registers location and length
 - interrupts: Should contain SSC interrupt
 
-Example:
+
+Required properties for devices compatible with "atmel,at91sam9g45-ssc":
+- dmas: DMA specifier, consisting of a phandle to DMA controller node,
+  the memory interface and SSC DMA channel ID (for tx and rx).
+  See Documentation/devicetree/bindings/dma/atmel-dma.txt for details.
+- dma-names: Must be "tx", "rx".
+
+Examples:
+- PDC transfer:
 ssc0: ssc@fffbc000 {
         compatible = "atmel,at91rm9200-ssc";
         reg = <0xfffbc000 0x4000>;
         interrupts = <14 4 5>;
 };
+
+- DMA transfer:
+ssc0: ssc@f0010000 {
+      compatible = "atmel,at91sam9g45-ssc";
+      reg = <0xf0010000 0x4000>;
+      interrupts = <28 4 5>;
+      dmas = <&dma0 1 13>,
+             <&dma0 1 14>;
+      dma-names = "tx", "rx";
+      pinctrl-names = "default";
+      pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+      status = "disabled";
+};
diff --git a/Documentation/devicetree/bindings/misc/smc.txt b/Documentation/devicetree/bindings/misc/smc.txt
index 02b428136177..6c9f176f3571 100644
--- a/Documentation/devicetree/bindings/misc/smc.txt
+++ b/Documentation/devicetree/bindings/misc/smc.txt
@@ -4,11 +4,12 @@ This binding defines the location of the bounce buffer
 used for non-secure to secure communications.
 
 Required properties:
-- compatible : "bcm,kona-smc"
+- compatible : "brcm,kona-smc"
+- DEPRECATED: compatible : "bcm,kona-smc"
 - reg : Location and size of bounce buffer
 
 Example:
         smc@0x3404c000 {
-                compatible = "bcm,bcm11351-smc", "bcm,kona-smc";
+                compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
                 reg = <0x3404c000 0x400>; //1 KiB in SRAM
         };
diff --git a/Documentation/devicetree/bindings/misc/ti,dac7512.txt b/Documentation/devicetree/bindings/misc/ti,dac7512.txt
new file mode 100644
index 000000000000..1db45939dac9
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/ti,dac7512.txt
@@ -0,0 +1,20 @@
+TI DAC7512 DEVICETREE BINDINGS
+
+Required properties:
+
+        - "compatible"          Must be set to "ti,dac7512"
+
+Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt
+apply. In particular, "reg" and "spi-max-frequency" properties must be given.
+
+
+Example:
+
+        spi_master {
+                dac7512: dac7512@0 {
+                        compatible = "ti,dac7512";
+                        reg = <0>; /* CS0 */
+                        spi-max-frequency = <1000000>;
+                };
+        };
+
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 6d1c0988cfc7..c67b975c8906 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -1,11 +1,11 @@
-* Samsung Exynos specific extensions to the Synopsis Designware Mobile
+* Samsung Exynos specific extensions to the Synopsys Designware Mobile
   Storage Host Controller
 
-The Synopsis designware mobile storage host controller is used to interface
+The Synopsys designware mobile storage host controller is used to interface
 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
-differences between the core Synopsis dw mshc controller properties described
-by synopsis-dw-mshc.txt and the properties used by the Samsung Exynos specific
-extensions to the Synopsis Designware Mobile Storage Host Controller.
+differences between the core Synopsys dw mshc controller properties described
+by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
+extensions to the Synopsys Designware Mobile Storage Host Controller.
 
 Required Properties:
 
diff --git a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
index bd9be0b5bc20..b7943f3f9995 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -19,6 +19,9 @@ Optional properties:
     "bus-width = <1>" property.
   - sdhci,auto-cmd12: specifies that a controller can only handle auto
     CMD12.
+  - voltage-ranges : two cells are required, first cell specifies minimum
+    slot voltage (mV), second cell specifies maximum slot voltage (mV).
+    Several ranges could be specified.
 
 Example:
 
@@ -29,4 +32,5 @@ sdhci@2e000 {
         interrupt-parent = <&ipic>;
         /* Filled in by U-Boot */
         clock-frequency = <0>;
+        voltage-ranges = <3300 3300>;
 };
diff --git a/Documentation/devicetree/bindings/mmc/bcm,kona-sdhci.txt b/Documentation/devicetree/bindings/mmc/kona-sdhci.txt
index 094ae010f2fb..789fb07a426d 100644
--- a/Documentation/devicetree/bindings/mmc/bcm,kona-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/kona-sdhci.txt
@@ -4,12 +4,13 @@ This file documents differences between the core properties in mmc.txt
 and the properties present in the bcm281xx SDHCI
 
 Required properties:
-- compatible : Should be "bcm,kona-sdhci"
+- compatible : Should be "brcm,kona-sdhci"
+- DEPRECATED: compatible : Should be "bcm,kona-sdhci"
 
 Example:
 
 sdio2: sdio@0x3f1a0000 {
-        compatible = "bcm,kona-sdhci";
+        compatible = "brcm,kona-sdhci";
         reg = <0x3f1a0000 0x10000>;
         interrupts = <0x0 74 0x4>;
 };
diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
index 8a3d91d47b6a..c559f3f36309 100644
--- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
@@ -1,11 +1,11 @@
-* Rockchip specific extensions to the Synopsis Designware Mobile
+* Rockchip specific extensions to the Synopsys Designware Mobile
   Storage Host Controller
 
-The Synopsis designware mobile storage host controller is used to interface
+The Synopsys designware mobile storage host controller is used to interface
 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
-differences between the core Synopsis dw mshc controller properties described
-by synopsis-dw-mshc.txt and the properties used by the Rockchip specific
-extensions to the Synopsis Designware Mobile Storage Host Controller.
+differences between the core Synopsys dw mshc controller properties described
+by synopsys-dw-mshc.txt and the properties used by the Rockchip specific
+extensions to the Synopsys Designware Mobile Storage Host Controller.
 
 Required Properties:
 
diff --git a/Documentation/devicetree/bindings/mmc/synopsis-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index cdcebea9c6f5..066a78b034ca 100644
--- a/Documentation/devicetree/bindings/mmc/synopsis-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -1,14 +1,14 @@
-* Synopsis Designware Mobile Storage Host Controller
+* Synopsys Designware Mobile Storage Host Controller
 
-The Synopsis designware mobile storage host controller is used to interface
+The Synopsys designware mobile storage host controller is used to interface
 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
 differences between the core mmc properties described by mmc.txt and the
-properties used by the Synopsis Designware Mobile Storage Host Controller.
+properties used by the Synopsys Designware Mobile Storage Host Controller.
 
 Required Properties:
 
 * compatible: should be
-        - snps,dw-mshc: for controllers compliant with synopsis dw-mshc.
+        - snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
 * #address-cells: should be 1.
 * #size-cells: should be 0.
 
diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index ed271fc255b2..8c8908ab84ba 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -20,8 +20,29 @@ ti,dual-volt: boolean, supports dual voltage cards
 ti,non-removable: non-removable slot (like eMMC)
 ti,needs-special-reset: Requires a special softreset sequence
 ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
+dmas: List of DMA specifiers with the controller specific format
+as described in the generic DMA client binding. A tx and rx
+specifier is required.
+dma-names: List of DMA request names. These strings correspond
+1:1 with the DMA specifiers listed in dmas. The string naming is
+to be "rx" and "tx" for RX and TX DMA requests, respectively.
+
+Examples:
+
+[hwmod populated DMA resources]
+
+        mmc1: mmc@0x4809c000 {
+                compatible = "ti,omap4-hsmmc";
+                reg = <0x4809c000 0x400>;
+                ti,hwmods = "mmc1";
+                ti,dual-volt;
+                bus-width = <4>;
+                vmmc-supply = <&vmmc>; /* phandle to regulator node */
+                ti,non-removable;
+        };
+
+[generic DMA request binding]
 
-Example:
         mmc1: mmc@0x4809c000 {
                 compatible = "ti,omap4-hsmmc";
                 reg = <0x4809c000 0x400>;
@@ -30,4 +51,7 @@ Example:
                 bus-width = <4>;
                 vmmc-supply = <&vmmc>; /* phandle to regulator node */
                 ti,non-removable;
+                dmas = <&edma 24
+                        &edma 25>;
+                dma-names = "tx", "rx";
         };
diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
index df204e18e030..6a2a1160a70d 100644
--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
@@ -9,12 +9,15 @@ compulsory and any optional properties, common to all SD/MMC drivers, as
 described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
 optional bindings can be used.
 
+Required properties:
+- compatible:   "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
+                "renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
+                "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
+                "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
+                "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
+                "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
+                "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
+                "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
+
 Optional properties:
 - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
-
-When used with Renesas SDHI hardware, the following compatibility strings
-configure various model-specific properties:
-
-"renesas,sh7372-sdhi":  (default) compatible with SH7372
-"renesas,r8a7740-sdhi": compatible with R8A7740: certain MMC/SD commands have to
-                        wait for the interface to become idle.
diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
index d555421ea49f..c4728839d0c1 100644
--- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
@@ -15,6 +15,7 @@ Required properties:
   optional gpio and may be set to 0 if not present.
 
 Optional properties:
+- atmel,nand-has-dma : boolean to support dma transfer for nand read/write.
 - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
   Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
   "soft_bch".
@@ -29,6 +30,14 @@ Optional properties:
   sector size 1024.
 - nand-bus-width : 8 or 16 bus width if not present 8
 - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
+- Nand Flash Controller(NFC) is a slave driver under Atmel nand flash
+  - Required properties:
+    - compatible : "atmel,sama5d3-nfc".
+    - reg : should specify the address and size used for NFC command registers,
+            NFC registers and NFC Sram. NFC Sram address and size can be absent
+            if don't want to use it.
+  - Optional properties:
+    - atmel,write-by-sram: boolean to enable NFC write by sram.
 
 Examples:
 nand0: nand@40000000,0 {
@@ -77,3 +86,22 @@ nand0: nand@40000000 {
                 ...
         };
 };
+
+/* for NFC supported chips */
+nand0: nand@40000000 {
+        compatible = "atmel,at91rm9200-nand";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+        ...
+        nfc@70000000 {
+                compatible = "atmel,sama5d3-nfc";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <
+                        0x70000000 0x10000000   /* NFC Command Registers */
+                        0xffffc000 0x00000070   /* NFC HSMC regs */
+                        0x00200000 0x00100000   /* NFC SRAM banks */
+                >;
+        };
+};
diff --git a/Documentation/devicetree/bindings/mtd/fsmc-nand.txt b/Documentation/devicetree/bindings/mtd/fsmc-nand.txt
index 2240ac09f6ba..ec42935f3908 100644
--- a/Documentation/devicetree/bindings/mtd/fsmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/fsmc-nand.txt
@@ -1,4 +1,5 @@
-* FSMC NAND
+ST Microelectronics Flexible Static Memory Controller (FSMC)
+NAND Interface
 
 Required properties:
 - compatible : "st,spear600-fsmc-nand", "stericsson,fsmc-nand"
@@ -9,6 +10,26 @@ Optional properties:
 - bank-width : Width (in bytes) of the device.  If not present, the width
   defaults to 1 byte
 - nand-skip-bbtscan: Indicates the the BBT scanning should be skipped
+- timings: array of 6 bytes for NAND timings. The meanings of these bytes
+  are:
+  byte 0 TCLR  : CLE to RE delay in number of AHB clock cycles, only 4 bits
+                 are valid. Zero means one clockcycle, 15 means 16 clock
+                 cycles.
+  byte 1 TAR   : ALE to RE delay, 4 bits are valid. Same format as TCLR.
+  byte 2 THIZ  : number of HCLK clock cycles during which the data bus is
+                 kept in Hi-Z (tristate) after the start of a write access.
+                 Only valid for write transactions. Zero means zero cycles,
+                 255 means 255 cycles.
+  byte 3 THOLD : number of HCLK clock cycles to hold the address (and data
+                 when writing) after the command deassertation. Zero means
+                 one cycle, 255 means 256 cycles.
+  byte 4 TWAIT : number of HCLK clock cycles to assert the command to the
+                 NAND flash in response to SMWAITn. Zero means 1 cycle,
+                 255 means 256 cycles.
+  byte 5 TSET  : number of HCLK clock cycles to assert the address before the
+                 command is asserted. Zero means one cycle, 255 means 256
+                 cycles.
+- bank: default NAND bank to use (0-3 are valid, 0 is the default).
 
 Example:
 
@@ -24,6 +45,8 @@ Example:
 
                 bank-width = <1>;
                 nand-skip-bbtscan;
+                timings = /bits/ 8 <0 0 0 2 3 0>;
+                bank = <1>;
 
                 partition@0 {
                         ...
diff --git a/Documentation/devicetree/bindings/mtd/partition.txt b/Documentation/devicetree/bindings/mtd/partition.txt
index 9315ac96b49b..8e5557da1955 100644
--- a/Documentation/devicetree/bindings/mtd/partition.txt
+++ b/Documentation/devicetree/bindings/mtd/partition.txt
@@ -4,6 +4,7 @@ Partitions can be represented by sub-nodes of an mtd device. This can be used
 on platforms which have strong conventions about which portions of a flash are
 used for what purposes, but which don't use an on-flash partition table such
 as RedBoot.
+NOTE: if the sub-node has a compatible string, then it is not a partition.
 
 #address-cells & #size-cells must both be present in the mtd device. There are
 two valid values for both:
diff --git a/Documentation/devicetree/bindings/net/can/atmel-can.txt b/Documentation/devicetree/bindings/net/can/atmel-can.txt
index 72cf0c5daff4..14e52a0d86ec 100644
--- a/Documentation/devicetree/bindings/net/can/atmel-can.txt
+++ b/Documentation/devicetree/bindings/net/can/atmel-can.txt
@@ -8,7 +8,7 @@ Required properties:
 Example:
 
         can0: can@f000c000 {
-                compatbile = "atmel,at91sam9x5-can";
+                compatible = "atmel,at91sam9x5-can";
                 reg = <0xf000c000 0x300>;
                 interrupts = <40 4 5>
         };
diff --git a/Documentation/devicetree/bindings/net/can/sja1000.txt b/Documentation/devicetree/bindings/net/can/sja1000.txt
index c2dbcec0ee31..f2105a47ec87 100644
--- a/Documentation/devicetree/bindings/net/can/sja1000.txt
+++ b/Documentation/devicetree/bindings/net/can/sja1000.txt
@@ -37,7 +37,7 @@ Optional properties:
         If not specified or if the specified value is 0, the CLKOUT pin
         will be disabled.
 
-- nxp,no-comparator-bypass : Allows to disable the CAN input comperator.
+- nxp,no-comparator-bypass : Allows to disable the CAN input comparator.
 
 For further information, please have a look to the SJA1000 data sheet.
 
diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index 2c6be0377f55..d2ea4605d078 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -86,6 +86,7 @@ General Properties:
 
 Clock Properties:
 
+  - fsl,cksel        Timer reference clock source.
   - fsl,tclk-period  Timer reference clock period in nanoseconds.
   - fsl,tmr-prsc     Prescaler, divides the output clock.
   - fsl,tmr-add      Frequency compensation value.
@@ -97,7 +98,7 @@ Clock Properties:
   clock. You must choose these carefully for the clock to work right.
   Here is how to figure good values:
 
-  TimerOsc     = system clock               MHz
+  TimerOsc     = selected reference clock   MHz
   tclk_period  = desired clock period       nanoseconds
   NominalFreq  = 1000 / tclk_period         MHz
   FreqDivRatio = TimerOsc / NominalFreq     (must be greater that 1.0)
@@ -114,6 +115,20 @@ Clock Properties:
   Pulse Per Second (PPS) signal, since this will be offered to the PPS
   subsystem to synchronize the Linux clock.
 
+  Reference clock source is determined by the value, which is holded
+  in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
+  value, which will be directly written in those bits, that is why,
+  according to reference manual, the next clock sources can be used:
+
+  <0> - external high precision timer reference clock (TSEC_TMR_CLK
+        input is used for this purpose);
+  <1> - eTSEC system clock;
+  <2> - eTSEC1 transmit clock;
+  <3> - RTC clock input.
+
+  When this attribute is not used, eTSEC system clock will serve as
+  IEEE 1588 timer reference clock.
+
 Example:
 
         ptp_clock@24E00 {
@@ -121,6 +136,7 @@ Example:
                 reg = <0x24E00 0xB0>;
                 interrupts = <12 0x8 13 0x8>;
                 interrupt-parent = < &ipic >;
+                fsl,cksel       = <1>;
                 fsl,tclk-period = <10>;
                 fsl,tmr-prsc    = <100>;
                 fsl,tmr-add     = <0x999999A4>;
diff --git a/Documentation/devicetree/bindings/net/micrel-ksz9021.txt b/Documentation/devicetree/bindings/net/micrel-ksz9021.txt
new file mode 100644
index 000000000000..997a63f1aea1
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/micrel-ksz9021.txt
@@ -0,0 +1,49 @@
+Micrel KSZ9021 Gigabit Ethernet PHY
+
+Some boards require special tuning values, particularly when it comes to
+clock delays.  You can specify clock delay values by adding
+micrel-specific properties to an Ethernet OF device node.
+
+All skew control options are specified in picoseconds.  The minimum
+value is 0, and the maximum value is 3000.
+
+Optional properties:
+ - rxc-skew-ps : Skew control of RXC pad
+ - rxdv-skew-ps : Skew control of RX CTL pad
+ - txc-skew-ps : Skew control of TXC pad
+ - txen-skew-ps : Skew control of TX_CTL pad
+ - rxd0-skew-ps : Skew control of RX data 0 pad
+ - rxd1-skew-ps : Skew control of RX data 1 pad
+ - rxd2-skew-ps : Skew control of RX data 2 pad
+ - rxd3-skew-ps : Skew control of RX data 3 pad
+ - txd0-skew-ps : Skew control of TX data 0 pad
+ - txd1-skew-ps : Skew control of TX data 1 pad
+ - txd2-skew-ps : Skew control of TX data 2 pad
+ - txd3-skew-ps : Skew control of TX data 3 pad
+
+Examples:
+
+        /* Attach to an Ethernet device with autodetected PHY */
+        &enet {
+                rxc-skew-ps = <3000>;
+                rxdv-skew-ps = <0>;
+                txc-skew-ps = <3000>;
+                txen-skew-ps = <0>;
+                status = "okay";
+        };
+
+        /* Attach to an explicitly-specified PHY */
+        mdio {
+                phy0: ethernet-phy@0 {
+                        rxc-skew-ps = <3000>;
+                        rxdv-skew-ps = <0>;
+                        txc-skew-ps = <3000>;
+                        txen-skew-ps = <0>;
+                        reg = <0>;
+                };
+        };
+        ethernet@70000 {
+                status = "okay";
+                phy = <&phy0>;
+                phy-mode = "rgmii-id";
+        };
diff --git a/Documentation/devicetree/bindings/net/moxa,moxart-mac.txt b/Documentation/devicetree/bindings/net/moxa,moxart-mac.txt
new file mode 100644
index 000000000000..583418b2c127
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/moxa,moxart-mac.txt
@@ -0,0 +1,21 @@
+MOXA ART Ethernet Controller
+
+Required properties:
+
+- compatible : Must be "moxa,moxart-mac"
+- reg : Should contain register location and length
+- interrupts : Should contain the mac interrupt number
+
+Example:
+
+        mac0: mac@90900000 {
+                compatible = "moxa,moxart-mac";
+                reg =   <0x90900000 0x100>;
+                interrupts = <25 0>;
+        };
+
+        mac1: mac@92000000 {
+                compatible = "moxa,moxart-mac";
+                reg =   <0x92000000 0x100>;
+                interrupts = <27 0>;
+        };
diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
index 261c563b5f06..eba0e5e59ebe 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -22,6 +22,11 @@ Required properties:
 - snps,pbl              Programmable Burst Length
 - snps,fixed-burst      Program the DMA to use the fixed burst mode
 - snps,mixed-burst      Program the DMA to use the mixed burst mode
+- snps,force_thresh_dma_mode    Force DMA to use the threshold mode for
+                                both tx and rx
+- snps,force_sf_dma_mode        Force DMA to use the Store and Forward
+                                mode for both tx and rx. This flag is
+                                ignored if force_thresh_dma_mode is set.
 
 Optional properties:
 - mac-address: 6 bytes, mac address
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index e2371f5cdebe..e216af356847 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -1,4 +1,4 @@
-* Synopsis Designware PCIe interface
+* Synopsys Designware PCIe interface
 
 Required properties:
 - compatible: should contain "snps,dw-pcie" to identify the
@@ -18,6 +18,7 @@ Required properties:
 - interrupt-map-mask and interrupt-map: standard PCI properties
         to define the mapping of the PCIe interface to interrupt
         numbers.
+- num-lanes: number of lanes to use
 - reset-gpio: gpio pin number of power good signal
 
 Example:
@@ -41,6 +42,7 @@ SoC specific DT Entry:
                 #interrupt-cells = <1>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0x0 0 &gic 53>;
+                num-lanes = <4>;
         };
 
         pcie@2a0000 {
@@ -60,6 +62,7 @@ SoC specific DT Entry:
                 #interrupt-cells = <1>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0x0 0 &gic 56>;
+                num-lanes = <4>;
         };
 
 Board specific DT Entry:
diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt
index f8d405897a94..08c716b2c6b6 100644
--- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt
+++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt
@@ -1,20 +1,62 @@
 * Marvell EBU PCIe interfaces
 
 Mandatory properties:
+
 - compatible: one of the following values:
     marvell,armada-370-pcie
     marvell,armada-xp-pcie
+    marvell,dove-pcie
     marvell,kirkwood-pcie
 - #address-cells, set to <3>
 - #size-cells, set to <2>
 - #interrupt-cells, set to <1>
 - bus-range: PCI bus numbers covered
 - device_type, set to "pci"
-- ranges: ranges for the PCI memory and I/O regions, as well as the
-  MMIO registers to control the PCIe interfaces.
+- ranges: ranges describing the MMIO registers to control the PCIe
+  interfaces, and ranges describing the MBus windows needed to access
+  the memory and I/O regions of each PCIe interface.
+- msi-parent: Link to the hardware entity that serves as the Message
+  Signaled Interrupt controller for this PCI controller.
+
+The ranges describing the MMIO registers have the following layout:
+
+    0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s
+
+where:
+
+  * r is a 32-bits value that gives the offset of the MMIO
+  registers of this PCIe interface, from the base of the internal
+  registers.
+
+  * s is a 32-bits value that give the size of this MMIO
+  registers area. This range entry translates the '0x82000000 0 r' PCI
+  address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part
+  of the internal register window (as identified by MBUS_ID(0xf0,
+  0x01)).
+
+The ranges describing the MBus windows have the following layout:
+
+    0x8t000000 s 0     MBUS_ID(w, a) 0 1 0
+
+where:
+
+   * t is the type of the MBus window (as defined by the standard PCI DT
+   bindings), 1 for I/O and 2 for memory.
 
-In addition, the Device Tree node must have sub-nodes describing each
+   * s is the PCI slot that corresponds to this PCIe interface
+
+   * w is the 'target ID' value for the MBus window
+
+   * a the 'attribute' value for the MBus window.
+
+Since the location and size of the different MBus windows is not fixed in
+hardware, and only determined in runtime, those ranges cover the full first
+4 GB of the physical address space, and do not translate into a valid CPU
+address.
+
+In addition, the device tree node must have sub-nodes describing each
 PCIe interface, having the following mandatory properties:
+
 - reg: used only for interrupt mapping, so only the first four bytes
   are used to refer to the correct bus number and device number.
 - assigned-addresses: reference to the MMIO registers used to control
@@ -26,7 +68,8 @@ PCIe interface, having the following mandatory properties:
 - #address-cells, set to <3>
 - #size-cells, set to <2>
 - #interrupt-cells, set to <1>
-- ranges, empty property.
+- ranges, translating the MBus windows ranges of the parent node into
+  standard PCI addresses.
 - interrupt-map-mask and interrupt-map, standard PCI properties to
   define the mapping of the PCIe interface to interrupt numbers.
 
@@ -34,6 +77,8 @@ and the following optional properties:
 - marvell,pcie-lane: the physical PCIe lane number, for ports having
   multiple lanes. If this property is not found, we assume that the
   value is 0.
+- reset-gpios: optional gpio to PERST#
+- reset-delay-us: delay in us to wait after reset de-assertion
 
 Example:
 
@@ -46,44 +91,73 @@ pcie-controller {
         #size-cells = <2>;
 
         bus-range = <0x00 0xff>;
+        msi-parent = <&mpic>;
 
-        ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000   /* Port 0.0 registers */
-                  0x82000000 0 0xd0042000 0xd0042000 0 0x00002000   /* Port 2.0 registers */
-                  0x82000000 0 0xd0044000 0xd0044000 0 0x00002000   /* Port 0.1 registers */
-                  0x82000000 0 0xd0048000 0xd0048000 0 0x00002000   /* Port 0.2 registers */
-                  0x82000000 0 0xd004c000 0xd004c000 0 0x00002000   /* Port 0.3 registers */
-                  0x82000000 0 0xd0080000 0xd0080000 0 0x00002000   /* Port 1.0 registers */
-                  0x82000000 0 0xd0082000 0xd0082000 0 0x00002000   /* Port 3.0 registers */
-                  0x82000000 0 0xd0084000 0xd0084000 0 0x00002000   /* Port 1.1 registers */
-                  0x82000000 0 0xd0088000 0xd0088000 0 0x00002000   /* Port 1.2 registers */
-                  0x82000000 0 0xd008c000 0xd008c000 0 0x00002000   /* Port 1.3 registers */
-                  0x82000000 0 0xe0000000 0xe0000000 0 0x08000000   /* non-prefetchable memory */
-                  0x81000000 0 0          0xe8000000 0 0x00100000>; /* downstream I/O */
+        ranges =
+               <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000   /* Port 0.0 registers */
+                0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000   /* Port 2.0 registers */
+                0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000   /* Port 0.1 registers */
+                0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000   /* Port 0.2 registers */
+                0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000   /* Port 0.3 registers */
+                0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000   /* Port 1.0 registers */
+                0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000   /* Port 3.0 registers */
+                0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000   /* Port 1.1 registers */
+                0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000   /* Port 1.2 registers */
+                0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000   /* Port 1.3 registers */
+                0x82000000 0x1 0     MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
+                0x81000000 0x1 0     MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */
+                0x82000000 0x2 0     MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
+                0x81000000 0x2 0     MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 0.1 IO  */
+                0x82000000 0x3 0     MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */
+                0x81000000 0x3 0     MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO  */
+                0x82000000 0x4 0     MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
+                0x81000000 0x4 0     MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO  */
+
+                0x82000000 0x5 0     MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
+                0x81000000 0x5 0     MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO  */
+                0x82000000 0x6 0     MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */
+                0x81000000 0x6 0     MBUS_ID(0x08, 0xd0) 0 1 0 /* Port 1.1 IO  */
+                0x82000000 0x7 0     MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */
+                0x81000000 0x7 0     MBUS_ID(0x08, 0xb0) 0 1 0 /* Port 1.2 IO  */
+                0x82000000 0x8 0     MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */
+                0x81000000 0x8 0     MBUS_ID(0x08, 0x70) 0 1 0 /* Port 1.3 IO  */
+
+                0x82000000 0x9 0     MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
+                0x81000000 0x9 0     MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO  */
+
+                0x82000000 0xa 0     MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
+                0x81000000 0xa 0     MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO  */>;
 
         pcie@1,0 {
                 device_type = "pci";
-                assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>;
+                assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
                 reg = <0x0800 0 0 0 0>;
                 #address-cells = <3>;
                 #size-cells = <2>;
                 #interrupt-cells = <1>;
-                ranges;
+                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
+                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0 0 0 0 &mpic 58>;
                 marvell,pcie-port = <0>;
                 marvell,pcie-lane = <0>;
+                /* low-active PERST# reset on GPIO 25 */
+                reset-gpios = <&gpio0 25 1>;
+                /* wait 20ms for device settle after reset deassertion */
+                reset-delay-us = <20000>;
                 clocks = <&gateclk 5>;
                 status = "disabled";
         };
 
         pcie@2,0 {
                 device_type = "pci";
-                assigned-addresses = <0x82001000 0 0xd0044000 0 0x2000>;
+                assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
                 reg = <0x1000 0 0 0 0>;
                 #address-cells = <3>;
                 #size-cells = <2>;
                 #interrupt-cells = <1>;
-                ranges;
+                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
+                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0 0 0 0 &mpic 59>;
                 marvell,pcie-port = <0>;
@@ -94,12 +168,13 @@ pcie-controller {
 
         pcie@3,0 {
                 device_type = "pci";
-                assigned-addresses = <0x82001800 0 0xd0048000 0 0x2000>;
+                assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
                 reg = <0x1800 0 0 0 0>;
                 #address-cells = <3>;
                 #size-cells = <2>;
                 #interrupt-cells = <1>;
-                ranges;
+                ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
+                          0x81000000 0 0 0x81000000 0x3 0 1 0>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0 0 0 0 &mpic 60>;
                 marvell,pcie-port = <0>;
@@ -110,12 +185,13 @@ pcie-controller {
 
         pcie@4,0 {
                 device_type = "pci";
-                assigned-addresses = <0x82002000 0 0xd004c000 0 0x2000>;
+                assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
                 reg = <0x2000 0 0 0 0>;
                 #address-cells = <3>;
                 #size-cells = <2>;
                 #interrupt-cells = <1>;
-                ranges;
+                ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
+                          0x81000000 0 0 0x81000000 0x4 0 1 0>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0 0 0 0 &mpic 61>;
                 marvell,pcie-port = <0>;
@@ -126,12 +202,13 @@ pcie-controller {
 
         pcie@5,0 {
                 device_type = "pci";
-                assigned-addresses = <0x82002800 0 0xd0080000 0 0x2000>;
+                assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
                 reg = <0x2800 0 0 0 0>;
                 #address-cells = <3>;
                 #size-cells = <2>;
                 #interrupt-cells = <1>;
-                ranges;
+                ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
+                          0x81000000 0 0 0x81000000 0x5 0 1 0>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0 0 0 0 &mpic 62>;
                 marvell,pcie-port = <1>;
@@ -142,12 +219,13 @@ pcie-controller {
 
         pcie@6,0 {
                 device_type = "pci";
-                assigned-addresses = <0x82003000 0 0xd0084000 0 0x2000>;
+                assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
                 reg = <0x3000 0 0 0 0>;
                 #address-cells = <3>;
                 #size-cells = <2>;
                 #interrupt-cells = <1>;
-                ranges;
+                ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
+                          0x81000000 0 0 0x81000000 0x6 0 1 0>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0 0 0 0 &mpic 63>;
                 marvell,pcie-port = <1>;
@@ -158,12 +236,13 @@ pcie-controller {
 
         pcie@7,0 {
                 device_type = "pci";
-                assigned-addresses = <0x82003800 0 0xd0088000 0 0x2000>;
+                assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
                 reg = <0x3800 0 0 0 0>;
                 #address-cells = <3>;
                 #size-cells = <2>;
                 #interrupt-cells = <1>;
-                ranges;
+                ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
+                          0x81000000 0 0 0x81000000 0x7 0 1 0>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0 0 0 0 &mpic 64>;
                 marvell,pcie-port = <1>;
@@ -174,12 +253,13 @@ pcie-controller {
 
         pcie@8,0 {
                 device_type = "pci";
-                assigned-addresses = <0x82004000 0 0xd008c000 0 0x2000>;
+                assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
                 reg = <0x4000 0 0 0 0>;
                 #address-cells = <3>;
                 #size-cells = <2>;
                 #interrupt-cells = <1>;
-                ranges;
+                ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
+                          0x81000000 0 0 0x81000000 0x8 0 1 0>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0 0 0 0 &mpic 65>;
                 marvell,pcie-port = <1>;
@@ -187,14 +267,16 @@ pcie-controller {
                 clocks = <&gateclk 12>;
                 status = "disabled";
         };
+
         pcie@9,0 {
                 device_type = "pci";
-                assigned-addresses = <0x82004800 0 0xd0042000 0 0x2000>;
+                assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
                 reg = <0x4800 0 0 0 0>;
                 #address-cells = <3>;
                 #size-cells = <2>;
                 #interrupt-cells = <1>;
-                ranges;
+                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
+                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0 0 0 0 &mpic 99>;
                 marvell,pcie-port = <2>;
@@ -205,12 +287,13 @@ pcie-controller {
 
         pcie@10,0 {
                 device_type = "pci";
-                assigned-addresses = <0x82005000 0 0xd0082000 0 0x2000>;
+                assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
                 reg = <0x5000 0 0 0 0>;
                 #address-cells = <3>;
                 #size-cells = <2>;
                 #interrupt-cells = <1>;
-                ranges;
+                ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0
+                          0x81000000 0 0 0x81000000 0xa 0 1 0>;
                 interrupt-map-mask = <0 0 0 0>;
                 interrupt-map = <0 0 0 0 &mpic 103>;
                 marvell,pcie-port = <3>;
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
new file mode 100644
index 000000000000..6b7510775c50
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -0,0 +1,163 @@
+NVIDIA Tegra PCIe controller
+
+Required properties:
+- compatible: "nvidia,tegra20-pcie" or "nvidia,tegra30-pcie"
+- device_type: Must be "pci"
+- reg: A list of physical base address and length for each set of controller
+  registers. Must contain an entry for each entry in the reg-names property.
+- reg-names: Must include the following entries:
+  "pads": PADS registers
+  "afi": AFI registers
+  "cs": configuration space region
+- interrupts: A list of interrupt outputs of the controller. Must contain an
+  entry for each entry in the interrupt-names property.
+- interrupt-names: Must include the following entries:
+  "intr": The Tegra interrupt that is asserted for controller interrupts
+  "msi": The Tegra interrupt that is asserted when an MSI is received
+- pex-clk-supply: Supply voltage for internal reference clock
+- vdd-supply: Power supply for controller (1.05V)
+- avdd-supply: Power supply for controller (1.05V) (not required for Tegra20)
+- bus-range: Range of bus numbers associated with this controller
+- #address-cells: Address representation for root ports (must be 3)
+  - cell 0 specifies the bus and device numbers of the root port:
+    [23:16]: bus number
+    [15:11]: device number
+  - cell 1 denotes the upper 32 address bits and should be 0
+  - cell 2 contains the lower 32 address bits and is used to translate to the
+    CPU address space
+- #size-cells: Size representation for root ports (must be 2)
+- ranges: Describes the translation of addresses for root ports and standard
+  PCI regions. The entries must be 6 cells each, where the first three cells
+  correspond to the address as described for the #address-cells property
+  above, the fourth cell is the physical CPU address to translate to and the
+  fifth and six cells are as described for the #size-cells property above.
+  - The first two entries are expected to translate the addresses for the root
+    port registers, which are referenced by the assigned-addresses property of
+    the root port nodes (see below).
+  - The remaining entries setup the mapping for the standard I/O, memory and
+    prefetchable PCI regions. The first cell determines the type of region
+    that is setup:
+    - 0x81000000: I/O memory region
+    - 0x82000000: non-prefetchable memory region
+    - 0xc2000000: prefetchable memory region
+  Please refer to the standard PCI bus binding document for a more detailed
+  explanation.
+- clocks: List of clock inputs of the controller. Must contain an entry for
+  each entry in the clock-names property.
+- clock-names: Must include the following entries:
+  "pex": The Tegra clock of that name
+  "afi": The Tegra clock of that name
+  "pcie_xclk": The Tegra clock of that name
+  "pll_e": The Tegra clock of that name
+  "cml": The Tegra clock of that name (not required for Tegra20)
+
+Root ports are defined as subnodes of the PCIe controller node.
+
+Required properties:
+- device_type: Must be "pci"
+- assigned-addresses: Address and size of the port configuration registers
+- reg: PCI bus address of the root port
+- #address-cells: Must be 3
+- #size-cells: Must be 2
+- ranges: Sub-ranges distributed from the PCIe controller node. An empty
+  property is sufficient.
+- nvidia,num-lanes: Number of lanes to use for this port. Valid combinations
+  are:
+  - Root port 0 uses 4 lanes, root port 1 is unused.
+  - Both root ports use 2 lanes.
+
+Example:
+
+SoC DTSI:
+
+        pcie-controller {
+                compatible = "nvidia,tegra20-pcie";
+                device_type = "pci";
+                reg = <0x80003000 0x00000800   /* PADS registers */
+                       0x80003800 0x00000200   /* AFI registers */
+                       0x90000000 0x10000000>; /* configuration space */
+                reg-names = "pads", "afi", "cs";
+                interrupts = <0 98 0x04   /* controller interrupt */
+                              0 99 0x04>; /* MSI interrupt */
+                interrupt-names = "intr", "msi";
+
+                bus-range = <0x00 0xff>;
+                #address-cells = <3>;
+                #size-cells = <2>;
+
+                ranges = <0x82000000 0 0x80000000 0x80000000 0 0x00001000   /* port 0 registers */
+                          0x82000000 0 0x80001000 0x80001000 0 0x00001000   /* port 1 registers */
+                          0x81000000 0 0          0x82000000 0 0x00010000   /* downstream I/O */
+                          0x82000000 0 0xa0000000 0xa0000000 0 0x10000000   /* non-prefetchable memory */
+                          0xc2000000 0 0xb0000000 0xb0000000 0 0x10000000>; /* prefetchable memory */
+
+                clocks = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 74>,
+                         <&tegra_car 118>;
+                clock-names = "pex", "afi", "pcie_xclk", "pll_e";
+                status = "disabled";
+
+                pci@1,0 {
+                        device_type = "pci";
+                        assigned-addresses = <0x82000800 0 0x80000000 0 0x1000>;
+                        reg = <0x000800 0 0 0 0>;
+                        status = "disabled";
+
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+
+                        ranges;
+
+                        nvidia,num-lanes = <2>;
+                };
+
+                pci@2,0 {
+                        device_type = "pci";
+                        assigned-addresses = <0x82001000 0 0x80001000 0 0x1000>;
+                        reg = <0x001000 0 0 0 0>;
+                        status = "disabled";
+
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+
+                        ranges;
+
+                        nvidia,num-lanes = <2>;
+                };
+        };
+
+
+Board DTS:
+
+        pcie-controller {
+                status = "okay";
+
+                vdd-supply = <&pci_vdd_reg>;
+                pex-clk-supply = <&pci_clk_reg>;
+
+                /* root port 00:01.0 */
+                pci@1,0 {
+                        status = "okay";
+
+                        /* bridge 01:00.0 (optional) */
+                        pci@0,0 {
+                                reg = <0x010000 0 0 0 0>;
+
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+
+                                device_type = "pci";
+
+                                /* endpoint 02:00.0 */
+                                pci@0,0 {
+                                        reg = <0x020000 0 0 0 0>;
+                                };
+                        };
+                };
+        };
+
+Note that devices on the PCI bus are dynamically discovered using PCI's bus
+enumeration and therefore don't need corresponding device nodes in DT. However
+if a device on the PCI bus provides a non-probeable bus such as I2C or SPI,
+device nodes need to be added in order to allow the bus' children to be
+instantiated at the proper location in the operating system's device tree (as
+illustrated by the optional nodes in the example above).
diff --git a/Documentation/devicetree/bindings/pci/ralink,rt3883-pci.txt b/Documentation/devicetree/bindings/pci/ralink,rt3883-pci.txt
new file mode 100644
index 000000000000..8e0a1eb0acbb
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/ralink,rt3883-pci.txt
@@ -0,0 +1,190 @@
+* Mediatek/Ralink RT3883 PCI controller
+
+1) Main node
+
+   Required properties:
+
+   - compatible: must be "ralink,rt3883-pci"
+
+   - reg: specifies the physical base address of the controller and
+     the length of the memory mapped region.
+
+   - #address-cells: specifies the number of cells needed to encode an
+     address. The value must be 1.
+
+   - #size-cells: specifies the number of cells used to represent the size
+     of an address. The value must be 1.
+
+   - ranges: specifies the translation between child address space and parent
+     address space
+
+  Optional properties:
+
+   - status: indicates the operational status of the device.
+     Value must be either "disabled" or "okay".
+
+2) Child nodes
+
+   The main node must have two child nodes which describes the built-in
+   interrupt controller and the PCI host bridge.
+
+   a) Interrupt controller:
+
+   Required properties:
+
+   - interrupt-controller: identifies the node as an interrupt controller
+
+   - #address-cells: specifies the number of cells needed to encode an
+     address. The value must be 0. As such, 'interrupt-map' nodes do not
+     have to specify a parent unit address.
+
+   - #interrupt-cells: specifies the number of cells needed to encode an
+     interrupt source. The value must be 1.
+
+   - interrupt-parent: the phandle for the interrupt controller that
+     services interrupts for this device.
+
+   - interrupts: specifies the interrupt source of the parent interrupt
+     controller. The format of the interrupt specifier depends on the
+     parent interrupt controller.
+
+   b) PCI host bridge:
+
+   Required properties:
+
+   - #address-cells: specifies the number of cells needed to encode an
+     address. The value must be 0.
+
+   - #size-cells: specifies the number of cells used to represent the size
+     of an address. The value must be 2.
+
+   - #interrupt-cells: specifies the number of cells needed to encode an
+     interrupt source. The value must be 1.
+
+   - device_type: must be "pci"
+
+   - bus-range: PCI bus numbers covered
+
+   - ranges: specifies the ranges for the PCI memory and I/O regions
+
+   - interrupt-map-mask,
+   - interrupt-map: standard PCI properties to define the mapping of the
+     PCI interface to interrupt numbers.
+
+   The PCI host bridge node migh have additional sub-nodes representing
+   the onboard PCI devices/PCI slots. Each such sub-node must have the
+   following mandatory properties:
+
+     - reg: used only for interrupt mapping, so only the first four bytes
+       are used to refer to the correct bus number and device number.
+
+     - device_type: must be "pci"
+
+   If a given sub-node represents a PCI bridge it must have following
+   mandatory properties as well:
+
+     - #address-cells: must be set to <3>
+
+     - #size-cells: must set to <2>
+
+     - #interrupt-cells: must be set to <1>
+
+     - interrupt-map-mask,
+     - interrupt-map: standard PCI properties to define the mapping of the
+       PCI interface to interrupt numbers.
+
+   Besides the required properties the sub-nodes may have these optional
+   properties:
+
+     - status: indicates the operational status of the sub-node.
+       Value must be either "disabled" or "okay".
+
+3) Example:
+
+   a) SoC specific dtsi file:
+
+        pci@10140000 {
+                compatible = "ralink,rt3883-pci";
+                reg = <0x10140000 0x20000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges; /* direct mapping */
+
+                status = "disabled";
+
+                pciintc: interrupt-controller {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <1>;
+
+                        interrupt-parent = <&cpuintc>;
+                        interrupts = <4>;
+                };
+
+                host-bridge {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        #interrupt-cells = <1>;
+
+                        device_type = "pci";
+
+                        bus-range = <0 255>;
+                        ranges = <
+                                0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
+                                0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
+                        >;
+
+                        interrupt-map-mask = <0xf800 0 0 7>;
+                        interrupt-map = <
+                                /* IDSEL 17 */
+                                0x8800 0 0 1 &pciintc 18
+                                0x8800 0 0 2 &pciintc 18
+                                0x8800 0 0 3 &pciintc 18
+                                0x8800 0 0 4 &pciintc 18
+                                /* IDSEL 18 */
+                                0x9000 0 0 1 &pciintc 19
+                                0x9000 0 0 2 &pciintc 19
+                                0x9000 0 0 3 &pciintc 19
+                                0x9000 0 0 4 &pciintc 19
+                        >;
+
+                        pci-bridge@1 {
+                                reg = <0x0800 0 0 0 0>;
+                                device_type = "pci";
+                                #interrupt-cells = <1>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+
+                                interrupt-map-mask = <0x0 0 0 0>;
+                                interrupt-map = <0x0 0 0 0 &pciintc 20>;
+
+                                status = "disabled";
+                        };
+
+                        pci-slot@17 {
+                                reg = <0x8800 0 0 0 0>;
+                                device_type = "pci";
+
+                                status = "disabled";
+                        };
+
+                        pci-slot@18 {
+                                reg = <0x9000 0 0 0 0>;
+                                device_type = "pci";
+
+                                status = "disabled";
+                        };
+                };
+        };
+
+   b) Board specific dts file:
+
+        pci@10140000 {
+                status = "okay";
+
+                host-bridge {
+                        pci-bridge@1 {
+                                status = "okay";
+                        };
+                };
+        };
diff --git a/Documentation/devicetree/bindings/phy/phy-bindings.txt b/Documentation/devicetree/bindings/phy/phy-bindings.txt
new file mode 100644
index 000000000000..8ae844fc0c60
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-bindings.txt
@@ -0,0 +1,66 @@
+This document explains only the device tree data binding. For general
+information about PHY subsystem refer to Documentation/phy.txt
+
+PHY device node
+===============
+
+Required Properties:
+#phy-cells:     Number of cells in a PHY specifier;  The meaning of all those
+                cells is defined by the binding for the phy node. The PHY
+                provider can use the values in cells to find the appropriate
+                PHY.
+
+For example:
+
+phys: phy {
+    compatible = "xxx";
+    reg = <...>;
+    .
+    .
+    #phy-cells = <1>;
+    .
+    .
+};
+
+That node describes an IP block (PHY provider) that implements 2 different PHYs.
+In order to differentiate between these 2 PHYs, an additonal specifier should be
+given while trying to get a reference to it.
+
+PHY user node
+=============
+
+Required Properties:
+phys : the phandle for the PHY device (used by the PHY subsystem)
+phy-names : the names of the PHY corresponding to the PHYs present in the
+            *phys* phandle
+
+Example 1:
+usb1: usb_otg_ss@xxx {
+    compatible = "xxx";
+    reg = <xxx>;
+    .
+    .
+    phys = <&usb2_phy>, <&usb3_phy>;
+    phy-names = "usb2phy", "usb3phy";
+    .
+    .
+};
+
+This node represents a controller that uses two PHYs, one for usb2 and one for
+usb3.
+
+Example 2:
+usb2: usb_otg_ss@xxx {
+    compatible = "xxx";
+    reg = <xxx>;
+    .
+    .
+    phys = <&phys 1>;
+    phy-names = "usbphy";
+    .
+    .
+};
+
+This node represents a controller that uses one of the PHYs of the PHY provider
+device defined previously. Note that the phy handle has an additional specifier
+"1" to differentiate between the two PHYs.
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
new file mode 100644
index 000000000000..c0fccaa1671e
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -0,0 +1,22 @@
+Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY
+-------------------------------------------------
+
+Required properties:
+- compatible : should be "samsung,s5pv210-mipi-video-phy";
+- reg : offset and length of the MIPI DPHY register set;
+- #phy-cells : from the generic phy bindings, must be 1;
+
+For "samsung,s5pv210-mipi-video-phy" compatible PHYs the second cell in
+the PHY specifier identifies the PHY and its meaning is as follows:
+  0 - MIPI CSIS 0,
+  1 - MIPI DSIM 0,
+  2 - MIPI CSIS 1,
+  3 - MIPI DSIM 1.
+
+Samsung EXYNOS SoC series Display Port PHY
+-------------------------------------------------
+
+Required properties:
+- compatible : should be "samsung,exynos5250-dp-video-phy";
+- reg : offset and length of the Display Port PHY register set;
+- #phy-cells : from the generic PHY bindings, must be 0;
diff --git a/Documentation/devicetree/bindings/pinctrl/abilis,tb10x-iomux.txt b/Documentation/devicetree/bindings/pinctrl/abilis,tb10x-iomux.txt
new file mode 100644
index 000000000000..2c11866221c2
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/abilis,tb10x-iomux.txt
@@ -0,0 +1,80 @@
+Abilis Systems TB10x pin controller
+===================================
+
+Required properties
+-------------------
+
+- compatible: should be "abilis,tb10x-iomux";
+- reg: should contain the physical address and size of the pin controller's
+  register range.
+
+
+Function definitions
+--------------------
+
+Functions are defined (and referenced) by sub-nodes of the pin controller.
+Every sub-node defines exactly one function (implying a set of pins).
+Every function is associated to one named pin group inside the pin controller
+driver and these names are used to associate pin group predefinitions to pin
+controller sub-nodes.
+
+Required function definition subnode properties:
+  - abilis,function: should be set to the name of the function's pin group.
+
+The following pin groups are available:
+  - GPIO ports: gpioa, gpiob, gpioc, gpiod, gpioe, gpiof, gpiog,
+                gpioh, gpioi, gpioj, gpiok, gpiol, gpiom, gpion
+  - Serial TS input ports: mis0, mis1, mis2, mis3, mis4, mis5, mis6, mis7
+  - Parallel TS input ports: mip1, mip3, mip5, mip7
+  - Serial TS output ports: mos0, mos1, mos2, mos3
+  - Parallel TS output port: mop
+  - CI+ port: ciplus
+  - CableCard (Mcard) port: mcard
+  - Smart card ports: stc0, stc1
+  - UART ports: uart0, uart1
+  - SPI ports: spi1, spi3
+  - JTAG: jtag
+
+All other ports of the chip are not multiplexed and thus not managed by this
+driver.
+
+
+GPIO ranges definition
+----------------------
+
+The named pin groups of GPIO ports can be used to define GPIO ranges as
+explained in Documentation/devicetree/bindings/gpio/gpio.txt.
+
+
+Example
+-------
+
+iomux: iomux@FF10601c {
+        compatible = "abilis,tb10x-iomux";
+        reg = <0xFF10601c 0x4>;
+        pctl_gpio_a: pctl-gpio-a {
+                abilis,function = "gpioa";
+        };
+        pctl_uart0: pctl-uart0 {
+                abilis,function = "uart0";
+        };
+};
+uart@FF100000 {
+        compatible = "snps,dw-apb-uart";
+        reg = <0xFF100000 0x100>;
+        clock-frequency = <166666666>;
+        interrupts = <25 1>;
+        reg-shift = <2>;
+        reg-io-width = <4>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pctl_uart0>;
+};
+gpioa: gpio@FF140000 {
+        compatible = "abilis,tb10x-gpio";
+        reg = <0xFF140000 0x1000>;
+        gpio-controller;
+        #gpio-cells = <2>;
+        ngpio = <3>;
+        gpio-ranges = <&iomux 0 0>;
+        gpio-ranges-group-names = "gpioa";
+};
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index 648d60eb9fd8..02ab5ab198a4 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -18,7 +18,7 @@ mode) this pin can work on and the 'config' configures various pad settings
 such as pull-up, multi drive, etc.
 
 Required properties for iomux controller:
-- compatible: "atmel,at91rm9200-pinctrl"
+- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
   configured in this periph mode. All the periph and bank need to be describe.
 
@@ -37,7 +37,7 @@ Bank: 3 (A, B and C)
   0xffffffff 0x7fff3ccf  /* pioB */
   0xffffffff 0x007fffff  /* pioC */
 
-For each peripheral/bank we will descibe in a u32 if a pin can can be
+For each peripheral/bank we will descibe in a u32 if a pin can be
 configured in it by putting 1 to the pin bit (1 << pin)
 
 Let's take the pioA on peripheral B
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
index 3a7caf7a744a..9fde25f1401a 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
@@ -22,11 +22,12 @@ Required properties for iomux controller:
   Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.
 
 Required properties for pin configuration node:
-- fsl,pins: two integers array, represents a group of pins mux and config
-  setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
-  pin working on a specific function, which consists of a tuple of
-  <mux_reg conf_reg input_reg mux_val input_val>.  CONFIG is the pad setting
-  value like pull-up on this pin.
+- fsl,pins: each entry consists of 6 integers and represents the mux and config
+  setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
+  input_val> are specified using a PIN_FUNC_ID macro, which can be found in
+  imx*-pinfunc.h under device tree source folder. The last integer CONFIG is
+  the pad setting value like pull-up on this pin. And that's why fsl,pins entry
+  looks like <PIN_FUNC_ID CONFIG> in the example below.
 
 Bits used for CONFIG:
 NO_PAD_CTL(1 << 31): indicate this pin does not need config.
@@ -72,17 +73,18 @@ iomuxc@020e0000 {
         /* shared pinctrl settings */
         usdhc4 {
                 pinctrl_usdhc4_1: usdhc4grp-1 {
-                        fsl,pins = <1386 0x17059        /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */
-                                    1392 0x10059        /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */
-                                    1462 0x17059        /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */
-                                    1470 0x17059        /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */
-                                    1478 0x17059        /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */
-                                    1486 0x17059        /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */
-                                    1493 0x17059        /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */
-                                    1501 0x17059        /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */
-                                    1509 0x17059        /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */
-                                    1517 0x17059>;      /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
-                };
+                        fsl,pins = <
+                                MX6QDL_PAD_SD4_CMD__SD4_CMD    0x17059
+                                MX6QDL_PAD_SD4_CLK__SD4_CLK    0x10059
+                                MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
+                                MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
+                                MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
+                                MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
+                                MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
+                                MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
+                                MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
+                                MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
+                        >;
         };
         ....
 };
@@ -90,6 +92,3 @@ Refer to the IOMUXC controller chapter in imx6q datasheet,
 0x17059 means enable hysteresis, 47KOhm Pull Up, 50Mhz speed,
 80Ohm driver strength and Fast Slew Rate.
 User should refer to each SoC spec to set the correct value.
-
-TODO: when dtc macro support is available, we can change above raw data
-to dt macro which can get better readability in dts file.
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt
new file mode 100644
index 000000000000..353eca0efbf8
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt
@@ -0,0 +1,99 @@
+* Freescale IMX27 IOMUX Controller
+
+Required properties:
+- compatible: "fsl,imx27-iomuxc"
+
+The iomuxc driver node should define subnodes containing of pinctrl configuration subnodes.
+
+Required properties for pin configuration node:
+- fsl,pins: three integers array, represents a group of pins mux and config
+  setting. The format is fsl,pins = <PIN MUX_ID CONFIG>.
+
+  PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable
+  configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin
+  number on the specific port (between 0 and 31).
+
+  MUX_ID is
+    function + (direction << 2) + (gpio_oconf << 4) + (gpio_iconfa << 8) + (gpio_iconfb << 10)
+
+      function value is used to select the pin function.
+      Possible values:
+          0 - Primary function
+          1 - Alternate function
+          2 - GPIO
+      Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
+
+      direction defines the data direction of the pin.
+      Possible values:
+          0 - Input
+          1 - Output
+      Register: DDIR
+
+      gpio_oconf configures the gpio submodule output signal. This does not
+      have any effect unless GPIO function is selected. A/B/C_IN are output
+      signals of function blocks A,B and C. Specific function blocks are
+      described in the reference manual.
+      Possible values:
+          0 - A_IN
+          1 - B_IN
+          2 - C_IN
+          3 - Data Register
+      Registers: OCR1, OCR2
+
+      gpio_iconfa/b configures the gpio submodule input to functionblocks A and
+      B. GPIO function should be selected if this is configured.
+      Possible values:
+          0 - GPIO_IN
+          1 - Interrupt Status Register
+          2 - Pulldown
+          3 - Pullup
+      Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB2
+
+  CONFIG can be 0 or 1, meaning Pullup disable/enable.
+
+
+
+Example:
+
+iomuxc: iomuxc@10015000 {
+        compatible = "fsl,imx27-iomuxc";
+        reg = <0x10015000 0x600>;
+
+        uart {
+                pinctrl_uart1: uart-1 {
+                        fsl,pins = <
+                                0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */
+                                0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */
+                                0x8e 0x004 0x0 /* UART1_CTS__UART1_CTS */
+                                0x8f 0x000 0x0 /* UART1_RTS__UART1_RTS */
+                        >;
+                };
+
+                ...
+        };
+};
+
+
+For convenience there are macros defined in imx27-pinfunc.h which provide PIN
+and MUX_ID. They are structured as MX27_PAD_<Pad name>__<Signal name>. The names
+are defined in the i.MX27 reference manual.
+
+The above example using macros:
+
+iomuxc: iomuxc@10015000 {
+        compatible = "fsl,imx27-iomuxc";
+        reg = <0x10015000 0x600>;
+
+        uart {
+                pinctrl_uart1: uart-1 {
+                        fsl,pins = <
+                                MX27_PAD_UART1_TXD__UART1_TXD 0x0
+                                MX27_PAD_UART1_RXD__UART1_RXD 0x0
+                                MX27_PAD_UART1_CTS__UART1_CTS 0x0
+                                MX27_PAD_UART1_RTS__UART1_RTS 0x0
+                        >;
+                };
+
+                ...
+        };
+};
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt
index 3077370c89af..1e70a8aff260 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt
@@ -59,16 +59,16 @@ Required subnode-properties:
 
 Optional subnode-properties:
 - fsl,drive-strength: Integer.
-    0: 4 mA
-    1: 8 mA
-    2: 12 mA
-    3: 16 mA
+    0: MXS_DRIVE_4mA
+    1: MXS_DRIVE_8mA
+    2: MXS_DRIVE_12mA
+    3: MXS_DRIVE_16mA
 - fsl,voltage: Integer.
-    0: 1.8 V
-    1: 3.3 V
+    0: MXS_VOLTAGE_LOW  - 1.8 V
+    1: MXS_VOLTAGE_HIGH - 3.3 V
 - fsl,pull-up: Integer.
-    0: Disable the internal pull-up
-    1: Enable the internal pull-up
+    0: MXS_PULL_DISABLE - Disable the internal pull-up
+    1: MXS_PULL_ENABLE  - Enable the internal pull-up
 
 Note that when enabling the pull-up, the internal pad keeper gets disabled.
 Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up
@@ -85,23 +85,32 @@ pinctrl@80018000 {
         mmc0_8bit_pins_a: mmc0-8bit@0 {
                 reg = <0>;
                 fsl,pinmux-ids = <
-                        0x2000 0x2010 0x2020 0x2030
-                        0x2040 0x2050 0x2060 0x2070
-                        0x2080 0x2090 0x20a0>;
-                fsl,drive-strength = <1>;
-                fsl,voltage = <1>;
-                fsl,pull-up = <1>;
+                        MX28_PAD_SSP0_DATA0__SSP0_D0
+                        MX28_PAD_SSP0_DATA1__SSP0_D1
+                        MX28_PAD_SSP0_DATA2__SSP0_D2
+                        MX28_PAD_SSP0_DATA3__SSP0_D3
+                        MX28_PAD_SSP0_DATA4__SSP0_D4
+                        MX28_PAD_SSP0_DATA5__SSP0_D5
+                        MX28_PAD_SSP0_DATA6__SSP0_D6
+                        MX28_PAD_SSP0_DATA7__SSP0_D7
+                        MX28_PAD_SSP0_CMD__SSP0_CMD
+                        MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
+                        MX28_PAD_SSP0_SCK__SSP0_SCK
+                >;
+                fsl,drive-strength = <MXS_DRIVE_4mA>;
+                fsl,voltage = <MXS_VOLTAGE_HIGH>;
+                fsl,pull-up = <MXS_PULL_ENABLE>;
         };
 
         mmc_cd_cfg: mmc-cd-cfg {
-                fsl,pinmux-ids = <0x2090>;
-                fsl,pull-up = <0>;
+                fsl,pinmux-ids = <MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT>;
+                fsl,pull-up = <MXS_PULL_DISABLE>;
         };
 
         mmc_sck_cfg: mmc-sck-cfg {
-                fsl,pinmux-ids = <0x20a0>;
-                fsl,drive-strength = <2>;
-                fsl,pull-up = <0>;
+                fsl,pinmux-ids = <MX28_PAD_SSP0_SCK__SSP0_SCK>;
+                fsl,drive-strength = <MXS_DRIVE_12mA>;
+                fsl,pull-up = <MXS_PULL_DISABLE>;
         };
 };
 
@@ -112,811 +121,7 @@ adjusting the configuration for pins card-detection and clock from what group
 node mmc0-8bit defines.  Only the configuration properties to be adjusted need
 to be listed in the config nodes.
 
-Valid values for i.MX28 pinmux-id:
-
-pinmux                                          id
-------                                          --
-MX28_PAD_GPMI_D00__GPMI_D0                      0x0000
-MX28_PAD_GPMI_D01__GPMI_D1                      0x0010
-MX28_PAD_GPMI_D02__GPMI_D2                      0x0020
-MX28_PAD_GPMI_D03__GPMI_D3                      0x0030
-MX28_PAD_GPMI_D04__GPMI_D4                      0x0040
-MX28_PAD_GPMI_D05__GPMI_D5                      0x0050
-MX28_PAD_GPMI_D06__GPMI_D6                      0x0060
-MX28_PAD_GPMI_D07__GPMI_D7                      0x0070
-MX28_PAD_GPMI_CE0N__GPMI_CE0N                   0x0100
-MX28_PAD_GPMI_CE1N__GPMI_CE1N                   0x0110
-MX28_PAD_GPMI_CE2N__GPMI_CE2N                   0x0120
-MX28_PAD_GPMI_CE3N__GPMI_CE3N                   0x0130
-MX28_PAD_GPMI_RDY0__GPMI_READY0                 0x0140
-MX28_PAD_GPMI_RDY1__GPMI_READY1                 0x0150
-MX28_PAD_GPMI_RDY2__GPMI_READY2                 0x0160
-MX28_PAD_GPMI_RDY3__GPMI_READY3                 0x0170
-MX28_PAD_GPMI_RDN__GPMI_RDN                     0x0180
-MX28_PAD_GPMI_WRN__GPMI_WRN                     0x0190
-MX28_PAD_GPMI_ALE__GPMI_ALE                     0x01a0
-MX28_PAD_GPMI_CLE__GPMI_CLE                     0x01b0
-MX28_PAD_GPMI_RESETN__GPMI_RESETN               0x01c0
-MX28_PAD_LCD_D00__LCD_D0                        0x1000
-MX28_PAD_LCD_D01__LCD_D1                        0x1010
-MX28_PAD_LCD_D02__LCD_D2                        0x1020
-MX28_PAD_LCD_D03__LCD_D3                        0x1030
-MX28_PAD_LCD_D04__LCD_D4                        0x1040
-MX28_PAD_LCD_D05__LCD_D5                        0x1050
-MX28_PAD_LCD_D06__LCD_D6                        0x1060
-MX28_PAD_LCD_D07__LCD_D7                        0x1070
-MX28_PAD_LCD_D08__LCD_D8                        0x1080
-MX28_PAD_LCD_D09__LCD_D9                        0x1090
-MX28_PAD_LCD_D10__LCD_D10                       0x10a0
-MX28_PAD_LCD_D11__LCD_D11                       0x10b0
-MX28_PAD_LCD_D12__LCD_D12                       0x10c0
-MX28_PAD_LCD_D13__LCD_D13                       0x10d0
-MX28_PAD_LCD_D14__LCD_D14                       0x10e0
-MX28_PAD_LCD_D15__LCD_D15                       0x10f0
-MX28_PAD_LCD_D16__LCD_D16                       0x1100
-MX28_PAD_LCD_D17__LCD_D17                       0x1110
-MX28_PAD_LCD_D18__LCD_D18                       0x1120
-MX28_PAD_LCD_D19__LCD_D19                       0x1130
-MX28_PAD_LCD_D20__LCD_D20                       0x1140
-MX28_PAD_LCD_D21__LCD_D21                       0x1150
-MX28_PAD_LCD_D22__LCD_D22                       0x1160
-MX28_PAD_LCD_D23__LCD_D23                       0x1170
-MX28_PAD_LCD_RD_E__LCD_RD_E                     0x1180
-MX28_PAD_LCD_WR_RWN__LCD_WR_RWN                 0x1190
-MX28_PAD_LCD_RS__LCD_RS                         0x11a0
-MX28_PAD_LCD_CS__LCD_CS                         0x11b0
-MX28_PAD_LCD_VSYNC__LCD_VSYNC                   0x11c0
-MX28_PAD_LCD_HSYNC__LCD_HSYNC                   0x11d0
-MX28_PAD_LCD_DOTCLK__LCD_DOTCLK                 0x11e0
-MX28_PAD_LCD_ENABLE__LCD_ENABLE                 0x11f0
-MX28_PAD_SSP0_DATA0__SSP0_D0                    0x2000
-MX28_PAD_SSP0_DATA1__SSP0_D1                    0x2010
-MX28_PAD_SSP0_DATA2__SSP0_D2                    0x2020
-MX28_PAD_SSP0_DATA3__SSP0_D3                    0x2030
-MX28_PAD_SSP0_DATA4__SSP0_D4                    0x2040
-MX28_PAD_SSP0_DATA5__SSP0_D5                    0x2050
-MX28_PAD_SSP0_DATA6__SSP0_D6                    0x2060
-MX28_PAD_SSP0_DATA7__SSP0_D7                    0x2070
-MX28_PAD_SSP0_CMD__SSP0_CMD                     0x2080
-MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT          0x2090
-MX28_PAD_SSP0_SCK__SSP0_SCK                     0x20a0
-MX28_PAD_SSP1_SCK__SSP1_SCK                     0x20c0
-MX28_PAD_SSP1_CMD__SSP1_CMD                     0x20d0
-MX28_PAD_SSP1_DATA0__SSP1_D0                    0x20e0
-MX28_PAD_SSP1_DATA3__SSP1_D3                    0x20f0
-MX28_PAD_SSP2_SCK__SSP2_SCK                     0x2100
-MX28_PAD_SSP2_MOSI__SSP2_CMD                    0x2110
-MX28_PAD_SSP2_MISO__SSP2_D0                     0x2120
-MX28_PAD_SSP2_SS0__SSP2_D3                      0x2130
-MX28_PAD_SSP2_SS1__SSP2_D4                      0x2140
-MX28_PAD_SSP2_SS2__SSP2_D5                      0x2150
-MX28_PAD_SSP3_SCK__SSP3_SCK                     0x2180
-MX28_PAD_SSP3_MOSI__SSP3_CMD                    0x2190
-MX28_PAD_SSP3_MISO__SSP3_D0                     0x21a0
-MX28_PAD_SSP3_SS0__SSP3_D3                      0x21b0
-MX28_PAD_AUART0_RX__AUART0_RX                   0x3000
-MX28_PAD_AUART0_TX__AUART0_TX                   0x3010
-MX28_PAD_AUART0_CTS__AUART0_CTS                 0x3020
-MX28_PAD_AUART0_RTS__AUART0_RTS                 0x3030
-MX28_PAD_AUART1_RX__AUART1_RX                   0x3040
-MX28_PAD_AUART1_TX__AUART1_TX                   0x3050
-MX28_PAD_AUART1_CTS__AUART1_CTS                 0x3060
-MX28_PAD_AUART1_RTS__AUART1_RTS                 0x3070
-MX28_PAD_AUART2_RX__AUART2_RX                   0x3080
-MX28_PAD_AUART2_TX__AUART2_TX                   0x3090
-MX28_PAD_AUART2_CTS__AUART2_CTS                 0x30a0
-MX28_PAD_AUART2_RTS__AUART2_RTS                 0x30b0
-MX28_PAD_AUART3_RX__AUART3_RX                   0x30c0
-MX28_PAD_AUART3_TX__AUART3_TX                   0x30d0
-MX28_PAD_AUART3_CTS__AUART3_CTS                 0x30e0
-MX28_PAD_AUART3_RTS__AUART3_RTS                 0x30f0
-MX28_PAD_PWM0__PWM_0                            0x3100
-MX28_PAD_PWM1__PWM_1                            0x3110
-MX28_PAD_PWM2__PWM_2                            0x3120
-MX28_PAD_SAIF0_MCLK__SAIF0_MCLK                 0x3140
-MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK               0x3150
-MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK             0x3160
-MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0             0x3170
-MX28_PAD_I2C0_SCL__I2C0_SCL                     0x3180
-MX28_PAD_I2C0_SDA__I2C0_SDA                     0x3190
-MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0             0x31a0
-MX28_PAD_SPDIF__SPDIF_TX                        0x31b0
-MX28_PAD_PWM3__PWM_3                            0x31c0
-MX28_PAD_PWM4__PWM_4                            0x31d0
-MX28_PAD_LCD_RESET__LCD_RESET                   0x31e0
-MX28_PAD_ENET0_MDC__ENET0_MDC                   0x4000
-MX28_PAD_ENET0_MDIO__ENET0_MDIO                 0x4010
-MX28_PAD_ENET0_RX_EN__ENET0_RX_EN               0x4020
-MX28_PAD_ENET0_RXD0__ENET0_RXD0                 0x4030
-MX28_PAD_ENET0_RXD1__ENET0_RXD1                 0x4040
-MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK             0x4050
-MX28_PAD_ENET0_TX_EN__ENET0_TX_EN               0x4060
-MX28_PAD_ENET0_TXD0__ENET0_TXD0                 0x4070
-MX28_PAD_ENET0_TXD1__ENET0_TXD1                 0x4080
-MX28_PAD_ENET0_RXD2__ENET0_RXD2                 0x4090
-MX28_PAD_ENET0_RXD3__ENET0_RXD3                 0x40a0
-MX28_PAD_ENET0_TXD2__ENET0_TXD2                 0x40b0
-MX28_PAD_ENET0_TXD3__ENET0_TXD3                 0x40c0
-MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK             0x40d0
-MX28_PAD_ENET0_COL__ENET0_COL                   0x40e0
-MX28_PAD_ENET0_CRS__ENET0_CRS                   0x40f0
-MX28_PAD_ENET_CLK__CLKCTRL_ENET                 0x4100
-MX28_PAD_JTAG_RTCK__JTAG_RTCK                   0x4140
-MX28_PAD_EMI_D00__EMI_DATA0                     0x5000
-MX28_PAD_EMI_D01__EMI_DATA1                     0x5010
-MX28_PAD_EMI_D02__EMI_DATA2                     0x5020
-MX28_PAD_EMI_D03__EMI_DATA3                     0x5030
-MX28_PAD_EMI_D04__EMI_DATA4                     0x5040
-MX28_PAD_EMI_D05__EMI_DATA5                     0x5050
-MX28_PAD_EMI_D06__EMI_DATA6                     0x5060
-MX28_PAD_EMI_D07__EMI_DATA7                     0x5070
-MX28_PAD_EMI_D08__EMI_DATA8                     0x5080
-MX28_PAD_EMI_D09__EMI_DATA9                     0x5090
-MX28_PAD_EMI_D10__EMI_DATA10                    0x50a0
-MX28_PAD_EMI_D11__EMI_DATA11                    0x50b0
-MX28_PAD_EMI_D12__EMI_DATA12                    0x50c0
-MX28_PAD_EMI_D13__EMI_DATA13                    0x50d0
-MX28_PAD_EMI_D14__EMI_DATA14                    0x50e0
-MX28_PAD_EMI_D15__EMI_DATA15                    0x50f0
-MX28_PAD_EMI_ODT0__EMI_ODT0                     0x5100
-MX28_PAD_EMI_DQM0__EMI_DQM0                     0x5110
-MX28_PAD_EMI_ODT1__EMI_ODT1                     0x5120
-MX28_PAD_EMI_DQM1__EMI_DQM1                     0x5130
-MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK 0x5140
-MX28_PAD_EMI_CLK__EMI_CLK                       0x5150
-MX28_PAD_EMI_DQS0__EMI_DQS0                     0x5160
-MX28_PAD_EMI_DQS1__EMI_DQS1                     0x5170
-MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN             0x51a0
-MX28_PAD_EMI_A00__EMI_ADDR0                     0x6000
-MX28_PAD_EMI_A01__EMI_ADDR1                     0x6010
-MX28_PAD_EMI_A02__EMI_ADDR2                     0x6020
-MX28_PAD_EMI_A03__EMI_ADDR3                     0x6030
-MX28_PAD_EMI_A04__EMI_ADDR4                     0x6040
-MX28_PAD_EMI_A05__EMI_ADDR5                     0x6050
-MX28_PAD_EMI_A06__EMI_ADDR6                     0x6060
-MX28_PAD_EMI_A07__EMI_ADDR7                     0x6070
-MX28_PAD_EMI_A08__EMI_ADDR8                     0x6080
-MX28_PAD_EMI_A09__EMI_ADDR9                     0x6090
-MX28_PAD_EMI_A10__EMI_ADDR10                    0x60a0
-MX28_PAD_EMI_A11__EMI_ADDR11                    0x60b0
-MX28_PAD_EMI_A12__EMI_ADDR12                    0x60c0
-MX28_PAD_EMI_A13__EMI_ADDR13                    0x60d0
-MX28_PAD_EMI_A14__EMI_ADDR14                    0x60e0
-MX28_PAD_EMI_BA0__EMI_BA0                       0x6100
-MX28_PAD_EMI_BA1__EMI_BA1                       0x6110
-MX28_PAD_EMI_BA2__EMI_BA2                       0x6120
-MX28_PAD_EMI_CASN__EMI_CASN                     0x6130
-MX28_PAD_EMI_RASN__EMI_RASN                     0x6140
-MX28_PAD_EMI_WEN__EMI_WEN                       0x6150
-MX28_PAD_EMI_CE0N__EMI_CE0N                     0x6160
-MX28_PAD_EMI_CE1N__EMI_CE1N                     0x6170
-MX28_PAD_EMI_CKE__EMI_CKE                       0x6180
-MX28_PAD_GPMI_D00__SSP1_D0                      0x0001
-MX28_PAD_GPMI_D01__SSP1_D1                      0x0011
-MX28_PAD_GPMI_D02__SSP1_D2                      0x0021
-MX28_PAD_GPMI_D03__SSP1_D3                      0x0031
-MX28_PAD_GPMI_D04__SSP1_D4                      0x0041
-MX28_PAD_GPMI_D05__SSP1_D5                      0x0051
-MX28_PAD_GPMI_D06__SSP1_D6                      0x0061
-MX28_PAD_GPMI_D07__SSP1_D7                      0x0071
-MX28_PAD_GPMI_CE0N__SSP3_D0                     0x0101
-MX28_PAD_GPMI_CE1N__SSP3_D3                     0x0111
-MX28_PAD_GPMI_CE2N__CAN1_TX                     0x0121
-MX28_PAD_GPMI_CE3N__CAN1_RX                     0x0131
-MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT            0x0141
-MX28_PAD_GPMI_RDY1__SSP1_CMD                    0x0151
-MX28_PAD_GPMI_RDY2__CAN0_TX                     0x0161
-MX28_PAD_GPMI_RDY3__CAN0_RX                     0x0171
-MX28_PAD_GPMI_RDN__SSP3_SCK                     0x0181
-MX28_PAD_GPMI_WRN__SSP1_SCK                     0x0191
-MX28_PAD_GPMI_ALE__SSP3_D1                      0x01a1
-MX28_PAD_GPMI_CLE__SSP3_D2                      0x01b1
-MX28_PAD_GPMI_RESETN__SSP3_CMD                  0x01c1
-MX28_PAD_LCD_D03__ETM_DA8                       0x1031
-MX28_PAD_LCD_D04__ETM_DA9                       0x1041
-MX28_PAD_LCD_D08__ETM_DA3                       0x1081
-MX28_PAD_LCD_D09__ETM_DA4                       0x1091
-MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT         0x1141
-MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN          0x1151
-MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT         0x1161
-MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN          0x1171
-MX28_PAD_LCD_RD_E__LCD_VSYNC                    0x1181
-MX28_PAD_LCD_WR_RWN__LCD_HSYNC                  0x1191
-MX28_PAD_LCD_RS__LCD_DOTCLK                     0x11a1
-MX28_PAD_LCD_CS__LCD_ENABLE                     0x11b1
-MX28_PAD_LCD_VSYNC__SAIF1_SDATA0                0x11c1
-MX28_PAD_LCD_HSYNC__SAIF1_SDATA1                0x11d1
-MX28_PAD_LCD_DOTCLK__SAIF1_MCLK                 0x11e1
-MX28_PAD_SSP0_DATA4__SSP2_D0                    0x2041
-MX28_PAD_SSP0_DATA5__SSP2_D3                    0x2051
-MX28_PAD_SSP0_DATA6__SSP2_CMD                   0x2061
-MX28_PAD_SSP0_DATA7__SSP2_SCK                   0x2071
-MX28_PAD_SSP1_SCK__SSP2_D1                      0x20c1
-MX28_PAD_SSP1_CMD__SSP2_D2                      0x20d1
-MX28_PAD_SSP1_DATA0__SSP2_D6                    0x20e1
-MX28_PAD_SSP1_DATA3__SSP2_D7                    0x20f1
-MX28_PAD_SSP2_SCK__AUART2_RX                    0x2101
-MX28_PAD_SSP2_MOSI__AUART2_TX                   0x2111
-MX28_PAD_SSP2_MISO__AUART3_RX                   0x2121
-MX28_PAD_SSP2_SS0__AUART3_TX                    0x2131
-MX28_PAD_SSP2_SS1__SSP2_D1                      0x2141
-MX28_PAD_SSP2_SS2__SSP2_D2                      0x2151
-MX28_PAD_SSP3_SCK__AUART4_TX                    0x2181
-MX28_PAD_SSP3_MOSI__AUART4_RX                   0x2191
-MX28_PAD_SSP3_MISO__AUART4_RTS                  0x21a1
-MX28_PAD_SSP3_SS0__AUART4_CTS                   0x21b1
-MX28_PAD_AUART0_RX__I2C0_SCL                    0x3001
-MX28_PAD_AUART0_TX__I2C0_SDA                    0x3011
-MX28_PAD_AUART0_CTS__AUART4_RX                  0x3021
-MX28_PAD_AUART0_RTS__AUART4_TX                  0x3031
-MX28_PAD_AUART1_RX__SSP2_CARD_DETECT            0x3041
-MX28_PAD_AUART1_TX__SSP3_CARD_DETECT            0x3051
-MX28_PAD_AUART1_CTS__USB0_OVERCURRENT           0x3061
-MX28_PAD_AUART1_RTS__USB0_ID                    0x3071
-MX28_PAD_AUART2_RX__SSP3_D1                     0x3081
-MX28_PAD_AUART2_TX__SSP3_D2                     0x3091
-MX28_PAD_AUART2_CTS__I2C1_SCL                   0x30a1
-MX28_PAD_AUART2_RTS__I2C1_SDA                   0x30b1
-MX28_PAD_AUART3_RX__CAN0_TX                     0x30c1
-MX28_PAD_AUART3_TX__CAN0_RX                     0x30d1
-MX28_PAD_AUART3_CTS__CAN1_TX                    0x30e1
-MX28_PAD_AUART3_RTS__CAN1_RX                    0x30f1
-MX28_PAD_PWM0__I2C1_SCL                         0x3101
-MX28_PAD_PWM1__I2C1_SDA                         0x3111
-MX28_PAD_PWM2__USB0_ID                          0x3121
-MX28_PAD_SAIF0_MCLK__PWM_3                      0x3141
-MX28_PAD_SAIF0_LRCLK__PWM_4                     0x3151
-MX28_PAD_SAIF0_BITCLK__PWM_5                    0x3161
-MX28_PAD_SAIF0_SDATA0__PWM_6                    0x3171
-MX28_PAD_I2C0_SCL__TIMROT_ROTARYA               0x3181
-MX28_PAD_I2C0_SDA__TIMROT_ROTARYB               0x3191
-MX28_PAD_SAIF1_SDATA0__PWM_7                    0x31a1
-MX28_PAD_LCD_RESET__LCD_VSYNC                   0x31e1
-MX28_PAD_ENET0_MDC__GPMI_CE4N                   0x4001
-MX28_PAD_ENET0_MDIO__GPMI_CE5N                  0x4011
-MX28_PAD_ENET0_RX_EN__GPMI_CE6N                 0x4021
-MX28_PAD_ENET0_RXD0__GPMI_CE7N                  0x4031
-MX28_PAD_ENET0_RXD1__GPMI_READY4                0x4041
-MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER            0x4051
-MX28_PAD_ENET0_TX_EN__GPMI_READY5               0x4061
-MX28_PAD_ENET0_TXD0__GPMI_READY6                0x4071
-MX28_PAD_ENET0_TXD1__GPMI_READY7                0x4081
-MX28_PAD_ENET0_RXD2__ENET1_RXD0                 0x4091
-MX28_PAD_ENET0_RXD3__ENET1_RXD1                 0x40a1
-MX28_PAD_ENET0_TXD2__ENET1_TXD0                 0x40b1
-MX28_PAD_ENET0_TXD3__ENET1_TXD1                 0x40c1
-MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER              0x40d1
-MX28_PAD_ENET0_COL__ENET1_TX_EN                 0x40e1
-MX28_PAD_ENET0_CRS__ENET1_RX_EN                 0x40f1
-MX28_PAD_GPMI_CE2N__ENET0_RX_ER                 0x0122
-MX28_PAD_GPMI_CE3N__SAIF1_MCLK                  0x0132
-MX28_PAD_GPMI_RDY0__USB0_ID                     0x0142
-MX28_PAD_GPMI_RDY2__ENET0_TX_ER                 0x0162
-MX28_PAD_GPMI_RDY3__HSADC_TRIGGER               0x0172
-MX28_PAD_GPMI_ALE__SSP3_D4                      0x01a2
-MX28_PAD_GPMI_CLE__SSP3_D5                      0x01b2
-MX28_PAD_LCD_D00__ETM_DA0                       0x1002
-MX28_PAD_LCD_D01__ETM_DA1                       0x1012
-MX28_PAD_LCD_D02__ETM_DA2                       0x1022
-MX28_PAD_LCD_D03__ETM_DA3                       0x1032
-MX28_PAD_LCD_D04__ETM_DA4                       0x1042
-MX28_PAD_LCD_D05__ETM_DA5                       0x1052
-MX28_PAD_LCD_D06__ETM_DA6                       0x1062
-MX28_PAD_LCD_D07__ETM_DA7                       0x1072
-MX28_PAD_LCD_D08__ETM_DA8                       0x1082
-MX28_PAD_LCD_D09__ETM_DA9                       0x1092
-MX28_PAD_LCD_D10__ETM_DA10                      0x10a2
-MX28_PAD_LCD_D11__ETM_DA11                      0x10b2
-MX28_PAD_LCD_D12__ETM_DA12                      0x10c2
-MX28_PAD_LCD_D13__ETM_DA13                      0x10d2
-MX28_PAD_LCD_D14__ETM_DA14                      0x10e2
-MX28_PAD_LCD_D15__ETM_DA15                      0x10f2
-MX28_PAD_LCD_D16__ETM_DA7                       0x1102
-MX28_PAD_LCD_D17__ETM_DA6                       0x1112
-MX28_PAD_LCD_D18__ETM_DA5                       0x1122
-MX28_PAD_LCD_D19__ETM_DA4                       0x1132
-MX28_PAD_LCD_D20__ETM_DA3                       0x1142
-MX28_PAD_LCD_D21__ETM_DA2                       0x1152
-MX28_PAD_LCD_D22__ETM_DA1                       0x1162
-MX28_PAD_LCD_D23__ETM_DA0                       0x1172
-MX28_PAD_LCD_RD_E__ETM_TCTL                     0x1182
-MX28_PAD_LCD_WR_RWN__ETM_TCLK                   0x1192
-MX28_PAD_LCD_HSYNC__ETM_TCTL                    0x11d2
-MX28_PAD_LCD_DOTCLK__ETM_TCLK                   0x11e2
-MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT        0x20c2
-MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN         0x20d2
-MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT      0x20e2
-MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN       0x20f2
-MX28_PAD_SSP2_SCK__SAIF0_SDATA1                 0x2102
-MX28_PAD_SSP2_MOSI__SAIF0_SDATA2                0x2112
-MX28_PAD_SSP2_MISO__SAIF1_SDATA1                0x2122
-MX28_PAD_SSP2_SS0__SAIF1_SDATA2                 0x2132
-MX28_PAD_SSP2_SS1__USB1_OVERCURRENT             0x2142
-MX28_PAD_SSP2_SS2__USB0_OVERCURRENT             0x2152
-MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT        0x2182
-MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN        0x2192
-MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT       0x21a2
-MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN         0x21b2
-MX28_PAD_AUART0_RX__DUART_CTS                   0x3002
-MX28_PAD_AUART0_TX__DUART_RTS                   0x3012
-MX28_PAD_AUART0_CTS__DUART_RX                   0x3022
-MX28_PAD_AUART0_RTS__DUART_TX                   0x3032
-MX28_PAD_AUART1_RX__PWM_0                       0x3042
-MX28_PAD_AUART1_TX__PWM_1                       0x3052
-MX28_PAD_AUART1_CTS__TIMROT_ROTARYA             0x3062
-MX28_PAD_AUART1_RTS__TIMROT_ROTARYB             0x3072
-MX28_PAD_AUART2_RX__SSP3_D4                     0x3082
-MX28_PAD_AUART2_TX__SSP3_D5                     0x3092
-MX28_PAD_AUART2_CTS__SAIF1_BITCLK               0x30a2
-MX28_PAD_AUART2_RTS__SAIF1_LRCLK                0x30b2
-MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT       0x30c2
-MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN        0x30d2
-MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT      0x30e2
-MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN       0x30f2
-MX28_PAD_PWM0__DUART_RX                         0x3102
-MX28_PAD_PWM1__DUART_TX                         0x3112
-MX28_PAD_PWM2__USB1_OVERCURRENT                 0x3122
-MX28_PAD_SAIF0_MCLK__AUART4_CTS                 0x3142
-MX28_PAD_SAIF0_LRCLK__AUART4_RTS                0x3152
-MX28_PAD_SAIF0_BITCLK__AUART4_RX                0x3162
-MX28_PAD_SAIF0_SDATA0__AUART4_TX                0x3172
-MX28_PAD_I2C0_SCL__DUART_RX                     0x3182
-MX28_PAD_I2C0_SDA__DUART_TX                     0x3192
-MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1             0x31a2
-MX28_PAD_SPDIF__ENET1_RX_ER                     0x31b2
-MX28_PAD_ENET0_MDC__SAIF0_SDATA1                0x4002
-MX28_PAD_ENET0_MDIO__SAIF0_SDATA2               0x4012
-MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1              0x4022
-MX28_PAD_ENET0_RXD0__SAIF1_SDATA2               0x4032
-MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT    0x4052
-MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT      0x4092
-MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN       0x40a2
-MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT      0x40b2
-MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN       0x40c2
-MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN     0x40d2
-MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT       0x40e2
-MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN        0x40f2
-MX28_PAD_GPMI_D00__GPIO_0_0                     0x0003
-MX28_PAD_GPMI_D01__GPIO_0_1                     0x0013
-MX28_PAD_GPMI_D02__GPIO_0_2                     0x0023
-MX28_PAD_GPMI_D03__GPIO_0_3                     0x0033
-MX28_PAD_GPMI_D04__GPIO_0_4                     0x0043
-MX28_PAD_GPMI_D05__GPIO_0_5                     0x0053
-MX28_PAD_GPMI_D06__GPIO_0_6                     0x0063
-MX28_PAD_GPMI_D07__GPIO_0_7                     0x0073
-MX28_PAD_GPMI_CE0N__GPIO_0_16                   0x0103
-MX28_PAD_GPMI_CE1N__GPIO_0_17                   0x0113
-MX28_PAD_GPMI_CE2N__GPIO_0_18                   0x0123
-MX28_PAD_GPMI_CE3N__GPIO_0_19                   0x0133
-MX28_PAD_GPMI_RDY0__GPIO_0_20                   0x0143
-MX28_PAD_GPMI_RDY1__GPIO_0_21                   0x0153
-MX28_PAD_GPMI_RDY2__GPIO_0_22                   0x0163
-MX28_PAD_GPMI_RDY3__GPIO_0_23                   0x0173
-MX28_PAD_GPMI_RDN__GPIO_0_24                    0x0183
-MX28_PAD_GPMI_WRN__GPIO_0_25                    0x0193
-MX28_PAD_GPMI_ALE__GPIO_0_26                    0x01a3
-MX28_PAD_GPMI_CLE__GPIO_0_27                    0x01b3
-MX28_PAD_GPMI_RESETN__GPIO_0_28                 0x01c3
-MX28_PAD_LCD_D00__GPIO_1_0                      0x1003
-MX28_PAD_LCD_D01__GPIO_1_1                      0x1013
-MX28_PAD_LCD_D02__GPIO_1_2                      0x1023
-MX28_PAD_LCD_D03__GPIO_1_3                      0x1033
-MX28_PAD_LCD_D04__GPIO_1_4                      0x1043
-MX28_PAD_LCD_D05__GPIO_1_5                      0x1053
-MX28_PAD_LCD_D06__GPIO_1_6                      0x1063
-MX28_PAD_LCD_D07__GPIO_1_7                      0x1073
-MX28_PAD_LCD_D08__GPIO_1_8                      0x1083
-MX28_PAD_LCD_D09__GPIO_1_9                      0x1093
-MX28_PAD_LCD_D10__GPIO_1_10                     0x10a3
-MX28_PAD_LCD_D11__GPIO_1_11                     0x10b3
-MX28_PAD_LCD_D12__GPIO_1_12                     0x10c3
-MX28_PAD_LCD_D13__GPIO_1_13                     0x10d3
-MX28_PAD_LCD_D14__GPIO_1_14                     0x10e3
-MX28_PAD_LCD_D15__GPIO_1_15                     0x10f3
-MX28_PAD_LCD_D16__GPIO_1_16                     0x1103
-MX28_PAD_LCD_D17__GPIO_1_17                     0x1113
-MX28_PAD_LCD_D18__GPIO_1_18                     0x1123
-MX28_PAD_LCD_D19__GPIO_1_19                     0x1133
-MX28_PAD_LCD_D20__GPIO_1_20                     0x1143
-MX28_PAD_LCD_D21__GPIO_1_21                     0x1153
-MX28_PAD_LCD_D22__GPIO_1_22                     0x1163
-MX28_PAD_LCD_D23__GPIO_1_23                     0x1173
-MX28_PAD_LCD_RD_E__GPIO_1_24                    0x1183
-MX28_PAD_LCD_WR_RWN__GPIO_1_25                  0x1193
-MX28_PAD_LCD_RS__GPIO_1_26                      0x11a3
-MX28_PAD_LCD_CS__GPIO_1_27                      0x11b3
-MX28_PAD_LCD_VSYNC__GPIO_1_28                   0x11c3
-MX28_PAD_LCD_HSYNC__GPIO_1_29                   0x11d3
-MX28_PAD_LCD_DOTCLK__GPIO_1_30                  0x11e3
-MX28_PAD_LCD_ENABLE__GPIO_1_31                  0x11f3
-MX28_PAD_SSP0_DATA0__GPIO_2_0                   0x2003
-MX28_PAD_SSP0_DATA1__GPIO_2_1                   0x2013
-MX28_PAD_SSP0_DATA2__GPIO_2_2                   0x2023
-MX28_PAD_SSP0_DATA3__GPIO_2_3                   0x2033
-MX28_PAD_SSP0_DATA4__GPIO_2_4                   0x2043
-MX28_PAD_SSP0_DATA5__GPIO_2_5                   0x2053
-MX28_PAD_SSP0_DATA6__GPIO_2_6                   0x2063
-MX28_PAD_SSP0_DATA7__GPIO_2_7                   0x2073
-MX28_PAD_SSP0_CMD__GPIO_2_8                     0x2083
-MX28_PAD_SSP0_DETECT__GPIO_2_9                  0x2093
-MX28_PAD_SSP0_SCK__GPIO_2_10                    0x20a3
-MX28_PAD_SSP1_SCK__GPIO_2_12                    0x20c3
-MX28_PAD_SSP1_CMD__GPIO_2_13                    0x20d3
-MX28_PAD_SSP1_DATA0__GPIO_2_14                  0x20e3
-MX28_PAD_SSP1_DATA3__GPIO_2_15                  0x20f3
-MX28_PAD_SSP2_SCK__GPIO_2_16                    0x2103
-MX28_PAD_SSP2_MOSI__GPIO_2_17                   0x2113
-MX28_PAD_SSP2_MISO__GPIO_2_18                   0x2123
-MX28_PAD_SSP2_SS0__GPIO_2_19                    0x2133
-MX28_PAD_SSP2_SS1__GPIO_2_20                    0x2143
-MX28_PAD_SSP2_SS2__GPIO_2_21                    0x2153
-MX28_PAD_SSP3_SCK__GPIO_2_24                    0x2183
-MX28_PAD_SSP3_MOSI__GPIO_2_25                   0x2193
-MX28_PAD_SSP3_MISO__GPIO_2_26                   0x21a3
-MX28_PAD_SSP3_SS0__GPIO_2_27                    0x21b3
-MX28_PAD_AUART0_RX__GPIO_3_0                    0x3003
-MX28_PAD_AUART0_TX__GPIO_3_1                    0x3013
-MX28_PAD_AUART0_CTS__GPIO_3_2                   0x3023
-MX28_PAD_AUART0_RTS__GPIO_3_3                   0x3033
-MX28_PAD_AUART1_RX__GPIO_3_4                    0x3043
-MX28_PAD_AUART1_TX__GPIO_3_5                    0x3053
-MX28_PAD_AUART1_CTS__GPIO_3_6                   0x3063
-MX28_PAD_AUART1_RTS__GPIO_3_7                   0x3073
-MX28_PAD_AUART2_RX__GPIO_3_8                    0x3083
-MX28_PAD_AUART2_TX__GPIO_3_9                    0x3093
-MX28_PAD_AUART2_CTS__GPIO_3_10                  0x30a3
-MX28_PAD_AUART2_RTS__GPIO_3_11                  0x30b3
-MX28_PAD_AUART3_RX__GPIO_3_12                   0x30c3
-MX28_PAD_AUART3_TX__GPIO_3_13                   0x30d3
-MX28_PAD_AUART3_CTS__GPIO_3_14                  0x30e3
-MX28_PAD_AUART3_RTS__GPIO_3_15                  0x30f3
-MX28_PAD_PWM0__GPIO_3_16                        0x3103
-MX28_PAD_PWM1__GPIO_3_17                        0x3113
-MX28_PAD_PWM2__GPIO_3_18                        0x3123
-MX28_PAD_SAIF0_MCLK__GPIO_3_20                  0x3143
-MX28_PAD_SAIF0_LRCLK__GPIO_3_21                 0x3153
-MX28_PAD_SAIF0_BITCLK__GPIO_3_22                0x3163
-MX28_PAD_SAIF0_SDATA0__GPIO_3_23                0x3173
-MX28_PAD_I2C0_SCL__GPIO_3_24                    0x3183
-MX28_PAD_I2C0_SDA__GPIO_3_25                    0x3193
-MX28_PAD_SAIF1_SDATA0__GPIO_3_26                0x31a3
-MX28_PAD_SPDIF__GPIO_3_27                       0x31b3
-MX28_PAD_PWM3__GPIO_3_28                        0x31c3
-MX28_PAD_PWM4__GPIO_3_29                        0x31d3
-MX28_PAD_LCD_RESET__GPIO_3_30                   0x31e3
-MX28_PAD_ENET0_MDC__GPIO_4_0                    0x4003
-MX28_PAD_ENET0_MDIO__GPIO_4_1                   0x4013
-MX28_PAD_ENET0_RX_EN__GPIO_4_2                  0x4023
-MX28_PAD_ENET0_RXD0__GPIO_4_3                   0x4033
-MX28_PAD_ENET0_RXD1__GPIO_4_4                   0x4043
-MX28_PAD_ENET0_TX_CLK__GPIO_4_5                 0x4053
-MX28_PAD_ENET0_TX_EN__GPIO_4_6                  0x4063
-MX28_PAD_ENET0_TXD0__GPIO_4_7                   0x4073
-MX28_PAD_ENET0_TXD1__GPIO_4_8                   0x4083
-MX28_PAD_ENET0_RXD2__GPIO_4_9                   0x4093
-MX28_PAD_ENET0_RXD3__GPIO_4_10                  0x40a3
-MX28_PAD_ENET0_TXD2__GPIO_4_11                  0x40b3
-MX28_PAD_ENET0_TXD3__GPIO_4_12                  0x40c3
-MX28_PAD_ENET0_RX_CLK__GPIO_4_13                0x40d3
-MX28_PAD_ENET0_COL__GPIO_4_14                   0x40e3
-MX28_PAD_ENET0_CRS__GPIO_4_15                   0x40f3
-MX28_PAD_ENET_CLK__GPIO_4_16                    0x4103
-MX28_PAD_JTAG_RTCK__GPIO_4_20                   0x4143
-
-Valid values for i.MX23 pinmux-id:
-
-pinmux                                          id
-------                                          --
-MX23_PAD_GPMI_D00__GPMI_D00                     0x0000
-MX23_PAD_GPMI_D01__GPMI_D01                     0x0010
-MX23_PAD_GPMI_D02__GPMI_D02                     0x0020
-MX23_PAD_GPMI_D03__GPMI_D03                     0x0030
-MX23_PAD_GPMI_D04__GPMI_D04                     0x0040
-MX23_PAD_GPMI_D05__GPMI_D05                     0x0050
-MX23_PAD_GPMI_D06__GPMI_D06                     0x0060
-MX23_PAD_GPMI_D07__GPMI_D07                     0x0070
-MX23_PAD_GPMI_D08__GPMI_D08                     0x0080
-MX23_PAD_GPMI_D09__GPMI_D09                     0x0090
-MX23_PAD_GPMI_D10__GPMI_D10                     0x00a0
-MX23_PAD_GPMI_D11__GPMI_D11                     0x00b0
-MX23_PAD_GPMI_D12__GPMI_D12                     0x00c0
-MX23_PAD_GPMI_D13__GPMI_D13                     0x00d0
-MX23_PAD_GPMI_D14__GPMI_D14                     0x00e0
-MX23_PAD_GPMI_D15__GPMI_D15                     0x00f0
-MX23_PAD_GPMI_CLE__GPMI_CLE                     0x0100
-MX23_PAD_GPMI_ALE__GPMI_ALE                     0x0110
-MX23_PAD_GPMI_CE2N__GPMI_CE2N                   0x0120
-MX23_PAD_GPMI_RDY0__GPMI_RDY0                   0x0130
-MX23_PAD_GPMI_RDY1__GPMI_RDY1                   0x0140
-MX23_PAD_GPMI_RDY2__GPMI_RDY2                   0x0150
-MX23_PAD_GPMI_RDY3__GPMI_RDY3                   0x0160
-MX23_PAD_GPMI_WPN__GPMI_WPN                     0x0170
-MX23_PAD_GPMI_WRN__GPMI_WRN                     0x0180
-MX23_PAD_GPMI_RDN__GPMI_RDN                     0x0190
-MX23_PAD_AUART1_CTS__AUART1_CTS                 0x01a0
-MX23_PAD_AUART1_RTS__AUART1_RTS                 0x01b0
-MX23_PAD_AUART1_RX__AUART1_RX                   0x01c0
-MX23_PAD_AUART1_TX__AUART1_TX                   0x01d0
-MX23_PAD_I2C_SCL__I2C_SCL                       0x01e0
-MX23_PAD_I2C_SDA__I2C_SDA                       0x01f0
-MX23_PAD_LCD_D00__LCD_D00                       0x1000
-MX23_PAD_LCD_D01__LCD_D01                       0x1010
-MX23_PAD_LCD_D02__LCD_D02                       0x1020
-MX23_PAD_LCD_D03__LCD_D03                       0x1030
-MX23_PAD_LCD_D04__LCD_D04                       0x1040
-MX23_PAD_LCD_D05__LCD_D05                       0x1050
-MX23_PAD_LCD_D06__LCD_D06                       0x1060
-MX23_PAD_LCD_D07__LCD_D07                       0x1070
-MX23_PAD_LCD_D08__LCD_D08                       0x1080
-MX23_PAD_LCD_D09__LCD_D09                       0x1090
-MX23_PAD_LCD_D10__LCD_D10                       0x10a0
-MX23_PAD_LCD_D11__LCD_D11                       0x10b0
-MX23_PAD_LCD_D12__LCD_D12                       0x10c0
-MX23_PAD_LCD_D13__LCD_D13                       0x10d0
-MX23_PAD_LCD_D14__LCD_D14                       0x10e0
-MX23_PAD_LCD_D15__LCD_D15                       0x10f0
-MX23_PAD_LCD_D16__LCD_D16                       0x1100
-MX23_PAD_LCD_D17__LCD_D17                       0x1110
-MX23_PAD_LCD_RESET__LCD_RESET                   0x1120
-MX23_PAD_LCD_RS__LCD_RS                         0x1130
-MX23_PAD_LCD_WR__LCD_WR                         0x1140
-MX23_PAD_LCD_CS__LCD_CS                         0x1150
-MX23_PAD_LCD_DOTCK__LCD_DOTCK                   0x1160
-MX23_PAD_LCD_ENABLE__LCD_ENABLE                 0x1170
-MX23_PAD_LCD_HSYNC__LCD_HSYNC                   0x1180
-MX23_PAD_LCD_VSYNC__LCD_VSYNC                   0x1190
-MX23_PAD_PWM0__PWM0                             0x11a0
-MX23_PAD_PWM1__PWM1                             0x11b0
-MX23_PAD_PWM2__PWM2                             0x11c0
-MX23_PAD_PWM3__PWM3                             0x11d0
-MX23_PAD_PWM4__PWM4                             0x11e0
-MX23_PAD_SSP1_CMD__SSP1_CMD                     0x2000
-MX23_PAD_SSP1_DETECT__SSP1_DETECT               0x2010
-MX23_PAD_SSP1_DATA0__SSP1_DATA0                 0x2020
-MX23_PAD_SSP1_DATA1__SSP1_DATA1                 0x2030
-MX23_PAD_SSP1_DATA2__SSP1_DATA2                 0x2040
-MX23_PAD_SSP1_DATA3__SSP1_DATA3                 0x2050
-MX23_PAD_SSP1_SCK__SSP1_SCK                     0x2060
-MX23_PAD_ROTARYA__ROTARYA                       0x2070
-MX23_PAD_ROTARYB__ROTARYB                       0x2080
-MX23_PAD_EMI_A00__EMI_A00                       0x2090
-MX23_PAD_EMI_A01__EMI_A01                       0x20a0
-MX23_PAD_EMI_A02__EMI_A02                       0x20b0
-MX23_PAD_EMI_A03__EMI_A03                       0x20c0
-MX23_PAD_EMI_A04__EMI_A04                       0x20d0
-MX23_PAD_EMI_A05__EMI_A05                       0x20e0
-MX23_PAD_EMI_A06__EMI_A06                       0x20f0
-MX23_PAD_EMI_A07__EMI_A07                       0x2100
-MX23_PAD_EMI_A08__EMI_A08                       0x2110
-MX23_PAD_EMI_A09__EMI_A09                       0x2120
-MX23_PAD_EMI_A10__EMI_A10                       0x2130
-MX23_PAD_EMI_A11__EMI_A11                       0x2140
-MX23_PAD_EMI_A12__EMI_A12                       0x2150
-MX23_PAD_EMI_BA0__EMI_BA0                       0x2160
-MX23_PAD_EMI_BA1__EMI_BA1                       0x2170
-MX23_PAD_EMI_CASN__EMI_CASN                     0x2180
-MX23_PAD_EMI_CE0N__EMI_CE0N                     0x2190
-MX23_PAD_EMI_CE1N__EMI_CE1N                     0x21a0
-MX23_PAD_GPMI_CE1N__GPMI_CE1N                   0x21b0
-MX23_PAD_GPMI_CE0N__GPMI_CE0N                   0x21c0
-MX23_PAD_EMI_CKE__EMI_CKE                       0x21d0
-MX23_PAD_EMI_RASN__EMI_RASN                     0x21e0
-MX23_PAD_EMI_WEN__EMI_WEN                       0x21f0
-MX23_PAD_EMI_D00__EMI_D00                       0x3000
-MX23_PAD_EMI_D01__EMI_D01                       0x3010
-MX23_PAD_EMI_D02__EMI_D02                       0x3020
-MX23_PAD_EMI_D03__EMI_D03                       0x3030
-MX23_PAD_EMI_D04__EMI_D04                       0x3040
-MX23_PAD_EMI_D05__EMI_D05                       0x3050
-MX23_PAD_EMI_D06__EMI_D06                       0x3060
-MX23_PAD_EMI_D07__EMI_D07                       0x3070
-MX23_PAD_EMI_D08__EMI_D08                       0x3080
-MX23_PAD_EMI_D09__EMI_D09                       0x3090
-MX23_PAD_EMI_D10__EMI_D10                       0x30a0
-MX23_PAD_EMI_D11__EMI_D11                       0x30b0
-MX23_PAD_EMI_D12__EMI_D12                       0x30c0
-MX23_PAD_EMI_D13__EMI_D13                       0x30d0
-MX23_PAD_EMI_D14__EMI_D14                       0x30e0
-MX23_PAD_EMI_D15__EMI_D15                       0x30f0
-MX23_PAD_EMI_DQM0__EMI_DQM0                     0x3100
-MX23_PAD_EMI_DQM1__EMI_DQM1                     0x3110
-MX23_PAD_EMI_DQS0__EMI_DQS0                     0x3120
-MX23_PAD_EMI_DQS1__EMI_DQS1                     0x3130
-MX23_PAD_EMI_CLK__EMI_CLK                       0x3140
-MX23_PAD_EMI_CLKN__EMI_CLKN                     0x3150
-MX23_PAD_GPMI_D00__LCD_D8                       0x0001
-MX23_PAD_GPMI_D01__LCD_D9                       0x0011
-MX23_PAD_GPMI_D02__LCD_D10                      0x0021
-MX23_PAD_GPMI_D03__LCD_D11                      0x0031
-MX23_PAD_GPMI_D04__LCD_D12                      0x0041
-MX23_PAD_GPMI_D05__LCD_D13                      0x0051
-MX23_PAD_GPMI_D06__LCD_D14                      0x0061
-MX23_PAD_GPMI_D07__LCD_D15                      0x0071
-MX23_PAD_GPMI_D08__LCD_D18                      0x0081
-MX23_PAD_GPMI_D09__LCD_D19                      0x0091
-MX23_PAD_GPMI_D10__LCD_D20                      0x00a1
-MX23_PAD_GPMI_D11__LCD_D21                      0x00b1
-MX23_PAD_GPMI_D12__LCD_D22                      0x00c1
-MX23_PAD_GPMI_D13__LCD_D23                      0x00d1
-MX23_PAD_GPMI_D14__AUART2_RX                    0x00e1
-MX23_PAD_GPMI_D15__AUART2_TX                    0x00f1
-MX23_PAD_GPMI_CLE__LCD_D16                      0x0101
-MX23_PAD_GPMI_ALE__LCD_D17                      0x0111
-MX23_PAD_GPMI_CE2N__ATA_A2                      0x0121
-MX23_PAD_AUART1_RTS__IR_CLK                     0x01b1
-MX23_PAD_AUART1_RX__IR_RX                       0x01c1
-MX23_PAD_AUART1_TX__IR_TX                       0x01d1
-MX23_PAD_I2C_SCL__GPMI_RDY2                     0x01e1
-MX23_PAD_I2C_SDA__GPMI_CE2N                     0x01f1
-MX23_PAD_LCD_D00__ETM_DA8                       0x1001
-MX23_PAD_LCD_D01__ETM_DA9                       0x1011
-MX23_PAD_LCD_D02__ETM_DA10                      0x1021
-MX23_PAD_LCD_D03__ETM_DA11                      0x1031
-MX23_PAD_LCD_D04__ETM_DA12                      0x1041
-MX23_PAD_LCD_D05__ETM_DA13                      0x1051
-MX23_PAD_LCD_D06__ETM_DA14                      0x1061
-MX23_PAD_LCD_D07__ETM_DA15                      0x1071
-MX23_PAD_LCD_D08__ETM_DA0                       0x1081
-MX23_PAD_LCD_D09__ETM_DA1                       0x1091
-MX23_PAD_LCD_D10__ETM_DA2                       0x10a1
-MX23_PAD_LCD_D11__ETM_DA3                       0x10b1
-MX23_PAD_LCD_D12__ETM_DA4                       0x10c1
-MX23_PAD_LCD_D13__ETM_DA5                       0x10d1
-MX23_PAD_LCD_D14__ETM_DA6                       0x10e1
-MX23_PAD_LCD_D15__ETM_DA7                       0x10f1
-MX23_PAD_LCD_RESET__ETM_TCTL                    0x1121
-MX23_PAD_LCD_RS__ETM_TCLK                       0x1131
-MX23_PAD_LCD_DOTCK__GPMI_RDY3                   0x1161
-MX23_PAD_LCD_ENABLE__I2C_SCL                    0x1171
-MX23_PAD_LCD_HSYNC__I2C_SDA                     0x1181
-MX23_PAD_LCD_VSYNC__LCD_BUSY                    0x1191
-MX23_PAD_PWM0__ROTARYA                          0x11a1
-MX23_PAD_PWM1__ROTARYB                          0x11b1
-MX23_PAD_PWM2__GPMI_RDY3                        0x11c1
-MX23_PAD_PWM3__ETM_TCTL                         0x11d1
-MX23_PAD_PWM4__ETM_TCLK                         0x11e1
-MX23_PAD_SSP1_DETECT__GPMI_CE3N                 0x2011
-MX23_PAD_SSP1_DATA1__I2C_SCL                    0x2031
-MX23_PAD_SSP1_DATA2__I2C_SDA                    0x2041
-MX23_PAD_ROTARYA__AUART2_RTS                    0x2071
-MX23_PAD_ROTARYB__AUART2_CTS                    0x2081
-MX23_PAD_GPMI_D00__SSP2_DATA0                   0x0002
-MX23_PAD_GPMI_D01__SSP2_DATA1                   0x0012
-MX23_PAD_GPMI_D02__SSP2_DATA2                   0x0022
-MX23_PAD_GPMI_D03__SSP2_DATA3                   0x0032
-MX23_PAD_GPMI_D04__SSP2_DATA4                   0x0042
-MX23_PAD_GPMI_D05__SSP2_DATA5                   0x0052
-MX23_PAD_GPMI_D06__SSP2_DATA6                   0x0062
-MX23_PAD_GPMI_D07__SSP2_DATA7                   0x0072
-MX23_PAD_GPMI_D08__SSP1_DATA4                   0x0082
-MX23_PAD_GPMI_D09__SSP1_DATA5                   0x0092
-MX23_PAD_GPMI_D10__SSP1_DATA6                   0x00a2
-MX23_PAD_GPMI_D11__SSP1_DATA7                   0x00b2
-MX23_PAD_GPMI_D15__GPMI_CE3N                    0x00f2
-MX23_PAD_GPMI_RDY0__SSP2_DETECT                 0x0132
-MX23_PAD_GPMI_RDY1__SSP2_CMD                    0x0142
-MX23_PAD_GPMI_WRN__SSP2_SCK                     0x0182
-MX23_PAD_AUART1_CTS__SSP1_DATA4                 0x01a2
-MX23_PAD_AUART1_RTS__SSP1_DATA5                 0x01b2
-MX23_PAD_AUART1_RX__SSP1_DATA6                  0x01c2
-MX23_PAD_AUART1_TX__SSP1_DATA7                  0x01d2
-MX23_PAD_I2C_SCL__AUART1_TX                     0x01e2
-MX23_PAD_I2C_SDA__AUART1_RX                     0x01f2
-MX23_PAD_LCD_D08__SAIF2_SDATA0                  0x1082
-MX23_PAD_LCD_D09__SAIF1_SDATA0                  0x1092
-MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK              0x10a2
-MX23_PAD_LCD_D11__SAIF_LRCLK                    0x10b2
-MX23_PAD_LCD_D12__SAIF2_SDATA1                  0x10c2
-MX23_PAD_LCD_D13__SAIF2_SDATA2                  0x10d2
-MX23_PAD_LCD_D14__SAIF1_SDATA2                  0x10e2
-MX23_PAD_LCD_D15__SAIF1_SDATA1                  0x10f2
-MX23_PAD_LCD_D16__SAIF_ALT_BITCLK               0x1102
-MX23_PAD_LCD_RESET__GPMI_CE3N                   0x1122
-MX23_PAD_PWM0__DUART_RX                         0x11a2
-MX23_PAD_PWM1__DUART_TX                         0x11b2
-MX23_PAD_PWM3__AUART1_CTS                       0x11d2
-MX23_PAD_PWM4__AUART1_RTS                       0x11e2
-MX23_PAD_SSP1_CMD__JTAG_TDO                     0x2002
-MX23_PAD_SSP1_DETECT__USB_OTG_ID                0x2012
-MX23_PAD_SSP1_DATA0__JTAG_TDI                   0x2022
-MX23_PAD_SSP1_DATA1__JTAG_TCLK                  0x2032
-MX23_PAD_SSP1_DATA2__JTAG_RTCK                  0x2042
-MX23_PAD_SSP1_DATA3__JTAG_TMS                   0x2052
-MX23_PAD_SSP1_SCK__JTAG_TRST                    0x2062
-MX23_PAD_ROTARYA__SPDIF                         0x2072
-MX23_PAD_ROTARYB__GPMI_CE3N                     0x2082
-MX23_PAD_GPMI_D00__GPIO_0_0                     0x0003
-MX23_PAD_GPMI_D01__GPIO_0_1                     0x0013
-MX23_PAD_GPMI_D02__GPIO_0_2                     0x0023
-MX23_PAD_GPMI_D03__GPIO_0_3                     0x0033
-MX23_PAD_GPMI_D04__GPIO_0_4                     0x0043
-MX23_PAD_GPMI_D05__GPIO_0_5                     0x0053
-MX23_PAD_GPMI_D06__GPIO_0_6                     0x0063
-MX23_PAD_GPMI_D07__GPIO_0_7                     0x0073
-MX23_PAD_GPMI_D08__GPIO_0_8                     0x0083
-MX23_PAD_GPMI_D09__GPIO_0_9                     0x0093
-MX23_PAD_GPMI_D10__GPIO_0_10                    0x00a3
-MX23_PAD_GPMI_D11__GPIO_0_11                    0x00b3
-MX23_PAD_GPMI_D12__GPIO_0_12                    0x00c3
-MX23_PAD_GPMI_D13__GPIO_0_13                    0x00d3
-MX23_PAD_GPMI_D14__GPIO_0_14                    0x00e3
-MX23_PAD_GPMI_D15__GPIO_0_15                    0x00f3
-MX23_PAD_GPMI_CLE__GPIO_0_16                    0x0103
-MX23_PAD_GPMI_ALE__GPIO_0_17                    0x0113
-MX23_PAD_GPMI_CE2N__GPIO_0_18                   0x0123
-MX23_PAD_GPMI_RDY0__GPIO_0_19                   0x0133
-MX23_PAD_GPMI_RDY1__GPIO_0_20                   0x0143
-MX23_PAD_GPMI_RDY2__GPIO_0_21                   0x0153
-MX23_PAD_GPMI_RDY3__GPIO_0_22                   0x0163
-MX23_PAD_GPMI_WPN__GPIO_0_23                    0x0173
-MX23_PAD_GPMI_WRN__GPIO_0_24                    0x0183
-MX23_PAD_GPMI_RDN__GPIO_0_25                    0x0193
-MX23_PAD_AUART1_CTS__GPIO_0_26                  0x01a3
-MX23_PAD_AUART1_RTS__GPIO_0_27                  0x01b3
-MX23_PAD_AUART1_RX__GPIO_0_28                   0x01c3
-MX23_PAD_AUART1_TX__GPIO_0_29                   0x01d3
-MX23_PAD_I2C_SCL__GPIO_0_30                     0x01e3
-MX23_PAD_I2C_SDA__GPIO_0_31                     0x01f3
-MX23_PAD_LCD_D00__GPIO_1_0                      0x1003
-MX23_PAD_LCD_D01__GPIO_1_1                      0x1013
-MX23_PAD_LCD_D02__GPIO_1_2                      0x1023
-MX23_PAD_LCD_D03__GPIO_1_3                      0x1033
-MX23_PAD_LCD_D04__GPIO_1_4                      0x1043
-MX23_PAD_LCD_D05__GPIO_1_5                      0x1053
-MX23_PAD_LCD_D06__GPIO_1_6                      0x1063
-MX23_PAD_LCD_D07__GPIO_1_7                      0x1073
-MX23_PAD_LCD_D08__GPIO_1_8                      0x1083
-MX23_PAD_LCD_D09__GPIO_1_9                      0x1093
-MX23_PAD_LCD_D10__GPIO_1_10                     0x10a3
-MX23_PAD_LCD_D11__GPIO_1_11                     0x10b3
-MX23_PAD_LCD_D12__GPIO_1_12                     0x10c3
-MX23_PAD_LCD_D13__GPIO_1_13                     0x10d3
-MX23_PAD_LCD_D14__GPIO_1_14                     0x10e3
-MX23_PAD_LCD_D15__GPIO_1_15                     0x10f3
-MX23_PAD_LCD_D16__GPIO_1_16                     0x1103
-MX23_PAD_LCD_D17__GPIO_1_17                     0x1113
-MX23_PAD_LCD_RESET__GPIO_1_18                   0x1123
-MX23_PAD_LCD_RS__GPIO_1_19                      0x1133
-MX23_PAD_LCD_WR__GPIO_1_20                      0x1143
-MX23_PAD_LCD_CS__GPIO_1_21                      0x1153
-MX23_PAD_LCD_DOTCK__GPIO_1_22                   0x1163
-MX23_PAD_LCD_ENABLE__GPIO_1_23                  0x1173
-MX23_PAD_LCD_HSYNC__GPIO_1_24                   0x1183
-MX23_PAD_LCD_VSYNC__GPIO_1_25                   0x1193
-MX23_PAD_PWM0__GPIO_1_26                        0x11a3
-MX23_PAD_PWM1__GPIO_1_27                        0x11b3
-MX23_PAD_PWM2__GPIO_1_28                        0x11c3
-MX23_PAD_PWM3__GPIO_1_29                        0x11d3
-MX23_PAD_PWM4__GPIO_1_30                        0x11e3
-MX23_PAD_SSP1_CMD__GPIO_2_0                     0x2003
-MX23_PAD_SSP1_DETECT__GPIO_2_1                  0x2013
-MX23_PAD_SSP1_DATA0__GPIO_2_2                   0x2023
-MX23_PAD_SSP1_DATA1__GPIO_2_3                   0x2033
-MX23_PAD_SSP1_DATA2__GPIO_2_4                   0x2043
-MX23_PAD_SSP1_DATA3__GPIO_2_5                   0x2053
-MX23_PAD_SSP1_SCK__GPIO_2_6                     0x2063
-MX23_PAD_ROTARYA__GPIO_2_7                      0x2073
-MX23_PAD_ROTARYB__GPIO_2_8                      0x2083
-MX23_PAD_EMI_A00__GPIO_2_9                      0x2093
-MX23_PAD_EMI_A01__GPIO_2_10                     0x20a3
-MX23_PAD_EMI_A02__GPIO_2_11                     0x20b3
-MX23_PAD_EMI_A03__GPIO_2_12                     0x20c3
-MX23_PAD_EMI_A04__GPIO_2_13                     0x20d3
-MX23_PAD_EMI_A05__GPIO_2_14                     0x20e3
-MX23_PAD_EMI_A06__GPIO_2_15                     0x20f3
-MX23_PAD_EMI_A07__GPIO_2_16                     0x2103
-MX23_PAD_EMI_A08__GPIO_2_17                     0x2113
-MX23_PAD_EMI_A09__GPIO_2_18                     0x2123
-MX23_PAD_EMI_A10__GPIO_2_19                     0x2133
-MX23_PAD_EMI_A11__GPIO_2_20                     0x2143
-MX23_PAD_EMI_A12__GPIO_2_21                     0x2153
-MX23_PAD_EMI_BA0__GPIO_2_22                     0x2163
-MX23_PAD_EMI_BA1__GPIO_2_23                     0x2173
-MX23_PAD_EMI_CASN__GPIO_2_24                    0x2183
-MX23_PAD_EMI_CE0N__GPIO_2_25                    0x2193
-MX23_PAD_EMI_CE1N__GPIO_2_26                    0x21a3
-MX23_PAD_GPMI_CE1N__GPIO_2_27                   0x21b3
-MX23_PAD_GPMI_CE0N__GPIO_2_28                   0x21c3
-MX23_PAD_EMI_CKE__GPIO_2_29                     0x21d3
-MX23_PAD_EMI_RASN__GPIO_2_30                    0x21e3
-MX23_PAD_EMI_WEN__GPIO_2_31                     0x21f3
+Valid values for i.MX28/i.MX23 pinmux-id are defined in
+arch/arm/boot/dts/imx28-pinfunc.h and arch/arm/boot/dts/imx23-pinfunc.h.
+The definitions for the padconfig properties can be found in
+arch/arm/boot/dts/mxs-pinfunc.h.
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt
index e204d009f16c..fb70856c5b51 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt
@@ -80,6 +80,17 @@ Valid values for pin and group names are:
     dbg, sdio3, spi, uaa, uab, uart2, uart3, sdio1, ddc, gma, gme, gmf, gmg,
     gmh, owr, uda.
 
+Valid values for nvidia,functions are:
+
+  blink, cec, cldvfs, clk12, cpu, dap, dap1, dap2, dev3, displaya,
+  displaya_alt, displayb, dtv, emc_dll, extperiph1, extperiph2,
+  extperiph3, gmi, gmi_alt, hda, hsi, i2c1, i2c2, i2c3, i2c4, i2cpwr,
+  i2s0, i2s1, i2s2, i2s3, i2s4, irda, kbc, nand, nand_alt, owr, pmi,
+  pwm0, pwm1, pwm2, pwm3, pwron, reset_out_n, rsvd1, rsvd2, rsvd3,
+  rsvd4, sdmmc1, sdmmc2, sdmmc3, sdmmc4, soc, spdif, spi1, spi2, spi3,
+  spi4, spi5, spi6, sysclk, trace, uarta, uartb, uartc, uartd, ulpi,
+  usb, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6, vi, vi_alt1, vi_alt3
+
 Example:
 
         pinmux: pinmux {
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt
index 683fde93c4fb..61e73cde9ae9 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt
@@ -103,6 +103,17 @@ Valid values for pin and group names are:
     drive_gma, drive_gmb, drive_gmc, drive_gmd, drive_gme, drive_owr,
     drive_uda.
 
+Valid values for nvidia,functions are:
+
+  ahb_clk, apb_clk, audio_sync, crt, dap1, dap2, dap3, dap4, dap5,
+  displaya, displayb, emc_test0_dll, emc_test1_dll, gmi, gmi_int,
+  hdmi, i2cp, i2c1, i2c2, i2c3, ide, irda, kbc, mio, mipi_hs, nand,
+  osc, owr, pcie, plla_out, pllc_out1, pllm_out1, pllp_out2, pllp_out3,
+  pllp_out4, pwm, pwr_intr, pwr_on, rsvd1, rsvd2, rsvd3, rsvd4, rtck,
+  sdio1, sdio2, sdio3, sdio4, sflash, spdif, spi1, spi2, spi2_alt,
+  spi3, spi4, trace, twc, uarta, uartb, uartc, uartd, uarte, ulpi,
+  vi, vi_sensor_clk, xio
+
 Example:
 
         pinctrl@70000000 {
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt
index 6f426ed7009e..0e6354c11e6d 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt
@@ -91,6 +91,18 @@ Valid values for pin and group names are:
     gmh, gpv, lcd1, lcd2, owr, sdio1, sdio2, sdio3, spi, uaa, uab, uart2,
     uart3, uda, vi1.
 
+Valid values for nvidia,functions are:
+
+  blink, cec, clk_12m_out, clk_32k_in, core_pwr_req, cpu_pwr_req, crt,
+  dap, ddr, dev3, displaya, displayb, dtv, extperiph1, extperiph2,
+  extperiph3, gmi, gmi_alt, hda, hdcp, hdmi, hsi, i2c1, i2c2, i2c3,
+  i2c4, i2cpwr, i2s0, i2s1, i2s2, i2s3, i2s4, invalid, kbc, mio, nand,
+  nand_alt, owr, pcie, pwm0, pwm1, pwm2, pwm3, pwr_int_n, rsvd1, rsvd2,
+  rsvd3, rsvd4, rtck, sata, sdmmc1, sdmmc2, sdmmc3, sdmmc4, spdif, spi1,
+  spi2, spi2_alt, spi3, spi4, spi5, spi6, sysclk, test, trace, uarta,
+  uartb, uartc, uartd, uarte, ulpi, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6,
+  vi, vi_alt1, vi_alt2, vi_alt3
+
 Example:
 
         pinctrl@70000000 {
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
index aeb3c995cc04..1958ca9f9e5c 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
@@ -127,21 +127,20 @@ whether there is any interaction between the child and intermediate parent
 nodes, is again defined entirely by the binding for the individual pin
 controller device.
 
-== Using generic pinconfig options ==
+== Generic pin configuration node content ==
 
-Generic pinconfig parameters can be used by defining a separate node containing
-the applicable parameters (and optional values), like:
+Many data items that are represented in a pin configuration node are common
+and generic. Pin control bindings should use the properties defined below
+where they are applicable; not all of these properties are relevant or useful
+for all hardware or binding structures. Each individual binding document
+should state which of these generic properties, if any, are used, and the
+structure of the DT nodes that contain these properties.
 
-pcfg_pull_up: pcfg_pull_up {
-        bias-pull-up;
-        drive-strength = <20>;
-};
-
-This node should then be referenced in the appropriate pinctrl node as a phandle
-and parsed in the driver using the pinconf_generic_parse_dt_config function.
-
-Supported configuration parameters are:
+Supported generic properties are:
 
+pins                    - the list of pins that properties in the node
+                          apply to
+function                - the mux function to select
 bias-disable            - disable any pin bias
 bias-high-impedance     - high impedance mode ("third-state", "floating")
 bias-bus-hold           - latch weakly
@@ -160,7 +159,21 @@ low-power-disable	- disable low power mode
 output-low              - set the pin to output mode with low level
 output-high             - set the pin to output mode with high level
 
-Arguments for parameters:
+Some of the generic properties take arguments. For those that do, the
+arguments are described below.
+
+- pins takes a list of pin names or IDs as a required argument. The specific
+  binding for the hardware defines:
+  - Whether the entries are integers or strings, and their meaning.
+
+- function takes a list of function names/IDs as a required argument. The
+  specific binding for the hardware defines:
+  - Whether the entries are integers or strings, and their meaning.
+  - Whether only a single entry is allowed (which is applied to all entries
+    in the pins property), or whether there may alternatively be one entry per
+    entry in the pins property, in which case the list lengths must match, and
+    for each list index i, the function at list index i is applied to the pin
+    at list index i.
 
 - bias-pull-up, -down and -pin-default take as optional argument on hardware
   supporting it the pull strength in Ohm. bias-disable will disable the pull.
@@ -170,7 +183,5 @@ Arguments for parameters:
 - input-debounce takes the debounce time in usec as argument
   or 0 to disable debouncing
 
-All parameters not listed here, do not take an argument.
-
 More in-depth documentation on these parameters can be found in
 <include/linux/pinctrl/pinconfig-generic.h>
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-palmas.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-palmas.txt
new file mode 100644
index 000000000000..caf297bee1fb
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-palmas.txt
@@ -0,0 +1,96 @@
+Palmas Pincontrol bindings
+
+The pins of Palmas device can be set on different option and provides
+the configuration for Pull UP/DOWN, open drain etc.
+
+Required properties:
+- compatible: It must be one of following:
+  - "ti,palmas-pinctrl" for Palma series of the pincontrol.
+  - "ti,tps65913-pinctrl" for Palma series device TPS65913.
+  - "ti,tps80036-pinctrl" for Palma series device TPS80036.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+Palmas's pin configuration nodes act as a container for an arbitrary number of
+subnodes. Each of these subnodes represents some desired configuration for a
+list of pins. This configuration can include the mux function to select on
+those pin(s), and various pin configuration parameters, such as pull-up,
+open drain.
+
+The name of each subnode is not important; all subnodes should be enumerated
+and processed purely based on their content.
+
+Each subnode only affects those parameters that are explicitly listed. In
+other words, a subnode that lists a mux function but no pin configuration
+parameters implies no information about any pin configuration parameters.
+Similarly, a pin subnode that describes a pullup parameter implies no
+information about e.g. the mux function.
+
+Optional properties:
+- ti,palmas-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 mode.
+        Selection primary or secondary function associated to I2C2_SCL_SCE,
+        I2C2_SDA_SDO pin/pad for DVFS1 interface
+- ti,palmas-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2 mode.
+        Selection primary or secondary function associated to GPADC_START
+        and SYSEN2 pin/pad for DVFS2 interface
+
+This binding uses the following generic properties as defined in
+pinctrl-bindings.txt:
+
+Required: pins
+Options: function, bias-disable, bias-pull-up, bias-pull-down,
+         drive-open-drain.
+
+Note that many of these properties are only valid for certain specific pins.
+See the Palmas device datasheet for complete details regarding which pins
+support which functionality.
+
+Valid values for pin names are:
+        gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7, gpio8, gpio9,
+        gpio10, gpio11, gpio12, gpio13, gpio14, gpio15, vac, powergood,
+        nreswarm, pwrdown, gpadc_start, reset_in, nsleep, enable1, enable2,
+        int.
+
+Valid value of function names are:
+        gpio, led, pwm, regen, sysen, clk32kgaudio, id, vbus_det, chrg_det,
+        vac, vacok, powergood, usb_psel, msecure, pwrhold, int, nreswarm,
+        simrsto, simrsti, low_vbat, wireless_chrg1, rcm, pwrdown, gpadc_start,
+        reset_in, nsleep, enable.
+
+There are 4 special functions: opt0, opt1, opt2 and opt3. If any of these
+functions is selected then directly pins register will be written with 0, 1, 2
+or 3 respectively if it is valid for that pins or list of pins.
+
+Example:
+        palmas: tps65913 {
+                ....
+                pinctrl {
+                        compatible = "ti,tps65913-pinctrl";
+                        ti,palmas-enable-dvfs1;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&palmas_pins_state>;
+
+                        palmas_pins_state: pinmux {
+                                gpio0 {
+                                        pins = "gpio0";
+                                        function = "id";
+                                        bias-pull-up;
+                                };
+
+                                vac {
+                                        pins = "vac";
+                                        function = "vacok";
+                                        bias-pull-down;
+                                };
+
+                                gpio5 {
+                                        pins = "gpio5";
+                                        function = "opt0";
+                                        drive-open-drain = <1>;
+                                };
+                        };
+                };
+                ....
+        };
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
index 5a02e30dd262..7069a0b84e3a 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
@@ -72,6 +72,13 @@ Optional properties:
                 /* pin base, nr pins & gpio function */
                 pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>;
 
+- interrupt-controller : standard interrupt controller binding if using
+  interrupts for wake-up events for example. In this case pinctrl-single
+  is set up as a chained interrupt controller and the wake-up interrupts
+  can be requested by the drivers using request_irq().
+
+- #interrupt-cells : standard interrupt binding if using interrupts
+
 This driver assumes that there is only one register for each pin (unless the
 pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as
 specified in the pinctrl-bindings.txt document in this directory.
@@ -121,6 +128,8 @@ pmx_core: pinmux@4a100040 {
         reg = <0x4a100040 0x0196>;
         #address-cells = <1>;
         #size-cells = <0>;
+        #interrupt-cells = <1>;
+        interrupt-controller;
         pinctrl-single,register-width = <16>;
         pinctrl-single,function-mask = <0xffff>;
 };
@@ -131,6 +140,8 @@ pmx_wkup: pinmux@4a31e040 {
         reg = <0x4a31e040 0x0038>;
         #address-cells = <1>;
         #size-cells = <0>;
+        #interrupt-cells = <1>;
+        interrupt-controller;
         pinctrl-single,register-width = <16>;
         pinctrl-single,function-mask = <0xffff>;
 };
diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
index b0fb1018d7ad..f378d342aae4 100644
--- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
@@ -21,10 +21,13 @@ defined as gpio sub-nodes of the pinmux controller.
 Required properties for iomux controller:
   - compatible: one of "rockchip,rk2928-pinctrl", "rockchip,rk3066a-pinctrl"
                        "rockchip,rk3066b-pinctrl", "rockchip,rk3188-pinctrl"
+  - reg: first element is the general register space of the iomux controller
+         second element is the separate pull register space of the rk3188
 
 Required properties for gpio sub nodes:
-  - compatible: "rockchip,gpio-bank"
+  - compatible: "rockchip,gpio-bank", "rockchip,rk3188-gpio-bank0"
   - reg: register of the gpio bank (different than the iomux registerset)
+         second element: separate pull register for rk3188 bank0
   - interrupts: base interrupt of the gpio bank in the interrupt controller
   - clocks: clock that drives this bank
   - gpio-controller: identifies the node as a gpio controller and pin bank.
@@ -95,3 +98,44 @@ uart2: serial@20064000 {
         pinctrl-names = "default";
         pinctrl-0 = <&uart2_xfer>;
 };
+
+Example for rk3188:
+
+        pinctrl@20008000 {
+                compatible = "rockchip,rk3188-pinctrl";
+                reg = <0x20008000 0xa0>,
+                      <0x20008164 0x1a0>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                gpio0: gpio0@0x2000a000 {
+                        compatible = "rockchip,rk3188-gpio-bank0";
+                        reg = <0x2000a000 0x100>,
+                              <0x20004064 0x8>;
+                        interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&clk_gates8 9>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpio1: gpio1@0x2003c000 {
+                        compatible = "rockchip,gpio-bank";
+                        reg = <0x2003c000 0x100>;
+                        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&clk_gates8 10>;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                ...
+
+        };
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index 36281e7a2a46..257677de3e6b 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -12,6 +12,7 @@ Required Properties:
   - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
   - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
   - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
+  - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
   - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
   - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
   - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
@@ -128,7 +129,7 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
      - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
        found on Samsung S3C64xx SoCs,
      - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
-       found on Samsung Exynos4210 SoC.
+       found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
    - interrupt-parent: phandle of the interrupt parent to which the external
      wakeup interrupts are forwarded to.
    - interrupts: interrupt used by multiplexed wakeup interrupts.
diff --git a/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt b/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt
index 9a2f3f420526..6b33b9f18e88 100644
--- a/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt
+++ b/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt
@@ -1,8 +1,8 @@
 ST Ericsson Nomadik pinmux controller
 
 Required properties:
-- compatible: "stericsson,nmk-pinctrl", "stericsson,nmk-pinctrl-db8540",
-              "stericsson,nmk-pinctrl-stn8815"
+- compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
+              "stericsson,stn8815-pinctrl"
 - reg: Should contain the register physical address and length of the PRCMU.
 
 Please refer to pinctrl-bindings.txt in this directory for details of the
@@ -68,7 +68,7 @@ Optional subnode-properties:
 Example board file extract:
 
         pinctrl@80157000 {
-                compatible = "stericsson,nmk-pinctrl";
+                compatible = "stericsson,db8500-pinctrl";
                 reg = <0x80157000 0x2000>;
 
                 pinctrl-names = "default";
diff --git a/Documentation/devicetree/bindings/power_supply/msm-poweroff.txt b/Documentation/devicetree/bindings/power_supply/msm-poweroff.txt
new file mode 100644
index 000000000000..ce44ad357565
--- /dev/null
+++ b/Documentation/devicetree/bindings/power_supply/msm-poweroff.txt
@@ -0,0 +1,17 @@
+MSM Restart Driver
+
+A power supply hold (ps-hold) bit is set to power the msm chipsets.
+Clearing that bit allows us to restart/poweroff. The difference
+between poweroff and restart is determined by unique power manager IC
+settings.
+
+Required Properties:
+-compatible: "qcom,pshold"
+-reg: Specifies the physical address of the ps-hold register
+
+Example:
+
+        restart@fc4ab000 {
+                compatible = "qcom,pshold";
+                reg = <0xfc4ab000 0x4>;
+        };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt b/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt
index 5693877ab377..82dd5b65cf48 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt
@@ -1,21 +1,20 @@
 * Freescale MSI interrupt controller
 
 Required properties:
-- compatible : compatible list, contains 2 entries,
-  first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572,
-  etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on
-  the parent type.
+- compatible : compatible list, may contain one or two entries
+  The first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572,
+  etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" or
+  "fsl,mpic-msi-v4.3" depending on the parent type and version. If mpic
+  version is 4.3, the number of MSI registers is increased to 16, MSIIR1 is
+  provided to access these 16 registers, and compatible "fsl,mpic-msi-v4.3"
+  should be used. The first entry is optional; the second entry is
+  required.
 
 - reg : It may contain one or two regions. The first region should contain
   the address and the length of the shared message interrupt register set.
-  The second region should contain the address of aliased MSIIR register for
-  platforms that have such an alias.
-
-- msi-available-ranges: use <start count> style section to define which
-  msi interrupt can be used in the 256 msi interrupts. This property is
-  optional, without this, all the 256 MSI interrupts can be used.
-  Each available range must begin and end on a multiple of 32 (i.e.
-  no splitting an individual MSI register or the associated PIC interrupt).
+  The second region should contain the address of aliased MSIIR or MSIIR1
+  register for platforms that have such an alias, if using MSIIR1, the second
+  region must be added because different MSI group has different MSIIR1 offset.
 
 - interrupts : each one of the interrupts here is one entry per 32 MSIs,
   and routed to the host interrupt controller. the interrupts should
@@ -28,6 +27,14 @@ Required properties:
   to MPIC.
 
 Optional properties:
+- msi-available-ranges: use <start count> style section to define which
+  msi interrupt can be used in the 256 msi interrupts. This property is
+  optional, without this, all the MSI interrupts can be used.
+  Each available range must begin and end on a multiple of 32 (i.e.
+  no splitting an individual MSI register or the associated PIC interrupt).
+  MPIC v4.3 does not support this property because the 32 interrupts of an
+  individual register are not continuous when using MSIIR1.
+
 - msi-address-64: 64-bit PCI address of the MSIIR register. The MSIIR register
   is used for MSI messaging.  The address of MSIIR in PCI address space is
   the MSI message address.
@@ -54,6 +61,28 @@ Example:
                 interrupt-parent = <&mpic>;
         };
 
+        msi@41600 {
+                compatible = "fsl,mpic-msi-v4.3";
+                reg = <0x41600 0x200 0x44148 4>;
+                interrupts = <
+                        0xe0 0 0 0
+                        0xe1 0 0 0
+                        0xe2 0 0 0
+                        0xe3 0 0 0
+                        0xe4 0 0 0
+                        0xe5 0 0 0
+                        0xe6 0 0 0
+                        0xe7 0 0 0
+                        0x100 0 0 0
+                        0x101 0 0 0
+                        0x102 0 0 0
+                        0x103 0 0 0
+                        0x104 0 0 0
+                        0x105 0 0 0
+                        0x106 0 0 0
+                        0x107 0 0 0>;
+        };
+
 The Freescale hypervisor and msi-address-64
 -------------------------------------------
 Normally, PCI devices have access to all of CCSR via an ATMU mapping.  The
diff --git a/Documentation/devicetree/bindings/pwm/atmel-tcb-pwm.txt b/Documentation/devicetree/bindings/pwm/atmel-tcb-pwm.txt
index de0eaed86651..8031148bcf85 100644
--- a/Documentation/devicetree/bindings/pwm/atmel-tcb-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/atmel-tcb-pwm.txt
@@ -2,11 +2,9 @@ Atmel TCB PWM controller
 
 Required properties:
 - compatible: should be "atmel,tcb-pwm"
-- #pwm-cells: Should be 3.  The first cell specifies the per-chip index
-  of the PWM to use, the second cell is the period in nanoseconds and
-  bit 0 in the third cell is used to encode the polarity of PWM output.
-  Set bit 0 of the third cell in PWM specifier to 1 for inverse polarity &
-  set to 0 for normal polarity.
+- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+  the cells format. The only third cell flag supported by this binding is
+  PWM_POLARITY_INVERTED.
 - tc-block: The Timer Counter block to use as a PWM chip.
 
 Example:
diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
index 8522bfbccfd7..b50d7a6d9d7f 100644
--- a/Documentation/devicetree/bindings/pwm/imx-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
@@ -3,8 +3,8 @@ Freescale i.MX PWM controller
 Required properties:
 - compatible: should be "fsl,<soc>-pwm"
 - reg: physical base address and length of the controller's registers
-- #pwm-cells: should be 2.  The first cell specifies the per-chip index
-  of the PWM to use and the second cell is the period in nanoseconds.
+- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+  the cells format.
 - interrupts: The interrupt for the pwm controller
 
 Example:
diff --git a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt
index 9e3f8f1d46a2..96cdde5f6208 100644
--- a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt
@@ -3,8 +3,8 @@ Freescale MXS PWM controller
 Required properties:
 - compatible: should be "fsl,imx23-pwm"
 - reg: physical base address and length of the controller's registers
-- #pwm-cells: should be 2.  The first cell specifies the per-chip index
-  of the PWM to use and the second cell is the period in nanoseconds.
+- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+  the cells format.
 - fsl,pwm-number: the number of PWM devices
 
 Example:
diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
index 01438ecd6628..c3fc57af8772 100644
--- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
@@ -5,9 +5,8 @@ Required properties:
   - "nvidia,tegra20-pwm"
   - "nvidia,tegra30-pwm"
 - reg: physical base address and length of the controller's registers
-- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
-  first cell specifies the per-chip index of the PWM to use and the second
-  cell is the period in nanoseconds.
+- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+  the cells format.
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt b/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt
index 1e3dfe7a4894..f84ec9d291ea 100644
--- a/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt
@@ -3,8 +3,8 @@ NXP PCA9685 16-channel 12-bit PWM LED controller
 
 Required properties:
   - compatible: "nxp,pca9685-pwm"
-  - #pwm-cells: should be 2. The first cell specifies the per-chip index
-    of the PWM to use and the second cell is the period in nanoseconds.
+  - #pwm-cells: Should be 2. See pwm.txt in this directory for a description of
+    the cells format.
     The index 16 is the ALLCALL channel, that sets all PWM channels at the same
     time.
 
diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
index ac67c687a327..d61fccd40bad 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
@@ -19,13 +19,19 @@ Required properties:
 - reg: base address and size of register area
 - interrupts: list of timer interrupts (one interrupt per timer, starting at
   timer 0)
-- #pwm-cells: number of cells used for PWM specifier - must be 3
-   the specifier format is as follows:
-     - phandle to PWM controller node
-     - index of PWM channel (from 0 to 4)
-     - PWM signal period in nanoseconds
-     - bitmask of optional PWM flags:
-        0x1 - invert PWM signal
+- clock-names: should contain all following required clock names:
+    - "timers" - PWM base clock used to generate PWM signals,
+  and any subset of following optional clock names:
+    - "pwm-tclk0" - first external PWM clock source,
+    - "pwm-tclk1" - second external PWM clock source.
+  Note that not all IP variants allow using all external clock sources.
+  Refer to SoC documentation to learn which clock source configurations
+  are available.
+- clocks: should contain clock specifiers of all clocks, which input names
+  have been specified in clock-names property, in same order.
+- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+  the cells format. The only third cell flag supported by this binding is
+  PWM_POLARITY_INVERTED.
 
 Optional properties:
 - samsung,pwm-outputs: list of PWM channels used as PWM outputs on particular
@@ -38,6 +44,8 @@ Example:
                 reg = <0x7f006000 0x1000>;
                 interrupt-parent = <&vic0>;
                 interrupts = <23>, <24>, <25>, <27>, <28>;
+                clocks = <&clock 67>;
+                clock-names = "timers";
                 samsung,pwm-outputs = <0>, <1>;
                 #pwm-cells = <3>;
         }
diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt b/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt
index 681afad73778..fb81179dce37 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt
@@ -4,11 +4,9 @@ Required properties:
 - compatible: Must be "ti,<soc>-ecap".
   for am33xx - compatible = "ti,am33xx-ecap";
   for da850  - compatible = "ti,da850-ecap", "ti,am33xx-ecap";
-- #pwm-cells: Should be 3. Number of cells being used to specify PWM property.
-  First cell specifies the per-chip index of the PWM to use, the second
-  cell is the period in nanoseconds and bit 0 in the third cell is used to
-  encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
-  to 1 for inverse polarity & set to 0 for normal polarity.
+- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+  the cells format. The PWM channel index ranges from 0 to 4. The only third
+  cell flag supported by this binding is PWM_POLARITY_INVERTED.
 - reg: physical base address and size of the registers map.
 
 Optional properties:
diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
index 337c6fc65d3f..9c100b2c5b23 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
@@ -4,11 +4,9 @@ Required properties:
 - compatible: Must be "ti,<soc>-ehrpwm".
   for am33xx - compatible = "ti,am33xx-ehrpwm";
   for da850  - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";
-- #pwm-cells: Should be 3. Number of cells being used to specify PWM property.
-  First cell specifies the per-chip index of the PWM to use, the second
-  cell is the period in nanoseconds and bit 0 in the third cell is used to
-  encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
-  to 1 for inverse polarity & set to 0 for normal polarity.
+- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+  the cells format. The only third cell flag supported by this binding is
+  PWM_POLARITY_INVERTED.
 - reg: physical base address and size of the registers map.
 
 Optional properties:
diff --git a/Documentation/devicetree/bindings/pwm/pwm.txt b/Documentation/devicetree/bindings/pwm/pwm.txt
index 06e67247859a..8556263b8502 100644
--- a/Documentation/devicetree/bindings/pwm/pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm.txt
@@ -43,13 +43,14 @@ because the name "backlight" would be used as fallback anyway.
 pwm-specifier typically encodes the chip-relative PWM number and the PWM
 period in nanoseconds.
 
-Optionally, the pwm-specifier can encode a number of flags in a third cell:
-- bit 0: PWM signal polarity (0: normal polarity, 1: inverse polarity)
+Optionally, the pwm-specifier can encode a number of flags (defined in
+<dt-bindings/pwm/pwm.h>) in a third cell:
+- PWM_POLARITY_INVERTED: invert the PWM signal polarity
 
 Example with optional PWM specifier for inverse polarity
 
         bl: backlight {
-                pwms = <&pwm 0 5000000 1>;
+                pwms = <&pwm 0 5000000 PWM_POLARITY_INVERTED>;
                 pwm-names = "backlight";
         };
 
diff --git a/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt
new file mode 100644
index 000000000000..b067e84a94b5
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt
@@ -0,0 +1,28 @@
+* Renesas R-Car Timer Pulse Unit PWM Controller
+
+Required Properties:
+
+  - compatible: should be one of the following.
+    - "renesas,tpu-r8a73a4": for R8A77A4 (R-Mobile APE6) compatible PWM controller.
+    - "renesas,tpu-r8a7740": for R8A7740 (R-Mobile A1) compatible PWM controller.
+    - "renesas,tpu-r8a7790": for R8A7790 (R-Car H2) compatible PWM controller.
+    - "renesas,tpu-sh7372": for SH7372 (SH-Mobile AP4) compatible PWM controller.
+    - "renesas,tpu": for generic R-Car TPU PWM controller.
+
+  - reg: Base address and length of each memory resource used by the PWM
+    controller hardware module.
+
+  - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+    the cells format. The only third cell flag supported by this binding is
+    PWM_POLARITY_INVERTED.
+
+Please refer to pwm.txt in this directory for details of the common PWM bindings
+used by client devices.
+
+Example: R8A7740 (R-Car A1) TPU controller node
+
+        tpu: pwm@e6600000 {
+                compatible = "renesas,tpu-r8a7740", "renesas,tpu";
+                reg = <0xe6600000 0x100>;
+                #pwm-cells = <3>;
+        };
diff --git a/Documentation/devicetree/bindings/pwm/spear-pwm.txt b/Documentation/devicetree/bindings/pwm/spear-pwm.txt
index 3ac779d83386..b486de2c3fe3 100644
--- a/Documentation/devicetree/bindings/pwm/spear-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/spear-pwm.txt
@@ -5,9 +5,8 @@ Required properties:
   - "st,spear320-pwm"
   - "st,spear1340-pwm"
 - reg: physical base address and length of the controller's registers
-- #pwm-cells: number of cells used to specify PWM which is fixed to 2 on
-  SPEAr. The first cell specifies the per-chip index of the PWM to use and
-  the second cell is the period in nanoseconds.
+- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+  the cells format.
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/pwm/ti,twl-pwm.txt b/Documentation/devicetree/bindings/pwm/ti,twl-pwm.txt
index 2943ee5fce00..4e32bee11201 100644
--- a/Documentation/devicetree/bindings/pwm/ti,twl-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/ti,twl-pwm.txt
@@ -6,8 +6,8 @@ On TWL6030 series: PWM0 and PWM1
 
 Required properties:
 - compatible: "ti,twl4030-pwm" or "ti,twl6030-pwm"
-- #pwm-cells: should be 2.  The first cell specifies the per-chip index
-  of the PWM to use and the second cell is the period in nanoseconds.
+- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+  the cells format.
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/pwm/ti,twl-pwmled.txt b/Documentation/devicetree/bindings/pwm/ti,twl-pwmled.txt
index cb64f3acc10f..9f4b46090782 100644
--- a/Documentation/devicetree/bindings/pwm/ti,twl-pwmled.txt
+++ b/Documentation/devicetree/bindings/pwm/ti,twl-pwmled.txt
@@ -6,8 +6,8 @@ On TWL6030 series: LED PWM (mainly used as charging indicator LED)
 
 Required properties:
 - compatible: "ti,twl4030-pwmled" or "ti,twl6030-pwmled"
-- #pwm-cells: should be 2.  The first cell specifies the per-chip index
-  of the PWM to use and the second cell is the period in nanoseconds.
+- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+  the cells format.
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt b/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt
index d21d82d29855..a76390e6df2e 100644
--- a/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt
@@ -3,11 +3,9 @@ VIA/Wondermedia VT8500/WM8xxx series SoC PWM controller
 Required properties:
 - compatible: should be "via,vt8500-pwm"
 - reg: physical base address and length of the controller's registers
-- #pwm-cells: Should be 3. Number of cells being used to specify PWM property.
-  First cell specifies the per-chip index of the PWM to use, the second
-  cell is the period in nanoseconds and bit 0 in the third cell is used to
-  encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
-  to 1 for inverse polarity & set to 0 for normal polarity.
+- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+  the cells format. The only third cell flag supported by this binding is
+  PWM_POLARITY_INVERTED.
 - clocks: phandle to the PWM source clock
 
 Example:
diff --git a/Documentation/devicetree/bindings/regulator/88pm800.txt b/Documentation/devicetree/bindings/regulator/88pm800.txt
new file mode 100644
index 000000000000..e8a54c2a5821
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/88pm800.txt
@@ -0,0 +1,38 @@
+Marvell 88PM800 regulator
+
+Required properties:
+- compatible: "marvell,88pm800"
+- reg: I2C slave address
+- regulators: A node that houses a sub-node for each regulator within the
+  device. Each sub-node is identified using the node's name (or the deprecated
+  regulator-compatible property if present), with valid values listed below.
+  The content of each sub-node is defined by the standard binding for
+  regulators; see regulator.txt.
+
+The valid names for regulators are:
+
+  buck1, buck2, buck3, buck4, buck5, ldo1, ldo2, ldo3, ldo4, ldo5, ldo6, ldo7,
+  ldo8, ldo9, ldo10, ldo11, ldo12, ldo13, ldo14, ldo15, ldo16, ldo17, ldo18, ldo19
+
+Example:
+
+        pmic: 88pm800@31 {
+                compatible = "marvell,88pm800";
+                reg = <0x31>;
+
+                regulators {
+                        buck1 {
+                                regulator-min-microvolt = <600000>;
+                                regulator-max-microvolt = <3950000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+                        ldo1 {
+                                regulator-min-microvolt = <600000>;
+                                regulator-max-microvolt = <15000000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+...
+                };
+        };
diff --git a/Documentation/devicetree/bindings/regulator/as3722-regulator.txt b/Documentation/devicetree/bindings/regulator/as3722-regulator.txt
new file mode 100644
index 000000000000..caad0c8a258d
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/as3722-regulator.txt
@@ -0,0 +1,91 @@
+Regulator of AMS AS3722 PMIC.
+Name of the regulator subnode must be "regulators".
+
+Optional properties:
+--------------------
+The input supply of regulators are the optional properties on the
+regulator node. The AS3722 is having 7 DCDC step-down regulators as
+sd[0-6], 10 LDOs as ldo[0-7], ldo[9-11]. The input supply of these
+regulators are provided through following properties:
+vsup-sd2-supply: Input supply for SD2.
+vsup-sd3-supply: Input supply for SD3.
+vsup-sd4-supply: Input supply for SD4.
+vsup-sd5-supply: Input supply for SD5.
+vin-ldo0-supply: Input supply for LDO0.
+vin-ldo1-6-supply: Input supply for LDO1 and LDO6.
+vin-ldo2-5-7-supply: Input supply for LDO2, LDO5 and LDO7.
+vin-ldo3-4-supply: Input supply for LDO3 and LDO4.
+vin-ldo9-10-supply: Input supply for LDO9 and LDO10.
+vin-ldo11-supply: Input supply for LDO11.
+
+Optional nodes:
+--------------
+- regulators : Must contain a sub-node per regulator from the list below.
+               Each sub-node should contain the constraints and initialization
+               information for that regulator. See regulator.txt for a
+               description of standard properties for these sub-nodes.
+               Additional custom properties  are listed below.
+               sd[0-6], ldo[0-7], ldo[9-11].
+
+               Optional sub-node properties:
+               ----------------------------
+                ams,ext-control: External control of the rail. The option of
+                        this properties will tell which external input is
+                        controlling this rail. Valid values are 0, 1, 2 ad 3.
+                        0: There is no external control of this rail.
+                        1: Rail is controlled by ENABLE1 input pin.
+                        2: Rail is controlled by ENABLE2 input pin.
+                        3: Rail is controlled by ENABLE3 input pin.
+                ams,enable-tracking: Enable tracking with SD1, only supported
+                        by LDO3.
+
+Example:
+-------
+        ams3722: ams3722 {
+                compatible = "ams,as3722";
+                reg = <0x40>;
+                ...
+
+                regulators {
+                        vsup-sd2-supply = <...>;
+                        ...
+
+                        sd0 {
+                                regulator-name = "vdd_cpu";
+                                regulator-min-microvolt = <700000>;
+                                regulator-max-microvolt = <1400000>;
+                                regulator-always-on;
+                                ams,ext-control = <2>;
+                        };
+
+                        sd1 {
+                                regulator-name = "vdd_core";
+                                regulator-min-microvolt = <700000>;
+                                regulator-max-microvolt = <1400000>;
+                                regulator-always-on;
+                                ams,ext-control = <1>;
+                        };
+
+                        sd2 {
+                                regulator-name = "vddio_ddr";
+                                regulator-min-microvolt = <1350000>;
+                                regulator-max-microvolt = <1350000>;
+                                regulator-always-on;
+                        };
+
+                        sd4 {
+                                regulator-name = "avdd-hdmi-pex";
+                                regulator-min-microvolt = <1050000>;
+                                regulator-max-microvolt = <1050000>;
+                                regulator-always-on;
+                        };
+
+                        sd5 {
+                                regulator-name = "vdd-1v8";
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <1800000>;
+                                regulator-always-on;
+                        };
+                        ....
+                };
+        };
diff --git a/Documentation/devicetree/bindings/regulator/da9210.txt b/Documentation/devicetree/bindings/regulator/da9210.txt
new file mode 100644
index 000000000000..f120f229d67d
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/da9210.txt
@@ -0,0 +1,21 @@
+* Dialog Semiconductor DA9210 Voltage Regulator
+
+Required properties:
+
+- compatible:   must be "diasemi,da9210"
+- reg:          the i2c slave address of the regulator. It should be 0x68.
+
+Any standard regulator properties can be used to configure the single da9210
+DCDC.
+
+Example:
+
+        da9210@68 {
+                compatible = "diasemi,da9210";
+                reg = <0x68>;
+
+                regulator-min-microvolt = <900000>;
+                regulator-max-microvolt = <1000000>;
+                regulator-boot-on;
+                regulator-always-on;
+        };
diff --git a/Documentation/devicetree/bindings/regulator/max8660.txt b/Documentation/devicetree/bindings/regulator/max8660.txt
new file mode 100644
index 000000000000..8ba994d8a142
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/max8660.txt
@@ -0,0 +1,47 @@
+Maxim MAX8660 voltage regulator
+
+Required properties:
+- compatible: must be one of "maxim,max8660", "maxim,max8661"
+- reg: I2C slave address, usually 0x34
+- any required generic properties defined in regulator.txt
+
+Example:
+
+        i2c_master {
+                max8660@34 {
+                        compatible = "maxim,max8660";
+                        reg = <0x34>;
+
+                        regulators {
+                                regulator@0 {
+                                        regulator-compatible= "V3(DCDC)";
+                                        regulator-min-microvolt = <725000>;
+                                        regulator-max-microvolt = <1800000>;
+                                };
+
+                                regulator@1 {
+                                        regulator-compatible= "V4(DCDC)";
+                                        regulator-min-microvolt = <725000>;
+                                        regulator-max-microvolt = <1800000>;
+                                };
+
+                                regulator@2 {
+                                        regulator-compatible= "V5(LDO)";
+                                        regulator-min-microvolt = <1700000>;
+                                        regulator-max-microvolt = <2000000>;
+                                };
+
+                                regulator@3 {
+                                        regulator-compatible= "V6(LDO)";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <3300000>;
+                                };
+
+                                regulator@4 {
+                                        regulator-compatible= "V7(LDO)";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <3300000>;
+                                };
+                        };
+                };
+        };
diff --git a/Documentation/devicetree/bindings/regulator/palmas-pmic.txt b/Documentation/devicetree/bindings/regulator/palmas-pmic.txt
index 30b0581bb1ce..42e6b6bc48ff 100644
--- a/Documentation/devicetree/bindings/regulator/palmas-pmic.txt
+++ b/Documentation/devicetree/bindings/regulator/palmas-pmic.txt
@@ -25,17 +25,26 @@ Optional nodes:
                Additional custom properties  are listed below.
 
                For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP,
-               smps45, smps457, smps7 depending on variant, smps6, smps[8-10],
-               ldo[1-9], ldoln, ldousb.
+               smps45, smps457, smps7 depending on variant, smps6, smps[8-9],
+               smps10_out2, smps10_out1, ldo[1-9], ldoln, ldousb.
 
                Optional sub-node properties:
                ti,warm-reset - maintain voltage during warm reset(boolean)
-               ti,roof-floor - control voltage selection by pin(boolean)
+               ti,roof-floor - This takes as optional argument on platform supporting
+               the rail from desired external control. If there is no argument then
+               it will be assume that it is controlled by NSLEEP pin.
+               The valid value for external pins are:
+                        ENABLE1 then 1,
+                        ENABLE2 then 2 or
+                        NSLEEP then 3.
                ti,mode-sleep - mode to adopt in pmic sleep 0 - off, 1 - auto,
                2 - eco, 3 - forced pwm
                ti,smps-range - OTP has the wrong range set for the hardware so override
                0 - low range, 1 - high range.
 
+- ti,system-power-controller: Telling whether or not this pmic is controlling
+                              the system power.
+
 Example:
 
 #include <dt-bindings/interrupt-controller/irq.h>
@@ -48,6 +57,8 @@ pmic {
 
         ti,ldo6-vibrator;
 
+        ti,system-power-controller;
+
         regulators {
                 smps12_reg : smps12 {
                         regulator-name = "smps12";
@@ -56,7 +67,7 @@ pmic {
                         regulator-always-on;
                         regulator-boot-on;
                         ti,warm-reset;
-                        ti,roof-floor;
+                        ti,roof-floor = <1>; /* ENABLE1 control */
                         ti,mode-sleep = <0>;
                         ti,smps-range = <1>;
                 };
diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.txt b/Documentation/devicetree/bindings/regulator/pfuze100.txt
new file mode 100644
index 000000000000..fc989b2e8057
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/pfuze100.txt
@@ -0,0 +1,115 @@
+PFUZE100 family of regulators
+
+Required properties:
+- compatible: "fsl,pfuze100"
+- reg: I2C slave address
+
+Required child node:
+- regulators: This is the list of child nodes that specify the regulator
+  initialization data for defined regulators. Please refer to below doc
+  Documentation/devicetree/bindings/regulator/regulator.txt.
+
+  The valid names for regulators are:
+  sw1ab,sw1c,sw2,sw3a,sw3b,sw4,swbst,vsnvs,vrefddr,vgen1~vgen6
+
+Each regulator is defined using the standard binding for regulators.
+
+Example:
+
+        pmic: pfuze100@08 {
+                compatible = "fsl,pfuze100";
+                reg = <0x08>;
+
+                regulators {
+                        sw1a_reg: sw1ab {
+                                regulator-min-microvolt = <300000>;
+                                regulator-max-microvolt = <1875000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                                regulator-ramp-delay = <6250>;
+                        };
+
+                        sw1c_reg: sw1c {
+                                regulator-min-microvolt = <300000>;
+                                regulator-max-microvolt = <1875000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        sw2_reg: sw2 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        sw3a_reg: sw3a {
+                                regulator-min-microvolt = <400000>;
+                                regulator-max-microvolt = <1975000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        sw3b_reg: sw3b {
+                                regulator-min-microvolt = <400000>;
+                                regulator-max-microvolt = <1975000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        sw4_reg: sw4 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <3300000>;
+                        };
+
+                        swbst_reg: swbst {
+                                regulator-min-microvolt = <5000000>;
+                                regulator-max-microvolt = <5150000>;
+                        };
+
+                        snvs_reg: vsnvs {
+                                regulator-min-microvolt = <1000000>;
+                                regulator-max-microvolt = <3000000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        vref_reg: vrefddr {
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        vgen1_reg: vgen1 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <1550000>;
+                        };
+
+                        vgen2_reg: vgen2 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <1550000>;
+                        };
+
+                        vgen3_reg: vgen3 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                        };
+
+                        vgen4_reg: vgen4 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+
+                        vgen5_reg: vgen5 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+
+                        vgen6_reg: vgen6 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+                };
+        };
diff --git a/Documentation/devicetree/bindings/regulator/regulator.txt b/Documentation/devicetree/bindings/regulator/regulator.txt
index 48a3b8e5d6bd..e2c7f1e7251a 100644
--- a/Documentation/devicetree/bindings/regulator/regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/regulator.txt
@@ -12,6 +12,13 @@ Optional properties:
 - regulator-allow-bypass: allow the regulator to go into bypass mode
 - <name>-supply: phandle to the parent supply/regulator node
 - regulator-ramp-delay: ramp delay for regulator(in uV/uS)
+  For hardwares which support disabling ramp rate, it should be explicitly
+  intialised to zero (regulator-ramp-delay = <0>) for disabling ramp delay.
+- regulator-enable-ramp-delay: The time taken, in microseconds, for the supply
+  rail to reach the target voltage, plus/minus whatever tolerance the board
+  design requires. This property describes the total system ramp time
+  required due to the combination of internal ramping of the regulator itself,
+  and board design issues such as trace capacitance and load on the supply.
 
 Deprecated properties:
 - regulator-compatible: If a regulator chip contains multiple
diff --git a/Documentation/devicetree/bindings/rtc/dw-apb.txt b/Documentation/devicetree/bindings/rtc/dw-apb.txt
index eb2327b2bdb3..c703d51abb6c 100644
--- a/Documentation/devicetree/bindings/rtc/dw-apb.txt
+++ b/Documentation/devicetree/bindings/rtc/dw-apb.txt
@@ -1,7 +1,10 @@
 * Designware APB timer
 
 Required properties:
-- compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc"
+- compatible: One of:
+        "snps,dw-apb-timer"
+        "snps,dw-apb-timer-sp" <DEPRECATED>
+        "snps,dw-apb-timer-osc" <DEPRECATED>
 - reg: physical base address of the controller and length of memory mapped
   region.
 - interrupts: IRQ line for the timer.
@@ -20,25 +23,10 @@ systems may use one.
 
 
 Example:
-
-                timer1: timer@ffc09000 {
-                                compatible = "snps,dw-apb-timer-sp";
-                                interrupts = <0 168 4>;
-                                clock-frequency = <200000000>;
-                                reg = <0xffc09000 0x1000>;
-                        };
-
-                timer2: timer@ffd00000 {
-                                compatible = "snps,dw-apb-timer-osc";
-                                interrupts = <0 169 4>;
-                                clock-frequency = <200000000>;
-                                reg = <0xffd00000 0x1000>;
-                        };
-
-                timer3: timer@ffe00000 {
-                                compatible = "snps,dw-apb-timer-osc";
-                                interrupts = <0 170 4>;
-                                reg = <0xffe00000 0x1000>;
-                                clocks = <&timer_clk>, <&timer_pclk>;
-                                clock-names = "timer", "pclk";
-                        };
+        timer@ffe00000 {
+                compatible = "snps,dw-apb-timer";
+                interrupts = <0 170 4>;
+                reg = <0xffe00000 0x1000>;
+                clocks = <&timer_clk>, <&timer_pclk>;
+                clock-names = "timer", "pclk";
+        };
diff --git a/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt b/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt
new file mode 100644
index 000000000000..c9d3ac1477fe
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt
@@ -0,0 +1,17 @@
+MOXA ART real-time clock
+
+Required properties:
+
+- compatible : Should be "moxa,moxart-rtc"
+- gpio-rtc-sclk : RTC sclk gpio, with zero flags
+- gpio-rtc-data : RTC data gpio, with zero flags
+- gpio-rtc-reset : RTC reset gpio, with zero flags
+
+Example:
+
+        rtc: rtc {
+                compatible = "moxa,moxart-rtc";
+                gpio-rtc-sclk = <&gpio 5 0>;
+                gpio-rtc-data = <&gpio 6 0>;
+                gpio-rtc-reset = <&gpio 7 0>;
+        };
diff --git a/Documentation/devicetree/bindings/rtc/rtc-omap.txt b/Documentation/devicetree/bindings/rtc/rtc-omap.txt
index b47aa415c820..5a0f02d34d95 100644
--- a/Documentation/devicetree/bindings/rtc/rtc-omap.txt
+++ b/Documentation/devicetree/bindings/rtc/rtc-omap.txt
@@ -1,7 +1,11 @@
 TI Real Time Clock
 
 Required properties:
-- compatible: "ti,da830-rtc"
+- compatible:
+        - "ti,da830-rtc"  - for RTC IP used similar to that on DA8xx SoC family.
+        - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family.
+                            This RTC IP has special WAKE-EN Register to enable
+                            Wakeup generation for event Alarm.
 - reg: Address range of rtc register set
 - interrupts: rtc timer, alarm interrupts in order
 - interrupt-parent: phandle for the interrupt controller
diff --git a/Documentation/devicetree/bindings/rtc/rtc-palmas.txt b/Documentation/devicetree/bindings/rtc/rtc-palmas.txt
new file mode 100644
index 000000000000..adbccc0a51e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/rtc-palmas.txt
@@ -0,0 +1,33 @@
+Palmas RTC controller bindings
+
+Required properties:
+- compatible:
+  - "ti,palmas-rtc" for palma series of the RTC controller
+- interrupt-parent: Parent interrupt device, must be handle of palmas node.
+- interrupts: Interrupt number of RTC submodule on device.
+
+Optional properties:
+
+- ti,backup-battery-chargeable: The Palmas series device like TPS65913 or
+        TPS80036 supports the backup battery for powering the RTC when main
+        battery is removed or in very low power state. The backup battery
+        can be chargeable or non-chargeable. This flag will tells whether
+        battery is chargeable or not. If charging battery then driver can
+        enable the charging.
+- ti,backup-battery-charge-high-current: Enable high current charging in
+        backup battery. Device supports the < 100mA and > 100mA charging.
+        The high current will be > 100mA. Absence of this property will
+        charge battery to lower current i.e. < 100mA.
+
+Example:
+        palmas: tps65913@58 {
+                ...
+                palmas_rtc: rtc {
+                        compatible = "ti,palmas-rtc";
+                        interrupt-parent = <&palmas>;
+                        interrupts = <8 0>;
+                        ti,backup-battery-chargeable;
+                        ti,backup-battery-charge-high-current;
+                };
+                ...
+        };
diff --git a/Documentation/devicetree/bindings/serial/altera_jtaguart.txt b/Documentation/devicetree/bindings/serial/altera_jtaguart.txt
index c152f65f9a28..55a901051e8f 100644
--- a/Documentation/devicetree/bindings/serial/altera_jtaguart.txt
+++ b/Documentation/devicetree/bindings/serial/altera_jtaguart.txt
@@ -1,4 +1,5 @@
 Altera JTAG UART
 
 Required properties:
-- compatible : should be "ALTR,juart-1.0"
+- compatible : should be "ALTR,juart-1.0" <DEPRECATED>
+- compatible : should be "altr,juart-1.0"
diff --git a/Documentation/devicetree/bindings/serial/altera_uart.txt b/Documentation/devicetree/bindings/serial/altera_uart.txt
index 71cae3f70100..81bf7ffb1a81 100644
--- a/Documentation/devicetree/bindings/serial/altera_uart.txt
+++ b/Documentation/devicetree/bindings/serial/altera_uart.txt
@@ -1,7 +1,8 @@
 Altera UART
 
 Required properties:
-- compatible : should be "ALTR,uart-1.0"
+- compatible : should be "ALTR,uart-1.0" <DEPRECATED>
+- compatible : should be "altr,uart-1.0"
 
 Optional properties:
 - clock-frequency : frequency of the clock input to the UART
diff --git a/Documentation/devicetree/bindings/tty/serial/arc-uart.txt b/Documentation/devicetree/bindings/serial/arc-uart.txt
index 5cae2eb686f8..5cae2eb686f8 100644
--- a/Documentation/devicetree/bindings/tty/serial/arc-uart.txt
+++ b/Documentation/devicetree/bindings/serial/arc-uart.txt
diff --git a/Documentation/devicetree/bindings/tty/serial/atmel-usart.txt b/Documentation/devicetree/bindings/serial/atmel-usart.txt
index a49d9a1d4ccf..2191dcb9f1da 100644
--- a/Documentation/devicetree/bindings/tty/serial/atmel-usart.txt
+++ b/Documentation/devicetree/bindings/serial/atmel-usart.txt
@@ -10,13 +10,18 @@ Required properties:
 Optional properties:
 - atmel,use-dma-rx: use of PDC or DMA for receiving data
 - atmel,use-dma-tx: use of PDC or DMA for transmitting data
+- add dma bindings for dma transfer:
+        - dmas: DMA specifier, consisting of a phandle to DMA controller node,
+                memory peripheral interface and USART DMA channel ID, FIFO configuration.
+                Refer to dma.txt and atmel-dma.txt for details.
+        - dma-names: "rx" for RX channel, "tx" for TX channel.
 
 <chip> compatible description:
 - at91rm9200:  legacy USART support
 - at91sam9260: generic USART implementation for SAM9 SoCs
 
 Example:
-
+- use PDC:
         usart0: serial@fff8c000 {
                 compatible = "atmel,at91sam9260-usart";
                 reg = <0xfff8c000 0x4000>;
@@ -25,3 +30,14 @@ Example:
                 atmel,use-dma-tx;
         };
 
+- use DMA:
+        usart0: serial@f001c000 {
+                compatible = "atmel,at91sam9260-usart";
+                reg = <0xf001c000 0x100>;
+                interrupts = <12 4 5>;
+                atmel,use-dma-rx;
+                atmel,use-dma-tx;
+                dmas = <&dma0 2 0x3>,
+                       <&dma0 2 0x204>;
+                dma-names = "tx", "rx";
+        };
diff --git a/Documentation/devicetree/bindings/tty/serial/efm32-uart.txt b/Documentation/devicetree/bindings/serial/efm32-uart.txt
index 8e080b893b49..8e080b893b49 100644
--- a/Documentation/devicetree/bindings/tty/serial/efm32-uart.txt
+++ b/Documentation/devicetree/bindings/serial/efm32-uart.txt
diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
index c58573b5b1a4..35ae1fb3537f 100644
--- a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
+++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
@@ -1,35 +1,29 @@
-* Freescale i.MX UART controller
+* Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
 
 Required properties:
-- compatible : should be "fsl,imx21-uart"
+- compatible : Should be "fsl,<soc>-uart"
 - reg : Address and length of the register set for the device
-- interrupts : Should contain UART interrupt number
+- interrupts : Should contain uart interrupt
 
 Optional properties:
-- fsl,uart-has-rtscts: indicate that RTS/CTS signals are used
+- fsl,uart-has-rtscts : Indicate the uart has rts and cts
+- fsl,irda-mode : Indicate the uart supports irda mode
+- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
+                  is DCE mode by default.
 
 Note: Each uart controller should have an alias correctly numbered
 in "aliases" node.
 
 Example:
 
-- From imx51.dtsi:
 aliases {
         serial0 = &uart1;
-        serial1 = &uart2;
-        serial2 = &uart3;
 };
 
 uart1: serial@73fbc000 {
         compatible = "fsl,imx51-uart", "fsl,imx21-uart";
         reg = <0x73fbc000 0x4000>;
         interrupts = <31>;
-        status = "disabled";
-}
-
-- From imx51-babbage.dts:
-uart1: serial@73fbc000 {
         fsl,uart-has-rtscts;
-        status = "okay";
+        fsl,dte-mode;
 };
-
diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
index 6fd1dd1638dd..6fd1dd1638dd 100644
--- a/Documentation/devicetree/bindings/tty/serial/fsl-lpuart.txt
+++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt b/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt
index 2c00ec64628e..59a40f18d551 100644
--- a/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt
+++ b/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt
@@ -10,6 +10,10 @@ Required properties:
   Refer to dma.txt and fsl-mxs-dma.txt for details.
 - dma-names: "rx" for RX channel, "tx" for TX channel.
 
+Optional properties:
+- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines,
+        it also means you enable the DMA support for this UART.
+
 Example:
 auart0: serial@8006a000 {
         compatible = "fsl,imx28-auart", "fsl,imx23-auart";
diff --git a/Documentation/devicetree/bindings/serial/mrvl,pxa-ssp.txt b/Documentation/devicetree/bindings/serial/mrvl,pxa-ssp.txt
new file mode 100644
index 000000000000..669b8140dd79
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/mrvl,pxa-ssp.txt
@@ -0,0 +1,65 @@
+Device tree bindings for Marvell PXA SSP ports
+
+Required properties:
+
+        - compatible:   Must be one of
+                                mrvl,pxa25x-ssp
+                                mvrl,pxa25x-nssp
+                                mrvl,pxa27x-ssp
+                                mrvl,pxa3xx-ssp
+                                mvrl,pxa168-ssp
+                                mrvl,pxa910-ssp
+                                mrvl,ce4100-ssp
+                                mrvl,lpss-ssp
+
+        - reg:          The memory base
+        - dmas:         Two dma phandles, one for rx, one for tx
+        - dma-names:    Must be "rx", "tx"
+
+
+Example for PXA3xx:
+
+        ssp0: ssp@41000000 {
+                compatible = "mrvl,pxa3xx-ssp";
+                reg = <0x41000000 0x40>;
+                ssp-id = <1>;
+                interrupts = <24>;
+                clock-names = "pxa27x-ssp.0";
+                dmas = <&dma 13
+                        &dma 14>;
+                dma-names = "rx", "tx";
+        };
+
+        ssp1: ssp@41700000 {
+                compatible = "mrvl,pxa3xx-ssp";
+                reg = <0x41700000 0x40>;
+                ssp-id = <2>;
+                interrupts = <16>;
+                clock-names = "pxa27x-ssp.1";
+                dmas = <&dma 15
+                        &dma 16>;
+                dma-names = "rx", "tx";
+        };
+
+        ssp2: ssp@41900000 {
+                compatibl3 = "mrvl,pxa3xx-ssp";
+                reg = <0x41900000 0x40>;
+                ssp-id = <3>;
+                interrupts = <0>;
+                clock-names = "pxa27x-ssp.2";
+                dmas = <&dma 66
+                        &dma 67>;
+                dma-names = "rx", "tx";
+        };
+
+        ssp3: ssp@41a00000 {
+                compatible = "mrvl,pxa3xx-ssp";
+                reg = <0x41a00000 0x40>;
+                ssp-id = <4>;
+                interrupts = <13>;
+                clock-names = "pxa27x-ssp.3";
+                dmas = <&dma 2
+                        &dma 3>;
+                dma-names = "rx", "tx";
+        };
+
diff --git a/Documentation/devicetree/bindings/tty/serial/nxp-lpc32xx-hsuart.txt b/Documentation/devicetree/bindings/serial/nxp-lpc32xx-hsuart.txt
index 0d439dfc1aa5..0d439dfc1aa5 100644
--- a/Documentation/devicetree/bindings/tty/serial/nxp-lpc32xx-hsuart.txt
+++ b/Documentation/devicetree/bindings/serial/nxp-lpc32xx-hsuart.txt
diff --git a/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/of-serial.txt
index 1928a3e83cd0..1928a3e83cd0 100644
--- a/Documentation/devicetree/bindings/tty/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/serial/of-serial.txt
diff --git a/Documentation/devicetree/bindings/serial/qca,ar9330-uart.txt b/Documentation/devicetree/bindings/serial/qca,ar9330-uart.txt
new file mode 100644
index 000000000000..c5e032c85bf9
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/qca,ar9330-uart.txt
@@ -0,0 +1,34 @@
+* Qualcomm Atheros AR9330 High-Speed UART
+
+Required properties:
+
+- compatible: Must be "qca,ar9330-uart"
+
+- reg: Specifies the physical base address of the controller and
+  the length of the memory mapped region.
+
+- interrupt-parent: The phandle for the interrupt controller that
+  services interrupts for this device.
+
+- interrupts: Specifies the interrupt source of the parent interrupt
+  controller. The format of the interrupt specifier depends on the
+  parent interrupt controller.
+
+Additional requirements:
+
+  Each UART port must have an alias correctly numbered in "aliases"
+  node.
+
+Example:
+
+        aliases {
+                serial0 = &uart0;
+        };
+
+        uart0: uart@18020000 {
+                compatible = "qca,ar9330-uart";
+                reg = <0x18020000 0x14>;
+
+                interrupt-parent = <&intc>;
+                interrupts = <3>;
+        };
diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt
new file mode 100644
index 000000000000..ce8c90161959
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt
@@ -0,0 +1,25 @@
+* MSM Serial UART
+
+The MSM serial UART hardware is designed for low-speed use cases where a
+dma-engine isn't needed. From a software perspective it's mostly compatible
+with the MSM serial UARTDM except that it only supports reading and writing one
+character at a time.
+
+Required properties:
+- compatible: Should contain "qcom,msm-uart"
+- reg: Should contain UART register location and length.
+- interrupts: Should contain UART interrupt.
+- clocks: Should contain the core clock.
+- clock-names: Should be "core".
+
+Example:
+
+A uart device at 0xa9c00000 with interrupt 11.
+
+serial@a9c00000 {
+        compatible = "qcom,msm-uart";
+        reg = <0xa9c00000 0x1000>;
+        interrupts = <11>;
+        clocks = <&uart_cxc>;
+        clock-names = "core";
+};
diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
new file mode 100644
index 000000000000..ffa5b784c66e
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
@@ -0,0 +1,53 @@
+* MSM Serial UARTDM
+
+The MSM serial UARTDM hardware is designed for high-speed use cases where the
+transmit and/or receive channels can be offloaded to a dma-engine. From a
+software perspective it's mostly compatible with the MSM serial UART except
+that it supports reading and writing multiple characters at a time.
+
+Required properties:
+- compatible: Should contain at least "qcom,msm-uartdm".
+              A more specific property should be specified as follows depending
+              on the version:
+                "qcom,msm-uartdm-v1.1"
+                "qcom,msm-uartdm-v1.2"
+                "qcom,msm-uartdm-v1.3"
+                "qcom,msm-uartdm-v1.4"
+- reg: Should contain UART register locations and lengths. The first
+       register shall specify the main control registers. An optional second
+       register location shall specify the GSBI control region.
+       "qcom,msm-uartdm-v1.3" is the only compatible value that might
+       need the GSBI control region.
+- interrupts: Should contain UART interrupt.
+- clocks: Should contain the core clock and the AHB clock.
+- clock-names: Should be "core" for the core clock and "iface" for the
+               AHB clock.
+
+Optional properties:
+- dmas: Should contain dma specifiers for transmit and receive channels
+- dma-names: Should contain "tx" for transmit and "rx" for receive channels
+
+Examples:
+
+A uartdm v1.4 device with dma capabilities.
+
+serial@f991e000 {
+        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+        reg = <0xf991e000 0x1000>;
+        interrupts = <0 108 0x0>;
+        clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>;
+        clock-names = "core", "iface";
+        dmas = <&dma0 0>, <&dma0 1>;
+        dma-names = "tx", "rx";
+};
+
+A uartdm v1.3 device without dma capabilities and part of a GSBI complex.
+
+serial@19c40000 {
+        compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+        reg = <0x19c40000 0x1000>,
+              <0x19c00000 0x1000>;
+        interrupts = <0 195 0x0>;
+        clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>;
+        clock-names = "core", "iface";
+};
diff --git a/Documentation/devicetree/bindings/serial/rs485.txt b/Documentation/devicetree/bindings/serial/rs485.txt
index 1e753c69fc83..32b1fa1f2a5b 100644
--- a/Documentation/devicetree/bindings/serial/rs485.txt
+++ b/Documentation/devicetree/bindings/serial/rs485.txt
@@ -7,7 +7,7 @@ UART node.
 
 Required properties:
 - rs485-rts-delay: prop-encoded-array <a b> where:
-  * a is the delay beteween rts signal and beginning of data sent in milliseconds.
+  * a is the delay between rts signal and beginning of data sent in milliseconds.
       it corresponds to the delay before sending data.
   * b is the delay between end of data sent and rts signal in milliseconds
       it corresponds to the delay after sending data and actual release of the line.
diff --git a/Documentation/devicetree/bindings/serial/sirf-uart.txt b/Documentation/devicetree/bindings/serial/sirf-uart.txt
new file mode 100644
index 000000000000..a2dfc6522a91
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/sirf-uart.txt
@@ -0,0 +1,33 @@
+* CSR SiRFprimaII/atlasVI Universal Synchronous Asynchronous Receiver/Transmitter *
+
+Required properties:
+- compatible : Should be "sirf,prima2-uart" or "sirf, prima2-usp-uart"
+- reg : Offset and length of the register set for the device
+- interrupts : Should contain uart interrupt
+- fifosize : Should define hardware rx/tx fifo size
+- clocks : Should contain uart clock number
+
+Optional properties:
+- sirf,uart-has-rtscts: we have hardware flow controller pins in hardware
+- rts-gpios: RTS pin for USP-based UART if sirf,uart-has-rtscts is true
+- cts-gpios: CTS pin for USP-based UART if sirf,uart-has-rtscts is true
+
+Example:
+
+uart0: uart@b0050000 {
+        cell-index = <0>;
+        compatible = "sirf,prima2-uart";
+        reg = <0xb0050000 0x1000>;
+        interrupts = <17>;
+        fifosize = <128>;
+        clocks = <&clks 13>;
+};
+
+On the board-specific dts, we can put rts-gpios and cts-gpios like
+
+usp@b0090000 {
+        compatible = "sirf,prima2-usp-uart";
+        sirf,uart-has-rtscts;
+        rts-gpios = <&gpio 15 0>;
+        cts-gpios = <&gpio 46 0>;
+};
diff --git a/Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
index f13f1c5be91c..f13f1c5be91c 100644
--- a/Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
diff --git a/Documentation/devicetree/bindings/serial/st-asc.txt b/Documentation/devicetree/bindings/serial/st-asc.txt
new file mode 100644
index 000000000000..75d877f5968f
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/st-asc.txt
@@ -0,0 +1,18 @@
+*st-asc(Serial Port)
+
+Required properties:
+- compatible : Should be "st,asc".
+- reg, reg-names, interrupts, interrupt-names   : Standard way to define device
+                        resources with names. look in
+                        Documentation/devicetree/bindings/resource-names.txt
+
+Optional properties:
+- st,hw-flow-ctrl       bool flag to enable hardware flow control.
+- st,force-m1           bool flat to force asc to be in Mode-1 recommeded
+                        for high bit rates (above 19.2K)
+Example:
+serial@fe440000{
+    compatible    = "st,asc";
+    reg         = <0xfe440000 0x2c>;
+    interrupts     =  <0 209 0>;
+};
diff --git a/Documentation/devicetree/bindings/tty/serial/via,vt8500-uart.txt b/Documentation/devicetree/bindings/serial/via,vt8500-uart.txt
index 5feef1ef167d..5feef1ef167d 100644
--- a/Documentation/devicetree/bindings/tty/serial/via,vt8500-uart.txt
+++ b/Documentation/devicetree/bindings/serial/via,vt8500-uart.txt
diff --git a/Documentation/devicetree/bindings/serio/altera_ps2.txt b/Documentation/devicetree/bindings/serio/altera_ps2.txt
index 4d9eecc2ef7d..520199e2e347 100644
--- a/Documentation/devicetree/bindings/serio/altera_ps2.txt
+++ b/Documentation/devicetree/bindings/serio/altera_ps2.txt
@@ -1,4 +1,5 @@
 Altera UP PS/2 controller
 
 Required properties:
-- compatible : should be "ALTR,ps2-1.0".
+- compatible : should be "ALTR,ps2-1.0". <DEPRECATED>
+- compatible : should be "altr,ps2-1.0".
diff --git a/Documentation/devicetree/bindings/sound/ak4554.c b/Documentation/devicetree/bindings/sound/ak4554.c
new file mode 100644
index 000000000000..934fa02754b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/ak4554.c
@@ -0,0 +1,11 @@
+AK4554 ADC/DAC
+
+Required properties:
+
+  - compatible : "asahi-kasei,ak4554"
+
+Example:
+
+ak4554-adc-dac {
+        compatible = "asahi-kasei,ak4554";
+};
diff --git a/Documentation/devicetree/bindings/sound/alc5632.txt b/Documentation/devicetree/bindings/sound/alc5632.txt
index 8608f747dcfe..ffd886d110bd 100644
--- a/Documentation/devicetree/bindings/sound/alc5632.txt
+++ b/Documentation/devicetree/bindings/sound/alc5632.txt
@@ -13,6 +13,25 @@ Required properties:
   - #gpio-cells : Should be two. The first cell is the pin number and the
     second cell is used to specify optional parameters (currently unused).
 
+Pins on the device (for linking into audio routes):
+
+  * SPK_OUTP
+  * SPK_OUTN
+  * HP_OUT_L
+  * HP_OUT_R
+  * AUX_OUT_P
+  * AUX_OUT_N
+  * LINE_IN_L
+  * LINE_IN_R
+  * PHONE_P
+  * PHONE_N
+  * MIC1_P
+  * MIC1_N
+  * MIC2_P
+  * MIC2_N
+  * MICBIAS1
+  * DMICDAT
+
 Example:
 
 alc5632: alc5632@1e {
diff --git a/Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt b/Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt
new file mode 100644
index 000000000000..0720857089a7
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt
@@ -0,0 +1,35 @@
+* Atmel at91sam9x5ek wm8731 audio complex
+
+Required properties:
+  - compatible: "atmel,sam9x5-wm8731-audio"
+  - atmel,model: The user-visible name of this sound complex.
+  - atmel,ssc-controller: The phandle of the SSC controller
+  - atmel,audio-codec: The phandle of the WM8731 audio codec
+  - atmel,audio-routing: A list of the connections between audio components.
+    Each entry is a pair of strings, the first being the connection's sink,
+    the second being the connection's source.
+
+Available audio endpoints for the audio-routing table:
+
+Board connectors:
+ * Headphone Jack
+ * Line In Jack
+
+wm8731 pins:
+cf Documentation/devicetree/bindings/sound/wm8731.txt
+
+Example:
+sound {
+        compatible = "atmel,sam9x5-wm8731-audio";
+
+        atmel,model = "wm8731 @ AT91SAM9X5EK";
+
+        atmel,audio-routing =
+                "Headphone Jack", "RHPOUT",
+                "Headphone Jack", "LHPOUT",
+                "LLINEIN", "Line In Jack",
+                "RLINEIN", "Line In Jack";
+
+        atmel,ssc-controller = <&ssc0>;
+        atmel,audio-codec = <&wm8731>;
+};
diff --git a/Documentation/devicetree/bindings/sound/atmel-wm8904.txt b/Documentation/devicetree/bindings/sound/atmel-wm8904.txt
new file mode 100644
index 000000000000..8bbe50c884b6
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/atmel-wm8904.txt
@@ -0,0 +1,55 @@
+Atmel ASoC driver with wm8904 audio codec complex
+
+Required properties:
+  - compatible: "atmel,asoc-wm8904"
+  - atmel,model: The user-visible name of this sound complex.
+  - atmel,audio-routing: A list of the connections between audio components.
+    Each entry is a pair of strings, the first being the connection's sink,
+    the second being the connection's source. Valid names for sources and
+    sinks are the WM8904's pins, and the jacks on the board:
+
+    WM8904 pins:
+
+    * IN1L
+    * IN1R
+    * IN2L
+    * IN2R
+    * IN3L
+    * IN3R
+    * HPOUTL
+    * HPOUTR
+    * LINEOUTL
+    * LINEOUTR
+    * MICBIAS
+
+    Board connectors:
+
+    * Headphone Jack
+    * Line In Jack
+    * Mic
+
+  - atmel,ssc-controller: The phandle of the SSC controller
+  - atmel,audio-codec: The phandle of the WM8904 audio codec
+
+Optional properties:
+  - pinctrl-names, pinctrl-0: Please refer to pinctrl-bindings.txt
+
+Example:
+sound {
+        compatible = "atmel,asoc-wm8904";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pck0_as_mck>;
+
+        atmel,model = "wm8904 @ AT91SAM9N12EK";
+
+        atmel,audio-routing =
+                "Headphone Jack", "HPOUTL",
+                "Headphone Jack", "HPOUTR",
+                "IN2L", "Line In Jack",
+                "IN2R", "Line In Jack",
+                "Mic", "MICBIAS",
+                "IN1L", "Mic";
+
+        atmel,ssc-controller = <&ssc0>;
+        atmel,audio-codec = <&wm8904>;
+};
diff --git a/Documentation/devicetree/bindings/sound/cs42l73.txt b/Documentation/devicetree/bindings/sound/cs42l73.txt
new file mode 100644
index 000000000000..80ae910dbf6c
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/cs42l73.txt
@@ -0,0 +1,22 @@
+CS42L73 audio CODEC
+
+Required properties:
+
+  - compatible : "cirrus,cs42l73"
+
+  - reg : the I2C address of the device for I2C
+
+Optional properties:
+
+  - reset_gpio : a GPIO spec for the reset pin.
+  - chgfreq    : Charge Pump Frequency values 0x00-0x0F
+
+
+Example:
+
+codec: cs42l73@4a {
+        compatible = "cirrus,cs42l73";
+        reg = <0x4a>;
+        reset_gpio = <&gpio 10 0>;
+        chgfreq = <0x05>;
+};
\ No newline at end of file
diff --git a/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt b/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt
new file mode 100644
index 000000000000..865178d5cdf3
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/davinci-evm-audio.txt
@@ -0,0 +1,42 @@
+* Texas Instruments SoC audio setups with TLV320AIC3X Codec
+
+Required properties:
+- compatible : "ti,da830-evm-audio" : forDM365/DA8xx/OMAPL1x/AM33xx
+- ti,model : The user-visible name of this sound complex.
+- ti,audio-codec : The phandle of the TLV320AIC3x audio codec
+- ti,mcasp-controller : The phandle of the McASP controller
+- ti,codec-clock-rate : The Codec Clock rate (in Hz) applied to the Codec
+- ti,audio-routing : A list of the connections between audio components.
+  Each entry is a pair of strings, the first being the connection's sink,
+  the second being the connection's source. Valid names for sources and
+  sinks are the codec's pins, and the jacks on the board:
+
+  Board connectors:
+
+  * Headphone Jack
+  * Line Out
+  * Mic Jack
+  * Line In
+
+
+Example:
+
+sound {
+        compatible = "ti,da830-evm-audio";
+        ti,model = "DA830 EVM";
+        ti,audio-codec = <&tlv320aic3x>;
+        ti,mcasp-controller = <&mcasp1>;
+        ti,codec-clock-rate = <12000000>;
+        ti,audio-routing =
+                "Headphone Jack",       "HPLOUT",
+                "Headphone Jack",       "HPROUT",
+                "Line Out",             "LLOUT",
+                "Line Out",             "RLOUT",
+                "MIC3L",                "Mic Bias 2V",
+                "MIC3R",                "Mic Bias 2V",
+                "Mic Bias 2V",          "Mic Jack",
+                "LINE1L",               "Line In",
+                "LINE2L",               "Line In",
+                "LINE1R",               "Line In",
+                "LINE2R",               "Line In";
+};
diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
index 374e145c2ef1..ed785b3f67be 100644
--- a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
+++ b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
@@ -4,17 +4,25 @@ Required properties:
 - compatible :
         "ti,dm646x-mcasp-audio" : for DM646x platforms
         "ti,da830-mcasp-audio"  : for both DA830 & DA850 platforms
-        "ti,omap2-mcasp-audio"  : for OMAP2 platforms (TI81xx, AM33xx)
-
-- reg : Should contain McASP registers offset and length
-- interrupts : Interrupt number for McASP
-- op-mode : I2S/DIT ops mode.
-- tdm-slots : Slots for TDM operation.
-- num-serializer : Serializers used by McASP.
-- serial-dir : A list of serializer pin mode. The list number should be equal
-                to "num-serializer" parameter. Each entry is a number indication
-                serializer pin direction. (0 - INACTIVE, 1 - TX, 2 - RX)
+        "ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, TI81xx)
 
+- reg : Should contain reg specifiers for the entries in the reg-names property.
+- reg-names : Should contain:
+         * "mpu" for the main registers (required). For compatibility with
+           existing software, it is recommended this is the first entry.
+         * "dat" for separate data port register access (optional).
+- op-mode : I2S/DIT ops mode. 0 for I2S mode. 1 for DIT mode used for S/PDIF,
+            IEC60958-1, and AES-3 formats.
+- tdm-slots : Slots for TDM operation. Indicates number of channels transmitted
+              or received over one serializer.
+- serial-dir : A list of serializer configuration. Each entry is a number
+               indication for serializer pin direction.
+               (0 - INACTIVE, 1 - TX, 2 - RX)
+- dmas: two element list of DMA controller phandles and DMA request line
+        ordered pairs.
+- dma-names: identifier string for each DMA request line in the dmas property.
+             These strings correspond 1:1 with the ordered pairs in dmas. The dma
+             identifiers must be "rx" and "tx".
 
 Optional properties:
 
@@ -23,18 +31,23 @@ Optional properties:
 - rx-num-evt : FIFO levels.
 - sram-size-playback : size of sram to be allocated during playback
 - sram-size-capture  : size of sram to be allocated during capture
+- interrupts : Interrupt numbers for McASP, currently not used by the driver
+- interrupt-names : Known interrupt names are "tx" and "rx"
+- pinctrl-0: Should specify pin control group used for this controller.
+- pinctrl-names: Should contain only one value - "default", for more details
+                 please refer to pinctrl-bindings.txt
+  
 
 Example:
 
 mcasp0: mcasp0@1d00000 {
         compatible = "ti,da830-mcasp-audio";
-        #address-cells = <1>;
-        #size-cells = <0>;
         reg = <0x100000 0x3000>;
-        interrupts = <82 83>;
+        reg-names "mpu";
+        interrupts = <82>, <83>;
+        interrupts-names = "tx", "rx";
         op-mode = <0>;          /* MCASP_IIS_MODE */
         tdm-slots = <2>;
-        num-serializer = <16>;
         serial-dir = <
                         0 0 0 0 /* 0: INACTIVE, 1: TX, 2: RX */
                         0 0 0 0
diff --git a/Documentation/devicetree/bindings/sound/fsl,spdif.txt b/Documentation/devicetree/bindings/sound/fsl,spdif.txt
new file mode 100644
index 000000000000..f2ae335670f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/fsl,spdif.txt
@@ -0,0 +1,54 @@
+Freescale Sony/Philips Digital Interface Format (S/PDIF) Controller
+
+The Freescale S/PDIF audio block is a stereo transceiver that allows the
+processor to receive and transmit digital audio via an coaxial cable or
+a fibre cable.
+
+Required properties:
+
+  - compatible : Compatible list, must contain "fsl,imx35-spdif".
+
+  - reg : Offset and length of the register set for the device.
+
+  - interrupts : Contains the spdif interrupt.
+
+  - dmas : Generic dma devicetree binding as described in
+  Documentation/devicetree/bindings/dma/dma.txt.
+
+  - dma-names : Two dmas have to be defined, "tx" and "rx".
+
+  - clocks : Contains an entry for each entry in clock-names.
+
+  - clock-names : Includes the following entries:
+        "core"          The core clock of spdif controller
+        "rxtx<0-7>"     Clock source list for tx and rx clock.
+                        This clock list should be identical to
+                        the source list connecting to the spdif
+                        clock mux in "SPDIF Transceiver Clock
+                        Diagram" of SoC reference manual. It
+                        can also be referred to TxClk_Source
+                        bit of register SPDIF_STC.
+
+Example:
+
+spdif: spdif@02004000 {
+        compatible = "fsl,imx35-spdif";
+        reg = <0x02004000 0x4000>;
+        interrupts = <0 52 0x04>;
+        dmas = <&sdma 14 18 0>,
+               <&sdma 15 18 0>;
+        dma-names = "rx", "tx";
+
+        clocks = <&clks 197>, <&clks 3>,
+               <&clks 197>, <&clks 107>,
+               <&clks 0>, <&clks 118>,
+               <&clks 62>, <&clks 139>,
+               <&clks 0>;
+        clock-names = "core", "rxtx0",
+                "rxtx1", "rxtx2",
+                "rxtx3", "rxtx4",
+                "rxtx5", "rxtx6",
+                "rxtx7";
+
+        status = "okay";
+};
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/ssi.txt b/Documentation/devicetree/bindings/sound/fsl,ssi.txt
index 5ff76c9c57d2..4303b6ab6208 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/ssi.txt
+++ b/Documentation/devicetree/bindings/sound/fsl,ssi.txt
@@ -43,10 +43,22 @@ Required properties:
                     together.  This would still allow different sample sizes,
                     but not different sample rates.
 
+Required are also ac97 link bindings if ac97 is used. See
+Documentation/devicetree/bindings/sound/soc-ac97link.txt for the necessary
+bindings.
+
 Optional properties:
 - codec-handle:     Phandle to a 'codec' node that defines an audio
                     codec connected to this SSI.  This node is typically
                     a child of an I2C or other control node.
+- fsl,fiq-stream-filter: Bool property. Disabled DMA and use FIQ instead to
+                    filter the codec stream. This is necessary for some boards
+                    where an incompatible codec is connected to this SSI, e.g.
+                    on pca100 and pcm043.
+- dmas:             Generic dma devicetree binding as described in
+                    Documentation/devicetree/bindings/dma/dma.txt.
+- dma-names:        Two dmas have to be defined, "tx" and "rx", if fsl,imx-fiq
+                    is not defined.
 
 Child 'codec' node required properties:
 - compatible:       Compatible list, contains the name of the codec
diff --git a/Documentation/devicetree/bindings/sound/imx-audio-spdif.txt b/Documentation/devicetree/bindings/sound/imx-audio-spdif.txt
new file mode 100644
index 000000000000..7d13479f9c3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/imx-audio-spdif.txt
@@ -0,0 +1,34 @@
+Freescale i.MX audio complex with S/PDIF transceiver
+
+Required properties:
+
+  - compatible : "fsl,imx-audio-spdif"
+
+  - model : The user-visible name of this sound complex
+
+  - spdif-controller : The phandle of the i.MX S/PDIF controller
+
+
+Optional properties:
+
+  - spdif-out : This is a boolean property. If present, the transmitting
+    function of S/PDIF will be enabled, indicating there's a physical
+    S/PDIF out connector/jack on the board or it's connecting to some
+    other IP block, such as an HDMI encoder/display-controller.
+
+  - spdif-in : This is a boolean property. If present, the receiving
+    function of S/PDIF will be enabled, indicating there's a physical
+    S/PDIF in connector/jack on the board.
+
+* Note: At least one of these two properties should be set in the DT binding.
+
+
+Example:
+
+sound-spdif {
+        compatible = "fsl,imx-audio-spdif";
+        model = "imx-spdif";
+        spdif-controller = <&spdif>;
+        spdif-out;
+        spdif-in;
+};
diff --git a/Documentation/devicetree/bindings/sound/imx-audmux.txt b/Documentation/devicetree/bindings/sound/imx-audmux.txt
index 215aa9817213..f88a00e54c63 100644
--- a/Documentation/devicetree/bindings/sound/imx-audmux.txt
+++ b/Documentation/devicetree/bindings/sound/imx-audmux.txt
@@ -5,6 +5,15 @@ Required properties:
   or "fsl,imx31-audmux" for the version firstly used on i.MX31.
 - reg : Should contain AUDMUX registers location and length
 
+An initial configuration can be setup using child nodes.
+
+Required properties of optional child nodes:
+- fsl,audmux-port : Integer of the audmux port that is configured by this
+  child node.
+- fsl,port-config : List of configuration options for the specific port. For
+  imx31-audmux and above, it is a list of tuples <ptcr pdcr>. For
+  imx21-audmux it is a list of pcr values.
+
 Example:
 
 audmux@021d8000 {
diff --git a/Documentation/devicetree/bindings/sound/mrvl,pxa-ssp.txt b/Documentation/devicetree/bindings/sound/mrvl,pxa-ssp.txt
new file mode 100644
index 000000000000..74c9ba6c2823
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mrvl,pxa-ssp.txt
@@ -0,0 +1,28 @@
+Marvell PXA SSP CPU DAI bindings
+
+Required properties:
+
+        compatible      Must be "mrvl,pxa-ssp-dai"
+        port            A phandle reference to a PXA ssp upstream device
+
+Example:
+
+        /* upstream device */
+
+        ssp0: ssp@41000000 {
+                compatible = "mrvl,pxa3xx-ssp";
+                reg = <0x41000000 0x40>;
+                interrupts = <24>;
+                clock-names = "pxa27x-ssp.0";
+                dmas = <&dma 13
+                        &dma 14>;
+                dma-names = "rx", "tx";
+        };
+
+        /* DAI as user */
+
+        ssp_dai0: ssp_dai@0 {
+                compatible = "mrvl,pxa-ssp-dai";
+                port = <&ssp0>;
+        };
+
diff --git a/Documentation/devicetree/bindings/sound/mrvl,pxa2xx-pcm.txt b/Documentation/devicetree/bindings/sound/mrvl,pxa2xx-pcm.txt
new file mode 100644
index 000000000000..551fbb8348c2
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mrvl,pxa2xx-pcm.txt
@@ -0,0 +1,15 @@
+DT bindings for ARM PXA2xx PCM platform driver
+
+This is just a dummy driver that registers the PXA ASoC platform driver.
+It does not have any resources assigned.
+
+Required properties:
+
+        - compatible            'mrvl,pxa-pcm-audio'
+
+Example:
+
+        pxa_pcm_audio: snd_soc_pxa_audio {
+                compatible = "mrvl,pxa-pcm-audio";
+        };
+
diff --git a/Documentation/devicetree/bindings/sound/mvebu-audio.txt b/Documentation/devicetree/bindings/sound/mvebu-audio.txt
new file mode 100644
index 000000000000..f0062c5871b4
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mvebu-audio.txt
@@ -0,0 +1,33 @@
+* mvebu (Kirkwood, Dove, Armada 370) audio controller
+
+Required properties:
+
+- compatible:
+  "marvell,kirkwood-audio" for Kirkwood platforms
+  "marvell,dove-audio" for Dove platforms
+
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+- interrupts:
+  with "marvell,kirkwood-audio", the audio interrupt
+  with "marvell,dove-audio", a list of two interrupts, the first for
+  the data flow, and the second for errors.
+
+- clocks: one or two phandles.
+  The first one is mandatory and defines the internal clock.
+  The second one is optional and defines an external clock.
+
+- clock-names: names associated to the clocks:
+        "internal" for the internal clock
+        "extclk" for the external clock
+
+Example:
+
+i2s1: audio-controller@b4000 {
+        compatible = "marvell,dove-audio";
+        reg = <0xb4000 0x2210>;
+        interrupts = <21>, <22>;
+        clocks = <&gate_clk 13>;
+        clock-names = "internal";
+};
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt
index 05ffecb57103..8b8903ef0800 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt
@@ -11,28 +11,8 @@ Required properties:
 - nvidia,audio-routing : A list of the connections between audio components.
   Each entry is a pair of strings, the first being the connection's sink,
   the second being the connection's source. Valid names for sources and
-  sinks are the ALC5632's pins:
-
-  ALC5632 pins:
-
-  * SPK_OUTP
-  * SPK_OUTN
-  * HP_OUT_L
-  * HP_OUT_R
-  * AUX_OUT_P
-  * AUX_OUT_N
-  * LINE_IN_L
-  * LINE_IN_R
-  * PHONE_P
-  * PHONE_N
-  * MIC1_P
-  * MIC1_N
-  * MIC2_P
-  * MIC2_N
-  * MICBIAS1
-  * DMICDAT
-
-  Board connectors:
+  sinks are the ALC5632's pins as documented in the binding for the device
+  and:
 
   * Headset Stereophone
   * Int Spk
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.txt
index d130818700b2..dc6224994d69 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.txt
@@ -11,32 +11,12 @@ Required properties:
 - nvidia,audio-routing : A list of the connections between audio components.
   Each entry is a pair of strings, the first being the connection's sink,
   the second being the connection's source. Valid names for sources and
-  sinks are the RT5640's pins, and the jacks on the board:
-
-  RT5640 pins:
-
-  * DMIC1
-  * DMIC2
-  * MICBIAS1
-  * IN1P
-  * IN1R
-  * IN2P
-  * IN2R
-  * HPOL
-  * HPOR
-  * LOUTL
-  * LOUTR
-  * MONOP
-  * MONON
-  * SPOLP
-  * SPOLN
-  * SPORP
-  * SPORN
-
-  Board connectors:
+  sinks are the RT5640's pins (as documented in its binding), and the jacks
+  on the board:
 
   * Headphones
   * Speakers
+  * Mic Jack
 
 - nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
   connected to the CODEC.
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt
index d14510613a7f..aab6ce0ad2fc 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt
@@ -11,31 +11,8 @@ Required properties:
 - nvidia,audio-routing : A list of the connections between audio components.
   Each entry is a pair of strings, the first being the connection's sink,
   the second being the connection's source. Valid names for sources and
-  sinks are the WM8753's pins, and the jacks on the board:
-
-  WM8753 pins:
-
-  * LOUT1
-  * LOUT2
-  * ROUT1
-  * ROUT2
-  * MONO1
-  * MONO2
-  * OUT3
-  * OUT4
-  * LINE1
-  * LINE2
-  * RXP
-  * RXN
-  * ACIN
-  * ACOP
-  * MIC1N
-  * MIC1
-  * MIC2N
-  * MIC2
-  * Mic Bias
-
-  Board connectors:
+  sinks are the WM8753's pins as documented in the binding for the WM8753,
+  and the jacks on the board:
 
   * Headphone Jack
   * Mic Jack
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt
index 3bf722deb722..4b44dfb6ca0d 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt
@@ -11,28 +11,8 @@ Required properties:
 - nvidia,audio-routing : A list of the connections between audio components.
   Each entry is a pair of strings, the first being the connection's sink,
   the second being the connection's source. Valid names for sources and
-  sinks are the WM8903's pins, and the jacks on the board:
-
-  WM8903 pins:
-
-  * IN1L
-  * IN1R
-  * IN2L
-  * IN2R
-  * IN3L
-  * IN3R
-  * DMICDAT
-  * HPOUTL
-  * HPOUTR
-  * LINEOUTL
-  * LINEOUTR
-  * LOP
-  * LON
-  * ROP
-  * RON
-  * MICBIAS
-
-  Board connectors:
+  sinks are the WM8903's pins (documented in the WM8903 binding document),
+  and the jacks on the board:
 
   * Headphone Jack
   * Int Spk
diff --git a/Documentation/devicetree/bindings/sound/pcm1792a.txt b/Documentation/devicetree/bindings/sound/pcm1792a.txt
new file mode 100644
index 000000000000..970ba1ed576f
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/pcm1792a.txt
@@ -0,0 +1,18 @@
+Texas Instruments pcm1792a DT bindings
+
+This driver supports the SPI bus.
+
+Required properties:
+
+ - compatible: "ti,pcm1792a"
+
+For required properties on SPI, please consult
+Documentation/devicetree/bindings/spi/spi-bus.txt
+
+Examples:
+
+        codec_spi: 1792a@0 {
+                compatible = "ti,pcm1792a";
+                spi-max-frequency = <600000>;
+        };
+
diff --git a/Documentation/devicetree/bindings/sound/rt5640.txt b/Documentation/devicetree/bindings/sound/rt5640.txt
index 005bcb24d72d..068a1141b06f 100644
--- a/Documentation/devicetree/bindings/sound/rt5640.txt
+++ b/Documentation/devicetree/bindings/sound/rt5640.txt
@@ -18,6 +18,26 @@ Optional properties:
 
 - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.
 
+Pins on the device (for linking into audio routes):
+
+  * DMIC1
+  * DMIC2
+  * MICBIAS1
+  * IN1P
+  * IN1R
+  * IN2P
+  * IN2R
+  * HPOL
+  * HPOR
+  * LOUTL
+  * LOUTR
+  * MONOP
+  * MONON
+  * SPOLP
+  * SPOLN
+  * SPORP
+  * SPORN
+
 Example:
 
 rt5640 {
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
index 025e66b85a43..7386d444ada1 100644
--- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
@@ -2,7 +2,15 @@
 
 Required SoC Specific Properties:
 
-- compatible : "samsung,i2s-v5"
+- compatible : should be one of the following.
+   - samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
+   - samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
+     secondary fifo, s/w reset control and internal mux for root clk src.
+   - samsung,exynos5420-i2s: for 8/16/24bit multichannel(7.1) I2S with
+     secondary fifo, s/w reset control, internal mux for root clk src and
+     TDM support. TDM (Time division multiplexing) is to allow transfer of
+     multiple channel audio data on single data line.
+
 - reg: physical base address of the controller and length of memory mapped
   region.
 - dmas: list of DMA controller phandle and DMA request line ordered pairs.
@@ -21,13 +29,6 @@ Required SoC Specific Properties:
 
 Optional SoC Specific Properties:
 
-- samsung,supports-6ch: If the I2S Primary sound source has 5.1 Channel
-  support, this flag is enabled.
-- samsung,supports-rstclr: This flag should be set if I2S software reset bit
-  control is required. When this flag is set I2S software reset bit will be
-  enabled or disabled based on need.
-- samsung,supports-secdai:If I2S block has a secondary FIFO and internal DMA,
-  then this flag is enabled.
 - samsung,idma-addr: Internal DMA register base address of the audio
   sub system(used in secondary sound source).
 - pinctrl-0: Should specify pin control groups used for this controller.
@@ -36,7 +37,7 @@ Optional SoC Specific Properties:
 Example:
 
 i2s0: i2s@03830000 {
-        compatible = "samsung,i2s-v5";
+        compatible = "samsung,s5pv210-i2s";
         reg = <0x03830000 0x100>;
         dmas = <&pdma0 10
                 &pdma0 9
@@ -46,9 +47,6 @@ i2s0: i2s@03830000 {
                 <&clock_audss EXYNOS_I2S_BUS>,
                 <&clock_audss EXYNOS_SCLK_I2S>;
         clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
-        samsung,supports-6ch;
-        samsung,supports-rstclr;
-        samsung,supports-secdai;
         samsung,idma-addr = <0x03000000>;
         pinctrl-names = "default";
         pinctrl-0 = <&i2s0_bus>;
diff --git a/Documentation/devicetree/bindings/sound/soc-ac97link.txt b/Documentation/devicetree/bindings/sound/soc-ac97link.txt
new file mode 100644
index 000000000000..80152a87f239
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/soc-ac97link.txt
@@ -0,0 +1,28 @@
+AC97 link bindings
+
+These bindings can be included within any other device node.
+
+Required properties:
+ - pinctrl-names: Has to contain following states to setup the correct
+   pinmuxing for the used gpios:
+        "ac97-running": AC97-link is active
+        "ac97-reset": AC97-link reset state
+        "ac97-warm-reset": AC97-link warm reset state
+ - ac97-gpios: List of gpio phandles with args in the order ac97-sync,
+   ac97-sdata, ac97-reset
+
+
+Example:
+
+ssi {
+        ...
+
+        pinctrl-names = "default", "ac97-running", "ac97-reset", "ac97-warm-reset";
+        pinctrl-0 = <&ac97link_running>;
+        pinctrl-1 = <&ac97link_running>;
+        pinctrl-2 = <&ac97link_reset>;
+        pinctrl-3 = <&ac97link_warm_reset>;
+        ac97-gpios = <&gpio3 20 0 &gpio3 22 0 &gpio3 28 0>;
+
+        ...
+};
diff --git a/Documentation/devicetree/bindings/sound/ti,pcm1681.txt b/Documentation/devicetree/bindings/sound/ti,pcm1681.txt
new file mode 100644
index 000000000000..4df17185ab80
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/ti,pcm1681.txt
@@ -0,0 +1,15 @@
+Texas Instruments PCM1681 8-channel PWM Processor
+
+Required properties:
+
+ - compatible:          Should contain "ti,pcm1681".
+ - reg:                 The i2c address. Should contain <0x4c>.
+
+Examples:
+
+        i2c_bus {
+                pcm1681@4c {
+                        compatible = "ti,pcm1681";
+                        reg = <0x4c>;
+                };
+        };
diff --git a/Documentation/devicetree/bindings/sound/tlv320aic3x.txt b/Documentation/devicetree/bindings/sound/tlv320aic3x.txt
index f47c3f589fd0..5e6040c2c2e9 100644
--- a/Documentation/devicetree/bindings/sound/tlv320aic3x.txt
+++ b/Documentation/devicetree/bindings/sound/tlv320aic3x.txt
@@ -3,7 +3,14 @@ Texas Instruments - tlv320aic3x Codec module
 The tlv320aic3x serial control bus communicates through I2C protocols
 
 Required properties:
-- compatible - "string" -  "ti,tlv320aic3x"
+
+- compatible - "string" - One of:
+    "ti,tlv320aic3x" - Generic TLV320AIC3x device
+    "ti,tlv320aic33" - TLV320AIC33
+    "ti,tlv320aic3007" - TLV320AIC3007
+    "ti,tlv320aic3106" - TLV320AIC3106
+
+
 - reg - <int> -  I2C slave address
 
 
@@ -17,10 +24,36 @@ Optional properties:
         3 - MICBIAS output is connected to AVDD,
         If this node is not mentioned or if the value is incorrect, then MicBias
         is powered down.
+- AVDD-supply, IOVDD-supply, DRVDD-supply, DVDD-supply : power supplies for the
+  device as covered in Documentation/devicetree/bindings/regulator/regulator.txt
+
+CODEC output pins:
+  * LLOUT
+  * RLOUT
+  * MONO_LOUT
+  * HPLOUT
+  * HPROUT
+  * HPLCOM
+  * HPRCOM
+
+CODEC input pins:
+  * MIC3L
+  * MIC3R
+  * LINE1L
+  * LINE2L
+  * LINE1R
+  * LINE2R
+
+The pins can be used in referring sound node's audio-routing property.
 
 Example:
 
 tlv320aic3x: tlv320aic3x@1b {
         compatible = "ti,tlv320aic3x";
         reg = <0x1b>;
+
+        AVDD-supply = <&regulator>;
+        IOVDD-supply = <&regulator>;
+        DRVDD-supply = <&regulator>;
+        DVDD-supply = <&regulator>;
 };
diff --git a/Documentation/devicetree/bindings/sound/tpa6130a2.txt b/Documentation/devicetree/bindings/sound/tpa6130a2.txt
new file mode 100644
index 000000000000..6dfa740e4b2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/tpa6130a2.txt
@@ -0,0 +1,27 @@
+Texas Instruments - tpa6130a2 Codec module
+
+The tpa6130a2 serial control bus communicates through I2C protocols
+
+Required properties:
+
+- compatible - "string" - One of:
+    "ti,tpa6130a2" - TPA6130A2
+    "ti,tpa6140a2" - TPA6140A2
+
+
+- reg - <int> -  I2C slave address
+
+- Vdd-supply - <phandle> - power supply regulator
+
+Optional properties:
+
+- power-gpio - gpio pin to power the device
+
+Example:
+
+tpa6130a2: tpa6130a2@60 {
+        compatible = "ti,tpa6130a2";
+        reg = <0x60>;
+        Vdd-supply = <&vmmc2>;
+        power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
+};
diff --git a/Documentation/devicetree/bindings/sound/wm8731.txt b/Documentation/devicetree/bindings/sound/wm8731.txt
index 15f70048469b..236690e99b87 100644
--- a/Documentation/devicetree/bindings/sound/wm8731.txt
+++ b/Documentation/devicetree/bindings/sound/wm8731.txt
@@ -16,3 +16,12 @@ codec: wm8731@1a {
         compatible = "wlf,wm8731";
         reg = <0x1a>;
 };
+
+Available audio endpoints for an audio-routing table:
+ * LOUT: Left Channel Line Output
+ * ROUT: Right Channel Line Output
+ * LHPOUT: Left Channel Headphone Output
+ * RHPOUT: Right Channel Headphone Output
+ * LLINEIN: Left Channel Line Input
+ * RLINEIN: Right Channel Line Input
+ * MICIN: Microphone Input
diff --git a/Documentation/devicetree/bindings/sound/wm8753.txt b/Documentation/devicetree/bindings/sound/wm8753.txt
index e65277a0fb60..8eee61282105 100644
--- a/Documentation/devicetree/bindings/sound/wm8753.txt
+++ b/Documentation/devicetree/bindings/sound/wm8753.txt
@@ -10,9 +10,31 @@ Required properties:
   - reg : the I2C address of the device for I2C, the chip select
           number for SPI.
 
+Pins on the device (for linking into audio routes):
+
+  * LOUT1
+  * LOUT2
+  * ROUT1
+  * ROUT2
+  * MONO1
+  * MONO2
+  * OUT3
+  * OUT4
+  * LINE1
+  * LINE2
+  * RXP
+  * RXN
+  * ACIN
+  * ACOP
+  * MIC1N
+  * MIC1
+  * MIC2N
+  * MIC2
+  * Mic Bias
+
 Example:
 
-codec: wm8737@1a {
+codec: wm8753@1a {
         compatible = "wlf,wm8753";
         reg = <0x1a>;
 };
diff --git a/Documentation/devicetree/bindings/sound/wm8903.txt b/Documentation/devicetree/bindings/sound/wm8903.txt
index f102cbc42694..94ec32c194bb 100644
--- a/Documentation/devicetree/bindings/sound/wm8903.txt
+++ b/Documentation/devicetree/bindings/sound/wm8903.txt
@@ -28,6 +28,25 @@ Optional properties:
     performed. If any entry has the value 0xffffffff, that GPIO's
     configuration will not be modified.
 
+Pins on the device (for linking into audio routes):
+
+  * IN1L
+  * IN1R
+  * IN2L
+  * IN2R
+  * IN3L
+  * IN3R
+  * DMICDAT
+  * HPOUTL
+  * HPOUTR
+  * LINEOUTL
+  * LINEOUTR
+  * LOP
+  * LON
+  * ROP
+  * RON
+  * MICBIAS
+
 Example:
 
 codec: wm8903@1a {
diff --git a/Documentation/devicetree/bindings/sound/wm8994.txt b/Documentation/devicetree/bindings/sound/wm8994.txt
index f2f3e80934d2..e045e90a0924 100644
--- a/Documentation/devicetree/bindings/sound/wm8994.txt
+++ b/Documentation/devicetree/bindings/sound/wm8994.txt
@@ -32,6 +32,10 @@ Optional properties:
     The second cell is the flags, encoded as the trigger masks from
     Documentation/devicetree/bindings/interrupts.txt
 
+  - clocks : A list of up to two phandle and clock specifier pairs
+  - clock-names : A list of clock names sorted in the same order as clocks.
+                  Valid clock names are "MCLK1" and "MCLK2".
+
   - wlf,gpio-cfg : A list of GPIO configuration register values. If absent,
     no configuration of these registers is performed. If any value is
     over 0xffff then the register will be left as default. If present 11
diff --git a/Documentation/devicetree/bindings/spi/efm32-spi.txt b/Documentation/devicetree/bindings/spi/efm32-spi.txt
new file mode 100644
index 000000000000..a590ca51be75
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/efm32-spi.txt
@@ -0,0 +1,34 @@
+* Energy Micro EFM32 SPI
+
+Required properties:
+- #address-cells: see spi-bus.txt
+- #size-cells: see spi-bus.txt
+- compatible: should be "efm32,spi"
+- reg: Offset and length of the register set for the controller
+- interrupts: pair specifying rx and tx irq
+- clocks: phandle to the spi clock
+- cs-gpios: see spi-bus.txt
+- location: Value to write to the ROUTE register's LOCATION bitfield to configure the pinmux for the device, see datasheet for values.
+
+Example:
+
+spi1: spi@0x4000c400 { /* USART1 */
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "efm32,spi";
+        reg = <0x4000c400 0x400>;
+        interrupts = <15 16>;
+        clocks = <&cmu 20>;
+        cs-gpios = <&gpio 51 1>; // D3
+        location = <1>;
+        status = "ok";
+
+        ks8851@0 {
+                compatible = "ks8851";
+                spi-max-frequency = <6000000>;
+                reg = <0>;
+                interrupt-parent = <&boardfpga>;
+                interrupts = <4>;
+                status = "ok";
+        };
+};
diff --git a/Documentation/devicetree/bindings/spi/sh-hspi.txt b/Documentation/devicetree/bindings/spi/sh-hspi.txt
new file mode 100644
index 000000000000..30b57b1c8a13
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/sh-hspi.txt
@@ -0,0 +1,7 @@
+Renesas HSPI.
+
+Required properties:
+- compatible :  "renesas,hspi"
+- reg : Offset and length of the register set for the device
+- interrupts : interrupt line used by HSPI
+
diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt
index 296015e3c632..800dafe5b01b 100644
--- a/Documentation/devicetree/bindings/spi/spi-bus.txt
+++ b/Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -55,6 +55,16 @@ contain the following properties.
                 chip select active high
 - spi-3wire       - (optional) Empty property indicating device requires
                     3-wire mode.
+- spi-tx-bus-width - (optional) The bus width(number of data wires) that
+                      used for MOSI. Defaults to 1 if not present.
+- spi-rx-bus-width - (optional) The bus width(number of data wires) that
+                      used for MISO. Defaults to 1 if not present.
+
+Some SPI controllers and devices support Dual and Quad SPI transfer mode.
+It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD).
+Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is
+only 1(SINGLE), 2(DUAL) and 4(QUAD).
+Dual/Quad mode is not allowed when 3-wire mode is used.
 
 If a gpio chipselect is used for the SPI slave the gpio number will be passed
 via the cs_gpio
diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
new file mode 100644
index 000000000000..a1fb3035a42b
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
@@ -0,0 +1,42 @@
+ARM Freescale DSPI controller
+
+Required properties:
+- compatible : "fsl,vf610-dspi"
+- reg : Offset and length of the register set for the device
+- interrupts : Should contain SPI controller interrupt
+- clocks: from common clock binding: handle to dspi clock.
+- clock-names: from common clock binding: Shall be "dspi".
+- pinctrl-0: pin control group to be used for this controller.
+- pinctrl-names: must contain a "default" entry.
+- spi-num-chipselects : the number of the chipselect signals.
+- bus-num : the slave chip chipselect signal number.
+Example:
+
+dspi0@4002c000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,vf610-dspi";
+        reg = <0x4002c000 0x1000>;
+        interrupts = <0 67 0x04>;
+        clocks = <&clks VF610_CLK_DSPI0>;
+        clock-names = "dspi";
+        spi-num-chipselects = <5>;
+        bus-num = <0>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_dspi0_1>;
+        status = "okay";
+
+        sflash: at26df081a@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "atmel,at26df081a";
+                spi-max-frequency = <16000000>;
+                spi-cpol;
+                spi-cpha;
+                reg = <0>;
+                linux,modalias = "m25p80";
+                modal = "at26df081a";
+        };
+};
+
+
diff --git a/Documentation/devicetree/bindings/spi/spi_altera.txt b/Documentation/devicetree/bindings/spi/spi_altera.txt
index dda375943506..31319dcf30ab 100644
--- a/Documentation/devicetree/bindings/spi/spi_altera.txt
+++ b/Documentation/devicetree/bindings/spi/spi_altera.txt
@@ -1,4 +1,5 @@
 Altera SPI
 
 Required properties:
-- compatible : should be "ALTR,spi-1.0".
+- compatible : should be "ALTR,spi-1.0". <DEPRECATED>
+- compatible : should be "altr,spi-1.0".
diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt
new file mode 100644
index 000000000000..1f9641ade0b5
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt
@@ -0,0 +1,22 @@
+TI QSPI controller.
+
+Required properties:
+- compatible : should be "ti,dra7xxx-qspi" or "ti,am4372-qspi".
+- reg: Should contain QSPI registers location and length.
+- #address-cells, #size-cells : Must be present if the device has sub-nodes
+- ti,hwmods: Name of the hwmod associated to the QSPI
+
+Recommended properties:
+- spi-max-frequency: Definition as per
+                     Documentation/devicetree/bindings/spi/spi-bus.txt
+
+Example:
+
+qspi: qspi@4b300000 {
+        compatible = "ti,dra7xxx-qspi";
+        reg = <0x4b300000 0x100>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        spi-max-frequency = <25000000>;
+        ti,hwmods = "qspi";
+};
diff --git a/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt b/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt
index 46882058b59b..ee05dc390694 100644
--- a/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt
+++ b/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt
@@ -1,7 +1,8 @@
 * Freescale i.MX28 LRADC device driver
 
 Required properties:
-- compatible: Should be "fsl,imx28-lradc"
+- compatible: Should be "fsl,imx23-lradc" for i.MX23 SoC and "fsl,imx28-lradc"
+              for i.MX28 SoC
 - reg: Address and length of the register set for the device
 - interrupts: Should contain the LRADC interrupts
 
@@ -9,13 +10,38 @@ Optional properties:
 - fsl,lradc-touchscreen-wires: Number of wires used to connect the touchscreen
                                to LRADC. Valid value is either 4 or 5. If this
                                property is not present, then the touchscreen is
-                               disabled.
+                               disabled. 5 wires is valid for i.MX28 SoC only.
+- fsl,ave-ctrl: number of samples per direction to calculate an average value.
+                Allowed value is 1 ... 31, default is 4
+- fsl,ave-delay: delay between consecutive samples. Allowed value is
+                 1 ... 2047. It is used if 'fsl,ave-ctrl' > 1, counts at
+                 2 kHz and its default is 2 (= 1 ms)
+- fsl,settling: delay between plate switch to next sample. Allowed value is
+                1 ... 2047. It counts at 2 kHz and its default is
+                10 (= 5 ms)
 
-Examples:
+Example for i.MX23 SoC:
+
+        lradc@80050000 {
+                compatible = "fsl,imx23-lradc";
+                reg = <0x80050000 0x2000>;
+                interrupts = <36 37 38 39 40 41 42 43 44>;
+                status = "okay";
+                fsl,lradc-touchscreen-wires = <4>;
+                fsl,ave-ctrl = <4>;
+                fsl,ave-delay = <2>;
+                fsl,settling = <10>;
+        };
+
+Example for i.MX28 SoC:
 
         lradc@80050000 {
                 compatible = "fsl,imx28-lradc";
                 reg = <0x80050000 0x2000>;
-                interrupts = <10 14 15 16 17 18 19
-                                20 21 22 23 24 25>;
+                interrupts = <10 14 15 16 17 18 19 20 21 22 23 24 25>;
+                status = "okay";
+                fsl,lradc-touchscreen-wires = <5>;
+                fsl,ave-ctrl = <4>;
+                fsl,ave-delay = <2>;
+                fsl,settling = <10>;
         };
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
new file mode 100644
index 000000000000..284f5300fd8b
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -0,0 +1,55 @@
+* Exynos Thermal Management Unit (TMU)
+
+** Required properties:
+
+- compatible : One of the following:
+               "samsung,exynos4412-tmu"
+               "samsung,exynos4210-tmu"
+               "samsung,exynos5250-tmu"
+               "samsung,exynos5440-tmu"
+- interrupt-parent : The phandle for the interrupt controller
+- reg : Address range of the thermal registers. For soc's which has multiple
+        instances of TMU and some registers are shared across all TMU's like
+        interrupt related then 2 set of register has to supplied. First set
+        belongs to each instance of TMU and second set belongs to common TMU
+        registers.
+- interrupts : Should contain interrupt for thermal system
+- clocks : The main clock for TMU device
+- clock-names : Thermal system clock name
+- vtmu-supply: This entry is optional and provides the regulator node supplying
+                voltage to TMU. If needed this entry can be placed inside
+                board/platform specific dts file.
+
+Example 1):
+
+        tmu@100C0000 {
+                compatible = "samsung,exynos4412-tmu";
+                interrupt-parent = <&combiner>;
+                reg = <0x100C0000 0x100>;
+                interrupts = <2 4>;
+                clocks = <&clock 383>;
+                clock-names = "tmu_apbif";
+                status = "disabled";
+                vtmu-supply = <&tmu_regulator_node>;
+        };
+
+Example 2):
+
+        tmuctrl_0: tmuctrl@160118 {
+                compatible = "samsung,exynos5440-tmu";
+                reg = <0x160118 0x230>, <0x160368 0x10>;
+                interrupts = <0 58 0>;
+                clocks = <&clock 21>;
+                clock-names = "tmu_apbif";
+        };
+
+Note: For multi-instance tmu each instance should have an alias correctly
+numbered in "aliases" node.
+
+Example:
+
+aliases {
+        tmuctrl0 = &tmuctrl_0;
+        tmuctrl1 = &tmuctrl_1;
+        tmuctrl2 = &tmuctrl_2;
+};
diff --git a/Documentation/devicetree/bindings/thermal/imx-thermal.txt b/Documentation/devicetree/bindings/thermal/imx-thermal.txt
new file mode 100644
index 000000000000..541c25e49abf
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/imx-thermal.txt
@@ -0,0 +1,17 @@
+* Temperature Monitor (TEMPMON) on Freescale i.MX SoCs
+
+Required properties:
+- compatible : "fsl,imx6q-thermal"
+- fsl,tempmon : phandle pointer to system controller that contains TEMPMON
+  control registers, e.g. ANATOP on imx6q.
+- fsl,tempmon-data : phandle pointer to fuse controller that contains TEMPMON
+  calibration data, e.g. OCOTP on imx6q.  The details about calibration data
+  can be found in SoC Reference Manual.
+
+Example:
+
+tempmon {
+        compatible = "fsl,imx6q-tempmon";
+        fsl,tempmon = <&anatop>;
+        fsl,tempmon-data = <&ocotp>;
+};
diff --git a/Documentation/devicetree/bindings/timer/efm32,timer.txt b/Documentation/devicetree/bindings/timer/efm32,timer.txt
new file mode 100644
index 000000000000..97a568f696c9
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/efm32,timer.txt
@@ -0,0 +1,23 @@
+* EFM32 timer hardware
+
+The efm32 Giant Gecko SoCs come with four 16 bit timers. Two counters can be
+connected to form a 32 bit counter. Each timer has three Compare/Capture
+channels and can be used as PWM or Quadrature Decoder. Available clock sources
+are the cpu's HFPERCLK (with a 10-bit prescaler) or an external pin.
+
+Required properties:
+- compatible : Should be efm32,timer
+- reg : Address and length of the register set
+- clocks : Should contain a reference to the HFPERCLK
+
+Optional properties:
+- interrupts : Reference to the timer interrupt
+
+Example:
+
+timer@40010c00 {
+        compatible = "efm32,timer";
+        reg = <0x40010c00 0x400>;
+        interrupts = <14>;
+        clocks = <&cmu clk_HFPERCLKTIMER3>;
+};
diff --git a/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt b/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
index 36381129d141..f455182b1086 100644
--- a/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
+++ b/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
@@ -2,14 +2,40 @@ Marvell Armada 370 and Armada XP Timers
 ---------------------------------------
 
 Required properties:
-- compatible: Should be "marvell,armada-370-xp-timer"
+- compatible: Should be either "marvell,armada-370-timer" or
+  "marvell,armada-xp-timer" as appropriate.
 - interrupts: Should contain the list of Global Timer interrupts and
   then local timer interrupts
 - reg: Should contain location and length for timers register. First
   pair for the Global Timer registers, second pair for the
   local/private timers.
-- clocks: clock driving the timer hardware
 
-Optional properties:
-- marvell,timer-25Mhz: Tells whether the Global timer supports the 25
-  Mhz fixed mode (available on Armada XP and not on Armada 370)
+Clocks required for compatible = "marvell,armada-370-timer":
+- clocks : Must contain a single entry describing the clock input
+
+Clocks required for compatible = "marvell,armada-xp-timer":
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : Must include the following entries:
+  "nbclk" (L2/coherency fabric clock),
+  "fixed" (Reference 25 MHz fixed-clock).
+
+Examples:
+
+- Armada 370:
+
+        timer {
+                compatible = "marvell,armada-370-timer";
+                reg = <0x20300 0x30>, <0x21040 0x30>;
+                interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
+                clocks = <&coreclk 2>;
+        };
+
+- Armada XP:
+
+        timer {
+                compatible = "marvell,armada-xp-timer";
+                reg = <0x20300 0x30>, <0x21040 0x30>;
+                interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
+                clocks = <&coreclk 2>, <&refclk>;
+                clock-names = "nbclk", "fixed";
+        };
diff --git a/Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt b/Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt
new file mode 100644
index 000000000000..da2d510cae47
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt
@@ -0,0 +1,17 @@
+MOXA ART timer
+
+Required properties:
+
+- compatible : Must be "moxa,moxart-timer"
+- reg : Should contain registers location and length
+- interrupts : Should contain the timer interrupt number
+- clocks : Should contain phandle for the clock that drives the counter
+
+Example:
+
+        timer: timer@98400000 {
+                compatible = "moxa,moxart-timer";
+                reg = <0x98400000 0x42>;
+                interrupts = <19 1>;
+                clocks = <&coreclk>;
+        };
diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt
deleted file mode 100644
index c662eb36be29..000000000000
--- a/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-* Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
-
-Required properties:
-- compatible : Should be "fsl,<soc>-uart"
-- reg : Address and length of the register set for the device
-- interrupts : Should contain uart interrupt
-
-Optional properties:
-- fsl,uart-has-rtscts : Indicate the uart has rts and cts
-- fsl,irda-mode : Indicate the uart supports irda mode
-- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
-                  is DCE mode by default.
-
-Example:
-
-serial@73fbc000 {
-        compatible = "fsl,imx51-uart", "fsl,imx21-uart";
-        reg = <0x73fbc000 0x4000>;
-        interrupts = <31>;
-        fsl,uart-has-rtscts;
-        fsl,dte-mode;
-};
diff --git a/Documentation/devicetree/bindings/tty/serial/msm_serial.txt b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt
deleted file mode 100644
index aef383eb8876..000000000000
--- a/Documentation/devicetree/bindings/tty/serial/msm_serial.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Qualcomm MSM UART
-
-Required properties:
-- compatible :
-        - "qcom,msm-uart", and one of "qcom,msm-hsuart" or
-          "qcom,msm-lsuart".
-- reg : offset and length of the register set for the device
-        for the hsuart operating in compatible mode, there should be a
-        second pair describing the gsbi registers.
-- interrupts : should contain the uart interrupt.
-
-There are two different UART blocks used in MSM devices,
-"qcom,msm-hsuart" and "qcom,msm-lsuart".  The msm-serial driver is
-able to handle both of these, and matches against the "qcom,msm-uart"
-as the compatibility.
-
-The registers for the "qcom,msm-hsuart" device need to specify both
-register blocks, even for the common driver.
-
-Example:
-
-        uart@19c400000 {
-                compatible = "qcom,msm-hsuart", "qcom,msm-uart";
-                reg = <0x19c40000 0x1000>,
-                      <0x19c00000 0x1000>;
-                interrupts = <195>;
-        };
diff --git a/Documentation/devicetree/bindings/usb/am33xx-usb.txt b/Documentation/devicetree/bindings/usb/am33xx-usb.txt
index dc9dc8c87f15..20c2ff2ba07e 100644
--- a/Documentation/devicetree/bindings/usb/am33xx-usb.txt
+++ b/Documentation/devicetree/bindings/usb/am33xx-usb.txt
@@ -1,35 +1,197 @@
-AM33XX MUSB GLUE
- - compatible : Should be "ti,musb-am33xx"
- - reg : offset and length of register sets, first usbss, then for musb instances
- - interrupts : usbss, musb instance interrupts in order
- - ti,hwmods : must be "usb_otg_hs"
- - multipoint : Should be "1" indicating the musb controller supports
-   multipoint. This is a MUSB configuration-specific setting.
- - num-eps : Specifies the number of endpoints. This is also a
-   MUSB configuration-specific setting. Should be set to "16"
- - ram-bits : Specifies the ram address size. Should be set to "12"
- - port0-mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
-   represents PERIPHERAL.
- - port1-mode : Should be "1" to represent HOST. "3" signifies OTG and "2"
-   represents PERIPHERAL.
- - power : Should be "250". This signifies the controller can supply up to
-   500mA when operating in host mode.
+  AM33xx MUSB
+~~~~~~~~~~~~~~~
+- compatible: ti,am33xx-usb
+- reg: offset and length of the usbss register sets
+- ti,hwmods : must be "usb_otg_hs"
+
+The glue layer contains multiple child nodes. It is required the have
+at least a control module node, USB node and a PHY node. The second USB
+node and its PHY node is optional. The DMA node is also optional.
+
+Reset module
+~~~~~~~~~~~~
+- compatible: ti,am335x-usb-ctrl-module
+- reg: offset and length of the "USB control registers" in the "Control
+  Module" block. A second offset and length for the USB wake up control
+  in the same memory block.
+- reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
+  the USB wake up control register.
+
+USB PHY
+~~~~~~~
+compatible: ti,am335x-usb-phy
+reg: offset and length of the "USB PHY" register space
+ti,ctrl_mod: reference to the "reset module" node
+reg-names: phy
+The PHY should have a "phy" alias numbered properly in the alias
+node.
+
+USB
+~~~
+- compatible: ti,musb-am33xx
+- reg: offset and length of "USB Controller Registers", and offset and
+  length of "USB Core" register space.
+- reg-names: control for the ""USB Controller Registers" and "mc" for
+  "USB Core" register space
+- interrupts: USB interrupt number
+- interrupt-names: mc
+- dr_mode: Should be one of "host", "peripheral" or "otg".
+- mentor,multipoint: Should be "1" indicating the musb controller supports
+  multipoint. This is a MUSB configuration-specific setting.
+- mentor,num-eps: Specifies the number of endpoints. This is also a
+  MUSB configuration-specific setting. Should be set to "16"
+- mentor,ram-bits: Specifies the ram address size. Should be set to "12"
+- mentor,power: Should be "500". This signifies the controller can supply up to
+  500mA when operating in host mode.
+- phys: reference to the USB phy
+- dmas: specifies the dma channels
+- dma-names: specifies the names of the channels. Use "rxN" for receive
+  and "txN" for transmit endpoints. N specifies the endpoint number.
+
+The controller should have an "usb" alias numbered properly in the alias
+node.
+
+DMA
+~~~
+- compatible: ti,am3359-cppi41
+- reg: offset and length of the following register spaces: USBSS, USB
+  CPPI DMA Controller, USB CPPI DMA Scheduler, USB Queue Manager
+- reg-names: glue, controller, scheduler, queuemgr
+- #dma-cells: should be set to 2. The first number represents the
+  endpoint number (0 … 14 for endpoints 1 … 15 on instance 0 and 15 … 29
+  for endpoints 1 … 15 on instance 1). The second number is 0 for RX and
+  1 for TX transfers.
+- #dma-channels: should be set to 30 representing the 15 endpoints for
+  each USB instance.
 
 Example:
+~~~~~~~~
+The following example contains all the nodes as used on am335x-evm:
+
+aliases {
+        usb0 = &usb0;
+        usb1 = &usb1;
+        phy0 = &usb0_phy;
+        phy1 = &usb1_phy;
+};
 
-usb@47400000  {
-        compatible = "ti,musb-am33xx";
-        reg = <0x47400000 0x1000        /* usbss */
-               0x47401000 0x800         /* musb instance 0 */
-               0x47401800 0x800>;       /* musb instance 1 */
-        interrupts = <17                /* usbss */
-                      18                /* musb instance 0 */
-                      19>;              /* musb instance 1 */
-        multipoint = <1>;
-        num-eps = <16>;
-        ram-bits = <12>;
-        port0-mode = <3>;
-        port1-mode = <3>;
-        power = <250>;
+usb: usb@47400000 {
+        compatible = "ti,am33xx-usb";
+        reg = <0x47400000 0x1000>;
+        ranges;
+        #address-cells = <1>;
+        #size-cells = <1>;
         ti,hwmods = "usb_otg_hs";
+
+        ctrl_mod: control@44e10000 {
+                compatible = "ti,am335x-usb-ctrl-module";
+                reg = <0x44e10620 0x10
+                        0x44e10648 0x4>;
+                reg-names = "phy_ctrl", "wakeup";
+        };
+
+        usb0_phy: usb-phy@47401300 {
+                compatible = "ti,am335x-usb-phy";
+                reg = <0x47401300 0x100>;
+                reg-names = "phy";
+                ti,ctrl_mod = <&ctrl_mod>;
+        };
+
+        usb0: usb@47401000 {
+                compatible = "ti,musb-am33xx";
+                reg = <0x47401400 0x400
+                        0x47401000 0x200>;
+                reg-names = "mc", "control";
+
+                interrupts = <18>;
+                interrupt-names = "mc";
+                dr_mode = "otg"
+                mentor,multipoint = <1>;
+                mentor,num-eps = <16>;
+                mentor,ram-bits = <12>;
+                mentor,power = <500>;
+                phys = <&usb0_phy>;
+
+                dmas = <&cppi41dma  0 0 &cppi41dma  1 0
+                        &cppi41dma  2 0 &cppi41dma  3 0
+                        &cppi41dma  4 0 &cppi41dma  5 0
+                        &cppi41dma  6 0 &cppi41dma  7 0
+                        &cppi41dma  8 0 &cppi41dma  9 0
+                        &cppi41dma 10 0 &cppi41dma 11 0
+                        &cppi41dma 12 0 &cppi41dma 13 0
+                        &cppi41dma 14 0 &cppi41dma  0 1
+                        &cppi41dma  1 1 &cppi41dma  2 1
+                        &cppi41dma  3 1 &cppi41dma  4 1
+                        &cppi41dma  5 1 &cppi41dma  6 1
+                        &cppi41dma  7 1 &cppi41dma  8 1
+                        &cppi41dma  9 1 &cppi41dma 10 1
+                        &cppi41dma 11 1 &cppi41dma 12 1
+                        &cppi41dma 13 1 &cppi41dma 14 1>;
+                dma-names =
+                        "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
+                        "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
+                        "rx14", "rx15",
+                        "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
+                        "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
+                        "tx14", "tx15";
+        };
+
+        usb1_phy: usb-phy@47401b00 {
+                compatible = "ti,am335x-usb-phy";
+                reg = <0x47401b00 0x100>;
+                reg-names = "phy";
+                ti,ctrl_mod = <&ctrl_mod>;
+        };
+
+        usb1: usb@47401800 {
+                compatible = "ti,musb-am33xx";
+                reg = <0x47401c00 0x400
+                        0x47401800 0x200>;
+                reg-names = "mc", "control";
+                interrupts = <19>;
+                interrupt-names = "mc";
+                dr_mode = "host"
+                mentor,multipoint = <1>;
+                mentor,num-eps = <16>;
+                mentor,ram-bits = <12>;
+                mentor,power = <500>;
+                phys = <&usb1_phy>;
+
+                dmas = <&cppi41dma 15 0 &cppi41dma 16 0
+                        &cppi41dma 17 0 &cppi41dma 18 0
+                        &cppi41dma 19 0 &cppi41dma 20 0
+                        &cppi41dma 21 0 &cppi41dma 22 0
+                        &cppi41dma 23 0 &cppi41dma 24 0
+                        &cppi41dma 25 0 &cppi41dma 26 0
+                        &cppi41dma 27 0 &cppi41dma 28 0
+                        &cppi41dma 29 0 &cppi41dma 15 1
+                        &cppi41dma 16 1 &cppi41dma 17 1
+                        &cppi41dma 18 1 &cppi41dma 19 1
+                        &cppi41dma 20 1 &cppi41dma 21 1
+                        &cppi41dma 22 1 &cppi41dma 23 1
+                        &cppi41dma 24 1 &cppi41dma 25 1
+                        &cppi41dma 26 1 &cppi41dma 27 1
+                        &cppi41dma 28 1 &cppi41dma 29 1>;
+                dma-names =
+                        "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
+                        "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
+                        "rx14", "rx15",
+                        "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
+                        "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
+                        "tx14", "tx15";
+        };
+
+        cppi41dma: dma-controller@07402000 {
+                compatible = "ti,am3359-cppi41";
+                reg =  <0x47400000 0x1000
+                        0x47402000 0x1000
+                        0x47403000 0x1000
+                        0x47404000 0x4000>;
+                reg-names = "glue", "controller", "scheduler", "queuemgr";
+                interrupts = <17>;
+                interrupt-names = "glue";
+                #dma-cells = <2>;
+                #dma-channels = <30>;
+                #dma-requests = <256>;
+        };
 };
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 7a95c651ceb3..e807635f9e1c 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -3,10 +3,12 @@ synopsys DWC3 CORE
 DWC3- USB3 CONTROLLER
 
 Required properties:
- - compatible: must be "synopsys,dwc3"
+ - compatible: must be "snps,dwc3"
  - reg : Address and length of the register set for the device
  - interrupts: Interrupts used by the dwc3 controller.
- - usb-phy : array of phandle for the PHY device
+ - usb-phy : array of phandle for the PHY device.  The first element
+   in the array is expected to be a handle to the USB2/HS PHY and
+   the second element is expected to be a handle to the USB3/SS PHY
 
 Optional properties:
  - tx-fifo-resize: determines if the FIFO *has* to be reallocated.
@@ -14,7 +16,7 @@ Optional properties:
 This is usually a subnode to DWC3 glue to which it is connected.
 
 dwc3@4a030000 {
-        compatible = "synopsys,dwc3";
+        compatible = "snps,dwc3";
         reg = <0x4a030000 0xcfff>;
         interrupts = <0 92 4>
         usb-phy = <&usb2_phy>, <&usb3,phy>;
diff --git a/Documentation/devicetree/bindings/usb/generic.txt b/Documentation/devicetree/bindings/usb/generic.txt
new file mode 100644
index 000000000000..477d5bb5e51c
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/generic.txt
@@ -0,0 +1,24 @@
+Generic USB Properties
+
+Optional properties:
+ - maximum-speed: tells USB controllers we want to work up to a certain
+                        speed. Valid arguments are "super-speed", "high-speed",
+                        "full-speed" and "low-speed". In case this isn't passed
+                        via DT, USB controllers should default to their maximum
+                        HW capability.
+ - dr_mode: tells Dual-Role USB controllers that we want to work on a
+                        particular mode. Valid arguments are "host",
+                        "peripheral" and "otg". In case this attribute isn't
+                        passed via DT, USB DRD controllers should default to
+                        OTG.
+
+This is an attribute to a USB controller such as:
+
+dwc3@4a030000 {
+        compatible = "synopsys,dwc3";
+        reg = <0x4a030000 0xcfff>;
+        interrupts = <0 92 4>
+        usb-phy = <&usb2_phy>, <&usb3,phy>;
+        maximum-speed = "super-speed";
+        dr_mode = "otg";
+};
diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
new file mode 100644
index 000000000000..5ea26c631e3a
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -0,0 +1,17 @@
+MSM SoC HSUSB controllers
+
+EHCI
+
+Required properties:
+- compatible:   Should contain "qcom,ehci-host"
+- regs:                 offset and length of the register set in the memory map
+- usb-phy:              phandle for the PHY device
+
+Example EHCI controller device node:
+
+        ehci: ehci@f9a55000 {
+                compatible = "qcom,ehci-host";
+                reg = <0xf9a55000 0x400>;
+                usb-phy = <&usb_otg>;
+        };
+
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
index c4c9e9e664aa..ba797d3e6326 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
@@ -3,7 +3,7 @@ Tegra SOC USB PHY
 The device node for Tegra SOC USB PHY:
 
 Required properties :
- - compatible : Should be "nvidia,tegra20-usb-phy".
+ - compatible : Should be "nvidia,tegra<chip>-usb-phy".
  - reg : Defines the following set of registers, in the order listed:
    - The PHY's own register set.
      Always present.
@@ -24,17 +24,26 @@ Required properties :
 Required properties for phy_type == ulpi:
   - nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
 
-Required PHY timing params for utmi phy:
+Required PHY timing params for utmi phy, for all chips:
   - nvidia,hssync-start-delay : Number of 480 Mhz clock cycles to wait before
     start of sync launches RxActive
   - nvidia,elastic-limit : Variable FIFO Depth of elastic input store
   - nvidia,idle-wait-delay : Number of 480 Mhz clock cycles of idle to wait
     before declare IDLE.
   - nvidia,term-range-adj : Range adjusment on terminations
-  - nvidia,xcvr-setup : HS driver output control
+  - Either one of the following for HS driver output control:
+    - nvidia,xcvr-setup : integer, uses the provided value.
+    - nvidia,xcvr-setup-use-fuses : boolean, indicates that the value is read
+      from the on-chip fuses
+    If both are provided, nvidia,xcvr-setup-use-fuses takes precedence.
   - nvidia,xcvr-lsfslew : LS falling slew rate control.
   - nvidia,xcvr-lsrslew :  LS rising slew rate control.
 
+Required PHY timing params for utmi phy, only on Tegra30 and above:
+  - nvidia,xcvr-hsslew : HS slew rate control.
+  - nvidia,hssquelch-level : HS squelch detector level.
+  - nvidia,hsdiscon-level : HS disconnect detector level.
+
 Optional properties:
   - nvidia,has-legacy-mode : boolean indicates whether this controller can
     operate in legacy mode (as APX 2500 / 2600). In legacy mode some
@@ -48,5 +57,5 @@ Optional properties:
       peripheral means it is device controller
       otg means it can operate as either ("on the go")
 
-Required properties for dr_mode == otg:
+VBUS control (required for dr_mode == otg, optional for dr_mode == host):
   - vbus-supply: regulator for VBUS
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt b/Documentation/devicetree/bindings/usb/omap-usb.txt
index 57e71f6817d0..090e5e22bd2b 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -3,9 +3,6 @@ OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS
 OMAP MUSB GLUE
  - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
  - ti,hwmods : must be "usb_otg_hs"
- - ti,has-mailbox : to specify that omap uses an external mailbox
-   (in control module) to communicate with the musb core during device connect
-   and disconnect.
  - multipoint : Should be "1" indicating the musb controller supports
    multipoint. This is a MUSB configuration-specific setting.
  - num-eps : Specifies the number of endpoints. This is also a
@@ -19,6 +16,9 @@ OMAP MUSB GLUE
  - power : Should be "50". This signifies the controller can supply up to
    100mA when operating in host mode.
  - usb-phy : the phandle for the PHY device
+ - phys : the phandle for the PHY device (used by generic PHY framework)
+ - phy-names : the names of the PHY corresponding to the PHYs present in the
+   *phy* phandle.
 
 Optional properties:
  - ctrl-module : phandle of the control module this glue uses to write to
@@ -28,11 +28,12 @@ SOC specific device node entry
 usb_otg_hs: usb_otg_hs@4a0ab000 {
         compatible = "ti,omap4-musb";
         ti,hwmods = "usb_otg_hs";
-        ti,has-mailbox;
         multipoint = <1>;
         num-eps = <16>;
         ram-bits = <12>;
         ctrl-module = <&omap_control_usb>;
+        phys = <&usb2_phy>;
+        phy-names = "usb2-phy";
 };
 
 Board specific device node entry
@@ -53,6 +54,11 @@ OMAP DWC3 GLUE
    It should be set to "1" for HW mode and "2" for SW mode.
  - ranges: the child address space are mapped 1:1 onto the parent address space
 
+Optional Properties:
+ - extcon : phandle for the extcon device omap dwc3 uses to detect
+   connect/disconnect events.
+ - vbus-supply : phandle to the regulator device tree node if needed.
+
 Sub-nodes:
 The dwc3 core should be added as subnode to omap dwc3 glue.
 - dwc3 :
@@ -73,22 +79,22 @@ omap_dwc3 {
 OMAP CONTROL USB
 
 Required properties:
- - compatible: Should be "ti,omap-control-usb"
+ - compatible: Should be one of
+ "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
+ "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
+                        e.g. USB2_PHY on OMAP5.
+ "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
+                        e.g. USB3 PHY and SATA PHY on OMAP5.
+ "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
+                        DRA7 platform.
  - reg : Address and length of the register set for the device. It contains
-   the address of "control_dev_conf" and "otghs_control" or "phy_power_usb"
-   depending upon omap4 or omap5.
- - reg-names: The names of the register addresses corresponding to the registers
-   filled in "reg".
- - ti,type: This is used to differentiate whether the control module has
-   usb mailbox or usb3 phy power. omap4 has usb mailbox in control module to
-   notify events to the musb core and omap5 has usb3 phy power register to
-   power on usb3 phy. Should be "1" if it has mailbox and "2" if it has usb3
-   phy power.
+   the address of "otghs_control" for control-phy-otghs or "power" register
+   for other types.
+ - reg-names: should be "otghs_control" control-phy-otghs and "power" for
+   other types.
 
 omap_control_usb: omap-control-usb@4a002300 {
-        compatible = "ti,omap-control-usb";
-        reg = <0x4a002300 0x4>,
-              <0x4a00233c 0x4>;
-        reg-names = "control_dev_conf", "otghs_control";
-        ti,type = <1>;
+        compatible = "ti,control-phy-otghs";
+        reg = <0x4a00233c 0x4>;
+        reg-names = "otghs_control";
 };
diff --git a/Documentation/devicetree/bindings/usb/samsung-hsotg.txt b/Documentation/devicetree/bindings/usb/samsung-hsotg.txt
new file mode 100644
index 000000000000..b83d428a265e
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/samsung-hsotg.txt
@@ -0,0 +1,40 @@
+Samsung High Speed USB OTG controller
+-----------------------------
+
+The Samsung HSOTG IP can be found on Samsung SoCs, from S3C6400 onwards.
+It gives functionality of OTG-compliant USB 2.0 host and device with
+support for USB 2.0 high-speed (480Mbps) and full-speed (12 Mbps)
+operation.
+
+Currently only device mode is supported.
+
+Binding details
+-----
+
+Required properties:
+- compatible: "samsung,s3c6400-hsotg" should be used for all currently
+    supported SoC,
+- interrupt-parent: phandle for the interrupt controller to which the
+    interrupt signal of the HSOTG block is routed,
+- interrupts: specifier of interrupt signal of interrupt controller,
+    according to bindings of interrupt controller,
+- clocks: contains an array of clock specifiers:
+    - first entry: OTG clock
+- clock-names: contains array of clock names:
+    - first entry: must be "otg"
+- vusb_d-supply: phandle to voltage regulator of digital section,
+- vusb_a-supply: phandle to voltage regulator of analog section.
+
+Example
+-----
+
+        hsotg@12480000 {
+                compatible = "samsung,s3c6400-hsotg";
+                reg = <0x12480000 0x20000>;
+                interrupts = <0 71 0>;
+                clocks = <&clock 305>;
+                clock-names = "otg";
+                vusb_d-supply = <&vusb_reg>;
+                vusb_a-supply = <&vusbdac_reg>;
+        };
+
diff --git a/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt b/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt
index d7e272671c7e..1bd37faba05b 100644
--- a/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt
+++ b/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt
@@ -15,7 +15,7 @@ Optional properties:
 
 - vcc-supply: phandle to the regulator that provides RESET to the PHY.
 
-- reset-supply: phandle to the regulator that provides power to the PHY.
+- reset-gpios: Should specify the GPIO for reset.
 
 Example:
 
@@ -25,10 +25,9 @@ Example:
                 clocks = <&osc 0>;
                 clock-names = "main_clk";
                 vcc-supply = <&hsusb1_vcc_regulator>;
-                reset-supply = <&hsusb1_reset_regulator>;
+                reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
         };
 
 hsusb1_phy is a NOP USB PHY device that gets its clock from an oscillator
 and expects that clock to be configured to 19.2MHz by the NOP PHY driver.
-hsusb1_vcc_regulator provides power to the PHY and hsusb1_reset_regulator
-controls RESET.
+hsusb1_vcc_regulator provides power to the PHY and GPIO 7 controls RESET.
diff --git a/Documentation/devicetree/bindings/usb/usb-phy.txt b/Documentation/devicetree/bindings/usb/usb-phy.txt
index 61496f5cb095..c0245c888982 100644
--- a/Documentation/devicetree/bindings/usb/usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/usb-phy.txt
@@ -5,6 +5,8 @@ OMAP USB2 PHY
 Required properties:
  - compatible: Should be "ti,omap-usb2"
  - reg : Address and length of the register set for the device.
+ - #phy-cells: determine the number of cells that should be given in the
+   phandle while referencing this phy.
 
 Optional properties:
  - ctrl-module : phandle of the control module used by PHY driver to power on
@@ -16,6 +18,7 @@ usb2phy@4a0ad080 {
         compatible = "ti,omap-usb2";
         reg = <0x4a0ad080 0x58>;
         ctrl-module = <&omap_control_usb>;
+        #phy-cells = <0>;
 };
 
 OMAP USB3 PHY
@@ -25,6 +28,8 @@ Required properties:
  - reg : Address and length of the register set for the device.
  - reg-names: The names of the register addresses corresponding to the registers
    filled in "reg".
+ - #phy-cells: determine the number of cells that should be given in the
+   phandle while referencing this phy.
 
 Optional properties:
  - ctrl-module : phandle of the control module used by PHY driver to power on
@@ -39,4 +44,5 @@ usb3phy@4a084400 {
               <0x4a084c00 0x40>;
         reg-names = "phy_rx", "phy_tx", "pll_ctrl";
         ctrl-module = <&omap_control_usb>;
+        #phy-cells = <0>;
 };
diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt
new file mode 100644
index 000000000000..5752df0e17a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
@@ -0,0 +1,14 @@
+USB xHCI controllers
+
+Required properties:
+  - compatible: should be "xhci-platform".
+  - reg: should contain address and length of the standard XHCI
+    register set for the device.
+  - interrupts: one XHCI interrupt should be described here.
+
+Example:
+        usb@f0931000 {
+                compatible = "xhci-platform";
+                reg = <0xf0931000 0x8c8>;
+                interrupts = <0x0 0x4e 0x0>;
+        };
diff --git a/Documentation/devicetree/bindings/usb/usb3503.txt b/Documentation/devicetree/bindings/usb/usb3503.txt
index 8c5be48b43c8..a018da4a7ad7 100644
--- a/Documentation/devicetree/bindings/usb/usb3503.txt
+++ b/Documentation/devicetree/bindings/usb/usb3503.txt
@@ -1,8 +1,11 @@
 SMSC USB3503 High-Speed Hub Controller
 
 Required properties:
-- compatible: Should be "smsc,usb3503".
-- reg: Specifies the i2c slave address, it should be 0x08.
+- compatible: Should be "smsc,usb3503" or "smsc,usb3503a".
+
+Optional properties:
+- reg: Specifies the i2c slave address, it is required and should be 0x08
+       if I2C is used.
 - connect-gpios: Should specify GPIO for connect.
 - disabled-ports: Should specify the ports unused.
         '1' or '2' or '3' are availe for this property to describe the port
diff --git a/Documentation/devicetree/bindings/usb/ux500-usb.txt b/Documentation/devicetree/bindings/usb/ux500-usb.txt
index 330d6ec15401..439a41c79afa 100644
--- a/Documentation/devicetree/bindings/usb/ux500-usb.txt
+++ b/Documentation/devicetree/bindings/usb/ux500-usb.txt
@@ -15,7 +15,7 @@ Optional properties:
 Example:
 
 usb_per5@a03e0000 {
-        compatible = "stericsson,db8500-musb", "mentor,musb";
+        compatible = "stericsson,db8500-musb";
         reg = <0xa03e0000 0x10000>;
         interrupts = <0 23 0x4>;
         interrupt-names = "mc";
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 366ce9b87240..ce95ed1c6d3e 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -7,14 +7,20 @@ ad	Avionic Design GmbH
 adi     Analog Devices, Inc.
 aeroflexgaisler Aeroflex Gaisler AB
 ak      Asahi Kasei Corp.
+altr    Altera Corp.
 amcc    Applied Micro Circuits Corporation (APM, formally AMCC)
 apm     Applied Micro Circuits Corporation (APM)
 arm     ARM Ltd.
 atmel   Atmel Corporation
+auo     AU Optronics Corporation
+avago   Avago Technologies
 bosch   Bosch Sensortec GmbH
 brcm    Broadcom Corporation
+capella Capella Microsystems, Inc
 cavium  Cavium, Inc.
+cdns    Cadence Design Systems Inc.
 chrp    Common Hardware Reference Platform
+chunghwa        Chunghwa Picture Tubes Ltd.
 cirrus  Cirrus Logic, Inc.
 cortina Cortina Systems, Inc.
 dallas  Maxim Integrated Products (formerly Dallas Semiconductor)
@@ -36,12 +42,15 @@ linux	Linux-specific binding
 lsi     LSI Corp. (LSI Logic)
 marvell Marvell Technology Group Ltd.
 maxim   Maxim Integrated Products
+microchip       Microchip Technology Inc.
 mosaixtech      Mosaix Technologies, Inc.
 national        National Semiconductor
 nintendo        Nintendo
 nvidia  NVIDIA
 nxp     NXP Semiconductors
 onnn    ON Semiconductor Corp.
+panasonic       Panasonic Corporation
+phytec  PHYTEC Messtechnik GmbH
 picochip        Picochip Ltd
 powervr PowerVR (deprecated, use img)
 qca     Qualcomm Atheros, Inc.
@@ -61,12 +70,12 @@ snps 	Synopsys, Inc.
 st      STMicroelectronics
 ste     ST-Ericsson
 stericsson      ST-Ericsson
-toumaz  Toumaz
 ti      Texas Instruments
 toshiba Toshiba Corporation
+toumaz  Toumaz
 v3      V3 Semiconductor
 via     VIA Technologies, Inc.
+winbond Winbond Electronics corp.
 wlf     Wolfson Microelectronics
 wm      Wondermedia Technologies, Inc.
-winbond Winbond Electronics corp.
 xlnx    Xilinx
diff --git a/Documentation/devicetree/bindings/video/exynos_dp.txt b/Documentation/devicetree/bindings/video/exynos_dp.txt
index 84f10c16cb38..3289d76a21d0 100644
--- a/Documentation/devicetree/bindings/video/exynos_dp.txt
+++ b/Documentation/devicetree/bindings/video/exynos_dp.txt
@@ -6,10 +6,10 @@ We use two nodes:
         -dptx-phy node(defined inside dp-controller node)
 
 For the DP-PHY initialization, we use the dptx-phy node.
-Required properties for dptx-phy:
-        -reg:
+Required properties for dptx-phy: deprecated, use phys and phy-names
+        -reg: deprecated
                 Base address of DP PHY register.
-        -samsung,enable-mask:
+        -samsung,enable-mask: deprecated
                 The bit-mask used to enable/disable DP PHY.
 
 For the Panel initialization, we read data from dp-controller node.
@@ -27,6 +27,10 @@ Required properties for dp-controller:
                 from common clock binding: Shall be "dp".
         -interrupt-parent:
                 phandle to Interrupt combiner node.
+        -phys:
+                from general PHY binding: the phandle for the PHY device.
+        -phy-names:
+                from general PHY binding: Should be "dp".
         -samsung,color-space:
                 input video data format.
                         COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
@@ -68,11 +72,8 @@ SOC specific portion:
                 clocks = <&clock 342>;
                 clock-names = "dp";
 
-                dptx-phy {
-                        reg = <0x10040720>;
-                        samsung,enable-mask = <1>;
-                };
-
+                phys = <&dp_phy>;
+                phy-names = "dp";
         };
 
 Board Specific portion:
diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
index 323983be3c30..50decf8e1b90 100644
--- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
+++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
@@ -12,7 +12,19 @@ Required properties:
         a) phandle of the gpio controller node.
         b) pin number within the gpio controller.
         c) optional flags and pull up/down.
-
+- clocks: list of clock IDs from SoC clock driver.
+        a) hdmi: Gate of HDMI IP bus clock.
+        b) sclk_hdmi: Gate of HDMI special clock.
+        c) sclk_pixel: Pixel special clock, one of the two possible inputs of
+                HDMI clock mux.
+        d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of
+                HDMI clock mux.
+        e) mout_hdmi: It is required by the driver to switch between the 2
+                parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
+                after configuration, parent is set to sclk_hdmiphy else
+                sclk_pixel.
+- clock-names: aliases as per driver requirements for above clock IDs:
+        "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".
 Example:
 
         hdmi {
diff --git a/Documentation/devicetree/bindings/video/exynos_mixer.txt b/Documentation/devicetree/bindings/video/exynos_mixer.txt
index 3334b0a8e343..7bfde9c9d658 100644
--- a/Documentation/devicetree/bindings/video/exynos_mixer.txt
+++ b/Documentation/devicetree/bindings/video/exynos_mixer.txt
@@ -10,6 +10,10 @@ Required properties:
 - reg: physical base address of the mixer and length of memory mapped
         region.
 - interrupts: interrupt number to the cpu.
+- clocks: list of clock IDs from SoC clock driver.
+        a) mixer: Gate of Mixer IP bus clock.
+        b) sclk_hdmi: HDMI Special clock, one of the two possible inputs of
+               mixer mux.
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/video/simple-framebuffer.txt b/Documentation/devicetree/bindings/video/simple-framebuffer.txt
index 3ea460583111..70c26f3a5b9a 100644
--- a/Documentation/devicetree/bindings/video/simple-framebuffer.txt
+++ b/Documentation/devicetree/bindings/video/simple-framebuffer.txt
@@ -12,6 +12,7 @@ Required properties:
 - stride: The number of bytes in each line of the framebuffer.
 - format: The format of the framebuffer surface. Valid values are:
   - r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b).
+  - a8b8g8r8 (32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r).
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/watchdog/sun4i-wdt.txt b/Documentation/devicetree/bindings/watchdog/sunxi-wdt.txt
index ecd650adff31..e39cb266c8f4 100644
--- a/Documentation/devicetree/bindings/watchdog/sun4i-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/sunxi-wdt.txt
@@ -1,8 +1,9 @@
-Allwinner sun4i Watchdog timer
+Allwinner SoCs Watchdog timer
 
 Required properties:
 
-- compatible : should be "allwinner,sun4i-wdt"
+- compatible : should be "allwinner,<soc-family>-wdt", the currently supported
+  SoC families being sun4i and sun6i
 - reg : Specifies base physical address and size of the registers.
 
 Example:
diff --git a/Documentation/dma-buf-sharing.txt b/Documentation/dma-buf-sharing.txt
index 0b23261561d2..505e71172ae7 100644
--- a/Documentation/dma-buf-sharing.txt
+++ b/Documentation/dma-buf-sharing.txt
@@ -321,7 +321,7 @@ Access to a dma_buf from the kernel context involves three steps:
 
    When the importer is done accessing the range specified in begin_cpu_access,
    it needs to announce this to the exporter (to facilitate cache flushing and
-   unpinning of any pinned resources). The result of of any dma_buf kmap calls
+   unpinning of any pinned resources). The result of any dma_buf kmap calls
    after end_cpu_access is undefined.
 
    Interface:
@@ -407,6 +407,18 @@ Being able to mmap an export dma-buf buffer object has 2 main use-cases:
    interesting ways depending upong the exporter (if userspace starts depending
    upon this implicit synchronization).
 
+Other Interfaces Exposed to Userspace on the dma-buf FD
+------------------------------------------------------
+
+- Since kernel 3.12 the dma-buf FD supports the llseek system call, but only
+  with offset=0 and whence=SEEK_END|SEEK_SET. SEEK_SET is supported to allow
+  the usual size discover pattern size = SEEK_END(0); SEEK_SET(0). Every other
+  llseek operation will report -EINVAL.
+
+  If llseek on dma-buf FDs isn't support the kernel will report -ESPIPE for all
+  cases. Userspace can use this to detect support for discovering the dma-buf
+  size using llseek.
+
 Miscellaneous notes
 -------------------
 
diff --git a/Documentation/dmatest.txt b/Documentation/dmatest.txt
index 132a094c7bc3..a2b5663eae26 100644
--- a/Documentation/dmatest.txt
+++ b/Documentation/dmatest.txt
@@ -16,15 +16,16 @@ be built as module or inside kernel. Let's consider those cases.
         Part 2 - When dmatest is built as a module...
 
 After mounting debugfs and loading the module, the /sys/kernel/debug/dmatest
-folder with nodes will be created. They are the same as module parameters with
-addition of the 'run' node that controls run and stop phases of the test.
+folder with nodes will be created. There are two important files located. First
+is the 'run' node that controls run and stop phases of the test, and the second
+one, 'results', is used to get the test case results.
 
 Note that in this case test will not run on load automatically.
 
 Example of usage:
-        % echo dma0chan0 > /sys/kernel/debug/dmatest/channel
-        % echo 2000 > /sys/kernel/debug/dmatest/timeout
-        % echo 1 > /sys/kernel/debug/dmatest/iterations
+        % echo dma0chan0 > /sys/module/dmatest/parameters/channel
+        % echo 2000 > /sys/module/dmatest/parameters/timeout
+        % echo 1 > /sys/module/dmatest/parameters/iterations
         % echo 1 > /sys/kernel/debug/dmatest/run
 
 Hint: available channel list could be extracted by running the following
@@ -55,8 +56,8 @@ for the first performed test. After user gets a control, the test could be
 re-run with the same or different parameters. For the details see the above
 section "Part 2 - When dmatest is built as a module..."
 
-In both cases the module parameters are used as initial values for the test case.
-You always could check them at run-time by running
+In both cases the module parameters are used as the actual values for the test
+case. You always could check them at run-time by running
         % grep -H . /sys/module/dmatest/parameters/*
 
         Part 4 - Gathering the test results
diff --git a/Documentation/driver-model/devres.txt b/Documentation/driver-model/devres.txt
index b4671459857f..5bdc8cb5fc28 100644
--- a/Documentation/driver-model/devres.txt
+++ b/Documentation/driver-model/devres.txt
@@ -237,6 +237,12 @@ MEM
   devm_kzalloc()
   devm_kfree()
 
+IIO
+  devm_iio_device_alloc()
+  devm_iio_device_free()
+  devm_iio_trigger_alloc()
+  devm_iio_trigger_free()
+
 IO region
   devm_request_region()
   devm_request_mem_region()
@@ -277,6 +283,7 @@ REGULATOR
   devm_regulator_get()
   devm_regulator_put()
   devm_regulator_bulk_get()
+  devm_regulator_register()
 
 CLOCK
   devm_clk_get()
@@ -293,3 +300,9 @@ PWM
 PHY
   devm_usb_get_phy()
   devm_usb_put_phy()
+
+SLAVE DMA ENGINE
+  devm_acpi_dma_controller_register()
+
+SPI
+  devm_spi_register_master()
diff --git a/Documentation/early-userspace/README b/Documentation/early-userspace/README
index 661a73fad399..93e63a9af30b 100644
--- a/Documentation/early-userspace/README
+++ b/Documentation/early-userspace/README
@@ -83,8 +83,7 @@ Where's this all leading?
 
 The klibc distribution contains some of the necessary software to make
 early userspace useful.  The klibc distribution is currently
-maintained separately from the kernel, but this may change early in
-the 2.7 era (it missed the boat for 2.5).
+maintained separately from the kernel.
 
 You can obtain somewhat infrequent snapshots of klibc from
 ftp://ftp.kernel.org/pub/linux/libs/klibc/
diff --git a/Documentation/x86/efi-stub.txt b/Documentation/efi-stub.txt
index 44e6bb6ead10..44e6bb6ead10 100644
--- a/Documentation/x86/efi-stub.txt
+++ b/Documentation/efi-stub.txt
diff --git a/Documentation/extcon/porting-android-switch-class b/Documentation/extcon/porting-android-switch-class
index eb0fa5f4fe88..5377f6317961 100644
--- a/Documentation/extcon/porting-android-switch-class
+++ b/Documentation/extcon/porting-android-switch-class
@@ -25,8 +25,10 @@ MyungJoo Ham <myungjoo.ham@samsung.com>
     @print_state: no change but type change (switch_dev->extcon_dev)
 
 - switch_dev_register(sdev, dev)
-        => extcon_dev_register(edev, dev)
-        : no change but type change (sdev->edev)
+        => extcon_dev_register(edev)
+        : type change (sdev->edev)
+        : remove second param('dev'). if edev has parent device, should store
+          'dev' to 'edev.dev.parent' before registering extcon device
 - switch_dev_unregister(sdev)
         => extcon_dev_unregister(edev)
         : no change but type change (sdev->edev)
diff --git a/Documentation/fb/fbcon.txt b/Documentation/fb/fbcon.txt
index 99ea58e65eff..4a9739abc860 100644
--- a/Documentation/fb/fbcon.txt
+++ b/Documentation/fb/fbcon.txt
@@ -150,7 +150,7 @@ C. Boot options
 
 C. Attaching, Detaching and Unloading
 
-Before going on on how to attach, detach and unload the framebuffer console, an
+Before going on how to attach, detach and unload the framebuffer console, an
 illustration of the dependencies may help.
 
 The console layer, as with most subsystems, needs a driver that interfaces with
diff --git a/Documentation/fb/viafb.modes b/Documentation/fb/viafb.modes
index 02e5b487f00e..2a547da2e5cc 100644
--- a/Documentation/fb/viafb.modes
+++ b/Documentation/fb/viafb.modes
@@ -571,7 +571,7 @@ mode "640x480-60"
 #                   160 chars   800 lines
 #   Blank Time      4.798 us    0.564 ms
 #                   50 chars    28 lines
-#   Polarity        negtive    positive
+#   Polarity        negative    positive
 #
     mode "1280x800-60"
 # D: 83.500 MHz, H: 49.702 kHz, V: 60.00 Hz
diff --git a/Documentation/fb/viafb.txt b/Documentation/fb/viafb.txt
index 444e34b52ae1..1cb2462a71ce 100644
--- a/Documentation/fb/viafb.txt
+++ b/Documentation/fb/viafb.txt
@@ -32,7 +32,7 @@
     Start viafb with default settings:
         #modprobe viafb
 
-    Start viafb with with user options:
+    Start viafb with user options:
         #modprobe viafb viafb_mode=800x600 viafb_bpp=16 viafb_refresh=60
                   viafb_active_dev=CRT+DVI viafb_dvi_port=DVP1
                   viafb_mode1=1024x768 viafb_bpp=16 viafb_refresh1=60
diff --git a/Documentation/filesystems/btrfs.txt b/Documentation/filesystems/btrfs.txt
index b349d57b76ea..9dae59407437 100644
--- a/Documentation/filesystems/btrfs.txt
+++ b/Documentation/filesystems/btrfs.txt
@@ -87,7 +87,7 @@ Unless otherwise specified, all options default to off.
 
   device=<devicepath>
         Specify a device during mount so that ioctls on the control device
-        can be avoided.  Especialy useful when trying to mount a multi-device
+        can be avoided.  Especially useful when trying to mount a multi-device
         setup as root.  May be specified multiple times for multiple devices.
 
   discard
diff --git a/Documentation/filesystems/caching/backend-api.txt b/Documentation/filesystems/caching/backend-api.txt
index d78bab9622c6..277d1e810670 100644
--- a/Documentation/filesystems/caching/backend-api.txt
+++ b/Documentation/filesystems/caching/backend-api.txt
@@ -299,6 +299,15 @@ performed on the denizens of the cache.  These are held in a structure of type:
      enough space in the cache to permit this.
 
 
+ (*) Check coherency state of an object [mandatory]:
+
+        int (*check_consistency)(struct fscache_object *object)
+
+     This method is called to have the cache check the saved auxiliary data of
+     the object against the netfs's idea of the state.  0 should be returned
+     if they're consistent and -ESTALE otherwise.  -ENOMEM and -ERESTARTSYS
+     may also be returned.
+
  (*) Update object [mandatory]:
 
         int (*update_object)(struct fscache_object *object)
diff --git a/Documentation/filesystems/caching/netfs-api.txt b/Documentation/filesystems/caching/netfs-api.txt
index 97e6c0ecc5ef..aed6b94160b1 100644
--- a/Documentation/filesystems/caching/netfs-api.txt
+++ b/Documentation/filesystems/caching/netfs-api.txt
@@ -29,15 +29,16 @@ This document contains the following sections:
          (6) Index registration
          (7) Data file registration
          (8) Miscellaneous object registration
-         (9) Setting the data file size
+         (9) Setting the data file size
         (10) Page alloc/read/write
         (11) Page uncaching
-        (12) Index and data file update
-        (13) Miscellaneous cookie operations
-        (14) Cookie unregistration
-        (15) Index invalidation
-        (16) Data file invalidation
-        (17) FS-Cache specific page flags.
+        (12) Index and data file consistency
+        (13) Cookie enablement
+        (14) Miscellaneous cookie operations
+        (15) Cookie unregistration
+        (16) Index invalidation
+        (17) Data file invalidation
+        (18) FS-Cache specific page flags.
 
 
 =============================
@@ -334,7 +335,8 @@ the path to the file:
         struct fscache_cookie *
         fscache_acquire_cookie(struct fscache_cookie *parent,
                                const struct fscache_object_def *def,
-                               void *netfs_data);
+                               void *netfs_data,
+                               bool enable);
 
 This function creates an index entry in the index represented by parent,
 filling in the index entry by calling the operations pointed to by def.
@@ -350,6 +352,10 @@ object needs to be created somewhere down the hierarchy.  Furthermore, an index
 may be created in several different caches independently at different times.
 This is all handled transparently, and the netfs doesn't see any of it.
 
+A cookie will be created in the disabled state if enabled is false.  A cookie
+must be enabled to do anything with it.  A disabled cookie can be enabled by
+calling fscache_enable_cookie() (see below).
+
 For example, with AFS, a cell would be added to the primary index.  This index
 entry would have a dependent inode containing a volume location index for the
 volume mappings within this cell:
@@ -357,7 +363,7 @@ volume mappings within this cell:
         cell->cache =
                 fscache_acquire_cookie(afs_cache_netfs.primary_index,
                                        &afs_cell_cache_index_def,
-                                       cell);
+                                       cell, true);
 
 Then when a volume location was accessed, it would be entered into the cell's
 index and an inode would be allocated that acts as a volume type and hash chain
@@ -366,7 +372,7 @@ combination:
         vlocation->cache =
                 fscache_acquire_cookie(cell->cache,
                                        &afs_vlocation_cache_index_def,
-                                       vlocation);
+                                       vlocation, true);
 
 And then a particular flavour of volume (R/O for example) could be added to
 that index, creating another index for vnodes (AFS inode equivalents):
@@ -374,7 +380,7 @@ that index, creating another index for vnodes (AFS inode equivalents):
         volume->cache =
                 fscache_acquire_cookie(vlocation->cache,
                                        &afs_volume_cache_index_def,
-                                       volume);
+                                       volume, true);
 
 
 ======================
@@ -388,7 +394,7 @@ the object definition should be something other than index type.
         vnode->cache =
                 fscache_acquire_cookie(volume->cache,
                                        &afs_vnode_cache_object_def,
-                                       vnode);
+                                       vnode, true);
 
 
 =================================
@@ -404,7 +410,7 @@ it would be some other type of object such as a data file.
         xattr->cache =
                 fscache_acquire_cookie(vnode->cache,
                                        &afs_xattr_cache_object_def,
-                                       xattr);
+                                       xattr, true);
 
 Miscellaneous objects might be used to store extended attributes or directory
 entries for example.
@@ -433,7 +439,7 @@ to the caller.  The attribute adjustment excludes read and write operations.
 
 
 =====================
-PAGE READ/ALLOC/WRITE
+PAGE ALLOC/READ/WRITE
 =====================
 
 And the sixth step is to store and retrieve pages in the cache.  There are
@@ -499,7 +505,7 @@ Else if there's a copy of the page resident in the cache:
      (*) An argument that's 0 on success or negative for an error code.
 
      If an error occurs, it should be assumed that the page contains no usable
-     data.
+     data.  fscache_readpages_cancel() may need to be called.
 
      end_io_func() will be called in process context if the read is results in
      an error, but it might be called in interrupt context if the read is
@@ -623,6 +629,22 @@ some of the pages being read and some being allocated.  Those pages will have
 been marked appropriately and will need uncaching.
 
 
+CANCELLATION OF UNREAD PAGES
+----------------------------
+
+If one or more pages are passed to fscache_read_or_alloc_pages() but not then
+read from the cache and also not read from the underlying filesystem then
+those pages will need to have any marks and reservations removed.  This can be
+done by calling:
+
+        void fscache_readpages_cancel(struct fscache_cookie *cookie,
+                                      struct list_head *pages);
+
+prior to returning to the caller.  The cookie argument should be as passed to
+fscache_read_or_alloc_pages().  Every page in the pages list will be examined
+and any that have PG_fscache set will be uncached.
+
+
 ==============
 PAGE UNCACHING
 ==============
@@ -690,9 +712,18 @@ written to the cache and for the cache to finish with the page generally.  No
 error is returned.
 
 
-==========================
-INDEX AND DATA FILE UPDATE
-==========================
+===============================
+INDEX AND DATA FILE CONSISTENCY
+===============================
+
+To find out whether auxiliary data for an object is up to data within the
+cache, the following function can be called:
+
+        int fscache_check_consistency(struct fscache_cookie *cookie)
+
+This will call back to the netfs to check whether the auxiliary data associated
+with a cookie is correct.  It returns 0 if it is and -ESTALE if it isn't; it
+may also return -ENOMEM and -ERESTARTSYS.
 
 To request an update of the index data for an index or other object, the
 following function should be called:
@@ -708,6 +739,47 @@ Note that partial updates may happen automatically at other times, such as when
 data blocks are added to a data file object.
 
 
+=================
+COOKIE ENABLEMENT
+=================
+
+Cookies exist in one of two states: enabled and disabled.  If a cookie is
+disabled, it ignores all attempts to acquire child cookies; check, update or
+invalidate its state; allocate, read or write backing pages - though it is
+still possible to uncache pages and relinquish the cookie.
+
+The initial enablement state is set by fscache_acquire_cookie(), but the cookie
+can be enabled or disabled later.  To disable a cookie, call:
+    
+        void fscache_disable_cookie(struct fscache_cookie *cookie,
+                                    bool invalidate);
+    
+If the cookie is not already disabled, this locks the cookie against other
+enable and disable ops, marks the cookie as being disabled, discards or
+invalidates any backing objects and waits for cessation of activity on any
+associated object before unlocking the cookie.
+
+All possible failures are handled internally.  The caller should consider
+calling fscache_uncache_all_inode_pages() afterwards to make sure all page
+markings are cleared up.
+    
+Cookies can be enabled or reenabled with:
+    
+        void fscache_enable_cookie(struct fscache_cookie *cookie,
+                                   bool (*can_enable)(void *data),
+                                   void *data)
+    
+If the cookie is not already enabled, this locks the cookie against other
+enable and disable ops, invokes can_enable() and, if the cookie is not an index
+cookie, will begin the procedure of acquiring backing objects.
+
+The optional can_enable() function is passed the data argument and returns a
+ruling as to whether or not enablement should actually be permitted to begin.
+
+All possible failures are handled internally.  The cookie will only be marked
+as enabled if provisional backing objects are allocated.
+
+
 ===============================
 MISCELLANEOUS COOKIE OPERATIONS
 ===============================
@@ -753,7 +825,7 @@ COOKIE UNREGISTRATION
 To get rid of a cookie, this function should be called.
 
         void fscache_relinquish_cookie(struct fscache_cookie *cookie,
-                                       int retire);
+                                       bool retire);
 
 If retire is non-zero, then the object will be marked for recycling, and all
 copies of it will be removed from all active caches in which it is present.
diff --git a/Documentation/filesystems/cifs.txt b/Documentation/filesystems/cifs.txt
deleted file mode 100644
index 49cc923a93e3..000000000000
--- a/Documentation/filesystems/cifs.txt
+++ /dev/null
@@ -1,51 +0,0 @@
-  This is the client VFS module for the Common Internet File System
-  (CIFS) protocol which is the successor to the Server Message Block 
-  (SMB) protocol, the native file sharing mechanism for most early
-  PC operating systems.  CIFS is fully supported by current network
-  file servers such as Windows 2000, Windows 2003 (including  
-  Windows XP) as well by Samba (which provides excellent CIFS
-  server support for Linux and many other operating systems), so
-  this network filesystem client can mount to a wide variety of
-  servers.  The smbfs module should be used instead of this cifs module
-  for mounting to older SMB servers such as OS/2.  The smbfs and cifs
-  modules can coexist and do not conflict.  The CIFS VFS filesystem
-  module is designed to work well with servers that implement the
-  newer versions (dialects) of the SMB/CIFS protocol such as Samba, 
-  the program written by Andrew Tridgell that turns any Unix host 
-  into a SMB/CIFS file server.
-
-  The intent of this module is to provide the most advanced network
-  file system function for CIFS compliant servers, including better
-  POSIX compliance, secure per-user session establishment, high
-  performance safe distributed caching (oplock), optional packet
-  signing, large files, Unicode support and other internationalization
-  improvements. Since both Samba server and this filesystem client support
-  the CIFS Unix extensions, the combination can provide a reasonable 
-  alternative to NFSv4 for fileserving in some Linux to Linux environments,
-  not just in Linux to Windows environments.
-
-  This filesystem has an optional mount utility (mount.cifs) that can
-  be obtained from the project page and installed in the path in the same
-  directory with the other mount helpers (such as mount.smbfs). 
-  Mounting using the cifs filesystem without installing the mount helper
-  requires specifying the server's ip address.
-
-  For Linux 2.4:
-    mount //anything/here /mnt_target -o
-            user=username,pass=password,unc=//ip_address_of_server/sharename
-
-  For Linux 2.5: 
-    mount //ip_address_of_server/sharename /mnt_target -o user=username, pass=password
-
-
-  For more information on the module see the project page at
-
-      http://us1.samba.org/samba/Linux_CIFS_client.html 
-
-  For more information on CIFS see:
-
-      http://www.snia.org/tech_activities/CIFS
-
-  or the Samba site:
-     
-      http://www.samba.org
diff --git a/Documentation/filesystems/cifs/AUTHORS b/Documentation/filesystems/cifs/AUTHORS
new file mode 100644
index 000000000000..ca4a67a0bb1e
--- /dev/null
+++ b/Documentation/filesystems/cifs/AUTHORS
@@ -0,0 +1,56 @@
+Original Author
+===============
+Steve French (sfrench@samba.org)
+
+The author wishes to express his appreciation and thanks to:
+Andrew Tridgell (Samba team) for his early suggestions about smb/cifs VFS
+improvements. Thanks to IBM for allowing me time and test resources to pursue
+this project, to Jim McDonough from IBM (and the Samba Team) for his help, to
+the IBM Linux JFS team for explaining many esoteric Linux filesystem features.
+Jeremy Allison of the Samba team has done invaluable work in adding the server
+side of the original CIFS Unix extensions and reviewing and implementing
+portions of the newer CIFS POSIX extensions into the Samba 3 file server. Thank
+Dave Boutcher of IBM Rochester (author of the OS/400 smb/cifs filesystem client)
+for proving years ago that very good smb/cifs clients could be done on Unix-like
+operating systems.  Volker Lendecke, Andrew Tridgell, Urban Widmark, John 
+Newbigin and others for their work on the Linux smbfs module.  Thanks to
+the other members of the Storage Network Industry Association CIFS Technical
+Workgroup for their work specifying this highly complex protocol and finally
+thanks to the Samba team for their technical advice and encouragement.
+
+Patch Contributors
+------------------
+Zwane Mwaikambo
+Andi Kleen
+Amrut Joshi
+Shobhit Dayal
+Sergey Vlasov
+Richard Hughes
+Yury Umanets
+Mark Hamzy (for some of the early cifs IPv6 work)
+Domen Puncer
+Jesper Juhl (in particular for lots of whitespace/formatting cleanup)
+Vince Negri and Dave Stahl (for finding an important caching bug)
+Adrian Bunk (kcalloc cleanups)
+Miklos Szeredi 
+Kazeon team for various fixes especially for 2.4 version.
+Asser Ferno (Change Notify support)
+Shaggy (Dave Kleikamp) for innumerable small fs suggestions and some good cleanup
+Gunter Kukkukk (testing and suggestions for support of old servers)
+Igor Mammedov (DFS support)
+Jeff Layton (many, many fixes, as well as great work on the cifs Kerberos code)
+Scott Lovenberg
+
+Test case and Bug Report contributors
+-------------------------------------
+Thanks to those in the community who have submitted detailed bug reports
+and debug of problems they have found:  Jochen Dolze, David Blaine,
+Rene Scharfe, Martin Josefsson, Alexander Wild, Anthony Liguori,
+Lars Muller, Urban Widmark, Massimiliano Ferrero, Howard Owen,
+Olaf Kirch, Kieron Briggs, Nick Millington and others. Also special
+mention to the Stanford Checker (SWAT) which pointed out many minor
+bugs in error paths.  Valuable suggestions also have come from Al Viro
+and Dave Miller.
+
+And thanks to the IBM LTC and Power test teams and SuSE testers for
+finding multiple bugs during excellent stress test runs.
diff --git a/Documentation/filesystems/cifs/CHANGES b/Documentation/filesystems/cifs/CHANGES
new file mode 100644
index 000000000000..bc0025cdd1c9
--- /dev/null
+++ b/Documentation/filesystems/cifs/CHANGES
@@ -0,0 +1,1065 @@
+Version 1.62
+------------
+Add sockopt=TCP_NODELAY mount option. EA (xattr) routines hardened
+to more strictly handle corrupt frames.
+
+Version 1.61
+------------
+Fix append problem to Samba servers (files opened with O_APPEND could
+have duplicated data). Fix oops in cifs_lookup. Workaround problem
+mounting to OS/400 Netserve. Fix oops in cifs_get_tcp_session.
+Disable use of server inode numbers when server only
+partially supports them (e.g. for one server querying inode numbers on
+FindFirst fails but QPathInfo queries works). Fix oops with dfs in 
+cifs_put_smb_ses. Fix mmap to work on directio mounts (needed
+for OpenOffice when on forcedirectio mount e.g.)
+
+Version 1.60
+-------------
+Fix memory leak in reconnect.  Fix oops in DFS mount error path.
+Set s_maxbytes to smaller (the max that vfs can handle) so that
+sendfile will now work over cifs mounts again.  Add noforcegid
+and noforceuid mount parameters. Fix small mem leak when using
+ntlmv2. Fix 2nd mount to same server but with different port to
+be allowed (rather than reusing the 1st port) - only when the
+user explicitly overrides the port on the 2nd mount.
+
+Version 1.59
+------------
+Client uses server inode numbers (which are persistent) rather than
+client generated ones by default (mount option "serverino" turned
+on by default if server supports it).  Add forceuid and forcegid
+mount options (so that when negotiating unix extensions specifying
+which uid mounted does not immediately force the server's reported
+uids to be overridden).  Add support for scope mount parm. Improve
+hard link detection to use same inode for both.  Do not set
+read-only dos attribute on directories (for chmod) since Windows
+explorer special cases this attribute bit for directories for
+a different purpose.
+
+Version 1.58
+------------
+Guard against buffer overruns in various UCS-2 to UTF-8 string conversions
+when the UTF-8 string is composed of unusually long (more than 4 byte) converted
+characters. Add support for mounting root of a share which redirects immediately
+to DFS target. Convert string conversion functions from Unicode to more
+accurately mark string length before allocating memory (which may help the
+rare cases where a UTF-8 string is much larger than the UCS2 string that
+we converted from).  Fix endianness of the vcnum field used during
+session setup to distinguish multiple mounts to same server from different
+userids. Raw NTLMSSP fixed (it requires /proc/fs/cifs/experimental
+flag to be set to 2, and mount must enable krb5 to turn on extended security).
+Performance of file create to Samba improved (posix create on lookup
+removes 1 of 2 network requests sent on file create)
+ 
+Version 1.57
+------------
+Improve support for multiple security contexts to the same server. We
+used to use the same "vcnumber" for all connections which could cause
+the server to treat subsequent connections, especially those that
+are authenticated as guest, as reconnections, invalidating the earlier
+user's smb session.  This fix allows cifs to mount multiple times to the
+same server with different userids without risking invalidating earlier
+established security contexts.  fsync now sends SMB Flush operation
+to better ensure that we wait for server to write all of the data to
+server disk (not just write it over the network).  Add new mount
+parameter to allow user to disable sending the (slow) SMB flush on
+fsync if desired (fsync still flushes all cached write data to the server).
+Posix file open support added (turned off after one attempt if server
+fails to support it properly, as with Samba server versions prior to 3.3.2)
+Fix "redzone overwritten" bug in cifs_put_tcon (CIFSTcon may allocate too
+little memory for the "nativeFileSystem" field returned by the server
+during mount).  Endian convert inode numbers if necessary (makes it easier
+to compare inode numbers on network files from big endian systems). 
+
+Version 1.56
+------------
+Add "forcemandatorylock" mount option to allow user to use mandatory
+rather than posix (advisory) byte range locks, even though server would
+support posix byte range locks.  Fix query of root inode when prefixpath
+specified and user does not have access to query information about the
+top of the share.  Fix problem in 2.6.28 resolving DFS paths to
+Samba servers (worked to Windows).  Fix rmdir so that pending search
+(readdir) requests do not get invalid results which include the now
+removed directory.  Fix oops in cifs_dfs_ref.c when prefixpath is not reachable
+when using DFS.  Add better file create support to servers which support
+the CIFS POSIX protocol extensions (this adds support for new flags
+on create, and improves semantics for write of locked ranges).
+
+Version 1.55
+------------
+Various fixes to make delete of open files behavior more predictable
+(when delete of an open file fails we mark the file as "delete-on-close"
+in a way that more servers accept, but only if we can first rename the
+file to a temporary name).  Add experimental support for more safely
+handling fcntl(F_SETLEASE).  Convert cifs to using blocking tcp
+sends, and also let tcp autotune the socket send and receive buffers.
+This reduces the number of EAGAIN errors returned by TCP/IP in
+high stress workloads (and the number of retries on socket writes
+when sending large SMBWriteX requests).  Fix case in which a portion of
+data can in some cases not get written to the file on the server before the
+file is closed.  Fix DFS parsing to properly handle path consumed field,
+and to handle certain codepage conversions better.  Fix mount and
+umount race that can cause oops in mount or umount or reconnect.
+
+Version 1.54
+------------
+Fix premature write failure on congested networks (we would give up
+on EAGAIN from the socket too quickly on large writes).
+Cifs_mkdir and cifs_create now respect the setgid bit on parent dir.
+Fix endian problems in acl (mode from/to cifs acl) on bigendian
+architectures.  Fix problems with preserving timestamps on copying open
+files (e.g. "cp -a") to Windows servers.  For mkdir and create honor setgid bit
+on parent directory when server supports Unix Extensions but not POSIX
+create. Update cifs.upcall version to handle new Kerberos sec flags
+(this requires update of cifs.upcall program from Samba).  Fix memory leak
+on dns_upcall (resolving DFS referralls).  Fix plain text password
+authentication (requires setting SecurityFlags to 0x30030 to enable
+lanman and plain text though).  Fix writes to be at correct offset when
+file is open with O_APPEND and file is on a directio (forcediretio) mount.
+Fix bug in rewinding readdir directory searches.  Add nodfs mount option.
+
+Version 1.53
+------------
+DFS support added (Microsoft Distributed File System client support needed
+for referrals which enable a hierarchical name space among servers).
+Disable temporary caching of mode bits to servers which do not support
+storing of mode (e.g. Windows servers, when client mounts without cifsacl
+mount option) and add new "dynperm" mount option to enable temporary caching
+of mode (enable old behavior).  Fix hang on mount caused when server crashes
+tcp session during negotiate protocol.
+
+Version 1.52
+------------
+Fix oops on second mount to server when null auth is used.
+Enable experimental Kerberos support.  Return writebehind errors on flush
+and sync so that events like out of disk space get reported properly on
+cached files. Fix setxattr failure to certain Samba versions. Fix mount
+of second share to disconnected server session (autoreconnect on this).
+Add ability to modify cifs acls for handling chmod (when mounted with
+cifsacl flag). Fix prefixpath path separator so we can handle mounts
+with prefixpaths longer than one directory (one path component) when
+mounted to Windows servers.  Fix slow file open when cifsacl
+enabled. Fix memory leak in FindNext when the SMB call returns -EBADF.
+
+
+Version 1.51
+------------
+Fix memory leak in statfs when mounted to very old servers (e.g.
+Windows 9x).  Add new feature "POSIX open" which allows servers
+which support the current POSIX Extensions to provide better semantics
+(e.g. delete for open files opened with posix open).  Take into
+account umask on posix mkdir not just older style mkdir.  Add
+ability to mount to IPC$ share (which allows CIFS named pipes to be
+opened, read and written as if they were files).  When 1st tree
+connect fails (e.g. due to signing negotiation failure) fix
+leak that causes cifsd not to stop and rmmod to fail to cleanup
+cifs_request_buffers pool. Fix problem with POSIX Open/Mkdir on
+bigendian architectures. Fix possible memory corruption when
+EAGAIN returned on kern_recvmsg. Return better error if server
+requires packet signing but client has disabled it. When mounted
+with cifsacl mount option - mode bits are approximated based
+on the contents of the ACL of the file or directory. When cifs
+mount helper is missing convert make sure that UNC name 
+has backslash (not forward slash) between ip address of server
+and the share name.
+
+Version 1.50
+------------
+Fix NTLMv2 signing. NFS server mounted over cifs works (if cifs mount is
+done with "serverino" mount option).  Add support for POSIX Unlink
+(helps with certain sharing violation cases when server such as
+Samba supports newer POSIX CIFS Protocol Extensions). Add "nounix"
+mount option to allow disabling the CIFS Unix Extensions for just
+that mount. Fix hang on spinlock in find_writable_file (race when
+reopening file after session crash).  Byte range unlock request to
+windows server could unlock more bytes (on server copy of file)
+than intended if start of unlock request is well before start of
+a previous byte range lock that we issued.
+
+Version 1.49
+------------
+IPv6 support.  Enable ipv6 addresses to be passed on mount (put the ipv6
+address after the "ip=" mount option, at least until mount.cifs is fixed to
+handle DNS host to ipv6 name translation).  Accept override of uid or gid
+on mount even when Unix Extensions are negotiated (it used to be ignored
+when Unix Extensions were ignored).  This allows users to override the
+default uid and gid for files when they are certain that the uids or
+gids on the server do not match those of the client.  Make "sec=none"
+mount override username (so that null user connection is attempted)
+to match what documentation said. Support for very large reads, over 127K,
+available to some newer servers (such as Samba 3.0.26 and later but
+note that it also requires setting CIFSMaxBufSize at module install
+time to a larger value which may hurt performance in some cases).
+Make sign option force signing (or fail if server does not support it).
+
+Version 1.48
+------------
+Fix mtime bouncing around from local idea of last write times to remote time.
+Fix hang (in i_size_read) when simultaneous size update of same remote file
+on smp system corrupts sequence number. Do not reread unnecessarily partial page
+(which we are about to overwrite anyway) when writing out file opened rw.
+When DOS attribute of file on non-Unix server's file changes on the server side
+from read-only back to read-write, reflect this change in default file mode
+(we had been leaving a file's mode read-only until the inode were reloaded).
+Allow setting of attribute back to ATTR_NORMAL (removing readonly dos attribute
+when archive dos attribute not set and we are changing mode back to writeable
+on server which does not support the Unix Extensions).  Remove read only dos
+attribute on chmod when adding any write permission (ie on any of
+user/group/other (not all of user/group/other ie  0222) when
+mounted to windows.  Add support for POSIX MkDir (slight performance
+enhancement and eliminates the network race between the mkdir and set 
+path info of the mode).
+
+
+Version 1.47
+------------
+Fix oops in list_del during mount caused by unaligned string.
+Fix file corruption which could occur on some large file
+copies caused by writepages page i/o completion bug.
+Seek to SEEK_END forces check for update of file size for non-cached
+files. Allow file size to be updated on remote extend of locally open,
+non-cached file.  Fix reconnect to newer Samba servers (or other servers
+which support the CIFS Unix/POSIX extensions) so that we again tell the
+server the Unix/POSIX cifs capabilities which we support (SetFSInfo).
+Add experimental support for new POSIX Open/Mkdir (which returns
+stat information on the open, and allows setting the mode).
+
+Version 1.46
+------------
+Support deep tree mounts.  Better support OS/2, Win9x (DOS) time stamps.
+Allow null user to be specified on mount ("username="). Do not return
+EINVAL on readdir when filldir fails due to overwritten blocksize
+(fixes FC problem).  Return error in rename 2nd attempt retry (ie report
+if rename by handle also fails, after rename by path fails, we were
+not reporting whether the retry worked or not). Fix NTLMv2 to
+work to Windows servers (mount with option "sec=ntlmv2").
+
+Version 1.45
+------------
+Do not time out lockw calls when using posix extensions. Do not
+time out requests if server still responding reasonably fast
+on requests on other threads.  Improve POSIX locking emulation,
+(lock cancel now works, and unlock of merged range works even
+to Windows servers now).  Fix oops on mount to lanman servers
+(win9x, os/2 etc.) when null password.  Do not send listxattr
+(SMB to query all EAs) if nouser_xattr specified.  Fix SE Linux
+problem (instantiate inodes/dentries in right order for readdir).
+
+Version 1.44
+------------
+Rewritten sessionsetup support, including support for legacy SMB
+session setup needed for OS/2 and older servers such as Windows 95 and 98.
+Fix oops on ls to OS/2 servers.  Add support for level 1 FindFirst
+so we can do search (ls etc.) to OS/2.  Do not send NTCreateX
+or recent levels of FindFirst unless server says it supports NT SMBs
+(instead use legacy equivalents from LANMAN dialect). Fix to allow
+NTLMv2 authentication support (now can use stronger password hashing
+on mount if corresponding /proc/fs/cifs/SecurityFlags is set (0x4004).
+Allow override of global cifs security flags on mount via "sec=" option(s).
+
+Version 1.43
+------------
+POSIX locking to servers which support CIFS POSIX Extensions
+(disabled by default controlled by proc/fs/cifs/Experimental).
+Handle conversion of long share names (especially Asian languages)
+to Unicode during mount. Fix memory leak in sess struct on reconnect.
+Fix rare oops after acpi suspend.  Fix O_TRUNC opens to overwrite on
+cifs open which helps rare case when setpathinfo fails or server does
+not support it. 
+
+Version 1.42
+------------
+Fix slow oplock break when mounted to different servers at the same time and
+the tids match and we try to find matching fid on wrong server. Fix read
+looping when signing required by server (2.6.16 kernel only). Fix readdir
+vs. rename race which could cause each to hang. Return . and .. even
+if server does not.  Allow searches to skip first three entries and
+begin at any location. Fix oops in find_writeable_file.
+
+Version 1.41
+------------
+Fix NTLMv2 security (can be enabled in /proc/fs/cifs) so customers can
+configure stronger authentication.  Fix sfu symlinks so they can
+be followed (not just recognized).  Fix wraparound of bcc on
+read responses when buffer size over 64K and also fix wrap of
+max smb buffer size when CIFSMaxBufSize over 64K.  Fix oops in
+cifs_user_read and cifs_readpages (when EAGAIN on send of smb
+on socket is returned over and over).  Add POSIX (advisory) byte range
+locking support (requires server with newest CIFS UNIX Extensions
+to the protocol implemented). Slow down negprot slightly in port 139
+RFC1001 case to give session_init time on buggy servers.
+
+Version 1.40
+------------
+Use fsuid (fsgid) more consistently instead of uid (gid). Improve performance
+of readpages by eliminating one extra memcpy. Allow update of file size
+from remote server even if file is open for write as long as mount is
+directio.  Recognize share mode security and send NTLM encrypted password
+on tree connect if share mode negotiated.
+
+Version 1.39
+------------
+Defer close of a file handle slightly if pending writes depend on that handle
+(this reduces the EBADF bad file handle errors that can be logged under heavy
+stress on writes). Modify cifs Kconfig options to expose CONFIG_CIFS_STATS2 
+Fix SFU style symlinks and mknod needed for servers which do not support the
+CIFS Unix Extensions.  Fix setfacl/getfacl on bigendian. Timeout negative
+dentries so files that the client sees as deleted but that later get created
+on the server will be recognized.  Add client side permission check on setattr.
+Timeout stuck requests better (where server has never responded or sent corrupt
+responses)
+
+Version 1.38
+------------
+Fix tcp socket retransmission timeouts (e.g. on ENOSPACE from the socket)
+to be smaller at first (but increasing) so large write performance performance
+over GigE is better.  Do not hang thread on illegal byte range lock response
+from Windows (Windows can send an RFC1001 size which does not match smb size) by
+allowing an SMBs TCP length to be up to a few bytes longer than it should be.
+wsize and rsize can now be larger than negotiated buffer size if server
+supports large readx/writex, even when directio mount flag not specified.
+Write size will in many cases now be 16K instead of 4K which greatly helps
+file copy performance on lightly loaded networks.  Fix oops in dnotify
+when experimental config flag enabled. Make cifsFYI more granular.
+
+Version 1.37
+------------
+Fix readdir caching when unlink removes file in current search buffer,
+and this is followed by a rewind search to just before the deleted entry.
+Do not attempt to set ctime unless atime and/or mtime change requested
+(most servers throw it away anyway). Fix length check of received smbs
+to be more accurate. Fix big endian problem with mapchars mount option,
+and with a field returned by statfs.
+
+Version 1.36
+------------
+Add support for mounting to older pre-CIFS servers such as Windows9x and ME.
+For these older servers, add option for passing netbios name of server in
+on mount (servernetbiosname).  Add suspend support for power management, to
+avoid cifsd thread preventing software suspend from working.
+Add mount option for disabling the default behavior of sending byte range lock
+requests to the server (necessary for certain applications which break with
+mandatory lock behavior such as Evolution), and also mount option for
+requesting case insensitive matching for path based requests (requesting
+case sensitive is the default).
+
+Version 1.35
+------------
+Add writepage performance improvements.  Fix path name conversions
+for long filenames on mounts which were done with "mapchars" mount option
+specified.  Ensure multiplex ids do not collide.  Fix case in which 
+rmmod can oops if done soon after last unmount.  Fix truncated
+search (readdir) output when resume filename was a long filename.
+Fix filename conversion when mapchars mount option was specified and
+filename was a long filename.
+
+Version 1.34
+------------
+Fix error mapping of the TOO_MANY_LINKS (hardlinks) case.
+Do not oops if root user kills cifs oplock kernel thread or
+kills the cifsd thread (NB: killing the cifs kernel threads is not
+recommended, unmount and rmmod cifs will kill them when they are
+no longer needed).  Fix readdir to ASCII servers (ie older servers
+which do not support Unicode) and also require asterisk.
+Fix out of memory case in which data could be written one page
+off in the page cache.
+
+Version 1.33
+------------
+Fix caching problem, in which readdir of directory containing a file
+which was cached could cause the file's time stamp to be updated
+without invalidating the readahead data (so we could get stale
+file data on the client for that file even as the server copy changed).
+Cleanup response processing so cifsd can not loop when abnormally
+terminated.
+
+
+Version 1.32
+------------
+Fix oops in ls when Transact2 FindFirst (or FindNext) returns more than one
+transact response for an SMB request and search entry split across two frames.
+Add support for lsattr (getting ext2/ext3/reiserfs attr flags from the server)
+as new protocol extensions. Do not send Get/Set calls for POSIX ACLs
+unless server explicitly claims to support them in CIFS Unix extensions
+POSIX ACL capability bit. Fix packet signing when multiuser mounting with
+different users from the same client to the same server. Fix oops in
+cifs_close. Add mount option for remapping reserved characters in
+filenames (also allow recognizing files with created by SFU which have any
+of these seven reserved characters, except backslash, to be recognized).
+Fix invalid transact2 message (we were sometimes trying to interpret
+oplock breaks as SMB responses). Add ioctl for checking that the
+current uid matches the uid of the mounter (needed by umount.cifs).
+Reduce the number of large buffer allocations in cifs response processing
+(significantly reduces memory pressure under heavy stress with multiple
+processes accessing the same server at the same time).
+
+Version 1.31
+------------
+Fix updates of DOS attributes and time fields so that files on NT4 servers
+do not get marked delete on close. Display sizes of cifs buffer pools in
+cifs stats. Fix oops in unmount when cifsd thread being killed by 
+shutdown. Add generic readv/writev and aio support. Report inode numbers 
+consistently in readdir and lookup (when serverino mount option is
+specified use the inode number that the server reports - for both lookup
+and readdir, otherwise by default the locally generated inode number is used
+for inodes created in either path since servers are not always able to 
+provide unique inode numbers when exporting multiple volumes from under one
+sharename).
+
+Version 1.30
+------------
+Allow new nouser_xattr mount parm to disable xattr support for user namespace.
+Do not flag user_xattr mount parm in dmesg.  Retry failures setting file time  
+(mostly affects NT4 servers) by retry with handle based network operation. 
+Add new POSIX Query FS Info for returning statfs info more accurately.
+Handle passwords with multiple commas in them.
+
+Version 1.29
+------------
+Fix default mode in sysfs of cifs module parms.  Remove old readdir routine.
+Fix capabilities flags for large readx so as to allow reads larger than 64K.
+
+Version 1.28
+------------
+Add module init parm for large SMB buffer size (to allow it to be changed
+from its default of 16K) which is especially useful for large file copy
+when mounting with the directio mount option. Fix oops after 
+returning from mount when experimental ExtendedSecurity enabled and
+SpnegoNegotiated returning invalid error. Fix case to retry better when 
+peek returns from 1 to 3 bytes on socket which should have more data.
+Fixed path based calls (such as cifs lookup) to handle path names
+longer than 530 (now can handle PATH_MAX). Fix pass through authentication
+from Samba server to DC (Samba required dummy LM password).
+
+Version 1.27
+------------
+Turn off DNOTIFY (directory change notification support) by default
+(unless built with the experimental flag) to fix hang with KDE
+file browser. Fix DNOTIFY flag mappings.  Fix hang (in wait_event
+waiting on an SMB response) in SendReceive when session dies but
+reconnects quickly from another task.  Add module init  parms for
+minimum number of large and small network buffers in the buffer pools,
+and for the maximum number of simultaneous requests.
+
+Version 1.26
+------------
+Add setfacl support to allow setting of ACLs remotely to Samba 3.10 and later
+and other POSIX CIFS compliant servers.  Fix error mapping for getfacl 
+to EOPNOTSUPP when server does not support posix acls on the wire. Fix 
+improperly zeroed buffer in CIFS Unix extensions set times call. 
+
+Version 1.25
+------------
+Fix internationalization problem in cifs readdir with filenames that map to 
+longer UTF-8 strings than the string on the wire was in Unicode.  Add workaround
+for readdir to netapp servers. Fix search rewind (seek into readdir to return 
+non-consecutive entries).  Do not do readdir when server negotiates 
+buffer size to small to fit filename. Add support for reading POSIX ACLs from
+the server (add also acl and noacl mount options).
+
+Version 1.24
+------------
+Optionally allow using server side inode numbers, rather than client generated
+ones by specifying mount option "serverino" - this is required for some apps
+to work which double check hardlinked files and have persistent inode numbers.
+
+Version 1.23
+------------
+Multiple bigendian fixes. On little endian systems (for reconnect after
+network failure) fix tcp session reconnect code so we do not try first
+to reconnect on reverse of port 445. Treat reparse points (NTFS junctions)
+as directories rather than symlinks because we can do follow link on them.
+
+Version 1.22
+------------
+Add config option to enable XATTR (extended attribute) support, mapping
+xattr names in the "user." namespace space to SMB/CIFS EAs. Lots of
+minor fixes pointed out by the Stanford SWAT checker (mostly missing
+or out of order NULL pointer checks in little used error paths).
+
+Version 1.21
+------------
+Add new mount parm to control whether mode check (generic_permission) is done
+on the client.  If Unix extensions are enabled and the uids on the client
+and server do not match, client permission checks are meaningless on
+server uids that do not exist on the client (this does not affect the
+normal ACL check which occurs on the server).  Fix default uid
+on mknod to match create and mkdir. Add optional mount parm to allow
+override of the default uid behavior (in which the server sets the uid
+and gid of newly created files). Normally for network filesystem mounts
+user want the server to set the uid/gid on newly created files (rather than 
+using uid of the client processes you would in a local filesystem).
+
+Version 1.20
+------------
+Make transaction counts more consistent. Merge /proc/fs/cifs/SimultaneousOps
+info into /proc/fs/cifs/DebugData.  Fix oops in rare oops in readdir 
+(in build_wildcard_path_from_dentry).  Fix mknod to pass type field
+(block/char/fifo) properly.  Remove spurious mount warning log entry when
+credentials passed as mount argument. Set major/minor device number in
+inode for block and char devices when unix extensions enabled.
+
+Version 1.19
+------------
+Fix /proc/fs/cifs/Stats and DebugData display to handle larger
+amounts of return data. Properly limit requests to MAX_REQ (50
+is the usual maximum active multiplex SMB/CIFS requests per server).
+Do not kill cifsd (and thus hurt the other SMB session) when more than one
+session to the same server (but with different userids) exists and one
+of the two user's smb sessions is being removed while leaving the other.
+Do not loop reconnecting in cifsd demultiplex thread when admin
+kills the thread without going through unmount.
+
+Version 1.18
+------------
+Do not rename hardlinked files (since that should be a noop). Flush
+cached write behind data when reopening a file after session abend,
+except when already in write. Grab per socket sem during reconnect 
+to avoid oops in sendmsg if overlapping with reconnect. Do not
+reset cached inode file size on readdir for files open for write on 
+client.
+
+
+Version 1.17
+------------
+Update number of blocks in file so du command is happier (in Linux a fake
+blocksize of 512 is required for calculating number of blocks in inode).
+Fix prepare write of partial pages to read in data from server if possible.
+Fix race on tcpStatus field between unmount and reconnection code, causing
+cifsd process sometimes to hang around forever. Improve out of memory
+checks in cifs_filldir
+
+Version 1.16
+------------
+Fix incorrect file size in file handle based setattr on big endian hardware.
+Fix oops in build_path_from_dentry when out of memory.  Add checks for invalid
+and closing file structs in writepage/partialpagewrite.  Add statistics
+for each mounted share (new menuconfig option). Fix endianness problem in
+volume information displayed in /proc/fs/cifs/DebugData (only affects
+affects big endian architectures). Prevent renames while constructing
+path names for open, mkdir and rmdir.
+
+Version 1.15
+------------
+Change to mempools for alloc smb request buffers and multiplex structs
+to better handle low memory problems (and potential deadlocks).
+
+Version 1.14
+------------
+Fix incomplete listings of large directories on Samba servers when Unix
+extensions enabled.  Fix oops when smb_buffer can not be allocated. Fix
+rename deadlock when writing out dirty pages at same time.
+
+Version 1.13
+------------
+Fix open of files in which O_CREATE can cause the mode to change in
+some cases. Fix case in which retry of write overlaps file close.
+Fix PPC64 build error.  Reduce excessive stack usage in smb password
+hashing. Fix overwrite of Linux user's view of file mode to Windows servers.
+
+Version 1.12
+------------
+Fixes for large file copy, signal handling, socket retry, buffer
+allocation and low memory situations.
+
+Version 1.11
+------------
+Better port 139 support to Windows servers (RFC1001/RFC1002 Session_Initialize)
+also now allowing support for specifying client netbiosname.  NT4 support added.
+
+Version 1.10
+------------
+Fix reconnection (and certain failed mounts) to properly wake up the
+blocked users thread so it does not seem hung (in some cases was blocked
+until the cifs receive timeout expired). Fix spurious error logging
+to kernel log when application with open network files killed. 
+
+Version 1.09
+------------
+Fix /proc/fs module unload warning message (that could be logged
+to the kernel log). Fix intermittent failure in connectathon
+test7 (hardlink count not immediately refreshed in case in which
+inode metadata can be incorrectly kept cached when time near zero)
+
+Version 1.08
+------------
+Allow file_mode and dir_mode (specified at mount time) to be enforced
+locally (the server already enforced its own ACLs too) for servers
+that do not report the correct mode (do not support the 
+CIFS Unix Extensions).
+
+Version 1.07
+------------
+Fix some small memory leaks in some unmount error paths. Fix major leak
+of cache pages in readpages causing multiple read oriented stress
+testcases (including fsx, and even large file copy) to fail over time. 
+
+Version 1.06
+------------
+Send NTCreateX with ATTR_POSIX if Linux/Unix extensions negotiated with server.
+This allows files that differ only in case and improves performance of file
+creation and file open to such servers.  Fix semaphore conflict which causes 
+slow delete of open file to Samba (which unfortunately can cause an oplock
+break to self while vfs_unlink held i_sem) which can hang for 20 seconds.
+
+Version 1.05
+------------
+fixes to cifs_readpages for fsx test case
+
+Version 1.04
+------------
+Fix caching data integrity bug when extending file size especially when no
+oplock on file.  Fix spurious logging of valid already parsed mount options
+that are parsed outside of the cifs vfs such as nosuid.
+
+
+Version 1.03
+------------
+Connect to server when port number override not specified, and tcp port
+unitialized.  Reset search to restart at correct file when kernel routine
+filldir returns error during large directory searches (readdir). 
+
+Version 1.02
+------------
+Fix caching problem when files opened by multiple clients in which 
+page cache could contain stale data, and write through did
+not occur often enough while file was still open when read ahead
+(read oplock) not allowed.  Treat "sep=" when first mount option
+as an override of comma as the default separator between mount
+options. 
+
+Version 1.01
+------------
+Allow passwords longer than 16 bytes. Allow null password string.
+
+Version 1.00
+------------
+Gracefully clean up failed mounts when attempting to mount to servers such as
+Windows 98 that terminate tcp sessions during protocol negotiation.  Handle
+embedded commas in mount parsing of passwords.
+
+Version 0.99
+------------
+Invalidate local inode cached pages on oplock break and when last file
+instance is closed so that the client does not continue using stale local
+copy rather than later modified server copy of file.  Do not reconnect
+when server drops the tcp session prematurely before negotiate
+protocol response.  Fix oops in reopen_file when dentry freed.  Allow
+the support for CIFS Unix Extensions to be disabled via proc interface.
+
+Version 0.98
+------------
+Fix hang in commit_write during reconnection of open files under heavy load.
+Fix unload_nls oops in a mount failure path. Serialize writes to same socket
+which also fixes any possible races when cifs signatures are enabled in SMBs
+being sent out of signature sequence number order.    
+
+Version 0.97
+------------
+Fix byte range locking bug (endian problem) causing bad offset and
+length.
+
+Version 0.96
+------------
+Fix oops (in send_sig) caused by CIFS unmount code trying to
+wake up the demultiplex thread after it had exited. Do not log
+error on harmless oplock release of closed handle.
+
+Version 0.95
+------------
+Fix unsafe global variable usage and password hash failure on gcc 3.3.1
+Fix problem reconnecting secondary mounts to same server after session 
+failure.  Fix invalid dentry - race in mkdir when directory gets created
+by another client between the lookup and mkdir.
+ 
+Version 0.94
+------------
+Fix to list processing in reopen_files. Fix reconnection when server hung
+but tcpip session still alive.  Set proper timeout on socket read.
+
+Version 0.93
+------------
+Add missing mount options including iocharset.  SMP fixes in write and open. 
+Fix errors in reconnecting after TCP session failure.  Fix module unloading
+of default nls codepage
+
+Version 0.92
+------------
+Active smb transactions should never go negative (fix double FreeXid). Fix
+list processing in file routines. Check return code on kmalloc in open.
+Fix spinlock usage for SMP.
+
+Version 0.91
+------------
+Fix oops in reopen_files when invalid dentry. drop dentry on server rename 
+and on revalidate errors. Fix cases where pid is now tgid.  Fix return code
+on create hard link when server does not support them. 
+
+Version 0.90
+------------
+Fix scheduling while atomic error in getting inode info on newly created file. 
+Fix truncate of existing files opened with O_CREAT but not O_TRUNC set.
+
+Version 0.89
+------------
+Fix oops on write to dead tcp session. Remove error log write for case when file open
+O_CREAT but not O_EXCL
+
+Version 0.88
+------------
+Fix non-POSIX behavior on rename of open file and delete of open file by taking 
+advantage of trans2 SetFileInfo rename facility if available on target server.
+Retry on ENOSPC and EAGAIN socket errors.
+
+Version 0.87
+------------
+Fix oops on big endian readdir.  Set blksize to be even power of two (2**blkbits) to fix
+allocation size miscalculation. After oplock token lost do not read through
+cache. 
+
+Version 0.86
+------------
+Fix oops on empty file readahead.  Fix for file size handling for locally cached files.
+
+Version 0.85
+------------
+Fix oops in mkdir when server fails to return inode info. Fix oops in reopen_files
+during auto reconnection to server after server recovered from failure.
+
+Version 0.84
+------------
+Finish support for Linux 2.5 open/create changes, which removes the
+redundant NTCreate/QPathInfo/close that was sent during file create.
+Enable oplock by default. Enable packet signing by default (needed to 
+access many recent Windows servers)
+
+Version 0.83
+------------
+Fix oops when mounting to long server names caused by inverted parms to kmalloc.
+Fix MultiuserMount (/proc/fs/cifs configuration setting) so that when enabled
+we will choose a cifs user session (smb uid) that better matches the local
+uid if a) the mount uid does not match the current uid and b) we have another
+session to the same server (ip address) for a different mount which
+matches the current local uid.
+
+Version 0.82
+------------
+Add support for mknod of block or character devices.  Fix oplock
+code (distributed caching) to properly send response to oplock
+break from server.
+
+Version 0.81
+------------
+Finish up CIFS packet digital signing for the default
+NTLM security case. This should help Windows 2003
+network interoperability since it is common for
+packet signing to be required now. Fix statfs (stat -f)
+which recently started returning errors due to 
+invalid value (-1 instead of 0) being set in the
+struct kstatfs f_ffiles field.
+
+Version 0.80
+-----------
+Fix oops on stopping oplock thread when removing cifs when
+built as module.
+
+Version 0.79
+------------
+Fix mount options for ro (readonly), uid, gid and file and directory mode. 
+
+Version 0.78
+------------
+Fix errors displayed on failed mounts to be more understandable.
+Fixed various incorrect or misleading smb to posix error code mappings.
+
+Version 0.77
+------------
+Fix display of NTFS DFS junctions to display as symlinks.
+They are the network equivalent.  Fix oops in 
+cifs_partialpagewrite caused by missing spinlock protection
+of openfile linked list.  Allow writebehind caching errors to 
+be returned to the application at file close.
+
+Version 0.76
+------------
+Clean up options displayed in /proc/mounts by show_options to
+be more consistent with other filesystems.
+
+Version 0.75
+------------
+Fix delete of readonly file to Windows servers.  Reflect
+presence or absence of read only dos attribute in mode
+bits for servers that do not support CIFS Unix extensions.
+Fix shortened results on readdir of large directories to
+servers supporting CIFS Unix extensions (caused by
+incorrect resume key).
+
+Version 0.74
+------------
+Fix truncate bug (set file size) that could cause hangs e.g. running fsx
+
+Version 0.73
+------------
+unload nls if mount fails.
+
+Version 0.72
+------------
+Add resume key support to search (readdir) code to workaround
+Windows bug.  Add /proc/fs/cifs/LookupCacheEnable which
+allows disabling caching of attribute information for
+lookups.
+
+Version 0.71
+------------
+Add more oplock handling (distributed caching code).  Remove
+dead code.  Remove excessive stack space utilization from
+symlink routines.
+
+Version 0.70
+------------
+Fix oops in get dfs referral (triggered when null path sent in to
+mount).  Add support for overriding rsize at mount time.
+
+Version 0.69
+------------
+Fix buffer overrun in readdir which caused intermittent kernel oopses.
+Fix writepage code to release kmap on write data.  Allow "-ip=" new 
+mount option to be passed in on parameter distinct from the first part
+(server name portion of) the UNC name.  Allow override of the
+tcp port of the target server via new mount option "-port="  
+
+Version 0.68
+------------
+Fix search handle leak on rewind.  Fix setuid and gid so that they are 
+reflected in the local inode immediately.  Cleanup of whitespace
+to make 2.4 and 2.5 versions more consistent.
+
+
+Version 0.67
+------------
+Fix signal sending so that captive thread (cifsd) exits on umount 
+(which was causing the warning in kmem_cache_free of the request buffers
+at rmmod time).  This had broken as a sideeffect of the recent global
+kernel change to daemonize.  Fix memory leak in readdir code which
+showed up in "ls -R" (and applications that did search rewinding).
+
+Version 0.66
+------------
+Reconnect tids and fids after session reconnection (still do not
+reconnect byte range locks though).  Fix problem caching
+lookup information for directory inodes, improving performance,
+especially in deep directory trees.  Fix various build warnings.
+
+Version 0.65
+------------
+Finish fixes to commit write for caching/readahead consistency.  fsx 
+now works to Samba servers.  Fix oops caused when readahead
+was interrupted by a signal.
+
+Version 0.64
+------------
+Fix data corruption (in partial page after truncate) that caused fsx to
+fail to Windows servers.  Cleaned up some extraneous error logging in
+common error paths.  Add generic sendfile support.
+
+Version 0.63
+------------
+Fix memory leak in AllocMidQEntry.
+Finish reconnection logic, so connection with server can be dropped
+(or server rebooted) and the cifs client will reconnect.  
+
+Version 0.62
+------------
+Fix temporary socket leak when bad userid or password specified 
+(or other SMBSessSetup failure).  Increase maximum buffer size to slightly
+over 16K to allow negotiation of up to Samba and Windows server default read 
+sizes.  Add support for readpages
+
+Version 0.61
+------------
+Fix oops when username not passed in on mount.  Extensive fixes and improvements
+to error logging (strip redundant newlines, change debug macros to ensure newline
+passed in and to be more consistent).  Fix writepage wrong file handle problem,
+a readonly file handle could be incorrectly used to attempt to write out
+file updates through the page cache to multiply open files.  This could cause
+the iozone benchmark to fail on the fwrite test. Fix bug mounting two different
+shares to the same Windows server when using different usernames
+(doing this to Samba servers worked but Windows was rejecting it) - now it is
+possible to use different userids when connecting to the same server from a
+Linux client. Fix oops when treeDisconnect called during unmount on
+previously freed socket.
+
+Version 0.60
+------------
+Fix oops in readpages caused by not setting address space operations in inode in 
+rare code path. 
+
+Version 0.59
+------------
+Includes support for deleting of open files and renaming over existing files (per POSIX
+requirement).  Add readlink support for Windows junction points (directory symlinks).
+
+Version 0.58
+------------
+Changed read and write to go through pagecache. Added additional address space operations.
+Memory mapped operations now working.
+
+Version 0.57
+------------
+Added writepage code for additional memory mapping support.  Fixed leak in xids causing
+the simultaneous operations counter (/proc/fs/cifs/SimultaneousOps) to increase on 
+every stat call.  Additional formatting cleanup. 
+
+Version 0.56
+------------
+Fix bigendian bug in order of time conversion. Merge 2.5 to 2.4 version.  Formatting cleanup.   
+
+Version 0.55
+------------
+Fixes from Zwane Mwaikambo for adding missing return code checking in a few places.
+Also included a modified version of his fix to protect global list manipulation of
+the smb session and tree connection and mid related global variables.
+
+Version 0.54
+------------
+Fix problem with captive thread hanging around at unmount time.  Adjust to 2.5.42-pre
+changes to superblock layout.   Remove wasteful allocation of smb buffers (now the send 
+buffer is reused for responses).  Add more oplock handling. Additional minor cleanup.
+
+Version 0.53
+------------
+More stylistic updates to better match kernel style.  Add additional statistics
+for filesystem which can be viewed via /proc/fs/cifs.  Add more pieces of NTLMv2
+and CIFS Packet Signing enablement.
+
+Version 0.52
+------------
+Replace call to sleep_on with safer wait_on_event.
+Make stylistic changes to better match kernel style recommendations.
+Remove most typedef usage (except for the PDUs themselves).
+
+Version 0.51
+------------
+Update mount so the -unc mount option is no longer required (the ip address can be specified
+in a UNC style device name.   Implementation of readpage/writepage started.
+
+Version 0.50
+------------
+Fix intermittent problem with incorrect smb header checking on badly 
+fragmented tcp responses
+
+Version 0.49
+------------
+Fixes to setting of allocation size and file size.
+
+Version 0.48
+------------
+Various 2.5.38 fixes.  Now works on 2.5.38
+
+Version 0.47
+------------
+Prepare for 2.5 kernel merge.  Remove ifdefs.
+
+Version 0.46
+------------
+Socket buffer management fixes.  Fix dual free.
+
+Version 0.45
+------------
+Various big endian fixes for hardlinks and symlinks and also for dfs.
+
+Version 0.44
+------------
+Various big endian fixes for servers with Unix extensions such as Samba
+
+Version 0.43
+------------
+Various FindNext fixes for incorrect filenames on large directory searches on big endian
+clients.  basic posix file i/o tests now work on big endian machines, not just le
+
+Version 0.42
+------------
+SessionSetup and NegotiateProtocol now work from Big Endian machines.
+Various Big Endian fixes found during testing on the Linux on 390.  Various fixes for compatibility with older
+versions of 2.4 kernel (now builds and works again on kernels at least as early as 2.4.7).
+
+Version 0.41
+------------
+Various minor fixes for Connectathon Posix "basic" file i/o test suite.  Directory caching fixed so hardlinked
+files now return the correct number of links on fstat as they are repeatedly linked and unlinked.
+
+Version 0.40
+------------
+Implemented "Raw" (i.e. not encapsulated in SPNEGO) NTLMSSP (i.e. the Security Provider Interface used to negotiate
+session advanced session authentication).  Raw NTLMSSP is preferred by Windows 2000 Professional and Windows XP.
+Began implementing support for SPNEGO encapsulation of NTLMSSP based session authentication blobs
+(which is the mechanism preferred by Windows 2000 server in the absence of Kerberos).
+
+Version 0.38
+------------
+Introduced optional mount helper utility mount.cifs and made coreq changes to cifs vfs to enable
+it. Fixed a few bugs in the DFS code (e.g. bcc two bytes too short and incorrect uid in PDU).
+
+Version 0.37
+------------
+Rewrote much of connection and mount/unmount logic to handle bugs with
+multiple uses to same share, multiple users to same server etc.
+
+Version 0.36
+------------
+Fixed major problem with dentry corruption (missing call to dput)
+
+Version 0.35
+------------
+Rewrite of readdir code to fix bug. Various fixes for bigendian machines.
+Begin adding oplock support.  Multiusermount and oplockEnabled flags added to /proc/fs/cifs
+although corresponding function not fully implemented in the vfs yet
+
+Version 0.34
+------------
+Fixed dentry caching bug, misc. cleanup 
+
+Version 0.33
+------------
+Fixed 2.5 support to handle build and configure changes as well as misc. 2.5 changes.  Now can build
+on current 2.5 beta version (2.5.24) of the Linux kernel as well as on 2.4 Linux kernels.
+Support for STATUS codes (newer 32 bit NT error codes) added.  DFS support begun to be added.
+
+Version 0.32
+------------
+Unix extensions (symlink, readlink, hardlink, chmod and some chgrp and chown) implemented
+and tested against Samba 2.2.5
+
+
+Version 0.31
+------------
+1) Fixed lockrange to be correct (it was one byte too short)
+
+2) Fixed GETLK (i.e. the fcntl call to test a range of bytes in a file to see if locked) to correctly 
+show range as locked when there is a conflict with an existing lock.
+
+3) default file perms are now 2767 (indicating support for mandatory locks) instead of 777 for directories
+in most cases.  Eventually will offer optional ability to query server for the correct perms.
+
+3) Fixed eventual trap when mounting twice to different shares on the same server when the first succeeded 
+but the second one was invalid and failed (the second one was incorrectly disconnecting the tcp and smb
+session) 
+
+4) Fixed error logging of valid mount options
+
+5) Removed logging of password field.
+
+6) Moved negotiate, treeDisconnect and uloggoffX (only tConx and SessSetup remain in connect.c) to cifssmb.c
+and cleaned them up and made them more consistent with other cifs functions. 
+
+7) Server support for Unix extensions is now fully detected and FindFirst is implemented both ways 
+(with or without Unix extensions) but FindNext and QueryPathInfo with the Unix extensions are not completed,
+nor is the symlink support using the Unix extensions
+
+8) Started adding the readlink and follow_link code 
+
+Version 0.3 
+-----------
+Initial drop
+
diff --git a/Documentation/filesystems/cifs/README b/Documentation/filesystems/cifs/README
new file mode 100644
index 000000000000..2d5622f60e11
--- /dev/null
+++ b/Documentation/filesystems/cifs/README
@@ -0,0 +1,753 @@
+The CIFS VFS support for Linux supports many advanced network filesystem 
+features such as hierarchical dfs like namespace, hardlinks, locking and more.  
+It was designed to comply with the SNIA CIFS Technical Reference (which 
+supersedes the 1992 X/Open SMB Standard) as well as to perform best practice 
+practical interoperability with Windows 2000, Windows XP, Samba and equivalent 
+servers.  This code was developed in participation with the Protocol Freedom
+Information Foundation.
+
+Please see
+  http://protocolfreedom.org/ and
+  http://samba.org/samba/PFIF/
+for more details.
+
+
+For questions or bug reports please contact:
+    sfrench@samba.org (sfrench@us.ibm.com) 
+
+Build instructions:
+==================
+For Linux 2.4:
+1) Get the kernel source (e.g.from http://www.kernel.org)
+and download the cifs vfs source (see the project page
+at http://us1.samba.org/samba/Linux_CIFS_client.html)
+and change directory into the top of the kernel directory
+then patch the kernel (e.g. "patch -p1 < cifs_24.patch") 
+to add the cifs vfs to your kernel configure options if
+it has not already been added (e.g. current SuSE and UL
+users do not need to apply the cifs_24.patch since the cifs vfs is
+already in the kernel configure menu) and then
+mkdir linux/fs/cifs and then copy the current cifs vfs files from
+the cifs download to your kernel build directory e.g.
+
+        cp <cifs_download_dir>/fs/cifs/* to <kernel_download_dir>/fs/cifs
+        
+2) make menuconfig (or make xconfig)
+3) select cifs from within the network filesystem choices
+4) save and exit
+5) make dep
+6) make modules (or "make" if CIFS VFS not to be built as a module)
+
+For Linux 2.6:
+1) Download the kernel (e.g. from http://www.kernel.org)
+and change directory into the top of the kernel directory tree
+(e.g. /usr/src/linux-2.5.73)
+2) make menuconfig (or make xconfig)
+3) select cifs from within the network filesystem choices
+4) save and exit
+5) make
+
+
+Installation instructions:
+=========================
+If you have built the CIFS vfs as module (successfully) simply
+type "make modules_install" (or if you prefer, manually copy the file to
+the modules directory e.g. /lib/modules/2.4.10-4GB/kernel/fs/cifs/cifs.o).
+
+If you have built the CIFS vfs into the kernel itself, follow the instructions
+for your distribution on how to install a new kernel (usually you
+would simply type "make install").
+
+If you do not have the utility mount.cifs (in the Samba 3.0 source tree and on 
+the CIFS VFS web site) copy it to the same directory in which mount.smbfs and 
+similar files reside (usually /sbin).  Although the helper software is not  
+required, mount.cifs is recommended.  Eventually the Samba 3.0 utility program 
+"net" may also be helpful since it may someday provide easier mount syntax for
+users who are used to Windows e.g.
+        net use <mount point> <UNC name or cifs URL>
+Note that running the Winbind pam/nss module (logon service) on all of your
+Linux clients is useful in mapping Uids and Gids consistently across the
+domain to the proper network user.  The mount.cifs mount helper can be
+trivially built from Samba 3.0 or later source e.g. by executing:
+
+        gcc samba/source/client/mount.cifs.c -o mount.cifs
+
+If cifs is built as a module, then the size and number of network buffers
+and maximum number of simultaneous requests to one server can be configured.
+Changing these from their defaults is not recommended. By executing modinfo
+        modinfo kernel/fs/cifs/cifs.ko
+on kernel/fs/cifs/cifs.ko the list of configuration changes that can be made
+at module initialization time (by running insmod cifs.ko) can be seen.
+
+Allowing User Mounts
+====================
+To permit users to mount and unmount over directories they own is possible
+with the cifs vfs.  A way to enable such mounting is to mark the mount.cifs
+utility as suid (e.g. "chmod +s /sbin/mount.cifs). To enable users to 
+umount shares they mount requires
+1) mount.cifs version 1.4 or later
+2) an entry for the share in /etc/fstab indicating that a user may
+unmount it e.g.
+//server/usersharename  /mnt/username cifs user 0 0
+
+Note that when the mount.cifs utility is run suid (allowing user mounts), 
+in order to reduce risks, the "nosuid" mount flag is passed in on mount to
+disallow execution of an suid program mounted on the remote target.
+When mount is executed as root, nosuid is not passed in by default,
+and execution of suid programs on the remote target would be enabled
+by default. This can be changed, as with nfs and other filesystems, 
+by simply specifying "nosuid" among the mount options. For user mounts 
+though to be able to pass the suid flag to mount requires rebuilding 
+mount.cifs with the following flag: 
+ 
+        gcc samba/source/client/mount.cifs.c -DCIFS_ALLOW_USR_SUID -o mount.cifs
+
+There is a corresponding manual page for cifs mounting in the Samba 3.0 and
+later source tree in docs/manpages/mount.cifs.8 
+
+Allowing User Unmounts
+======================
+To permit users to ummount directories that they have user mounted (see above),
+the utility umount.cifs may be used.  It may be invoked directly, or if 
+umount.cifs is placed in /sbin, umount can invoke the cifs umount helper
+(at least for most versions of the umount utility) for umount of cifs
+mounts, unless umount is invoked with -i (which will avoid invoking a umount
+helper). As with mount.cifs, to enable user unmounts umount.cifs must be marked
+as suid (e.g. "chmod +s /sbin/umount.cifs") or equivalent (some distributions
+allow adding entries to a file to the /etc/permissions file to achieve the
+equivalent suid effect).  For this utility to succeed the target path
+must be a cifs mount, and the uid of the current user must match the uid
+of the user who mounted the resource.
+
+Also note that the customary way of allowing user mounts and unmounts is 
+(instead of using mount.cifs and unmount.cifs as suid) to add a line
+to the file /etc/fstab for each //server/share you wish to mount, but
+this can become unwieldy when potential mount targets include many
+or  unpredictable UNC names.
+
+Samba Considerations 
+==================== 
+To get the maximum benefit from the CIFS VFS, we recommend using a server that 
+supports the SNIA CIFS Unix Extensions standard (e.g.  Samba 2.2.5 or later or 
+Samba 3.0) but the CIFS vfs works fine with a wide variety of CIFS servers.  
+Note that uid, gid and file permissions will display default values if you do 
+not have a server that supports the Unix extensions for CIFS (such as Samba 
+2.2.5 or later).  To enable the Unix CIFS Extensions in the Samba server, add 
+the line: 
+
+        unix extensions = yes
+        
+to your smb.conf file on the server.  Note that the following smb.conf settings 
+are also useful (on the Samba server) when the majority of clients are Unix or 
+Linux: 
+
+        case sensitive = yes
+        delete readonly = yes 
+        ea support = yes
+
+Note that server ea support is required for supporting xattrs from the Linux
+cifs client, and that EA support is present in later versions of Samba (e.g. 
+3.0.6 and later (also EA support works in all versions of Windows, at least to
+shares on NTFS filesystems).  Extended Attribute (xattr) support is an optional
+feature of most Linux filesystems which may require enabling via
+make menuconfig. Client support for extended attributes (user xattr) can be
+disabled on a per-mount basis by specifying "nouser_xattr" on mount.
+
+The CIFS client can get and set POSIX ACLs (getfacl, setfacl) to Samba servers
+version 3.10 and later.  Setting POSIX ACLs requires enabling both XATTR and 
+then POSIX support in the CIFS configuration options when building the cifs
+module.  POSIX ACL support can be disabled on a per mount basic by specifying
+"noacl" on mount.
+ 
+Some administrators may want to change Samba's smb.conf "map archive" and 
+"create mask" parameters from the default.  Unless the create mask is changed
+newly created files can end up with an unnecessarily restrictive default mode,
+which may not be what you want, although if the CIFS Unix extensions are
+enabled on the server and client, subsequent setattr calls (e.g. chmod) can
+fix the mode.  Note that creating special devices (mknod) remotely 
+may require specifying a mkdev function to Samba if you are not using 
+Samba 3.0.6 or later.  For more information on these see the manual pages
+("man smb.conf") on the Samba server system.  Note that the cifs vfs,
+unlike the smbfs vfs, does not read the smb.conf on the client system 
+(the few optional settings are passed in on mount via -o parameters instead).  
+Note that Samba 2.2.7 or later includes a fix that allows the CIFS VFS to delete
+open files (required for strict POSIX compliance).  Windows Servers already 
+supported this feature. Samba server does not allow symlinks that refer to files
+outside of the share, so in Samba versions prior to 3.0.6, most symlinks to
+files with absolute paths (ie beginning with slash) such as:
+         ln -s /mnt/foo bar
+would be forbidden. Samba 3.0.6 server or later includes the ability to create 
+such symlinks safely by converting unsafe symlinks (ie symlinks to server 
+files that are outside of the share) to a samba specific format on the server
+that is ignored by local server applications and non-cifs clients and that will
+not be traversed by the Samba server).  This is opaque to the Linux client
+application using the cifs vfs. Absolute symlinks will work to Samba 3.0.5 or
+later, but only for remote clients using the CIFS Unix extensions, and will
+be invisbile to Windows clients and typically will not affect local
+applications running on the same server as Samba.  
+
+Use instructions:
+================
+Once the CIFS VFS support is built into the kernel or installed as a module 
+(cifs.o), you can use mount syntax like the following to access Samba or Windows 
+servers: 
+
+  mount -t cifs //9.53.216.11/e$ /mnt -o user=myname,pass=mypassword
+
+Before -o the option -v may be specified to make the mount.cifs
+mount helper display the mount steps more verbosely.  
+After -o the following commonly used cifs vfs specific options
+are supported:
+
+  user=<username>
+  pass=<password>
+  domain=<domain name>
+  
+Other cifs mount options are described below.  Use of TCP names (in addition to
+ip addresses) is available if the mount helper (mount.cifs) is installed. If
+you do not trust the server to which are mounted, or if you do not have
+cifs signing enabled (and the physical network is insecure), consider use
+of the standard mount options "noexec" and "nosuid" to reduce the risk of 
+running an altered binary on your local system (downloaded from a hostile server
+or altered by a hostile router).
+
+Although mounting using format corresponding to the CIFS URL specification is
+not possible in mount.cifs yet, it is possible to use an alternate format
+for the server and sharename (which is somewhat similar to NFS style mount
+syntax) instead of the more widely used UNC format (i.e. \\server\share):
+  mount -t cifs tcp_name_of_server:share_name /mnt -o user=myname,pass=mypasswd
+
+When using the mount helper mount.cifs, passwords may be specified via alternate
+mechanisms, instead of specifying it after -o using the normal "pass=" syntax
+on the command line:
+1) By including it in a credential file. Specify credentials=filename as one
+of the mount options. Credential files contain two lines
+        username=someuser
+        password=your_password
+2) By specifying the password in the PASSWD environment variable (similarly
+the user name can be taken from the USER environment variable).
+3) By specifying the password in a file by name via PASSWD_FILE
+4) By specifying the password in a file by file descriptor via PASSWD_FD
+
+If no password is provided, mount.cifs will prompt for password entry
+
+Restrictions
+============
+Servers must support either "pure-TCP" (port 445 TCP/IP CIFS connections) or RFC 
+1001/1002 support for "Netbios-Over-TCP/IP." This is not likely to be a 
+problem as most servers support this.
+
+Valid filenames differ between Windows and Linux.  Windows typically restricts
+filenames which contain certain reserved characters (e.g.the character : 
+which is used to delimit the beginning of a stream name by Windows), while
+Linux allows a slightly wider set of valid characters in filenames. Windows
+servers can remap such characters when an explicit mapping is specified in
+the Server's registry.  Samba starting with version 3.10 will allow such 
+filenames (ie those which contain valid Linux characters, which normally
+would be forbidden for Windows/CIFS semantics) as long as the server is
+configured for Unix Extensions (and the client has not disabled
+/proc/fs/cifs/LinuxExtensionsEnabled).
+  
+
+CIFS VFS Mount Options
+======================
+A partial list of the supported mount options follows:
+  user          The user name to use when trying to establish
+                the CIFS session.
+  password      The user password.  If the mount helper is
+                installed, the user will be prompted for password
+                if not supplied.
+  ip            The ip address of the target server
+  unc           The target server Universal Network Name (export) to 
+                mount.  
+  domain        Set the SMB/CIFS workgroup name prepended to the
+                username during CIFS session establishment
+  forceuid      Set the default uid for inodes to the uid
+                passed in on mount. For mounts to servers
+                which do support the CIFS Unix extensions, such as a
+                properly configured Samba server, the server provides
+                the uid, gid and mode so this parameter should not be
+                specified unless the server and clients uid and gid
+                numbering differ.  If the server and client are in the
+                same domain (e.g. running winbind or nss_ldap) and
+                the server supports the Unix Extensions then the uid
+                and gid can be retrieved from the server (and uid
+                and gid would not have to be specifed on the mount. 
+                For servers which do not support the CIFS Unix
+                extensions, the default uid (and gid) returned on lookup
+                of existing files will be the uid (gid) of the person
+                who executed the mount (root, except when mount.cifs
+                is configured setuid for user mounts) unless the "uid=" 
+                (gid) mount option is specified. Also note that permission
+                checks (authorization checks) on accesses to a file occur
+                at the server, but there are cases in which an administrator
+                may want to restrict at the client as well.  For those
+                servers which do not report a uid/gid owner
+                (such as Windows), permissions can also be checked at the
+                client, and a crude form of client side permission checking 
+                can be enabled by specifying file_mode and dir_mode on 
+                the client.  (default)
+  forcegid      (similar to above but for the groupid instead of uid) (default)
+  noforceuid    Fill in file owner information (uid) by requesting it from
+                the server if possible. With this option, the value given in
+                the uid= option (on mount) will only be used if the server
+                can not support returning uids on inodes.
+  noforcegid    (similar to above but for the group owner, gid, instead of uid)
+  uid           Set the default uid for inodes, and indicate to the
+                cifs kernel driver which local user mounted. If the server
+                supports the unix extensions the default uid is
+                not used to fill in the owner fields of inodes (files)
+                unless the "forceuid" parameter is specified.
+  gid           Set the default gid for inodes (similar to above).
+  file_mode     If CIFS Unix extensions are not supported by the server
+                this overrides the default mode for file inodes.
+  fsc           Enable local disk caching using FS-Cache (off by default). This
+                option could be useful to improve performance on a slow link,
+                heavily loaded server and/or network where reading from the
+                disk is faster than reading from the server (over the network).
+                This could also impact scalability positively as the
+                number of calls to the server are reduced. However, local
+                caching is not suitable for all workloads for e.g. read-once
+                type workloads. So, you need to consider carefully your
+                workload/scenario before using this option. Currently, local
+                disk caching is functional for CIFS files opened as read-only.
+  dir_mode      If CIFS Unix extensions are not supported by the server 
+                this overrides the default mode for directory inodes.
+  port          attempt to contact the server on this tcp port, before
+                trying the usual ports (port 445, then 139).
+  iocharset     Codepage used to convert local path names to and from
+                Unicode. Unicode is used by default for network path
+                names if the server supports it.  If iocharset is
+                not specified then the nls_default specified
+                during the local client kernel build will be used.
+                If server does not support Unicode, this parameter is
+                unused.
+  rsize         default read size (usually 16K). The client currently
+                can not use rsize larger than CIFSMaxBufSize. CIFSMaxBufSize
+                defaults to 16K and may be changed (from 8K to the maximum
+                kmalloc size allowed by your kernel) at module install time
+                for cifs.ko. Setting CIFSMaxBufSize to a very large value
+                will cause cifs to use more memory and may reduce performance
+                in some cases.  To use rsize greater than 127K (the original
+                cifs protocol maximum) also requires that the server support
+                a new Unix Capability flag (for very large read) which some
+                newer servers (e.g. Samba 3.0.26 or later) do. rsize can be
+                set from a minimum of 2048 to a maximum of 130048 (127K or
+                CIFSMaxBufSize, whichever is smaller)
+  wsize         default write size (default 57344)
+                maximum wsize currently allowed by CIFS is 57344 (fourteen
+                4096 byte pages)
+  actimeo=n     attribute cache timeout in seconds (default 1 second).
+                After this timeout, the cifs client requests fresh attribute
+                information from the server. This option allows to tune the
+                attribute cache timeout to suit the workload needs. Shorter
+                timeouts mean better the cache coherency, but increased number
+                of calls to the server. Longer timeouts mean reduced number
+                of calls to the server at the expense of less stricter cache
+                coherency checks (i.e. incorrect attribute cache for a short
+                period of time).
+  rw            mount the network share read-write (note that the
+                server may still consider the share read-only)
+  ro            mount network share read-only
+  version       used to distinguish different versions of the
+                mount helper utility (not typically needed)
+  sep           if first mount option (after the -o), overrides
+                the comma as the separator between the mount
+                parms. e.g.
+                        -o user=myname,password=mypassword,domain=mydom
+                could be passed instead with period as the separator by
+                        -o sep=.user=myname.password=mypassword.domain=mydom
+                this might be useful when comma is contained within username
+                or password or domain. This option is less important
+                when the cifs mount helper cifs.mount (version 1.1 or later)
+                is used.
+  nosuid        Do not allow remote executables with the suid bit 
+                program to be executed.  This is only meaningful for mounts
+                to servers such as Samba which support the CIFS Unix Extensions.
+                If you do not trust the servers in your network (your mount
+                targets) it is recommended that you specify this option for
+                greater security.
+  exec          Permit execution of binaries on the mount.
+  noexec        Do not permit execution of binaries on the mount.
+  dev           Recognize block devices on the remote mount.
+  nodev         Do not recognize devices on the remote mount.
+  suid          Allow remote files on this mountpoint with suid enabled to 
+                be executed (default for mounts when executed as root,
+                nosuid is default for user mounts).
+  credentials   Although ignored by the cifs kernel component, it is used by 
+                the mount helper, mount.cifs. When mount.cifs is installed it
+                opens and reads the credential file specified in order  
+                to obtain the userid and password arguments which are passed to
+                the cifs vfs.
+  guest         Although ignored by the kernel component, the mount.cifs
+                mount helper will not prompt the user for a password
+                if guest is specified on the mount options.  If no
+                password is specified a null password will be used.
+  perm          Client does permission checks (vfs_permission check of uid
+                and gid of the file against the mode and desired operation),
+                Note that this is in addition to the normal ACL check on the
+                target machine done by the server software. 
+                Client permission checking is enabled by default.
+  noperm        Client does not do permission checks.  This can expose
+                files on this mount to access by other users on the local
+                client system. It is typically only needed when the server
+                supports the CIFS Unix Extensions but the UIDs/GIDs on the
+                client and server system do not match closely enough to allow
+                access by the user doing the mount, but it may be useful with
+                non CIFS Unix Extension mounts for cases in which the default
+                mode is specified on the mount but is not to be enforced on the
+                client (e.g. perhaps when MultiUserMount is enabled)
+                Note that this does not affect the normal ACL check on the
+                target machine done by the server software (of the server
+                ACL against the user name provided at mount time).
+  serverino     Use server's inode numbers instead of generating automatically
+                incrementing inode numbers on the client.  Although this will
+                make it easier to spot hardlinked files (as they will have
+                the same inode numbers) and inode numbers may be persistent,
+                note that the server does not guarantee that the inode numbers
+                are unique if multiple server side mounts are exported under a
+                single share (since inode numbers on the servers might not
+                be unique if multiple filesystems are mounted under the same
+                shared higher level directory).  Note that some older
+                (e.g. pre-Windows 2000) do not support returning UniqueIDs
+                or the CIFS Unix Extensions equivalent and for those
+                this mount option will have no effect.  Exporting cifs mounts
+                under nfsd requires this mount option on the cifs mount.
+                This is now the default if server supports the 
+                required network operation.
+  noserverino   Client generates inode numbers (rather than using the actual one
+                from the server). These inode numbers will vary after
+                unmount or reboot which can confuse some applications,
+                but not all server filesystems support unique inode
+                numbers.
+  setuids       If the CIFS Unix extensions are negotiated with the server
+                the client will attempt to set the effective uid and gid of
+                the local process on newly created files, directories, and
+                devices (create, mkdir, mknod).  If the CIFS Unix Extensions
+                are not negotiated, for newly created files and directories
+                instead of using the default uid and gid specified on
+                the mount, cache the new file's uid and gid locally which means
+                that the uid for the file can change when the inode is
+                reloaded (or the user remounts the share).
+  nosetuids     The client will not attempt to set the uid and gid on
+                on newly created files, directories, and devices (create, 
+                mkdir, mknod) which will result in the server setting the
+                uid and gid to the default (usually the server uid of the
+                user who mounted the share).  Letting the server (rather than
+                the client) set the uid and gid is the default. If the CIFS
+                Unix Extensions are not negotiated then the uid and gid for
+                new files will appear to be the uid (gid) of the mounter or the
+                uid (gid) parameter specified on the mount.
+  netbiosname   When mounting to servers via port 139, specifies the RFC1001
+                source name to use to represent the client netbios machine 
+                name when doing the RFC1001 netbios session initialize.
+  direct        Do not do inode data caching on files opened on this mount.
+                This precludes mmapping files on this mount. In some cases
+                with fast networks and little or no caching benefits on the
+                client (e.g. when the application is doing large sequential
+                reads bigger than page size without rereading the same data) 
+                this can provide better performance than the default
+                behavior which caches reads (readahead) and writes 
+                (writebehind) through the local Linux client pagecache 
+                if oplock (caching token) is granted and held. Note that
+                direct allows write operations larger than page size
+                to be sent to the server.
+  strictcache   Use for switching on strict cache mode. In this mode the
+                client read from the cache all the time it has Oplock Level II,
+                otherwise - read from the server. All written data are stored
+                in the cache, but if the client doesn't have Exclusive Oplock,
+                it writes the data to the server.
+  rwpidforward  Forward pid of a process who opened a file to any read or write
+                operation on that file. This prevent applications like WINE
+                from failing on read and write if we use mandatory brlock style.
+  acl           Allow setfacl and getfacl to manage posix ACLs if server
+                supports them.  (default)
+  noacl         Do not allow setfacl and getfacl calls on this mount
+  user_xattr    Allow getting and setting user xattrs (those attributes whose
+                name begins with "user." or "os2.") as OS/2 EAs (extended
+                attributes) to the server.  This allows support of the
+                setfattr and getfattr utilities. (default)
+  nouser_xattr  Do not allow getfattr/setfattr to get/set/list xattrs 
+  mapchars      Translate six of the seven reserved characters (not backslash)
+                        *?<>|:
+                to the remap range (above 0xF000), which also
+                allows the CIFS client to recognize files created with
+                such characters by Windows's POSIX emulation. This can
+                also be useful when mounting to most versions of Samba
+                (which also forbids creating and opening files
+                whose names contain any of these seven characters).
+                This has no effect if the server does not support
+                Unicode on the wire.
+ nomapchars     Do not translate any of these seven characters (default).
+ nocase         Request case insensitive path name matching (case
+                sensitive is the default if the server supports it).
+                (mount option "ignorecase" is identical to "nocase")
+ posixpaths     If CIFS Unix extensions are supported, attempt to
+                negotiate posix path name support which allows certain
+                characters forbidden in typical CIFS filenames, without
+                requiring remapping. (default)
+ noposixpaths   If CIFS Unix extensions are supported, do not request
+                posix path name support (this may cause servers to
+                reject creatingfile with certain reserved characters).
+ nounix         Disable the CIFS Unix Extensions for this mount (tree
+                connection). This is rarely needed, but it may be useful
+                in order to turn off multiple settings all at once (ie
+                posix acls, posix locks, posix paths, symlink support
+                and retrieving uids/gids/mode from the server) or to
+                work around a bug in server which implement the Unix
+                Extensions.
+ nobrl          Do not send byte range lock requests to the server.
+                This is necessary for certain applications that break
+                with cifs style mandatory byte range locks (and most
+                cifs servers do not yet support requesting advisory
+                byte range locks).
+ forcemandatorylock Even if the server supports posix (advisory) byte range
+                locking, send only mandatory lock requests.  For some
+                (presumably rare) applications, originally coded for
+                DOS/Windows, which require Windows style mandatory byte range
+                locking, they may be able to take advantage of this option,
+                forcing the cifs client to only send mandatory locks
+                even if the cifs server would support posix advisory locks.
+                "forcemand" is accepted as a shorter form of this mount
+                option.
+ nostrictsync   If this mount option is set, when an application does an
+                fsync call then the cifs client does not send an SMB Flush
+                to the server (to force the server to write all dirty data
+                for this file immediately to disk), although cifs still sends
+                all dirty (cached) file data to the server and waits for the
+                server to respond to the write.  Since SMB Flush can be
+                very slow, and some servers may be reliable enough (to risk
+                delaying slightly flushing the data to disk on the server),
+                turning on this option may be useful to improve performance for
+                applications that fsync too much, at a small risk of server
+                crash.  If this mount option is not set, by default cifs will
+                send an SMB flush request (and wait for a response) on every
+                fsync call.
+ nodfs          Disable DFS (global name space support) even if the
+                server claims to support it.  This can help work around
+                a problem with parsing of DFS paths with Samba server
+                versions 3.0.24 and 3.0.25.
+ remount        remount the share (often used to change from ro to rw mounts
+                or vice versa)
+ cifsacl        Report mode bits (e.g. on stat) based on the Windows ACL for
+                the file. (EXPERIMENTAL)
+ servern        Specify the server 's netbios name (RFC1001 name) to use
+                when attempting to setup a session to the server. 
+                This is needed for mounting to some older servers (such
+                as OS/2 or Windows 98 and Windows ME) since they do not
+                support a default server name.  A server name can be up
+                to 15 characters long and is usually uppercased.
+ sfu            When the CIFS Unix Extensions are not negotiated, attempt to
+                create device files and fifos in a format compatible with
+                Services for Unix (SFU).  In addition retrieve bits 10-12
+                of the mode via the SETFILEBITS extended attribute (as
+                SFU does).  In the future the bottom 9 bits of the
+                mode also will be emulated using queries of the security
+                descriptor (ACL).
+ mfsymlinks     Enable support for Minshall+French symlinks
+                (see http://wiki.samba.org/index.php/UNIX_Extensions#Minshall.2BFrench_symlinks)
+                This option is ignored when specified together with the
+                'sfu' option. Minshall+French symlinks are used even if
+                the server supports the CIFS Unix Extensions.
+ sign           Must use packet signing (helps avoid unwanted data modification
+                by intermediate systems in the route).  Note that signing
+                does not work with lanman or plaintext authentication.
+ seal           Must seal (encrypt) all data on this mounted share before
+                sending on the network.  Requires support for Unix Extensions.
+                Note that this differs from the sign mount option in that it
+                causes encryption of data sent over this mounted share but other
+                shares mounted to the same server are unaffected.
+ locallease     This option is rarely needed. Fcntl F_SETLEASE is
+                used by some applications such as Samba and NFSv4 server to
+                check to see whether a file is cacheable.  CIFS has no way
+                to explicitly request a lease, but can check whether a file
+                is cacheable (oplocked).  Unfortunately, even if a file
+                is not oplocked, it could still be cacheable (ie cifs client
+                could grant fcntl leases if no other local processes are using
+                the file) for cases for example such as when the server does not
+                support oplocks and the user is sure that the only updates to
+                the file will be from this client. Specifying this mount option
+                will allow the cifs client to check for leases (only) locally
+                for files which are not oplocked instead of denying leases
+                in that case. (EXPERIMENTAL)
+ sec            Security mode.  Allowed values are:
+                        none    attempt to connection as a null user (no name)
+                        krb5    Use Kerberos version 5 authentication
+                        krb5i   Use Kerberos authentication and packet signing
+                        ntlm    Use NTLM password hashing (default)
+                        ntlmi   Use NTLM password hashing with signing (if
+                                /proc/fs/cifs/PacketSigningEnabled on or if
+                                server requires signing also can be the default) 
+                        ntlmv2  Use NTLMv2 password hashing      
+                        ntlmv2i Use NTLMv2 password hashing with packet signing
+                        lanman  (if configured in kernel config) use older
+                                lanman hash
+hard            Retry file operations if server is not responding
+soft            Limit retries to unresponsive servers (usually only
+                one retry) before returning an error.  (default)
+
+The mount.cifs mount helper also accepts a few mount options before -o
+including:
+
+        -S      take password from stdin (equivalent to setting the environment
+                variable "PASSWD_FD=0"
+        -V      print mount.cifs version
+        -?      display simple usage information
+
+With most 2.6 kernel versions of modutils, the version of the cifs kernel
+module can be displayed via modinfo.
+
+Misc /proc/fs/cifs Flags and Debug Info
+=======================================
+Informational pseudo-files:
+DebugData               Displays information about active CIFS sessions and
+                        shares, features enabled as well as the cifs.ko
+                        version.
+Stats                   Lists summary resource usage information as well as per
+                        share statistics, if CONFIG_CIFS_STATS in enabled
+                        in the kernel configuration.
+
+Configuration pseudo-files:
+PacketSigningEnabled    If set to one, cifs packet signing is enabled
+                        and will be used if the server requires 
+                        it.  If set to two, cifs packet signing is
+                        required even if the server considers packet
+                        signing optional. (default 1)
+SecurityFlags           Flags which control security negotiation and
+                        also packet signing. Authentication (may/must)
+                        flags (e.g. for NTLM and/or NTLMv2) may be combined with
+                        the signing flags.  Specifying two different password
+                        hashing mechanisms (as "must use") on the other hand 
+                        does not make much sense. Default flags are 
+                                0x07007 
+                        (NTLM, NTLMv2 and packet signing allowed).  The maximum 
+                        allowable flags if you want to allow mounts to servers
+                        using weaker password hashes is 0x37037 (lanman,
+                        plaintext, ntlm, ntlmv2, signing allowed).  Some
+                        SecurityFlags require the corresponding menuconfig
+                        options to be enabled (lanman and plaintext require
+                        CONFIG_CIFS_WEAK_PW_HASH for example).  Enabling
+                        plaintext authentication currently requires also
+                        enabling lanman authentication in the security flags
+                        because the cifs module only supports sending
+                        laintext passwords using the older lanman dialect
+                        form of the session setup SMB.  (e.g. for authentication
+                        using plain text passwords, set the SecurityFlags
+                        to 0x30030):
+ 
+                        may use packet signing                          0x00001
+                        must use packet signing                         0x01001
+                        may use NTLM (most common password hash)        0x00002
+                        must use NTLM                                   0x02002
+                        may use NTLMv2                                  0x00004
+                        must use NTLMv2                                 0x04004
+                        may use Kerberos security                       0x00008
+                        must use Kerberos                               0x08008
+                        may use lanman (weak) password hash             0x00010
+                        must use lanman password hash                   0x10010
+                        may use plaintext passwords                     0x00020
+                        must use plaintext passwords                    0x20020
+                        (reserved for future packet encryption)         0x00040
+
+cifsFYI                 If set to non-zero value, additional debug information
+                        will be logged to the system error log.  This field
+                        contains three flags controlling different classes of
+                        debugging entries.  The maximum value it can be set
+                        to is 7 which enables all debugging points (default 0).
+                        Some debugging statements are not compiled into the
+                        cifs kernel unless CONFIG_CIFS_DEBUG2 is enabled in the
+                        kernel configuration. cifsFYI may be set to one or
+                        nore of the following flags (7 sets them all):
+
+                        log cifs informational messages                 0x01
+                        log return codes from cifs entry points         0x02
+                        log slow responses (ie which take longer than 1 second)
+                          CONFIG_CIFS_STATS2 must be enabled in .config 0x04
+                                
+                                
+traceSMB                If set to one, debug information is logged to the
+                        system error log with the start of smb requests
+                        and responses (default 0)
+LookupCacheEnable       If set to one, inode information is kept cached
+                        for one second improving performance of lookups
+                        (default 1)
+OplockEnabled           If set to one, safe distributed caching enabled.
+                        (default 1)
+LinuxExtensionsEnabled  If set to one then the client will attempt to
+                        use the CIFS "UNIX" extensions which are optional
+                        protocol enhancements that allow CIFS servers
+                        to return accurate UID/GID information as well
+                        as support symbolic links. If you use servers
+                        such as Samba that support the CIFS Unix
+                        extensions but do not want to use symbolic link
+                        support and want to map the uid and gid fields 
+                        to values supplied at mount (rather than the 
+                        actual values, then set this to zero. (default 1)
+
+These experimental features and tracing can be enabled by changing flags in 
+/proc/fs/cifs (after the cifs module has been installed or built into the 
+kernel, e.g.  insmod cifs).  To enable a feature set it to 1 e.g.  to enable 
+tracing to the kernel message log type: 
+
+        echo 7 > /proc/fs/cifs/cifsFYI
+        
+cifsFYI functions as a bit mask. Setting it to 1 enables additional kernel
+logging of various informational messages.  2 enables logging of non-zero
+SMB return codes while 4 enables logging of requests that take longer
+than one second to complete (except for byte range lock requests). 
+Setting it to 4 requires defining CONFIG_CIFS_STATS2 manually in the
+source code (typically by setting it in the beginning of cifsglob.h),
+and setting it to seven enables all three.  Finally, tracing
+the start of smb requests and responses can be enabled via:
+
+        echo 1 > /proc/fs/cifs/traceSMB
+
+Per share (per client mount) statistics are available in /proc/fs/cifs/Stats
+if the kernel was configured with cifs statistics enabled.  The statistics
+represent the number of successful (ie non-zero return code from the server) 
+SMB responses to some of the more common commands (open, delete, mkdir etc.).
+Also recorded is the total bytes read and bytes written to the server for
+that share.  Note that due to client caching effects this can be less than the
+number of bytes read and written by the application running on the client.
+The statistics for the number of total SMBs and oplock breaks are different in
+that they represent all for that share, not just those for which the server
+returned success.
+        
+Also note that "cat /proc/fs/cifs/DebugData" will display information about
+the active sessions and the shares that are mounted.
+
+Enabling Kerberos (extended security) works but requires version 1.2 or later
+of the helper program cifs.upcall to be present and to be configured in the
+/etc/request-key.conf file.  The cifs.upcall helper program is from the Samba
+project(http://www.samba.org). NTLM and NTLMv2 and LANMAN support do not
+require this helper. Note that NTLMv2 security (which does not require the
+cifs.upcall helper program), instead of using Kerberos, is sufficient for
+some use cases.
+
+DFS support allows transparent redirection to shares in an MS-DFS name space.
+In addition, DFS support for target shares which are specified as UNC
+names which begin with host names (rather than IP addresses) requires
+a user space helper (such as cifs.upcall) to be present in order to
+translate host names to ip address, and the user space helper must also
+be configured in the file /etc/request-key.conf.  Samba, Windows servers and
+many NAS appliances support DFS as a way of constructing a global name
+space to ease network configuration and improve reliability.
+
+To use cifs Kerberos and DFS support, the Linux keyutils package should be
+installed and something like the following lines should be added to the
+/etc/request-key.conf file:
+
+create cifs.spnego * * /usr/local/sbin/cifs.upcall %k
+create dns_resolver * * /usr/local/sbin/cifs.upcall %k
+
+CIFS kernel module parameters
+=============================
+These module parameters can be specified or modified either during the time of
+module loading or during the runtime by using the interface
+        /proc/module/cifs/parameters/<param>
+
+i.e. echo "value" > /sys/module/cifs/parameters/<param>
+
+1. enable_oplocks - Enable or disable oplocks. Oplocks are enabled by default.
+                    [Y/y/1]. To disable use any of [N/n/0].
+
diff --git a/Documentation/filesystems/cifs/TODO b/Documentation/filesystems/cifs/TODO
new file mode 100644
index 000000000000..355abcdcda98
--- /dev/null
+++ b/Documentation/filesystems/cifs/TODO
@@ -0,0 +1,129 @@
+Version 1.53 May 20, 2008
+
+A Partial List of Missing Features
+==================================
+
+Contributions are welcome.  There are plenty of opportunities
+for visible, important contributions to this module.  Here
+is a partial list of the known problems and missing features:
+
+a) Support for SecurityDescriptors(Windows/CIFS ACLs) for chmod/chgrp/chown
+so that these operations can be supported to Windows servers
+
+b) Mapping POSIX ACLs (and eventually NFSv4 ACLs) to CIFS
+SecurityDescriptors
+
+c) Better pam/winbind integration (e.g. to handle uid mapping
+better)
+
+d) Cleanup now unneeded SessSetup code in
+fs/cifs/connect.c and add back in NTLMSSP code if any servers
+need it
+
+e) fix NTLMv2 signing when two mounts with different users to same
+server.
+
+f) Directory entry caching relies on a 1 second timer, rather than 
+using FindNotify or equivalent.  - (started)
+
+g) quota support (needs minor kernel change since quota calls
+to make it to network filesystems or deviceless filesystems)
+
+h) investigate sync behavior (including syncpage) and check  
+for proper behavior of intr/nointr
+
+i) improve support for very old servers (OS/2 and Win9x for example)
+Including support for changing the time remotely (utimes command).
+
+j) hook lower into the sockets api (as NFS/SunRPC does) to avoid the
+extra copy in/out of the socket buffers in some cases.
+
+k) Better optimize open (and pathbased setfilesize) to reduce the
+oplock breaks coming from windows srv.  Piggyback identical file
+opens on top of each other by incrementing reference count rather
+than resending (helps reduce server resource utilization and avoid
+spurious oplock breaks).
+
+l) Improve performance of readpages by sending more than one read
+at a time when 8 pages or more are requested. In conjuntion
+add support for async_cifs_readpages.
+
+m) Add support for storing symlink info to Windows servers 
+in the Extended Attribute format their SFU clients would recognize.
+
+n) Finish fcntl D_NOTIFY support so kde and gnome file list windows
+will autorefresh (partially complete by Asser). Needs minor kernel
+vfs change to support removing D_NOTIFY on a file.   
+
+o) Add GUI tool to configure /proc/fs/cifs settings and for display of
+the CIFS statistics (started)
+
+p) implement support for security and trusted categories of xattrs
+(requires minor protocol extension) to enable better support for SELINUX
+
+q) Implement O_DIRECT flag on open (already supported on mount)
+
+r) Create UID mapping facility so server UIDs can be mapped on a per
+mount or a per server basis to client UIDs or nobody if no mapping
+exists.  This is helpful when Unix extensions are negotiated to
+allow better permission checking when UIDs differ on the server
+and client.  Add new protocol request to the CIFS protocol 
+standard for asking the server for the corresponding name of a
+particular uid.
+
+s) Add support for CIFS Unix and also the newer POSIX extensions to the
+server side for Samba 4.
+
+t) In support for OS/2 (LANMAN 1.2 and LANMAN2.1 based SMB servers) 
+need to add ability to set time to server (utimes command)
+
+u) DOS attrs - returned as pseudo-xattr in Samba format (check VFAT and NTFS for this too)
+
+v) mount check for unmatched uids
+
+w) Add support for new vfs entry point for fallocate
+
+x) Fix Samba 3 server to handle Linux kernel aio so dbench with lots of 
+processes can proceed better in parallel (on the server)
+
+y) Fix Samba 3 to handle reads/writes over 127K (and remove the cifs mount
+restriction of wsize max being 127K) 
+
+KNOWN BUGS (updated April 24, 2007)
+====================================
+See http://bugzilla.samba.org - search on product "CifsVFS" for
+current bug list.
+
+1) existing symbolic links (Windows reparse points) are recognized but
+can not be created remotely. They are implemented for Samba and those that
+support the CIFS Unix extensions, although earlier versions of Samba
+overly restrict the pathnames.
+2) follow_link and readdir code does not follow dfs junctions
+but recognizes them
+3) create of new files to FAT partitions on Windows servers can
+succeed but still return access denied (appears to be Windows 
+server not cifs client problem) and has not been reproduced recently.
+NTFS partitions do not have this problem.
+4) Unix/POSIX capabilities are reset after reconnection, and affect
+a few fields in the tree connection but we do do not know which
+superblocks to apply these changes to.  We should probably walk
+the list of superblocks to set these.  Also need to check the
+flags on the second mount to the same share, and see if we
+can do the same trick that NFS does to remount duplicate shares.
+
+Misc testing to do
+==================
+1) check out max path names and max path name components against various server
+types. Try nested symlinks (8 deep). Return max path name in stat -f information
+
+2) Modify file portion of ltp so it can run against a mounted network
+share and run it against cifs vfs in automated fashion.
+
+3) Additional performance testing and optimization using iozone and similar - 
+there are some easy changes that can be done to parallelize sequential writes,
+and when signing is disabled to request larger read sizes (larger than 
+negotiated size) and send larger write sizes to modern servers.
+
+4) More exhaustively test against less common servers.  More testing
+against Windows 9x, Windows ME servers.
+
diff --git a/Documentation/filesystems/cifs/cifs.txt b/Documentation/filesystems/cifs/cifs.txt
new file mode 100644
index 000000000000..2fac91ac96cf
--- /dev/null
+++ b/Documentation/filesystems/cifs/cifs.txt
@@ -0,0 +1,31 @@
+  This is the client VFS module for the Common Internet File System
+  (CIFS) protocol which is the successor to the Server Message Block 
+  (SMB) protocol, the native file sharing mechanism for most early
+  PC operating systems. New and improved versions of CIFS are now
+  called SMB2 and SMB3. These dialects are also supported by the
+  CIFS VFS module. CIFS is fully supported by network
+  file servers such as Windows 2000, 2003, 2008 and 2012
+  as well by Samba (which provides excellent CIFS
+  server support for Linux and many other operating systems), so
+  this network filesystem client can mount to a wide variety of
+  servers.
+
+  The intent of this module is to provide the most advanced network
+  file system function for CIFS compliant servers, including better
+  POSIX compliance, secure per-user session establishment, high
+  performance safe distributed caching (oplock), optional packet
+  signing, large files, Unicode support and other internationalization
+  improvements. Since both Samba server and this filesystem client support
+  the CIFS Unix extensions, the combination can provide a reasonable 
+  alternative to NFSv4 for fileserving in some Linux to Linux environments,
+  not just in Linux to Windows environments.
+
+  This filesystem has an mount utility (mount.cifs) that can be obtained from
+
+      https://ftp.samba.org/pub/linux-cifs/cifs-utils/
+
+  It must be installed in the directory with the other mount helpers.
+
+  For more information on the module see the project wiki page at
+
+      https://wiki.samba.org/index.php/LinuxCIFS_utils
diff --git a/Documentation/filesystems/cifs/winucase_convert.pl b/Documentation/filesystems/cifs/winucase_convert.pl
new file mode 100755
index 000000000000..322a9c833f23
--- /dev/null
+++ b/Documentation/filesystems/cifs/winucase_convert.pl
@@ -0,0 +1,62 @@
+#!/usr/bin/perl -w
+#
+# winucase_convert.pl -- convert "Windows 8 Upper Case Mapping Table.txt" to
+#                        a two-level set of C arrays.
+#
+#   Copyright 2013: Jeff Layton <jlayton@redhat.com>
+#
+#   This program is free software: you can redistribute it and/or modify
+#   it under the terms of the GNU General Public License as published by
+#   the Free Software Foundation, either version 3 of the License, or
+#   (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be useful,
+#   but WITHOUT ANY WARRANTY; without even the implied warranty of
+#   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#   GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+
+while(<>) {
+        next if (!/^0x(..)(..)\t0x(....)\t/);
+        $firstchar = hex($1);
+        $secondchar = hex($2);
+        $uppercase = hex($3);
+
+        $top[$firstchar][$secondchar] = $uppercase;
+}
+
+for ($i = 0; $i < 256; $i++) {
+        next if (!$top[$i]);
+
+        printf("static const wchar_t t2_%2.2x[256] = {", $i);
+        for ($j = 0; $j < 256; $j++) {
+                if (($j % 8) == 0) {
+                        print "\n\t";
+                } else {
+                        print " ";
+                }
+                printf("0x%4.4x,", $top[$i][$j] ? $top[$i][$j] : 0);
+        }
+        print "\n};\n\n";
+}
+
+printf("static const wchar_t *const toplevel[256] = {", $i);
+for ($i = 0; $i < 256; $i++) {
+        if (($i % 8) == 0) {
+                print "\n\t";
+        } elsif ($top[$i]) {
+                print " ";
+        } else {
+                print "  ";
+        }
+
+        if ($top[$i]) {
+                printf("t2_%2.2x,", $i);
+        } else {
+                print "NULL,";
+        }
+}
+print "\n};\n\n";
diff --git a/Documentation/filesystems/ext3.txt b/Documentation/filesystems/ext3.txt
index 293855e95000..7ed0d17d6721 100644
--- a/Documentation/filesystems/ext3.txt
+++ b/Documentation/filesystems/ext3.txt
@@ -26,11 +26,12 @@ journal=inum		When a journal already exists, this option is ignored.
                         Otherwise, it specifies the number of the inode which
                         will represent the ext3 file system's journal file.
 
+journal_path=path
 journal_dev=devnum      When the external journal device's major/minor numbers
-                        have changed, this option allows the user to specify
+                        have changed, these options allow the user to specify
                         the new journal location.  The journal device is
-                        identified through its new major/minor numbers encoded
-                        in devnum.
+                        identified through either its new major/minor numbers
+                        encoded in devnum, or via a path to the device.
 
 norecovery              Don't load the journal on mounting. Note that this forces
 noload                  mount of inconsistent filesystem, which can lead to
diff --git a/Documentation/filesystems/ext4.txt b/Documentation/filesystems/ext4.txt
index f7cbf574a875..919a3293aaa4 100644
--- a/Documentation/filesystems/ext4.txt
+++ b/Documentation/filesystems/ext4.txt
@@ -2,7 +2,7 @@
 Ext4 Filesystem
 ===============
 
-Ext4 is an an advanced level of the ext3 filesystem which incorporates
+Ext4 is an advanced level of the ext3 filesystem which incorporates
 scalability and reliability enhancements for supporting large filesystems
 (64 bit) in keeping with increasing disk capacities and state-of-the-art
 feature requirements.
@@ -144,11 +144,12 @@ journal_async_commit	Commit block can be written to disk without waiting
                         mount the device. This will enable 'journal_checksum'
                         internally.
 
+journal_path=path
 journal_dev=devnum      When the external journal device's major/minor numbers
-                        have changed, this option allows the user to specify
+                        have changed, these options allow the user to specify
                         the new journal location.  The journal device is
-                        identified through its new major/minor numbers encoded
-                        in devnum.
+                        identified through either its new major/minor numbers
+                        encoded in devnum, or via a path to the device.
 
 norecovery              Don't load the journal on mounting.  Note that
 noload                  if the filesystem was not unmounted cleanly,
diff --git a/Documentation/filesystems/f2fs.txt b/Documentation/filesystems/f2fs.txt
index b91e2f26b672..a3fe811bbdbc 100644
--- a/Documentation/filesystems/f2fs.txt
+++ b/Documentation/filesystems/f2fs.txt
@@ -18,8 +18,8 @@ according to its internal geometry or flash memory management scheme, namely FTL
 F2FS and its tools support various parameters not only for configuring on-disk
 layout, but also for selecting allocation and cleaning algorithms.
 
-The file system formatting tool, "mkfs.f2fs", is available from the following
-git tree:
+The following git tree provides the file system formatting tool (mkfs.f2fs),
+a consistency checking tool (fsck.f2fs), and a debugging tool (dump.f2fs).
 >> git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git
 
 For reporting bugs and sending patches, please use the following mailing list:
@@ -119,6 +119,7 @@ active_logs=%u         Support configuring the number of active logs. In the
                        Default number is 6.
 disable_ext_identify   Disable the extension list configured by mkfs, so f2fs
                        does not aware of cold files such as media files.
+inline_xattr           Enable the inline xattrs feature.
 
 ================================================================================
 DEBUGFS ENTRIES
@@ -133,6 +134,44 @@ f2fs. Each file shows the whole f2fs information.
  - current memory footprint consumed by f2fs.
 
 ================================================================================
+SYSFS ENTRIES
+================================================================================
+
+Information about mounted f2f2 file systems can be found in
+/sys/fs/f2fs.  Each mounted filesystem will have a directory in
+/sys/fs/f2fs based on its device name (i.e., /sys/fs/f2fs/sda).
+The files in each per-device directory are shown in table below.
+
+Files in /sys/fs/f2fs/<devname>
+(see also Documentation/ABI/testing/sysfs-fs-f2fs)
+..............................................................................
+ File                         Content
+
+ gc_max_sleep_time            This tuning parameter controls the maximum sleep
+                              time for the garbage collection thread. Time is
+                              in milliseconds.
+
+ gc_min_sleep_time            This tuning parameter controls the minimum sleep
+                              time for the garbage collection thread. Time is
+                              in milliseconds.
+
+ gc_no_gc_sleep_time          This tuning parameter controls the default sleep
+                              time for the garbage collection thread. Time is
+                              in milliseconds.
+
+ gc_idle                      This parameter controls the selection of victim
+                              policy for garbage collection. Setting gc_idle = 0
+                              (default) will disable this option. Setting
+                              gc_idle = 1 will select the Cost Benefit approach
+                              & setting gc_idle = 2 will select the greedy aproach.
+
+ reclaim_segments             This parameter controls the number of prefree
+                              segments to be reclaimed. If the number of prefree
+                              segments is larger than this number, f2fs tries to
+                              conduct checkpoint to reclaim the prefree segments
+                              to free segments. By default, 100 segments, 200MB.
+
+================================================================================
 USAGE
 ================================================================================
 
@@ -149,8 +188,12 @@ USAGE
  # mkfs.f2fs -l label /dev/block_device
  # mount -t f2fs /dev/block_device /mnt/f2fs
 
-Format options
---------------
+mkfs.f2fs
+---------
+The mkfs.f2fs is for the use of formatting a partition as the f2fs filesystem,
+which builds a basic on-disk layout.
+
+The options consist of:
 -l [label]   : Give a volume label, up to 512 unicode name.
 -a [0 or 1]  : Split start location of each area for heap-based allocation.
                1 is set by default, which performs this.
@@ -164,6 +207,37 @@ Format options
 -t [0 or 1]  : Disable discard command or not.
                1 is set by default, which conducts discard.
 
+fsck.f2fs
+---------
+The fsck.f2fs is a tool to check the consistency of an f2fs-formatted
+partition, which examines whether the filesystem metadata and user-made data
+are cross-referenced correctly or not.
+Note that, initial version of the tool does not fix any inconsistency.
+
+The options consist of:
+  -d debug level [default:0]
+
+dump.f2fs
+---------
+The dump.f2fs shows the information of specific inode and dumps SSA and SIT to
+file. Each file is dump_ssa and dump_sit.
+
+The dump.f2fs is used to debug on-disk data structures of the f2fs filesystem.
+It shows on-disk inode information reconized by a given inode number, and is
+able to dump all the SSA and SIT entries into predefined files, ./dump_ssa and
+./dump_sit respectively.
+
+The options consist of:
+  -d debug level [default:0]
+  -i inode no (hex)
+  -s [SIT dump segno from #1~#2 (decimal), for all 0~-1]
+  -a [SSA dump segno from #1~#2 (decimal), for all 0~-1]
+
+Examples:
+# dump.f2fs -i [ino] /dev/sdx
+# dump.f2fs -s 0~-1 /dev/sdx (SIT dump)
+# dump.f2fs -a 0~-1 /dev/sdx (SSA dump)
+
 ================================================================================
 DESIGN
 ================================================================================
diff --git a/Documentation/filesystems/nfs/Exporting b/Documentation/filesystems/nfs/Exporting
index 09994c247289..e543b1a619cc 100644
--- a/Documentation/filesystems/nfs/Exporting
+++ b/Documentation/filesystems/nfs/Exporting
@@ -93,7 +93,7 @@ For a filesystem to be exportable it must:
    2/ make sure that d_splice_alias is used rather than d_add
       when ->lookup finds an inode for a given parent and name.
 
-      If inode is NULL, d_splice_alias(inode, dentry) is eqivalent to
+      If inode is NULL, d_splice_alias(inode, dentry) is equivalent to
 
                 d_add(dentry, inode), NULL
 
diff --git a/Documentation/filesystems/nfs/pnfs.txt b/Documentation/filesystems/nfs/pnfs.txt
index 52ae07f5f578..adc81a35fe2d 100644
--- a/Documentation/filesystems/nfs/pnfs.txt
+++ b/Documentation/filesystems/nfs/pnfs.txt
@@ -12,7 +12,7 @@ struct pnfs_layout_hdr
 ----------------------
 The on-the-wire command LAYOUTGET corresponds to struct
 pnfs_layout_segment, usually referred to by the variable name lseg.
-Each nfs_inode may hold a pointer to a cache of of these layout
+Each nfs_inode may hold a pointer to a cache of these layout
 segments in nfsi->layout, of type struct pnfs_layout_hdr.
 
 We reference the header for the inode pointing to it, across each
diff --git a/Documentation/filesystems/porting b/Documentation/filesystems/porting
index 206a1bdc7321..f0890581f7f6 100644
--- a/Documentation/filesystems/porting
+++ b/Documentation/filesystems/porting
@@ -451,3 +451,7 @@ in your dentry operations instead.
 --
 [mandatory]
         ->readdir() is gone now; switch to ->iterate()
+[mandatory]
+        vfs_follow_link has been removed.  Filesystems must use nd_set_link
+        from ->follow_link for normal symlinks, or nd_jump_link for magic
+        /proc/<pid> style links.
diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt
index fcc22c982a25..823c95faebd2 100644
--- a/Documentation/filesystems/proc.txt
+++ b/Documentation/filesystems/proc.txt
@@ -854,16 +854,15 @@ Committed_AS: The amount of memory presently allocated on the system.
               The committed memory is a sum of all of the memory which
               has been allocated by processes, even if it has not been
               "used" by them as of yet. A process which malloc()'s 1G
-              of memory, but only touches 300M of it will only show up
-              as using 300M of memory even if it has the address space
-              allocated for the entire 1G. This 1G is memory which has
-              been "committed" to by the VM and can be used at any time
-              by the allocating application. With strict overcommit
-              enabled on the system (mode 2 in 'vm.overcommit_memory'),
-              allocations which would exceed the CommitLimit (detailed
-              above) will not be permitted. This is useful if one needs
-              to guarantee that processes will not fail due to lack of
-              memory once that memory has been successfully allocated.
+              of memory, but only touches 300M of it will show up as
+              using 1G. This 1G is memory which has been "committed" to
+              by the VM and can be used at any time by the allocating
+              application. With strict overcommit enabled on the system
+              (mode 2 in 'vm.overcommit_memory'),allocations which would
+              exceed the CommitLimit (detailed above) will not be permitted.
+              This is useful if one needs to guarantee that processes will
+              not fail due to lack of memory once that memory has been
+              successfully allocated.
 VmallocTotal: total size of vmalloc memory area
  VmallocUsed: amount of vmalloc area which is used
 VmallocChunk: largest contiguous block of vmalloc area which is free
diff --git a/Documentation/filesystems/qnx6.txt b/Documentation/filesystems/qnx6.txt
index 99e90184a72f..408679789136 100644
--- a/Documentation/filesystems/qnx6.txt
+++ b/Documentation/filesystems/qnx6.txt
@@ -149,7 +149,7 @@ Bitmap system area
 ------------------
 
 The bitmap itself is divided into three parts.
-First the system area, that is split into two halfs.
+First the system area, that is split into two halves.
 Then userspace.
 
 The requirement for a static, fixed preallocated system area comes from how
diff --git a/Documentation/filesystems/ramfs-rootfs-initramfs.txt b/Documentation/filesystems/ramfs-rootfs-initramfs.txt
index 59b4a0962e0f..b176928e6963 100644
--- a/Documentation/filesystems/ramfs-rootfs-initramfs.txt
+++ b/Documentation/filesystems/ramfs-rootfs-initramfs.txt
@@ -79,6 +79,10 @@ to just make sure certain lists can't become empty.
 Most systems just mount another filesystem over rootfs and ignore it.  The
 amount of space an empty instance of ramfs takes up is tiny.
 
+If CONFIG_TMPFS is enabled, rootfs will use tmpfs instead of ramfs by
+default.  To force ramfs, add "rootfstype=ramfs" to the kernel command
+line.
+
 What is initramfs?
 ------------------
 
diff --git a/Documentation/filesystems/relay.txt b/Documentation/filesystems/relay.txt
index 510b722667ac..33e2f3694733 100644
--- a/Documentation/filesystems/relay.txt
+++ b/Documentation/filesystems/relay.txt
@@ -31,7 +31,7 @@ Semantics
 
 Each relay channel has one buffer per CPU, each buffer has one or more
 sub-buffers.  Messages are written to the first sub-buffer until it is
-too full to contain a new message, in which case it it is written to
+too full to contain a new message, in which case it is written to
 the next (if available).  Messages are never split across sub-buffers.
 At this point, userspace can be notified so it empties the first
 sub-buffer, while the kernel continues writing to the next.
diff --git a/Documentation/filesystems/sysfs-tagging.txt b/Documentation/filesystems/sysfs-tagging.txt
index caaaf1266d8f..eb843e49c5a3 100644
--- a/Documentation/filesystems/sysfs-tagging.txt
+++ b/Documentation/filesystems/sysfs-tagging.txt
@@ -24,7 +24,7 @@ flag between KOBJ_NS_TYPE_NONE and KOBJ_NS_TYPES, and s_ns will
 point to the namespace to which it belongs.
 
 Each sysfs superblock's sysfs_super_info contains an array void
-*ns[KOBJ_NS_TYPES].  When a a task in a tagging namespace
+*ns[KOBJ_NS_TYPES].  When a task in a tagging namespace
 kobj_nstype first mounts sysfs, a new superblock is created.  It
 will be differentiated from other sysfs mounts by having its
 s_fs_info->ns[kobj_nstype] set to the new namespace.  Note that
diff --git a/Documentation/filesystems/vfs.txt b/Documentation/filesystems/vfs.txt
index f93a88250a44..deb48b5fd883 100644
--- a/Documentation/filesystems/vfs.txt
+++ b/Documentation/filesystems/vfs.txt
@@ -359,11 +359,9 @@ struct inode_operations {
         ssize_t (*listxattr) (struct dentry *, char *, size_t);
         int (*removexattr) (struct dentry *, const char *);
         void (*update_time)(struct inode *, struct timespec *, int);
-        int (*atomic_open)(struct inode *, struct dentry *,
+        int (*atomic_open)(struct inode *, struct dentry *, struct file *,
+                        unsigned open_flag, umode_t create_mode, int *opened);
         int (*tmpfile) (struct inode *, struct dentry *, umode_t);
-} ____cacheline_aligned;
-                                struct file *, unsigned open_flag,
-                                umode_t create_mode, int *opened);
 };
 
 Again, all methods are called without any locks being held, unless
@@ -470,9 +468,11 @@ otherwise noted.
         method the filesystem can look up, possibly create and open the file in
         one atomic operation.  If it cannot perform this (e.g. the file type
         turned out to be wrong) it may signal this by returning 1 instead of
-        usual 0 or -ve .  This method is only called if the last
-        component is negative or needs lookup.  Cached positive dentries are
-        still handled by f_op->open().
+        usual 0 or -ve .  This method is only called if the last component is
+        negative or needs lookup.  Cached positive dentries are still handled by
+        f_op->open().  If the file was created, the FILE_CREATED flag should be
+        set in "opened".  In case of O_EXCL the method must only succeed if the
+        file didn't exist and hence FILE_CREATED shall always be set on success.
 
   tmpfile: called in the end of O_TMPFILE open().  Optional, equivalent to
         atomically creating, opening and unlinking a file in given directory.
diff --git a/Documentation/filesystems/xfs.txt b/Documentation/filesystems/xfs.txt
index 12525b17d9ed..5be51fd888bd 100644
--- a/Documentation/filesystems/xfs.txt
+++ b/Documentation/filesystems/xfs.txt
@@ -135,7 +135,7 @@ default behaviour.
         If the memory cost of 8 log buffers is too high on small
         systems, then it may be reduced at some cost to performance
         on metadata intensive workloads. The logbsize option below
-        controls the size of each buffer and so is also relevent to
+        controls the size of each buffer and so is also relevant to
         this case.
 
   logbsize=value
diff --git a/Documentation/fmc/carrier.txt b/Documentation/fmc/carrier.txt
index 173f6d65c88d..5e4f1dd3e98b 100644
--- a/Documentation/fmc/carrier.txt
+++ b/Documentation/fmc/carrier.txt
@@ -213,7 +213,7 @@ The individual methods perform the following tasks:
      methods: for example the SPEC driver may define that its carrier
      I2C memory is seen at offset 1M and the internal SPI flash is seen
      at offset 16M.  This multiplexing of several flash memories in the
-     same address space is is carrier-specific and should only be used
+     same address space is carrier-specific and should only be used
      by a driver that has verified the `carrier_name' field.
 
 
diff --git a/Documentation/hid/uhid.txt b/Documentation/hid/uhid.txt
index 3c741214dfbb..dc35a2b75eee 100644
--- a/Documentation/hid/uhid.txt
+++ b/Documentation/hid/uhid.txt
@@ -149,11 +149,13 @@ needs. Only UHID_OUTPUT and UHID_OUTPUT_EV have payloads.
   is of type "struct uhid_data_req".
   This may be received even though you haven't received UHID_OPEN, yet.
 
-  UHID_OUTPUT_EV:
+  UHID_OUTPUT_EV (obsolete):
   Same as UHID_OUTPUT but this contains a "struct input_event" as payload. This
   is called for force-feedback, LED or similar events which are received through
   an input device by the HID subsystem. You should convert this into raw reports
   and send them to your device similar to events of type UHID_OUTPUT.
+  This is no longer sent by newer kernels. Instead, HID core converts it into a
+  raw output report and sends it via UHID_OUTPUT.
 
   UHID_FEATURE:
   This event is sent if the kernel driver wants to perform a feature request as
diff --git a/Documentation/hwmon/abituguru-datasheet b/Documentation/hwmon/abituguru-datasheet
index 8d2be8a0b1e3..86c0b1251c81 100644
--- a/Documentation/hwmon/abituguru-datasheet
+++ b/Documentation/hwmon/abituguru-datasheet
@@ -299,7 +299,7 @@ Byte 1:
 min threshold (scale as bank 0x26)
 
 
-Warning for the adventerous
+Warning for the adventurous
 ===========================
 
 A word of caution to those who want to experiment and see if they can figure
diff --git a/Documentation/hwmon/ads1015 b/Documentation/hwmon/ads1015
index f6fe9c203733..063b80d857b1 100644
--- a/Documentation/hwmon/ads1015
+++ b/Documentation/hwmon/ads1015
@@ -6,6 +6,10 @@ Supported chips:
     Prefix: 'ads1015'
     Datasheet: Publicly available at the Texas Instruments website :
                http://focus.ti.com/lit/ds/symlink/ads1015.pdf
+  * Texas Instruments ADS1115
+    Prefix: 'ads1115'
+    Datasheet: Publicly available at the Texas Instruments website :
+               http://focus.ti.com/lit/ds/symlink/ads1115.pdf
 
 Authors:
         Dirk Eibach, Guntermann & Drunck GmbH <eibach@gdsys.de>
@@ -13,9 +17,9 @@ Authors:
 Description
 -----------
 
-This driver implements support for the Texas Instruments ADS1015.
+This driver implements support for the Texas Instruments ADS1015/ADS1115.
 
-This device is a 12-bit A-D converter with 4 inputs.
+This device is a 12/16-bit A-D converter with 4 inputs.
 
 The inputs can be used single ended or in certain differential combinations.
 
diff --git a/Documentation/hwmon/htu21 b/Documentation/hwmon/htu21
new file mode 100644
index 000000000000..f39a215fb6ae
--- /dev/null
+++ b/Documentation/hwmon/htu21
@@ -0,0 +1,46 @@
+Kernel driver htu21
+===================
+
+Supported chips:
+  * Measurement Specialties HTU21D
+    Prefix: 'htu21'
+    Addresses scanned: none
+    Datasheet: Publicly available at the Measurement Specialties website
+    http://www.meas-spec.com/downloads/HTU21D.pdf
+
+
+Author:
+  William Markezana <william.markezana@meas-spec.com>
+
+Description
+-----------
+
+The HTU21D is a humidity and temperature sensor in a DFN package of
+only 3 x 3 mm footprint and 0.9 mm height.
+
+The devices communicate with the I2C protocol. All sensors are set to the
+same I2C address 0x40, so an entry with I2C_BOARD_INFO("htu21", 0x40) can
+be used in the board setup code.
+
+This driver does not auto-detect devices. You will have to instantiate the
+devices explicitly. Please see Documentation/i2c/instantiating-devices
+for details.
+
+sysfs-Interface
+---------------
+
+temp1_input - temperature input
+humidity1_input - humidity input
+
+Notes
+-----
+
+The driver uses the default resolution settings of 12 bit for humidity and 14
+bit for temperature, which results in typical measurement times of 11 ms for
+humidity and 44 ms for temperature. To keep self heating below 0.1 degree
+Celsius, the device should not be active for more than 10% of the time. For
+this reason, the driver performs no more than two measurements per second and
+reports cached information if polled more frequently.
+
+Different resolutions, the on-chip heater, using the CRC checksum and reading
+the serial number are not supported yet.
diff --git a/Documentation/hwmon/k10temp b/Documentation/hwmon/k10temp
index 90956b618025..4dfdc8f83633 100644
--- a/Documentation/hwmon/k10temp
+++ b/Documentation/hwmon/k10temp
@@ -12,6 +12,7 @@ Supported chips:
 * AMD Family 12h processors: "Llano" (E2/A4/A6/A8-Series)
 * AMD Family 14h processors: "Brazos" (C/E/G/Z-Series)
 * AMD Family 15h processors: "Bulldozer" (FX-Series), "Trinity"
+* AMD Family 16h processors: "Kabini"
 
   Prefix: 'k10temp'
   Addresses scanned: PCI space
diff --git a/Documentation/hwmon/lm25066 b/Documentation/hwmon/lm25066
index c1b57d72efc3..b34c3de5c1bc 100644
--- a/Documentation/hwmon/lm25066
+++ b/Documentation/hwmon/lm25066
@@ -8,6 +8,11 @@ Supported chips:
     Datasheets:
         http://www.ti.com/lit/gpn/lm25056
         http://www.ti.com/lit/gpn/lm25056a
+  * TI LM25063
+    Prefix: 'lm25063'
+    Addresses scanned: -
+    Datasheet:
+        To be announced
   * National Semiconductor LM25066
     Prefix: 'lm25066'
     Addresses scanned: -
@@ -32,7 +37,7 @@ Description
 -----------
 
 This driver supports hardware montoring for National Semiconductor / TI LM25056,
-LM25066, LM5064, and LM5064 Power Management, Monitoring, Control, and
+LM25063, LM25066, LM5064, and LM5066 Power Management, Monitoring, Control, and
 Protection ICs.
 
 The driver is a client driver to the core PMBus driver. Please see
@@ -64,8 +69,12 @@ in1_input		Measured input voltage.
 in1_average             Average measured input voltage.
 in1_min                 Minimum input voltage.
 in1_max                 Maximum input voltage.
+in1_crit                Critical high input voltage (LM25063 only).
+in1_lcrit               Critical low input voltage (LM25063 only).
 in1_min_alarm           Input voltage low alarm.
 in1_max_alarm           Input voltage high alarm.
+in1_lcrit_alarm         Input voltage critical low alarm (LM25063 only).
+in1_crit_alarm          Input voltage critical high alarm. (LM25063 only).
 
 in2_label               "vmon"
 in2_input               Measured voltage on VAUX pin
@@ -80,12 +89,16 @@ in3_input		Measured output voltage.
 in3_average             Average measured output voltage.
 in3_min                 Minimum output voltage.
 in3_min_alarm           Output voltage low alarm.
+in3_highest             Historical minimum output voltage (LM25063 only).
+in3_lowest              Historical maximum output voltage (LM25063 only).
 
 curr1_label             "iin"
 curr1_input             Measured input current.
 curr1_average           Average measured input current.
 curr1_max               Maximum input current.
+curr1_crit              Critical input current (LM25063 only).
 curr1_max_alarm         Input current high alarm.
+curr1_crit_alarm        Input current critical high alarm (LM25063 only).
 
 power1_label            "pin"
 power1_input            Measured input power.
@@ -95,6 +108,11 @@ power1_alarm		Input power alarm
 power1_input_highest    Historical maximum power.
 power1_reset_history    Write any value to reset maximum power history.
 
+power2_label            "pout". LM25063 only.
+power2_input            Measured output power.
+power2_max              Maximum output power limit.
+power2_crit             Critical output power limit.
+
 temp1_input             Measured temperature.
 temp1_max               Maximum temperature.
 temp1_crit              Critical high temperature.
diff --git a/Documentation/hwmon/ltc2978 b/Documentation/hwmon/ltc2978
index dc0d08c61305..a0546fc42273 100644
--- a/Documentation/hwmon/ltc2978
+++ b/Documentation/hwmon/ltc2978
@@ -6,10 +6,15 @@ Supported chips:
     Prefix: 'ltc2974'
     Addresses scanned: -
     Datasheet: http://www.linear.com/product/ltc2974
-  * Linear Technology LTC2978
+  * Linear Technology LTC2977
+    Prefix: 'ltc2977'
+    Addresses scanned: -
+    Datasheet: http://www.linear.com/product/ltc2977
+  * Linear Technology LTC2978, LTC2978A
     Prefix: 'ltc2978'
     Addresses scanned: -
     Datasheet: http://www.linear.com/product/ltc2978
+               http://www.linear.com/product/ltc2978a
   * Linear Technology LTC3880
     Prefix: 'ltc3880'
     Addresses scanned: -
@@ -26,8 +31,9 @@ Description
 -----------
 
 LTC2974 is a quad digital power supply manager. LTC2978 is an octal power supply
-monitor. LTC3880 is a dual output poly-phase step-down DC/DC controller. LTC3883
-is a single phase step-down DC/DC controller.
+monitor. LTC2977 is a pin compatible replacement for LTC2978. LTC3880 is a dual
+output poly-phase step-down DC/DC controller. LTC3883 is a single phase
+step-down DC/DC controller.
 
 
 Usage Notes
@@ -49,21 +55,25 @@ Sysfs attributes
 in1_label               "vin"
 in1_input               Measured input voltage.
 in1_min                 Minimum input voltage.
-in1_max                 Maximum input voltage. LTC2974 and LTC2978 only.
-in1_lcrit               Critical minimum input voltage. LTC2974 and LTC2978
-                        only.
+in1_max                 Maximum input voltage.
+                        LTC2974, LTC2977, and LTC2978 only.
+in1_lcrit               Critical minimum input voltage.
+                        LTC2974, LTC2977, and LTC2978 only.
 in1_crit                Critical maximum input voltage.
 in1_min_alarm           Input voltage low alarm.
-in1_max_alarm           Input voltage high alarm. LTC2974 and LTC2978 only.
-in1_lcrit_alarm         Input voltage critical low alarm. LTC2974 and LTC2978
-                        only.
+in1_max_alarm           Input voltage high alarm.
+                        LTC2974, LTC2977, and LTC2978 only.
+in1_lcrit_alarm         Input voltage critical low alarm.
+                        LTC2974, LTC2977, and LTC2978 only.
 in1_crit_alarm          Input voltage critical high alarm.
-in1_lowest              Lowest input voltage. LTC2974 and LTC2978 only.
+in1_lowest              Lowest input voltage.
+                        LTC2974, LTC2977, and LTC2978 only.
 in1_highest             Highest input voltage.
 in1_reset_history       Reset input voltage history.
 
 in[N]_label             "vout[1-8]".
                         LTC2974: N=2-5
+                        LTC2977: N=2-9
                         LTC2978: N=2-9
                         LTC3880: N=2-3
                         LTC3883: N=2
@@ -83,21 +93,23 @@ in[N]_reset_history	Reset output voltage history.
 temp[N]_input           Measured temperature.
                         On LTC2974, temp[1-4] report external temperatures,
                         and temp5 reports the chip temperature.
-                        On LTC2978, only one temperature measurement is
-                        supported and reports the chip temperature.
+                        On LTC2977 and LTC2978, only one temperature measurement
+                        is supported and reports the chip temperature.
                         On LTC3880, temp1 and temp2 report external
                         temperatures, and temp3 reports the chip temperature.
                         On LTC3883, temp1 reports an external temperature,
                         and temp2 reports the chip temperature.
-temp[N]_min             Mimimum temperature. LTC2974 and LTC2978 only.
+temp[N]_min             Mimimum temperature. LTC2974, LCT2977, and LTC2978 only.
 temp[N]_max             Maximum temperature.
 temp[N]_lcrit           Critical low temperature.
 temp[N]_crit            Critical high temperature.
-temp[N]_min_alarm       Temperature low alarm. LTC2974 and LTC2978 only.
+temp[N]_min_alarm       Temperature low alarm.
+                        LTC2974, LTC2977, and LTC2978 only.
 temp[N]_max_alarm       Temperature high alarm.
 temp[N]_lcrit_alarm     Temperature critical low alarm.
 temp[N]_crit_alarm      Temperature critical high alarm.
-temp[N]_lowest          Lowest measured temperature. LTC2974 and LTC2978 only.
+temp[N]_lowest          Lowest measured temperature.
+                        LTC2974, LTC2977, and LTC2978 only.
                         Not supported for chip temperature sensor on LTC2974.
 temp[N]_highest         Highest measured temperature. Not supported for chip
                         temperature sensor on LTC2974.
@@ -109,6 +121,7 @@ power1_input		Measured input power.
 
 power[N]_label          "pout[1-4]".
                         LTC2974: N=1-4
+                        LTC2977: Not supported
                         LTC2978: Not supported
                         LTC3880: N=1-2
                         LTC3883: N=2
@@ -123,6 +136,7 @@ curr1_reset_history	Reset input current history. LTC3883 only.
 
 curr[N]_label           "iout[1-4]".
                         LTC2974: N=1-4
+                        LTC2977: not supported
                         LTC2978: not supported
                         LTC3880: N=2-3
                         LTC3883: N=2
diff --git a/Documentation/hwmon/submitting-patches b/Documentation/hwmon/submitting-patches
index 46286460462b..3d1bac399a22 100644
--- a/Documentation/hwmon/submitting-patches
+++ b/Documentation/hwmon/submitting-patches
@@ -1,7 +1,7 @@
         How to Get Your Patch Accepted Into the Hwmon Subsystem
         -------------------------------------------------------
 
-This text is is a collection of suggestions for people writing patches or
+This text is a collection of suggestions for people writing patches or
 drivers for the hwmon subsystem. Following these suggestions will greatly
 increase the chances of your change being accepted.
 
diff --git a/Documentation/hwmon/w83791d b/Documentation/hwmon/w83791d
index 90387c3540f7..f4021a285460 100644
--- a/Documentation/hwmon/w83791d
+++ b/Documentation/hwmon/w83791d
@@ -17,7 +17,7 @@ Credits:
     Philip Edelbrock <phil@netroedge.com>,
     and Mark Studebaker <mdsxyz123@yahoo.com>
   w83792d.c:
-    Chunhao Huang <DZShen@Winbond.com.tw>,
+    Shane Huang (Winbond),
     Rudolf Marek <r.marek@assembler.cz>
 
 Additional contributors:
diff --git a/Documentation/hwmon/w83792d b/Documentation/hwmon/w83792d
index 8a023ce0b72e..53f7b6866fec 100644
--- a/Documentation/hwmon/w83792d
+++ b/Documentation/hwmon/w83792d
@@ -7,8 +7,7 @@ Supported chips:
     Addresses scanned: I2C 0x2c - 0x2f
     Datasheet: http://www.winbond.com.tw
 
-Author: Chunhao Huang
-Contact: DZShen <DZShen@Winbond.com.tw>
+Author: Shane Huang (Winbond)
 
 
 Module Parameters
diff --git a/Documentation/hwspinlock.txt b/Documentation/hwspinlock.txt
index a903ee5e9776..62f7d4ea6e26 100644
--- a/Documentation/hwspinlock.txt
+++ b/Documentation/hwspinlock.txt
@@ -241,7 +241,7 @@ int hwspinlock_example2(void)
      locks).
      Should be called from a process context (this function might sleep).
      Returns the address of hwspinlock on success, or NULL on error (e.g.
-     if the hwspinlock is sill in use).
+     if the hwspinlock is still in use).
 
 5. Important structs
 
diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4
index a370b2047cf3..c097e0f020fe 100644
--- a/Documentation/i2c/busses/i2c-piix4
+++ b/Documentation/i2c/busses/i2c-piix4
@@ -73,9 +73,10 @@ this driver on those mainboards.
 The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are
 identical to the PIIX4 in I2C/SMBus support.
 
-The AMD SB700 and SP5100 chipsets implement two PIIX4-compatible SMBus
-controllers. If your BIOS initializes the secondary controller, it will
-be detected by this driver as an "Auxiliary SMBus Host Controller".
+The AMD SB700, SB800, SP5100 and Hudson-2 chipsets implement two
+PIIX4-compatible SMBus controllers. If your BIOS initializes the
+secondary controller, it will be detected by this driver as
+an "Auxiliary SMBus Host Controller".
 
 If you own Force CPCI735 motherboard or other OSB4 based systems you may need
 to change the SMBus Interrupt Select register so the SMBus controller uses
diff --git a/Documentation/i2c/instantiating-devices b/Documentation/i2c/instantiating-devices
index 22182660dda7..c70e7a7638d1 100644
--- a/Documentation/i2c/instantiating-devices
+++ b/Documentation/i2c/instantiating-devices
@@ -19,7 +19,7 @@ i2c_board_info which is registered by calling i2c_register_board_info().
 
 Example (from omap2 h4):
 
-static struct i2c_board_info __initdata h4_i2c_board_info[] = {
+static struct i2c_board_info h4_i2c_board_info[] __initdata = {
         {
                 I2C_BOARD_INFO("isp1301_omap", 0x2d),
                 .irq            = OMAP_GPIO_IRQ(125),
diff --git a/Documentation/i2c/upgrading-clients b/Documentation/i2c/upgrading-clients
index d6991625c407..8e5fbd88c7d1 100644
--- a/Documentation/i2c/upgrading-clients
+++ b/Documentation/i2c/upgrading-clients
@@ -196,8 +196,8 @@ static int example_probe(struct i2c_client *i2c_client,
 
 Update the detach method, by changing the name to _remove and
 to delete the i2c_detach_client call. It is possible that you
-can also remove the ret variable as it is not not needed for
-any of the core functions.
+can also remove the ret variable as it is not needed for any
+of the core functions.
 
 - static int example_detach(struct i2c_client *client)
 + static int example_remove(struct i2c_client *client)
diff --git a/Documentation/input/gamepad.txt b/Documentation/input/gamepad.txt
new file mode 100644
index 000000000000..8002c894c6b0
--- /dev/null
+++ b/Documentation/input/gamepad.txt
@@ -0,0 +1,156 @@
+                            Linux Gamepad API
+----------------------------------------------------------------------------
+
+1. Intro
+~~~~~~~~
+Linux provides many different input drivers for gamepad hardware. To avoid
+having user-space deal with different button-mappings for each gamepad, this
+document defines how gamepads are supposed to report their data.
+
+2. Geometry
+~~~~~~~~~~~
+As "gamepad" we define devices which roughly look like this:
+
+            ____________________________              __
+           / [__ZL__]          [__ZR__] \               |
+          / [__ TL __]        [__ TR __] \              | Front Triggers
+       __/________________________________\__         __|
+      /                                  _   \          |
+     /      /\           __             (N)   \         |
+    /       ||      __  |MO|  __     _       _ \        | Main Pad
+   |    <===DP===> |SE|      |ST|   (W) -|- (E) |       |
+    \       ||    ___          ___       _     /        |
+    /\      \/   /   \        /   \     (S)   /\      __|
+   /  \________ | LS  | ____ |  RS | ________/  \       |
+  |         /  \ \___/ /    \ \___/ /  \         |      | Control Sticks
+  |        /    \_____/      \_____/    \        |    __|
+  |       /                              \       |
+   \_____/                                \_____/
+
+       |________|______|    |______|___________|
+         D-Pad    Left       Right   Action Pad
+                 Stick       Stick
+
+                   |_____________|
+                      Menu Pad
+
+Most gamepads have the following features:
+  - Action-Pad
+    4 buttons in diamonds-shape (on the right side). The buttons are
+    differently labeled on most devices so we define them as NORTH,
+    SOUTH, WEST and EAST.
+  - D-Pad (Direction-pad)
+    4 buttons (on the left side) that point up, down, left and right.
+  - Menu-Pad
+    Different constellations, but most-times 2 buttons: SELECT - START
+    Furthermore, many gamepads have a fancy branded button that is used as
+    special system-button. It often looks different to the other buttons and
+    is used to pop up system-menus or system-settings.
+  - Analog-Sticks
+    Analog-sticks provide freely moveable sticks to control directions. Not
+    all devices have both or any, but they are present at most times.
+    Analog-sticks may also provide a digital button if you press them.
+  - Triggers
+    Triggers are located on the upper-side of the pad in vertical direction.
+    Not all devices provide them, but the upper buttons are normally named
+    Left- and Right-Triggers, the lower buttons Z-Left and Z-Right.
+  - Rumble
+    Many devices provide force-feedback features. But are mostly just
+    simple rumble motors.
+
+3. Detection
+~~~~~~~~~~~~
+All gamepads that follow the protocol described here map BTN_GAMEPAD. This is
+an alias for BTN_SOUTH/BTN_A. It can be used to identify a gamepad as such.
+However, not all gamepads provide all features, so you need to test for all
+features that you need, first. How each feature is mapped is described below.
+
+Legacy drivers often don't comply to these rules. As we cannot change them
+for backwards-compatibility reasons, you need to provide fixup mappings in
+user-space yourself. Some of them might also provide module-options that
+change the mappings so you can adivce users to set these.
+
+All new gamepads are supposed to comply with this mapping. Please report any
+bugs, if they don't.
+
+There are a lot of less-featured/less-powerful devices out there, which re-use
+the buttons from this protocol. However, they try to do this in a compatible
+fashion. For example, the "Nintendo Wii Nunchuk" provides two trigger buttons
+and one analog stick. It reports them as if it were a gamepad with only one
+analog stick and two trigger buttons on the right side.
+But that means, that if you only support "real" gamepads, you must test
+devices for _all_ reported events that you need. Otherwise, you will also get
+devices that report a small subset of the events.
+
+No other devices, that do not look/feel like a gamepad, shall report these
+events.
+
+4. Events
+~~~~~~~~~
+Gamepads report the following events:
+
+Action-Pad:
+  Every gamepad device has at least 2 action buttons. This means, that every
+  device reports BTN_SOUTH (which BTN_GAMEPAD is an alias for). Regardless
+  of the labels on the buttons, the codes are sent according to the
+  physical position of the buttons.
+  Please note that 2- and 3-button pads are fairly rare and old. You might
+  want to filter gamepads that do not report all four.
+    2-Button Pad:
+      If only 2 action-buttons are present, they are reported as BTN_SOUTH and
+      BTN_EAST. For vertical layouts, the upper button is BTN_EAST. For
+      horizontal layouts, the button more on the right is BTN_EAST.
+    3-Button Pad:
+      If only 3 action-buttons are present, they are reported as (from left
+      to right): BTN_WEST, BTN_SOUTH, BTN_EAST
+      If the buttons are aligned perfectly vertically, they are reported as
+      (from top down): BTN_WEST, BTN_SOUTH, BTN_EAST
+    4-Button Pad:
+      If all 4 action-buttons are present, they can be aligned in two
+      different formations. If diamond-shaped, they are reported as BTN_NORTH,
+      BTN_WEST, BTN_SOUTH, BTN_EAST according to their physical location.
+      If rectangular-shaped, the upper-left button is BTN_NORTH, lower-left
+      is BTN_WEST, lower-right is BTN_SOUTH and upper-right is BTN_EAST.
+
+D-Pad:
+  Every gamepad provides a D-Pad with four directions: Up, Down, Left, Right
+  Some of these are available as digital buttons, some as analog buttons. Some
+  may even report both. The kernel does not convert between these so
+  applications should support both and choose what is more appropriate if
+  both are reported.
+    Digital buttons are reported as:
+      BTN_DPAD_*
+    Analog buttons are reported as:
+      ABS_HAT0X and ABS_HAT0Y
+
+Analog-Sticks:
+  The left analog-stick is reported as ABS_X, ABS_Y. The right analog stick is
+  reported as ABS_RX, ABS_RY. Zero, one or two sticks may be present.
+  If analog-sticks provide digital buttons, they are mapped accordingly as
+  BTN_THUMBL (first/left) and BTN_THUMBR (second/right).
+
+Triggers:
+  Trigger buttons can be available as digital or analog buttons or both. User-
+  space must correctly deal with any situation and choose the most appropriate
+  mode.
+  Upper trigger buttons are reported as BTN_TR or ABS_HAT1X (right) and BTN_TL
+  or ABS_HAT1Y (left). Lower trigger buttons are reported as BTN_TR2 or
+  ABS_HAT2X (right/ZR) and BTN_TL2 or ABS_HAT2Y (left/ZL).
+  If only one trigger-button combination is present (upper+lower), they are
+  reported as "right" triggers (BTN_TR/ABS_HAT1X).
+
+Menu-Pad:
+  Menu buttons are always digital and are mapped according to their location
+  instead of their labels. That is:
+    1-button Pad: Mapped as BTN_START
+    2-button Pad: Left button mapped as BTN_SELECT, right button mapped as
+                  BTN_START
+  Many pads also have a third button which is branded or has a special symbol
+  and meaning. Such buttons are mapped as BTN_MODE. Examples are the Nintendo
+  "HOME" button, the XBox "X"-button or Sony "P" button.
+
+Rumble:
+  Rumble is adverticed as FF_RUMBLE.
+
+----------------------------------------------------------------------------
+  Written 2013 by David Herrmann <dh.herrmann@gmail.com>
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
index 2a5f0e14efa3..7cbfa3c4fc3d 100644
--- a/Documentation/ioctl/ioctl-number.txt
+++ b/Documentation/ioctl/ioctl-number.txt
@@ -138,6 +138,7 @@ Code  Seq#(hex)	Include File		Comments
 'H'     C0-DF   net/bluetooth/cmtp/cmtp.h       conflict!
 'H'     C0-DF   net/bluetooth/bnep/bnep.h       conflict!
 'H'     F1      linux/hid-roccat.h      <mailto:erazor_de@users.sourceforge.net>
+'H'     F8-FA   sound/firewire.h
 'I'     all     linux/isdn.h            conflict!
 'I'     00-0F   drivers/isdn/divert/isdn_divert.h       conflict!
 'I'     40-4F   linux/mISDNif.h         conflict!
diff --git a/Documentation/kbuild/kconfig-language.txt b/Documentation/kbuild/kconfig-language.txt
index c858f8419eba..c420676c6fe3 100644
--- a/Documentation/kbuild/kconfig-language.txt
+++ b/Documentation/kbuild/kconfig-language.txt
@@ -147,6 +147,7 @@ applicable everywhere (see syntax).
   - "modules"
     This declares the symbol to be used as the MODULES symbol, which
     enables the third modular state for all config symbols.
+    At most one symbol may have the "modules" option set.
 
   - "env"=<value>
     This imports the environment variable into Kconfig. It behaves like
diff --git a/Documentation/kbuild/kconfig.txt b/Documentation/kbuild/kconfig.txt
index e349f293cc98..8ef6dbb6a462 100644
--- a/Documentation/kbuild/kconfig.txt
+++ b/Documentation/kbuild/kconfig.txt
@@ -175,11 +175,9 @@ Searching in menuconfig:
                 /^hotplug
 
         When searching, symbols are sorted thus:
-          - exact match first: an exact match is when the search matches
-            the complete symbol name;
-          - alphabetical order: when two symbols do not match exactly,
-            they are sorted in alphabetical order (in the user's current
-            locale).
+          - first, exact matches, sorted alphabetically (an exact match
+            is when the search matches the complete symbol name);
+          - then, other matches, sorted alphabetically.
         For example: ^ATH.K matches:
             ATH5K ATH9K ATH5K_AHB ATH5K_DEBUG [...] ATH6KL ATH6KL_DEBUG
             [...] ATH9K_AHB ATH9K_BTCOEX_SUPPORT ATH9K_COMMON [...]
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 15356aca938c..fd3ecedc084d 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -235,10 +235,61 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         Format: To spoof as Windows 98: ="Microsoft Windows"
 
         acpi_osi=       [HW,ACPI] Modify list of supported OS interface strings
-                        acpi_osi="string1"      # add string1 -- only one string
-                        acpi_osi="!string2"     # remove built-in string2
+                        acpi_osi="string1"      # add string1
+                        acpi_osi="!string2"     # remove string2
+                        acpi_osi=!*             # remove all strings
+                        acpi_osi=!              # disable all built-in OS vendor
+                                                  strings
                         acpi_osi=               # disable all strings
 
+                        'acpi_osi=!' can be used in combination with single or
+                        multiple 'acpi_osi="string1"' to support specific OS
+                        vendor string(s).  Note that such command can only
+                        affect the default state of the OS vendor strings, thus
+                        it cannot affect the default state of the feature group
+                        strings and the current state of the OS vendor strings,
+                        specifying it multiple times through kernel command line
+                        is meaningless.  This command is useful when one do not
+                        care about the state of the feature group strings which
+                        should be controlled by the OSPM.
+                        Examples:
+                          1. 'acpi_osi=! acpi_osi="Windows 2000"' is equivalent
+                             to 'acpi_osi="Windows 2000" acpi_osi=!', they all
+                             can make '_OSI("Windows 2000")' TRUE.
+
+                        'acpi_osi=' cannot be used in combination with other
+                        'acpi_osi=' command lines, the _OSI method will not
+                        exist in the ACPI namespace.  NOTE that such command can
+                        only affect the _OSI support state, thus specifying it
+                        multiple times through kernel command line is also
+                        meaningless.
+                        Examples:
+                          1. 'acpi_osi=' can make 'CondRefOf(_OSI, Local1)'
+                             FALSE.
+
+                        'acpi_osi=!*' can be used in combination with single or
+                        multiple 'acpi_osi="string1"' to support specific
+                        string(s).  Note that such command can affect the
+                        current state of both the OS vendor strings and the
+                        feature group strings, thus specifying it multiple times
+                        through kernel command line is meaningful.  But it may
+                        still not able to affect the final state of a string if
+                        there are quirks related to this string.  This command
+                        is useful when one want to control the state of the
+                        feature group strings to debug BIOS issues related to
+                        the OSPM features.
+                        Examples:
+                          1. 'acpi_osi="Module Device" acpi_osi=!*' can make
+                             '_OSI("Module Device")' FALSE.
+                          2. 'acpi_osi=!* acpi_osi="Module Device"' can make
+                             '_OSI("Module Device")' TRUE.
+                          3. 'acpi_osi=! acpi_osi=!* acpi_osi="Windows 2000"' is
+                             equivalent to
+                             'acpi_osi=!* acpi_osi=! acpi_osi="Windows 2000"'
+                             and
+                             'acpi_osi=!* acpi_osi="Windows 2000" acpi_osi=!',
+                             they all will make '_OSI("Windows 2000")' TRUE.
+
         acpi_pm_good    [X86]
                         Override the pmtimer bug detection: force the kernel
                         to assume that this machine's pmtimer latches its value
@@ -429,6 +480,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         Format: <io>,<irq>,<mode>
                         See header of drivers/net/hamradio/baycom_ser_hdx.c.
 
+        blkdevparts=    Manual partition parsing of block device(s) for
+                        embedded devices based on command line input.
+                        See Documentation/block/cmdline-partition.txt
+
         boot_delay=     Milliseconds to delay each printk during boot.
                         Values larger than 10 seconds (10000) are changed to
                         no delay (0).
@@ -792,6 +847,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 
         earlyprintk=    [X86,SH,BLACKFIN,ARM]
                         earlyprintk=vga
+                        earlyprintk=efi
                         earlyprintk=xen
                         earlyprintk=serial[,ttySn[,baudrate]]
                         earlyprintk=serial[,0x...[,baudrate]]
@@ -805,7 +861,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         Append ",keep" to not disable it when the real console
                         takes over.
 
-                        Only vga or serial or usb debug port at a time.
+                        Only one of vga, efi, serial, or usb debug port can
+                        be used at a time.
 
                         Currently only ttyS0 and ttyS1 may be specified by
                         name.  Other I/O ports may be explicitly specified
@@ -819,8 +876,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         Interaction with the standard serial driver is not
                         very good.
 
-                        The VGA output is eventually overwritten by the real
-                        console.
+                        The VGA and EFI output is eventually overwritten by
+                        the real console.
 
                         The xen output can only be used by Xen PV guests.
 
@@ -1306,7 +1363,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         pages. In the event, a node is too small to have both
                         kernelcore and Movable pages, kernelcore pages will
                         take priority and other nodes will have a larger number
-                        of kernelcore pages.  The Movable zone is used for the
+                        of Movable pages.  The Movable zone is used for the
                         allocation of pages that may be reclaimed or moved
                         by the page migration subsystem.  This means that
                         HugeTLB pages may not be allocated from this zone.
@@ -1847,6 +1904,18 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         will be sent.
                         The default is to send the implementation identification
                         information.
+        
+        nfs.recover_lost_locks =
+                        [NFSv4] Attempt to recover locks that were lost due
+                        to a lease timeout on the server. Please note that
+                        doing this risks data corruption, since there are
+                        no guarantees that the file will remain unchanged
+                        after the locks are lost.
+                        If you want to enable the kernel legacy behaviour of
+                        attempting to recover these locks, then set this
+                        parameter to '1'.
+                        The default parameter value of '0' causes the kernel
+                        not to attempt recovery of lost locks.
 
         nfsd.nfs4_disable_idmapping=
                         [NFSv4] When set to the default of '1', the NFSv4
@@ -2532,7 +2601,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
         ramdisk_size=   [RAM] Sizes of RAM disks in kilobytes
                         See Documentation/blockdev/ramdisk.txt.
 
-        rcu_nocbs=      [KNL,BOOT]
+        rcu_nocbs=      [KNL]
                         In kernels built with CONFIG_RCU_NOCB_CPU=y, set
                         the specified list of CPUs to be no-callback CPUs.
                         Invocation of these CPUs' RCU callbacks will
@@ -2545,7 +2614,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         real-time workloads.  It can also improve energy
                         efficiency for asymmetric multiprocessors.
 
-        rcu_nocb_poll   [KNL,BOOT]
+        rcu_nocb_poll   [KNL]
                         Rather than requiring that offloaded CPUs
                         (specified by rcu_nocbs= above) explicitly
                         awaken the corresponding "rcuoN" kthreads,
@@ -2556,126 +2625,145 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         energy efficiency by requiring that the kthreads
                         periodically wake up to do the polling.
 
-        rcutree.blimit= [KNL,BOOT]
+        rcutree.blimit= [KNL]
                         Set maximum number of finished RCU callbacks to process
                         in one batch.
 
-        rcutree.fanout_leaf=    [KNL,BOOT]
+        rcutree.rcu_fanout_leaf= [KNL]
                         Increase the number of CPUs assigned to each
                         leaf rcu_node structure.  Useful for very large
                         systems.
 
-        rcutree.jiffies_till_first_fqs= [KNL,BOOT]
+        rcutree.jiffies_till_first_fqs= [KNL]
                         Set delay from grace-period initialization to
                         first attempt to force quiescent states.
                         Units are jiffies, minimum value is zero,
                         and maximum value is HZ.
 
-        rcutree.jiffies_till_next_fqs= [KNL,BOOT]
+        rcutree.jiffies_till_next_fqs= [KNL]
                         Set delay between subsequent attempts to force
                         quiescent states.  Units are jiffies, minimum
                         value is one, and maximum value is HZ.
 
-        rcutree.qhimark=        [KNL,BOOT]
+        rcutree.qhimark= [KNL]
                         Set threshold of queued
                         RCU callbacks over which batch limiting is disabled.
 
-        rcutree.qlowmark=       [KNL,BOOT]
+        rcutree.qlowmark= [KNL]
                         Set threshold of queued RCU callbacks below which
                         batch limiting is re-enabled.
 
-        rcutree.rcu_cpu_stall_suppress= [KNL,BOOT]
-                        Suppress RCU CPU stall warning messages.
-
-        rcutree.rcu_cpu_stall_timeout= [KNL,BOOT]
-                        Set timeout for RCU CPU stall warning messages.
-
-        rcutree.rcu_idle_gp_delay=      [KNL,BOOT]
+        rcutree.rcu_idle_gp_delay= [KNL]
                         Set wakeup interval for idle CPUs that have
                         RCU callbacks (RCU_FAST_NO_HZ=y).
 
-        rcutree.rcu_idle_lazy_gp_delay= [KNL,BOOT]
+        rcutree.rcu_idle_lazy_gp_delay= [KNL]
                         Set wakeup interval for idle CPUs that have
                         only "lazy" RCU callbacks (RCU_FAST_NO_HZ=y).
                         Lazy RCU callbacks are those which RCU can
                         prove do nothing more than free memory.
 
-        rcutorture.fqs_duration= [KNL,BOOT]
+        rcutorture.fqs_duration= [KNL]
                         Set duration of force_quiescent_state bursts.
 
-        rcutorture.fqs_holdoff= [KNL,BOOT]
+        rcutorture.fqs_holdoff= [KNL]
                         Set holdoff time within force_quiescent_state bursts.
 
-        rcutorture.fqs_stutter= [KNL,BOOT]
+        rcutorture.fqs_stutter= [KNL]
                         Set wait time between force_quiescent_state bursts.
 
-        rcutorture.irqreader= [KNL,BOOT]
-                        Test RCU readers from irq handlers.
+        rcutorture.gp_exp= [KNL]
+                        Use expedited update-side primitives.
+
+        rcutorture.gp_normal= [KNL]
+                        Use normal (non-expedited) update-side primitives.
+                        If both gp_exp and gp_normal are set, do both.
+                        If neither gp_exp nor gp_normal are set, still
+                        do both.
 
-        rcutorture.n_barrier_cbs= [KNL,BOOT]
+        rcutorture.n_barrier_cbs= [KNL]
                         Set callbacks/threads for rcu_barrier() testing.
 
-        rcutorture.nfakewriters= [KNL,BOOT]
+        rcutorture.nfakewriters= [KNL]
                         Set number of concurrent RCU writers.  These just
                         stress RCU, they don't participate in the actual
                         test, hence the "fake".
 
-        rcutorture.nreaders= [KNL,BOOT]
+        rcutorture.nreaders= [KNL]
                         Set number of RCU readers.
 
-        rcutorture.onoff_holdoff= [KNL,BOOT]
+        rcutorture.object_debug= [KNL]
+                        Enable debug-object double-call_rcu() testing.
+
+        rcutorture.onoff_holdoff= [KNL]
                         Set time (s) after boot for CPU-hotplug testing.
 
-        rcutorture.onoff_interval= [KNL,BOOT]
+        rcutorture.onoff_interval= [KNL]
                         Set time (s) between CPU-hotplug operations, or
                         zero to disable CPU-hotplug testing.
 
-        rcutorture.shuffle_interval= [KNL,BOOT]
+        rcutorture.rcutorture_runnable= [BOOT]
+                        Start rcutorture running at boot time.
+
+        rcutorture.shuffle_interval= [KNL]
                         Set task-shuffle interval (s).  Shuffling tasks
                         allows some CPUs to go into dyntick-idle mode
                         during the rcutorture test.
 
-        rcutorture.shutdown_secs= [KNL,BOOT]
+        rcutorture.shutdown_secs= [KNL]
                         Set time (s) after boot system shutdown.  This
                         is useful for hands-off automated testing.
 
-        rcutorture.stall_cpu= [KNL,BOOT]
+        rcutorture.stall_cpu= [KNL]
                         Duration of CPU stall (s) to test RCU CPU stall
                         warnings, zero to disable.
 
-        rcutorture.stall_cpu_holdoff= [KNL,BOOT]
+        rcutorture.stall_cpu_holdoff= [KNL]
                         Time to wait (s) after boot before inducing stall.
 
-        rcutorture.stat_interval= [KNL,BOOT]
+        rcutorture.stat_interval= [KNL]
                         Time (s) between statistics printk()s.
 
-        rcutorture.stutter= [KNL,BOOT]
+        rcutorture.stutter= [KNL]
                         Time (s) to stutter testing, for example, specifying
                         five seconds causes the test to run for five seconds,
                         wait for five seconds, and so on.  This tests RCU's
                         ability to transition abruptly to and from idle.
 
-        rcutorture.test_boost= [KNL,BOOT]
+        rcutorture.test_boost= [KNL]
                         Test RCU priority boosting?  0=no, 1=maybe, 2=yes.
                         "Maybe" means test if the RCU implementation
                         under test support RCU priority boosting.
 
-        rcutorture.test_boost_duration= [KNL,BOOT]
+        rcutorture.test_boost_duration= [KNL]
                         Duration (s) of each individual boost test.
 
-        rcutorture.test_boost_interval= [KNL,BOOT]
+        rcutorture.test_boost_interval= [KNL]
                         Interval (s) between each boost test.
 
-        rcutorture.test_no_idle_hz= [KNL,BOOT]
+        rcutorture.test_no_idle_hz= [KNL]
                         Test RCU's dyntick-idle handling.  See also the
                         rcutorture.shuffle_interval parameter.
 
-        rcutorture.torture_type= [KNL,BOOT]
+        rcutorture.torture_type= [KNL]
                         Specify the RCU implementation to test.
 
-        rcutorture.verbose= [KNL,BOOT]
+        rcutorture.verbose= [KNL]
                         Enable additional printk() statements.
 
+        rcupdate.rcu_expedited= [KNL]
+                        Use expedited grace-period primitives, for
+                        example, synchronize_rcu_expedited() instead
+                        of synchronize_rcu().  This reduces latency,
+                        but can increase CPU utilization, degrade
+                        real-time latency, and degrade energy efficiency.
+
+        rcupdate.rcu_cpu_stall_suppress= [KNL]
+                        Suppress RCU CPU stall warning messages.
+
+        rcupdate.rcu_cpu_stall_timeout= [KNL]
+                        Set timeout for RCU CPU stall warning messages.
+
         rdinit=         [KNL]
                         Format: <full_path>
                         Run specified binary instead of /init from the ramdisk,
@@ -2953,7 +3041,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         improve throughput, but will also increase the
                         amount of memory reserved for use by the client.
 
-        swapaccount[=0|1]
+        swapaccount=[0|1]
                         [KNL] Enable accounting of swap in memory resource
                         controller if no parameter or 1 is given or disable
                         it if 0 is given (See Documentation/cgroups/memory.txt)
@@ -3322,6 +3410,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                                     them quite hard to use for exploits but
                                     might break your system.
 
+        vt.color=       [VT] Default text color.
+                        Format: 0xYX, X = foreground, Y = background.
+                        Default: 0x07 = light gray on black.
+
         vt.cur_default= [VT] Default cursor shape.
                         Format: 0xCCBBAA, where AA, BB, and CC are the same as
                         the parameters of the <Esc>[?A;B;Cc escape sequence;
@@ -3361,6 +3453,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         overridden by individual drivers. 0 will hide
                         cursors, 1 will display them.
 
+        vt.italic=      [VT] Default color for italic text; 0-15.
+                        Default: 2 = green.
+
+        vt.underline=   [VT] Default color for underlined text; 0-15.
+                        Default: 3 = cyan.
+
         watchdog timers [HW,WDT] For information on watchdog timers,
                         see Documentation/watchdog/watchdog-parameters.txt
                         or other driver-specific files in the
@@ -3394,11 +3492,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                         default x2apic cluster mode on platforms
                         supporting x2apic.
 
-        x86_mrst_timer= [X86-32,APBT]
-                        Choose timer option for x86 Moorestown MID platform.
+        x86_intel_mid_timer= [X86-32,APBT]
+                        Choose timer option for x86 Intel MID platform.
                         Two valid options are apbt timer only and lapic timer
                         plus one apbt timer for broadcast timer.
-                        x86_mrst_timer=apbt_only | lapic_and_apbt
+                        x86_intel_mid_timer=apbt_only | lapic_and_apbt
 
         xen_emul_unplug=                [HW,X86,XEN]
                         Unplug Xen emulated devices
@@ -3412,6 +3510,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                                 the unplug protocol
                         never -- do not unplug even if version check succeeds
 
+        xen_nopvspin    [X86,XEN]
+                        Disables the ticketlock slowpath using Xen PV
+                        optimizations.
+
         xirc2ps_cs=     [NET,PCMCIA]
                         Format:
                         <irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]]
diff --git a/Documentation/kernel-per-CPU-kthreads.txt b/Documentation/kernel-per-CPU-kthreads.txt
index 32351bfabf20..827104fb9364 100644
--- a/Documentation/kernel-per-CPU-kthreads.txt
+++ b/Documentation/kernel-per-CPU-kthreads.txt
@@ -181,12 +181,17 @@ To reduce its OS jitter, do any of the following:
                 make sure that this is safe on your particular system.
         d.      It is not possible to entirely get rid of OS jitter
                 from vmstat_update() on CONFIG_SMP=y systems, but you
-                can decrease its frequency by writing a large value to
-                /proc/sys/vm/stat_interval.  The default value is HZ,
-                for an interval of one second.  Of course, larger values
-                will make your virtual-memory statistics update more
-                slowly.  Of course, you can also run your workload at
-                a real-time priority, thus preempting vmstat_update().
+                can decrease its frequency by writing a large value
+                to /proc/sys/vm/stat_interval.  The default value is
+                HZ, for an interval of one second.  Of course, larger
+                values will make your virtual-memory statistics update
+                more slowly.  Of course, you can also run your workload
+                at a real-time priority, thus preempting vmstat_update(),
+                but if your workload is CPU-bound, this is a bad idea.
+                However, there is an RFC patch from Christoph Lameter
+                (based on an earlier one from Gilad Ben-Yossef) that
+                reduces or even eliminates vmstat overhead for some
+                workloads at https://lkml.org/lkml/2013/9/4/379.
         e.      If running on high-end powerpc servers, build with
                 CONFIG_PPC_RTAS_DAEMON=n.  This prevents the RTAS
                 daemon from running on each CPU every second or so.
diff --git a/Documentation/kmemcheck.txt b/Documentation/kmemcheck.txt
index c28f82895d6b..9398a501fdb9 100644
--- a/Documentation/kmemcheck.txt
+++ b/Documentation/kmemcheck.txt
@@ -91,9 +91,9 @@ information from the kmemcheck warnings, which is extremely valuable in
 debugging a problem. This option is not mandatory, however, because it slows
 down the compilation process and produces a much bigger kernel image.
 
-Now the kmemcheck menu should be visible (under "Kernel hacking" / "kmemcheck:
-trap use of uninitialized memory"). Here follows a description of the
-kmemcheck configuration variables:
+Now the kmemcheck menu should be visible (under "Kernel hacking" / "Memory
+Debugging" / "kmemcheck: trap use of uninitialized memory"). Here follows
+a description of the kmemcheck configuration variables:
 
   o CONFIG_KMEMCHECK
 
diff --git a/Documentation/ko_KR/HOWTO b/Documentation/ko_KR/HOWTO
index 2f48f205fedc..680e64635958 100644
--- a/Documentation/ko_KR/HOWTO
+++ b/Documentation/ko_KR/HOWTO
@@ -182,8 +182,8 @@ Documentation/DocBook/ 디렉토리 내에서 만들어지며 PDF, Postscript, H
 프로젝트를 봐야 한다.
     http://kernelnewbies.org
 그곳은 거의 모든 종류의 기본적인 커널 개발 질문들(질문하기 전에 먼저
-아카이브를 찾아봐라. 과거에 이미 답변되었을 수도 있다)을 할수있는 도움이
-될만한 메일링 리스트가 있다. 또한 실시간으로 질문 할수 있는 IRC 채널도
+아카이브를 찾아봐라. 과거에 이미 답변되었을 수도 있다)을 할 수 있는 도움이
+될만한 메일링 리스트가 있다. 또한 실시간으로 질문 할 수 있는 IRC 채널도
 가지고 있으며 리눅스 커널 개발을 배우는 데 유용한 문서들을 보유하고 있다.
 
 웹사이트는 코드구성, 서브시스템들, 그리고 현재 프로젝트들
@@ -245,7 +245,7 @@ Documentation/DocBook/ 디렉토리 내에서 만들어지며 PDF, Postscript, H
     것을 기억해라. 왜냐하면 변경이 자체내에서만 발생하고 추가된 코드가
     드라이버 외부의 다른 부분에는 영향을 주지 않으므로 그런 변경은
     회귀(역자주: 이전에는 존재하지 않았지만 새로운 기능추가나 변경으로 인해
-                생겨난 버그)를 일으킬 만한 위험을 가지고 있지 않기 때문이다. -rc1이
+    생겨난 버그)를 일으킬 만한 위험을 가지고 있지 않기 때문이다. -rc1이
     배포된 이후에 git를 사용하여 패치들을 Linus에게 보낼수 있지만 패치들은
     공식적인 메일링 리스트로 보내서 검토를 받을 필요가 있다.
   - 새로운 -rc는 Linus가 현재 git tree가 테스트 하기에 충분히 안정된 상태에
@@ -455,7 +455,7 @@ bugme-janitor 메일링 리스트(bugzilla에 모든 변화들이 여기서 메�
  - 의견
  - 변경을 위한 요구
  - 당위성을 위한 요구
- - 고���
+ - ���묵
 
 기억하라. 이것들은 여러분의 패치가 커널로 들어가기 위한 과정이다. 여러분의
 패치들은 비판과 다른 의견을 받을 수 있고 그것들을 기술적인 레벨로 평가하고
@@ -472,7 +472,7 @@ bugme-janitor 메일링 리스트(bugzilla에 모든 변화들이 여기서 메�
 가능한한 가장 좋은 기술적인 해답을 찾고 있는 커뮤니티에서는 항상
 어떤 패치가 얼마나 좋은지에 관하여 다른 의견들이 있을 수 있다. 여러분은
 협조적이어야 하고 기꺼이 여러분의 생각을 커널 내에 맞추어야 한다. 아니면
-적어도 여러분의 것이 가치있다는 것을 ���명하여야 한다. 잘못된 것도 여러분이
+적어도 여러분의 것이 가치있다는 것을 ���명하여야 한다. 잘못된 것도 여러분이
 올바른 방향의 해결책으로 이끌어갈 의지가 있다면 받아들여질 것이라는 점을
 기억하라.
 
@@ -488,21 +488,21 @@ bugme-janitor 메일링 리스트(bugzilla에 모든 변화들이 여기서 메�
 커널 커뮤니티는 가장 전통적인 회사의 개발 환경과는 다르다. 여기에 여러분들의
 문제를 피하기 위한 목록이 있다.
   여러분들이 제안한 변경들에 관하여 말할 때 좋은 것들 :
-    - "이것은 여러 문제들을 해��합니다."
-    - "이것은 2000 라인의 코드를 ���거합니다."
+    - "이것은 여러 문제들을 해��합니다."
+    - "이것은 2000 라인의 코드를 ���입니다."
     - "이것은 내가 말하려는 것에 관해 설명하는 패치입니다."
-    - "나는 5개의 다른 아키텍쳐에서 그것을 테스트했������로..."
-    - "여기에 일련의 작은 패치들이 있���음로..."
-    - "이것은 일반적인 머신에서 성능을 향상시���으로..."
+    - "나는 5개의 다른 아키텍쳐에서 그것을 테스트 했으������..."
+    - "여기에 일련의 작은 패치들이 있���������..."
+    - "이것은 일반적인 머신에서 성능을 향상���으로..."
 
   여러분들이 말할 때 피해야 할 좋지 않은 것들 :
-    - "우리를 그것을 AIT/ptx/Solaris에서 이러한 방법으로 했다. 그러므로 그것은 좋은 것임에 틀립없다..."
+    - "우리는 그것을 AIX/ptx/Solaris에서 이러한 방법으로 했다. 그러므로 그것은 좋은 것임에 틀림없다..."
     - "나는 20년동안 이것을 해왔다. 그러므로..."
     - "이것은 돈을 벌기위해 나의 회사가 필요로 하는 것이다."
     - "이것은 우리의 엔터프라이즈 상품 라인을 위한 것이다."
     - "여기에 나의 생각을 말하고 있는 1000 페이지 설계 문서가 있다."
     - "나는 6달동안 이것을 했으니..."
-    - "여기에 5000라인 짜리 패치가 있으니..."
+    - "여기에 5000 라인 짜리 패치가 있으니..."
     - "나는 현재 뒤죽박죽인 것을 재작성했다. 그리고 여기에..."
     - "나는 마감시한을 가지고 있으므로 이 패치는 지금 적용될 필요가 있다."
 
@@ -574,6 +574,7 @@ Pat이라는 이름을 가진 여자가 있을 수도 있는 것이다. 리눅�
 또한 완성되지 않았고 "나중에 수정될 것이다." 와 같은 것들을 포함하는
 패치들은 받아들여지지 않을 것이라는 점을 유념하라.
 
+
 변경을 정당화해라
 -----------------
 
diff --git a/Documentation/ko_KR/stable_api_nonsense.txt b/Documentation/ko_KR/stable_api_nonsense.txt
index 8f2b0e1d98c4..51f85ade4190 100644
--- a/Documentation/ko_KR/stable_api_nonsense.txt
+++ b/Documentation/ko_KR/stable_api_nonsense.txt
@@ -106,12 +106,12 @@ Greg Kroah-Hartman <greg@kroah.com>
 ---------------------------------
 
 리눅스 커널 드라이버를 계속해서 메인 커널 트리에 반영하지 않고
-유지보수하려고 하는 사���들과 이 문제를 논의하게 되면 훨씬 더
+유지보수하려고 하는 사���들과 이 문제를 논의하게 되면 훨씬 더
 "논란의 여지가 많은" 주제가 될 것이다.
 
 리눅스 커널 개발은 끊임없이 빠른 속도로 이루어지고 있으며 결코
 느슨해진 적이 없다. 커널 개발자들이 현재 인터페이스들에서 버그를
-발견하거나 무엇인가 할수 있는 더 좋은 방법을 찾게 되었다고 하자.
+발견하거나 무엇인가 할 수 있는 더 좋은 방법을 찾게 되었다고 하자.
 그들이 발견한 것을 실행한다면 아마도 더 잘 동작하도록 현재 인터페이스들을
 수정하게 될 것이다. 그들이 그런 일을 하게되면 함수 이름들은 변하게 되고,
 구조체들은 늘어나거나 줄어들게 되고, 함수 파라미터들은 재작업될 것이다.
@@ -174,7 +174,7 @@ GPL을 따르는 배포 드라이버에 관해 얘기하고 있다는 것을 상
 동작하는 것을 보장한다.
 
 메인 커널 트리에 여러분의 드라이버를 반영하면 얻게 되는 장점들은 다음과 같다.
-   - 관리��� 드는 비용(원래 개발자의)은 줄어줄면서 드라이버의 질은 향상될 것이다.
+   - 관리��� 드는 비용(원래 개발자의)은 줄어줄면서 드라이버의 질은 향상될 것이다.
    - 다른 개발자들이 여러분의 드라이버에 기능들을 추가 할 것이다.
    - 다른 사람들은 여러분의 드라이버에 버그를 발견하고 수정할 것이다.
    - 다른 사람들은 여러분의 드라이버의 개선점을 찾을 줄 것이다.
diff --git a/Documentation/laptops/asus-laptop.txt b/Documentation/laptops/asus-laptop.txt
index 69f9fb3701e0..79a1bc675a8d 100644
--- a/Documentation/laptops/asus-laptop.txt
+++ b/Documentation/laptops/asus-laptop.txt
@@ -8,8 +8,8 @@ http://acpi4asus.sf.net/
 
  This driver provides support for extra features of ACPI-compatible ASUS laptops.
  It may also support some MEDION, JVC or VICTOR laptops (such as MEDION 9675 or
- VICTOR XP7210 for example). It makes all the extra buttons generate standard
- ACPI events that go through /proc/acpi/events and input events (like keyboards).
+ VICTOR XP7210 for example). It makes all the extra buttons generate input
+ events (like keyboards).
  On some models adds support for changing the display brightness and output,
  switching the LCD backlight on and off, and most importantly, allows you to
  blink those fancy LEDs intended for reporting mail and wireless status.
@@ -55,8 +55,8 @@ Usage
   DSDT) to me.
 
   That's all, now, all the events generated by the hotkeys of your laptop
-  should be reported in your /proc/acpi/event entry. You can check with
-  "acpi_listen".
+  should be reported via netlink events. You can check with
+  "acpi_genl monitor" (part of the acpica project).
 
   Hotkeys are also reported as input keys (like keyboards) you can check
   which key are supported using "xev" under X11.
diff --git a/Documentation/laptops/sony-laptop.txt b/Documentation/laptops/sony-laptop.txt
index 0d5ac7f5287e..978b1e615155 100644
--- a/Documentation/laptops/sony-laptop.txt
+++ b/Documentation/laptops/sony-laptop.txt
@@ -12,10 +12,10 @@ Fn keys (hotkeys):
 ------------------
 Some models report hotkeys through the SNC or SPIC devices, such events are
 reported both through the ACPI subsystem as acpi events and through the INPUT
-subsystem. See the logs of acpid or /proc/acpi/event and
-/proc/bus/input/devices to find out what those events are and which input
-devices are created by the driver. Additionally, loading the driver with the
-debug option will report all events in the kernel log.
+subsystem. See the logs of /proc/bus/input/devices to find out what those
+events are and which input devices are created by the driver.
+Additionally, loading the driver with the debug option will report all events
+in the kernel log.
 
 The "scancodes" passed to the input system (that can be remapped with udev)
 are indexes to the table "sony_laptop_input_keycode_map" in the sony-laptop.c
diff --git a/Documentation/laptops/thinkpad-acpi.txt b/Documentation/laptops/thinkpad-acpi.txt
index cf7bc6cb9719..fc04c14de4bb 100644
--- a/Documentation/laptops/thinkpad-acpi.txt
+++ b/Documentation/laptops/thinkpad-acpi.txt
@@ -1,7 +1,7 @@
                      ThinkPad ACPI Extras Driver
 
-                            Version 0.24
-                        December 11th,  2009
+                            Version 0.25
+                        October 16th,  2013
 
                Borislav Deianov <borislav@users.sf.net>
              Henrique de Moraes Holschuh <hmh@hmh.eng.br>
@@ -329,20 +329,6 @@ sysfs notes:
 
                 This attribute has poll()/select() support.
 
-        hotkey_report_mode:
-                Returns the state of the procfs ACPI event report mode
-                filter for hot keys.  If it is set to 1 (the default),
-                all hot key presses are reported both through the input
-                layer and also as ACPI events through procfs (but not
-                through netlink).  If it is set to 2, hot key presses
-                are reported only through the input layer.
-
-                This attribute is read-only in kernels 2.6.23 or later,
-                and read-write on earlier kernels.
-
-                May return -EPERM (write access locked out by module
-                parameter) or -EACCES (read-only).
-
         wakeup_reason:
                 Set to 1 if the system is waking up because the user
                 requested a bay ejection.  Set to 2 if the system is
@@ -518,24 +504,21 @@ SW_TABLET_MODE	Tablet ThinkPads HKEY events 0x5009 and 0x500A
 Non hotkey ACPI HKEY event map:
 -------------------------------
 
-Events that are not propagated by the driver, except for legacy
-compatibility purposes when hotkey_report_mode is set to 1:
-
-0x5001          Lid closed
-0x5002          Lid opened
-0x5009          Tablet swivel: switched to tablet mode
-0x500A          Tablet swivel: switched to normal mode
-0x7000          Radio Switch may have changed state
-
 Events that are never propagated by the driver:
 
 0x2304          System is waking up from suspend to undock
 0x2305          System is waking up from suspend to eject bay
 0x2404          System is waking up from hibernation to undock
 0x2405          System is waking up from hibernation to eject bay
+0x5001          Lid closed
+0x5002          Lid opened
+0x5009          Tablet swivel: switched to tablet mode
+0x500A          Tablet swivel: switched to normal mode
 0x5010          Brightness level changed/control event
 0x6000          KEYBOARD: Numlock key pressed
 0x6005          KEYBOARD: Fn key pressed (TO BE VERIFIED)
+0x7000          Radio Switch may have changed state
+
 
 Events that are propagated by the driver to userspace:
 
@@ -574,50 +557,6 @@ operating system is to force either an immediate suspend or hibernate
 cycle, or a system shutdown.  Obviously, something is very wrong if this
 happens.
 
-Compatibility notes:
-
-ibm-acpi and thinkpad-acpi 0.15 (mainline kernels before 2.6.23) never
-supported the input layer, and sent events over the procfs ACPI event
-interface.
-
-To avoid sending duplicate events over the input layer and the ACPI
-event interface, thinkpad-acpi 0.16 implements a module parameter
-(hotkey_report_mode), and also a sysfs device attribute with the same
-name.
-
-Make no mistake here: userspace is expected to switch to using the input
-layer interface of thinkpad-acpi, together with the ACPI netlink event
-interface in kernels 2.6.23 and later, or with the ACPI procfs event
-interface in kernels 2.6.22 and earlier.
-
-If no hotkey_report_mode module parameter is specified (or it is set to
-zero), the driver defaults to mode 1 (see below), and on kernels 2.6.22
-and earlier, also allows one to change the hotkey_report_mode through
-sysfs.  In kernels 2.6.23 and later, where the netlink ACPI event
-interface is available, hotkey_report_mode cannot be changed through
-sysfs (it is read-only).
-
-If the hotkey_report_mode module parameter is set to 1 or 2, it cannot
-be changed later through sysfs (any writes will return -EPERM to signal
-that hotkey_report_mode was locked.  On 2.6.23 and later, where
-hotkey_report_mode cannot be changed at all, writes will return -EACCES).
-
-hotkey_report_mode set to 1 makes the driver export through the procfs
-ACPI event interface all hot key presses (which are *also* sent to the
-input layer).  This is a legacy compatibility behaviour, and it is also
-the default mode of operation for the driver.
-
-hotkey_report_mode set to 2 makes the driver filter out the hot key
-presses from the procfs ACPI event interface, so these events will only
-be sent through the input layer.  Userspace that has been updated to use
-the thinkpad-acpi input layer interface should set hotkey_report_mode to
-2.
-
-Hot key press events are never sent to the ACPI netlink event interface.
-Really up-to-date userspace under kernel 2.6.23 and later is to use the
-netlink interface and the input layer interface, and don't bother at all
-with hotkey_report_mode.
-
 
 Brightness hotkey notes:
 
@@ -802,6 +741,9 @@ compiled with the CONFIG_THINKPAD_ACPI_UNSAFE_LEDS option enabled.
 Distributions must never enable this option.  Individual users that
 are aware of the consequences are welcome to enabling it.
 
+Audio mute and microphone mute LEDs are supported, but currently not
+visible to userspace. They are used by the snd-hda-intel audio driver.
+
 procfs notes:
 
 The available commands are:
diff --git a/Documentation/leds/leds-lm3556.txt b/Documentation/leds/leds-lm3556.txt
index d9eb91b51913..62278e871b50 100644
--- a/Documentation/leds/leds-lm3556.txt
+++ b/Documentation/leds/leds-lm3556.txt
@@ -71,7 +71,7 @@ To register the chip at address 0x63 on specific adapter, set the platform data
 according to include/linux/platform_data/leds-lm3556.h, set the i2c board info
 
 Example:
-        static struct i2c_board_info __initdata board_i2c_ch4[] = {
+        static struct i2c_board_info board_i2c_ch4[] __initdata = {
                 {
                          I2C_BOARD_INFO(LM3556_NAME, 0x63),
                          .platform_data = &lm3556_pdata,
diff --git a/Documentation/leds/leds-lp3944.txt b/Documentation/leds/leds-lp3944.txt
index c6eda18b15ef..e88ac3b60c08 100644
--- a/Documentation/leds/leds-lp3944.txt
+++ b/Documentation/leds/leds-lp3944.txt
@@ -37,7 +37,7 @@ registered using the i2c_board_info mechanism.
 To register the chip at address 0x60 on adapter 0, set the platform data
 according to include/linux/leds-lp3944.h, set the i2c board info:
 
-        static struct i2c_board_info __initdata a910_i2c_board_info[] = {
+        static struct i2c_board_info a910_i2c_board_info[] __initdata = {
                 {
                         I2C_BOARD_INFO("lp3944", 0x60),
                         .platform_data = &a910_lp3944_leds,
diff --git a/Documentation/leds/leds-lp5521.txt b/Documentation/leds/leds-lp5521.txt
index 79e4c2e6e5e8..d08d8c179f85 100644
--- a/Documentation/leds/leds-lp5521.txt
+++ b/Documentation/leds/leds-lp5521.txt
@@ -18,7 +18,25 @@ All three channels can be also controlled using the engine micro programs.
 More details of the instructions can be found from the public data sheet.
 
 LP5521 has the internal program memory for running various LED patterns.
-For the details, please refer to 'firmware' section in leds-lp55xx.txt
+There are two ways to run LED patterns.
+
+1) Legacy interface - enginex_mode and enginex_load
+  Control interface for the engines:
+  x is 1 .. 3
+  enginex_mode : disabled, load, run
+  enginex_load : store program (visible only in engine load mode)
+
+  Example (start to blink the channel 2 led):
+  cd   /sys/class/leds/lp5521:channel2/device
+  echo "load" > engine3_mode
+  echo "037f4d0003ff6000" > engine3_load
+  echo "run" > engine3_mode
+
+  To stop the engine:
+  echo "disabled" > engine3_mode
+
+2) Firmware interface - LP55xx common interface
+  For the details, please refer to 'firmware' section in leds-lp55xx.txt
 
 sysfs contains a selftest entry.
 The test communicates with the chip and checks that
diff --git a/Documentation/leds/leds-lp5523.txt b/Documentation/leds/leds-lp5523.txt
index 899fdad509fe..5b3e91d4ac59 100644
--- a/Documentation/leds/leds-lp5523.txt
+++ b/Documentation/leds/leds-lp5523.txt
@@ -28,7 +28,26 @@ If both fields are NULL, 'lp5523' is used by default.
 /sys/class/leds/lp5523:channelN  (N: 0 ~ 8)
 
 LP5523 has the internal program memory for running various LED patterns.
-For the details, please refer to 'firmware' section in leds-lp55xx.txt
+There are two ways to run LED patterns.
+
+1) Legacy interface - enginex_mode, enginex_load and enginex_leds
+  Control interface for the engines:
+  x is 1 .. 3
+  enginex_mode : disabled, load, run
+  enginex_load : microcode load (visible only in load mode)
+  enginex_leds : led mux control (visible only in load mode)
+
+  cd /sys/class/leds/lp5523:channel2/device
+  echo "load" > engine3_mode
+  echo "9d80400004ff05ff437f0000" > engine3_load
+  echo "111111111" > engine3_leds
+  echo "run" > engine3_mode
+
+  To stop the engine:
+  echo "disabled" > engine3_mode
+
+2) Firmware interface - LP55xx common interface
+  For the details, please refer to 'firmware' section in leds-lp55xx.txt
 
 Selftest uses always the current from the platform data.
 
diff --git a/Documentation/leds/leds-lp55xx.txt b/Documentation/leds/leds-lp55xx.txt
index eec8fa2ffe4e..82713ff92eb3 100644
--- a/Documentation/leds/leds-lp55xx.txt
+++ b/Documentation/leds/leds-lp55xx.txt
@@ -1,11 +1,11 @@
-LP5521/LP5523/LP55231 Common Driver
-===================================
+LP5521/LP5523/LP55231/LP5562/LP8501 Common Driver
+=================================================
 
 Authors: Milo(Woogyom) Kim <milo.kim@ti.com>
 
 Description
 -----------
-LP5521, LP5523/55231 and LP5562 have common features as below.
+LP5521, LP5523/55231, LP5562 and LP8501 have common features as below.
 
   Register access via the I2C
   Device initialization/deinitialization
@@ -109,6 +109,30 @@ As soon as 'loading' is set to 0, registered callback is called.
 Inside the callback, the selected engine is loaded and memory is updated.
 To run programmed pattern, 'run_engine' attribute should be enabled.
 
+The pattern sqeuence of LP8501 is same as LP5523.
+However pattern data is specific.
+Ex 1) Engine 1 is used
+echo 1 > /sys/bus/i2c/devices/xxxx/select_engine
+echo 1 > /sys/class/firmware/lp8501/loading
+echo "9d0140ff7e0040007e00a001c000" > /sys/class/firmware/lp8501/data
+echo 0 > /sys/class/firmware/lp8501/loading
+echo 1 > /sys/bus/i2c/devices/xxxx/run_engine
+
+Ex 2) Engine 2 and 3 are used at the same time
+echo 2 > /sys/bus/i2c/devices/xxxx/select_engine
+sleep 1
+echo 1 > /sys/class/firmware/lp8501/loading
+echo "9d0140ff7e0040007e00a001c000" > /sys/class/firmware/lp8501/data
+echo 0 > /sys/class/firmware/lp8501/loading
+sleep 1
+echo 3 > /sys/bus/i2c/devices/xxxx/select_engine
+sleep 1
+echo 1 > /sys/class/firmware/lp8501/loading
+echo "9d0340ff7e0040007e00a001c000" > /sys/class/firmware/lp8501/data
+echo 0 > /sys/class/firmware/lp8501/loading
+sleep 1
+echo 1 > /sys/class/leds/d1/device/run_engine
+
 ( 'run_engine' and 'firmware_cb' )
 The sequence of running the program data is common.
 But each device has own specific register addresses for commands.
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index fa5d8a9ae205..c8c42e64e953 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -531,9 +531,10 @@ dependency barrier to make it work correctly.  Consider the following bit of
 code:
 
         q = &a;
-        if (p)
+        if (p) {
+                <data dependency barrier>
                 q = &b;
-        <data dependency barrier>
+        }
         x = *q;
 
 This will not have the desired effect because there is no actual data
@@ -542,9 +543,10 @@ attempting to predict the outcome in advance.  In such a case what's actually
 required is:
 
         q = &a;
-        if (p)
+        if (p) {
+                <read barrier>
                 q = &b;
-        <read barrier>
+        }
         x = *q;
 
 
diff --git a/Documentation/memory-hotplug.txt b/Documentation/memory-hotplug.txt
index 8e5eacbdcfa3..58340d50f8a6 100644
--- a/Documentation/memory-hotplug.txt
+++ b/Documentation/memory-hotplug.txt
@@ -163,7 +163,7 @@ a recent addition and not present on older kernels.
                     at read:  contains online/offline state of memory.
                     at write: user can specify "online_kernel",
                     "online_movable", "online", "offline" command
-                    which will be performed on al sections in the block.
+                    which will be performed on all sections in the block.
 'phys_device'     : read-only: designed to show the name of physical memory
                     device.  This is not well implemented now.
 'removable'       : read-only: contains an integer value indicating
@@ -210,13 +210,15 @@ If memory device is found, memory hotplug code will be called.
 
 4.2 Notify memory hot-add event by hand
 ------------
-In some environments, especially virtualized environment, firmware will not
-notify memory hotplug event to the kernel. For such environment, "probe"
-interface is supported. This interface depends on CONFIG_ARCH_MEMORY_PROBE.
-
-Now, CONFIG_ARCH_MEMORY_PROBE is supported only by powerpc but it does not
-contain highly architecture codes. Please add config if you need "probe"
-interface.
+On powerpc, the firmware does not notify a memory hotplug event to the kernel.
+Therefore, "probe" interface is supported to notify the event to the kernel.
+This interface depends on CONFIG_ARCH_MEMORY_PROBE.
+
+CONFIG_ARCH_MEMORY_PROBE is supported on powerpc only. On x86, this config
+option is disabled by default since ACPI notifies a memory hotplug event to
+the kernel, which performs its hotplug operation as the result. Please
+enable this option if you need the "probe" interface for testing purposes
+on x86.
 
 Probe interface is located at
 /sys/devices/system/memory/probe
diff --git a/Documentation/mic/mic_overview.txt b/Documentation/mic/mic_overview.txt
new file mode 100644
index 000000000000..b41929224804
--- /dev/null
+++ b/Documentation/mic/mic_overview.txt
@@ -0,0 +1,51 @@
+An Intel MIC X100 device is a PCIe form factor add-in coprocessor
+card based on the Intel Many Integrated Core (MIC) architecture
+that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
+implements the three required standard address spaces i.e. configuration,
+memory and I/O. The host OS loads a device driver as is typical for
+PCIe devices. The card itself runs a bootstrap after reset that
+transfers control to the card OS downloaded from the host driver. The
+host driver supports OSPM suspend and resume operations. It shuts down
+the card during suspend and reboots the card OS during resume.
+The card OS as shipped by Intel is a Linux kernel with modifications
+for the X100 devices.
+
+Since it is a PCIe card, it does not have the ability to host hardware
+devices for networking, storage and console. We provide these devices
+on X100 coprocessors thus enabling a self-bootable equivalent environment
+for applications. A key benefit of our solution is that it leverages
+the standard virtio framework for network, disk and console devices,
+though in our case the virtio framework is used across a PCIe bus.
+
+Here is a block diagram of the various components described above. The
+virtio backends are situated on the host rather than the card given better
+single threaded performance for the host compared to MIC, the ability of
+the host to initiate DMA's to/from the card using the MIC DMA engine and
+the fact that the virtio block storage backend can only be on the host.
+
+                              |
+       +----------+           |             +----------+
+       | Card OS  |           |             | Host OS  |
+       +----------+           |             +----------+
+                              |
++-------+ +--------+ +------+ | +---------+  +--------+ +--------+
+| Virtio| |Virtio  | |Virtio| | |Virtio   |  |Virtio  | |Virtio  |
+| Net   | |Console | |Block | | |Net      |  |Console | |Block   |
+| Driver| |Driver  | |Driver| | |backend  |  |backend | |backend |
++-------+ +--------+ +------+ | +---------+  +--------+ +--------+
+    |         |         |     |      |            |         |
+    |         |         |     |User  |            |         |
+    |         |         |     |------|------------|---------|-------
+    +-------------------+     |Kernel +--------------------------+
+              |               |       | Virtio over PCIe IOCTLs  |
+              |               |       +--------------------------+
+      +--------------+        |                   |
+      |Intel MIC     |        |            +---------------+
+      |Card Driver   |        |            |Intel MIC      |
+      +--------------+        |            |Host Driver    |
+              |               |            +---------------+
+              |               |                   |
+     +-------------------------------------------------------------+
+     |                                                             |
+     |                    PCIe Bus                                 |
+     +-------------------------------------------------------------+
diff --git a/Documentation/mic/mpssd/.gitignore b/Documentation/mic/mpssd/.gitignore
new file mode 100644
index 000000000000..8b7c72f07c92
--- /dev/null
+++ b/Documentation/mic/mpssd/.gitignore
@@ -0,0 +1 @@
+mpssd
diff --git a/Documentation/mic/mpssd/Makefile b/Documentation/mic/mpssd/Makefile
new file mode 100644
index 000000000000..eb860a7d152e
--- /dev/null
+++ b/Documentation/mic/mpssd/Makefile
@@ -0,0 +1,19 @@
+#
+# Makefile - Intel MIC User Space Tools.
+# Copyright(c) 2013, Intel Corporation.
+#
+ifdef DEBUG
+CFLAGS += $(USERWARNFLAGS) -I. -g -Wall -DDEBUG=$(DEBUG)
+else
+CFLAGS += $(USERWARNFLAGS) -I. -g -Wall
+endif
+
+mpssd: mpssd.o sysfs.o
+        $(CC) $(CFLAGS) -o $@ $^ -lpthread
+
+install:
+        install mpssd /usr/sbin/mpssd
+        install micctrl /usr/sbin/micctrl
+
+clean:
+        rm -f mpssd *.o
diff --git a/Documentation/mic/mpssd/micctrl b/Documentation/mic/mpssd/micctrl
new file mode 100755
index 000000000000..8f2629b41c5f
--- /dev/null
+++ b/Documentation/mic/mpssd/micctrl
@@ -0,0 +1,173 @@
+#!/bin/bash
+# Intel MIC Platform Software Stack (MPSS)
+#
+# Copyright(c) 2013 Intel Corporation.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# The full GNU General Public License is included in this distribution in
+# the file called "COPYING".
+#
+# Intel MIC User Space Tools.
+#
+# micctrl - Controls MIC boot/start/stop.
+#
+# chkconfig: 2345 95 05
+# description: start MPSS stack processing.
+#
+### BEGIN INIT INFO
+# Provides: micctrl
+### END INIT INFO
+
+# Source function library.
+. /etc/init.d/functions
+
+sysfs="/sys/class/mic"
+
+_status()
+{
+        f=$sysfs/$1
+        echo -e $1 state: "`cat $f/state`" shutdown_status: "`cat $f/shutdown_status`"
+}
+
+status()
+{
+        if [ "`echo $1 | head -c3`" == "mic" ]; then
+                _status $1
+                return $?
+        fi
+        for f in $sysfs/*
+        do
+                _status `basename $f`
+                RETVAL=$?
+                [ $RETVAL -ne 0 ] && return $RETVAL
+        done
+        return 0
+}
+
+_reset()
+{
+        f=$sysfs/$1
+        echo reset > $f/state
+}
+
+reset()
+{
+        if [ "`echo $1 | head -c3`" == "mic" ]; then
+                _reset $1
+                return $?
+        fi
+        for f in $sysfs/*
+        do
+                _reset `basename $f`
+                RETVAL=$?
+                [ $RETVAL -ne 0 ] && return $RETVAL
+        done
+        return 0
+}
+
+_boot()
+{
+        f=$sysfs/$1
+        echo "linux" > $f/bootmode
+        echo "mic/uos.img" > $f/firmware
+        echo "mic/$1.image" > $f/ramdisk
+        echo "boot" > $f/state
+}
+
+boot()
+{
+        if [ "`echo $1 | head -c3`" == "mic" ]; then
+                _boot $1
+                return $?
+        fi
+        for f in $sysfs/*
+        do
+                _boot `basename $f`
+                RETVAL=$?
+                [ $RETVAL -ne 0 ] && return $RETVAL
+        done
+        return 0
+}
+
+_shutdown()
+{
+        f=$sysfs/$1
+        echo shutdown > $f/state
+}
+
+shutdown()
+{
+        if [ "`echo $1 | head -c3`" == "mic" ]; then
+                _shutdown $1
+                return $?
+        fi
+        for f in $sysfs/*
+        do
+                _shutdown `basename $f`
+                RETVAL=$?
+                [ $RETVAL -ne 0 ] && return $RETVAL
+        done
+        return 0
+}
+
+_wait()
+{
+        f=$sysfs/$1
+        while [ "`cat $f/state`" != "offline" -a "`cat $f/state`" != "online" ]
+        do
+                sleep 1
+                echo -e "Waiting for $1 to go offline"
+        done
+}
+
+wait()
+{
+        if [ "`echo $1 | head -c3`" == "mic" ]; then
+                _wait $1
+                return $?
+        fi
+        # Wait for the cards to go offline
+        for f in $sysfs/*
+        do
+                _wait `basename $f`
+                RETVAL=$?
+                [ $RETVAL -ne 0 ] && return $RETVAL
+        done
+        return 0
+}
+
+if [ ! -d "$sysfs" ]; then
+        echo -e $"Module unloaded "
+        exit 3
+fi
+
+case $1 in
+        -s)
+                status $2
+                ;;
+        -r)
+                reset $2
+                ;;
+        -b)
+                boot $2
+                ;;
+        -S)
+                shutdown $2
+                ;;
+        -w)
+                wait $2
+                ;;
+        *)
+                echo $"Usage: $0 {-s (status) |-r (reset) |-b (boot) |-S (shutdown) |-w (wait)}"
+                exit 2
+esac
+
+exit $?
diff --git a/Documentation/mic/mpssd/mpss b/Documentation/mic/mpssd/mpss
new file mode 100755
index 000000000000..3136c68dad0b
--- /dev/null
+++ b/Documentation/mic/mpssd/mpss
@@ -0,0 +1,202 @@
+#!/bin/bash
+# Intel MIC Platform Software Stack (MPSS)
+#
+# Copyright(c) 2013 Intel Corporation.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# The full GNU General Public License is included in this distribution in
+# the file called "COPYING".
+#
+# Intel MIC User Space Tools.
+#
+# mpss  Start mpssd.
+#
+# chkconfig: 2345 95 05
+# description: start MPSS stack processing.
+#
+### BEGIN INIT INFO
+# Provides: mpss
+# Required-Start:
+# Required-Stop:
+# Short-Description: MPSS stack control
+# Description: MPSS stack control
+### END INIT INFO
+
+# Source function library.
+. /etc/init.d/functions
+
+exec=/usr/sbin/mpssd
+sysfs="/sys/class/mic"
+
+start()
+{
+        [ -x $exec ] || exit 5
+
+        if [ "`ps -e | awk '{print $4}' | grep mpssd | head -1`" = "mpssd" ]; then
+                echo -e $"MPSSD already running! "
+                success
+                echo
+                return 0
+        fi
+
+        echo -e $"Starting MPSS Stack"
+        echo -e $"Loading MIC_HOST Module"
+
+        # Ensure the driver is loaded
+        if [ ! -d "$sysfs" ]; then
+                modprobe mic_host
+                RETVAL=$?
+                if [ $RETVAL -ne 0 ]; then
+                        failure
+                        echo
+                        return $RETVAL
+                fi
+        fi
+
+        # Start the daemon
+        echo -n $"Starting MPSSD "
+        $exec
+        RETVAL=$?
+        if [ $RETVAL -ne 0 ]; then
+                failure
+                echo
+                return $RETVAL
+        fi
+        success
+        echo
+
+        sleep 5
+
+        # Boot the cards
+        micctrl -b
+
+        # Wait till ping works
+        for f in $sysfs/*
+        do
+                count=100
+                ipaddr=`cat $f/cmdline`
+                ipaddr=${ipaddr#*address,}
+                ipaddr=`echo $ipaddr | cut -d, -f1 | cut -d\; -f1`
+                while [ $count -ge 0 ]
+                do
+                        echo -e "Pinging "`basename $f`" "
+                        ping -c 1 $ipaddr &> /dev/null
+                        RETVAL=$?
+                        if [ $RETVAL -eq 0 ]; then
+                                success
+                                break
+                        fi
+                        sleep 1
+                        count=`expr $count - 1`
+                done
+                [ $RETVAL -ne 0 ] && failure || success
+                echo
+        done
+        return $RETVAL
+}
+
+stop()
+{
+        echo -e $"Shutting down MPSS Stack: "
+
+        # Bail out if module is unloaded
+        if [ ! -d "$sysfs" ]; then
+                echo -n $"Module unloaded "
+                success
+                echo
+                return 0
+        fi
+
+        # Shut down the cards.
+        micctrl -S
+
+        # Wait for the cards to go offline
+        for f in $sysfs/*
+        do
+                while [ "`cat $f/state`" != "offline" ]
+                do
+                        sleep 1
+                        echo -e "Waiting for "`basename $f`" to go offline"
+                done
+        done
+
+        # Display the status of the cards
+        micctrl -s
+
+        # Kill MPSSD now
+        echo -n $"Killing MPSSD"
+        killall -9 mpssd 2>/dev/null
+        RETVAL=$?
+        [ $RETVAL -ne 0 ] && failure || success
+        echo
+        return $RETVAL
+}
+
+restart()
+{
+        stop
+        sleep 5
+        start
+}
+
+status()
+{
+        micctrl -s
+        if [ "`ps -e | awk '{print $4}' | grep mpssd | head -n 1`" = "mpssd" ]; then
+                echo "mpssd is running"
+        else
+                echo "mpssd is stopped"
+        fi
+        return 0
+}
+
+unload()
+{
+        if [ ! -d "$sysfs" ]; then
+                echo -n $"No MIC_HOST Module: "
+                success
+                echo
+                return
+        fi
+
+        stop
+
+        sleep 5
+        echo -n $"Removing MIC_HOST Module: "
+        modprobe -r mic_host
+        RETVAL=$?
+        [ $RETVAL -ne 0 ] && failure || success
+        echo
+        return $RETVAL
+}
+
+case $1 in
+        start)
+                start
+                ;;
+        stop)
+                stop
+                ;;
+        restart)
+                restart
+                ;;
+        status)
+                status
+                ;;
+        unload)
+                unload
+                ;;
+        *)
+                echo $"Usage: $0 {start|stop|restart|status|unload}"
+                exit 2
+esac
+
+exit $?
diff --git a/Documentation/mic/mpssd/mpssd.c b/Documentation/mic/mpssd/mpssd.c
new file mode 100644
index 000000000000..0c980ad40b17
--- /dev/null
+++ b/Documentation/mic/mpssd/mpssd.c
@@ -0,0 +1,1721 @@
+/*
+ * Intel MIC Platform Software Stack (MPSS)
+ *
+ * Copyright(c) 2013 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Intel MIC User Space Tools.
+ */
+
+#define _GNU_SOURCE
+
+#include <stdlib.h>
+#include <fcntl.h>
+#include <getopt.h>
+#include <assert.h>
+#include <unistd.h>
+#include <stdbool.h>
+#include <signal.h>
+#include <poll.h>
+#include <features.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+#include <sys/socket.h>
+#include <linux/virtio_ring.h>
+#include <linux/virtio_net.h>
+#include <linux/virtio_console.h>
+#include <linux/virtio_blk.h>
+#include <linux/version.h>
+#include "mpssd.h"
+#include <linux/mic_ioctl.h>
+#include <linux/mic_common.h>
+
+static void init_mic(struct mic_info *mic);
+
+static FILE *logfp;
+static struct mic_info mic_list;
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+#define min_t(type, x, y) ({                            \
+                type __min1 = (x);                      \
+                type __min2 = (y);                      \
+                __min1 < __min2 ? __min1 : __min2; })
+
+/* align addr on a size boundary - adjust address up/down if needed */
+#define _ALIGN_DOWN(addr, size)  ((addr)&(~((size)-1)))
+#define _ALIGN_UP(addr, size)    _ALIGN_DOWN(addr + size - 1, size)
+
+/* align addr on a size boundary - adjust address up if needed */
+#define _ALIGN(addr, size)     _ALIGN_UP(addr, size)
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr)        _ALIGN(addr, PAGE_SIZE)
+
+#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
+
+#define GSO_ENABLED             1
+#define MAX_GSO_SIZE            (64 * 1024)
+#define ETH_H_LEN               14
+#define MAX_NET_PKT_SIZE        (_ALIGN_UP(MAX_GSO_SIZE + ETH_H_LEN, 64))
+#define MIC_DEVICE_PAGE_END     0x1000
+
+#ifndef VIRTIO_NET_HDR_F_DATA_VALID
+#define VIRTIO_NET_HDR_F_DATA_VALID     2       /* Csum is valid */
+#endif
+
+static struct {
+        struct mic_device_desc dd;
+        struct mic_vqconfig vqconfig[2];
+        __u32 host_features, guest_acknowledgements;
+        struct virtio_console_config cons_config;
+} virtcons_dev_page = {
+        .dd = {
+                .type = VIRTIO_ID_CONSOLE,
+                .num_vq = ARRAY_SIZE(virtcons_dev_page.vqconfig),
+                .feature_len = sizeof(virtcons_dev_page.host_features),
+                .config_len = sizeof(virtcons_dev_page.cons_config),
+        },
+        .vqconfig[0] = {
+                .num = htole16(MIC_VRING_ENTRIES),
+        },
+        .vqconfig[1] = {
+                .num = htole16(MIC_VRING_ENTRIES),
+        },
+};
+
+static struct {
+        struct mic_device_desc dd;
+        struct mic_vqconfig vqconfig[2];
+        __u32 host_features, guest_acknowledgements;
+        struct virtio_net_config net_config;
+} virtnet_dev_page = {
+        .dd = {
+                .type = VIRTIO_ID_NET,
+                .num_vq = ARRAY_SIZE(virtnet_dev_page.vqconfig),
+                .feature_len = sizeof(virtnet_dev_page.host_features),
+                .config_len = sizeof(virtnet_dev_page.net_config),
+        },
+        .vqconfig[0] = {
+                .num = htole16(MIC_VRING_ENTRIES),
+        },
+        .vqconfig[1] = {
+                .num = htole16(MIC_VRING_ENTRIES),
+        },
+#if GSO_ENABLED
+                .host_features = htole32(
+                1 << VIRTIO_NET_F_CSUM |
+                1 << VIRTIO_NET_F_GSO |
+                1 << VIRTIO_NET_F_GUEST_TSO4 |
+                1 << VIRTIO_NET_F_GUEST_TSO6 |
+                1 << VIRTIO_NET_F_GUEST_ECN |
+                1 << VIRTIO_NET_F_GUEST_UFO),
+#else
+                .host_features = 0,
+#endif
+};
+
+static const char *mic_config_dir = "/etc/sysconfig/mic";
+static const char *virtblk_backend = "VIRTBLK_BACKEND";
+static struct {
+        struct mic_device_desc dd;
+        struct mic_vqconfig vqconfig[1];
+        __u32 host_features, guest_acknowledgements;
+        struct virtio_blk_config blk_config;
+} virtblk_dev_page = {
+        .dd = {
+                .type = VIRTIO_ID_BLOCK,
+                .num_vq = ARRAY_SIZE(virtblk_dev_page.vqconfig),
+                .feature_len = sizeof(virtblk_dev_page.host_features),
+                .config_len = sizeof(virtblk_dev_page.blk_config),
+        },
+        .vqconfig[0] = {
+                .num = htole16(MIC_VRING_ENTRIES),
+        },
+        .host_features =
+                htole32(1<<VIRTIO_BLK_F_SEG_MAX),
+        .blk_config = {
+                .seg_max = htole32(MIC_VRING_ENTRIES - 2),
+                .capacity = htole64(0),
+         }
+};
+
+static char *myname;
+
+static int
+tap_configure(struct mic_info *mic, char *dev)
+{
+        pid_t pid;
+        char *ifargv[7];
+        char ipaddr[IFNAMSIZ];
+        int ret = 0;
+
+        pid = fork();
+        if (pid == 0) {
+                ifargv[0] = "ip";
+                ifargv[1] = "link";
+                ifargv[2] = "set";
+                ifargv[3] = dev;
+                ifargv[4] = "up";
+                ifargv[5] = NULL;
+                mpsslog("Configuring %s\n", dev);
+                ret = execvp("ip", ifargv);
+                if (ret < 0) {
+                        mpsslog("%s execvp failed errno %s\n",
+                                mic->name, strerror(errno));
+                        return ret;
+                }
+        }
+        if (pid < 0) {
+                mpsslog("%s fork failed errno %s\n",
+                        mic->name, strerror(errno));
+                return ret;
+        }
+
+        ret = waitpid(pid, NULL, 0);
+        if (ret < 0) {
+                mpsslog("%s waitpid failed errno %s\n",
+                        mic->name, strerror(errno));
+                return ret;
+        }
+
+        snprintf(ipaddr, IFNAMSIZ, "172.31.%d.254/24", mic->id);
+
+        pid = fork();
+        if (pid == 0) {
+                ifargv[0] = "ip";
+                ifargv[1] = "addr";
+                ifargv[2] = "add";
+                ifargv[3] = ipaddr;
+                ifargv[4] = "dev";
+                ifargv[5] = dev;
+                ifargv[6] = NULL;
+                mpsslog("Configuring %s ipaddr %s\n", dev, ipaddr);
+                ret = execvp("ip", ifargv);
+                if (ret < 0) {
+                        mpsslog("%s execvp failed errno %s\n",
+                                mic->name, strerror(errno));
+                        return ret;
+                }
+        }
+        if (pid < 0) {
+                mpsslog("%s fork failed errno %s\n",
+                        mic->name, strerror(errno));
+                return ret;
+        }
+
+        ret = waitpid(pid, NULL, 0);
+        if (ret < 0) {
+                mpsslog("%s waitpid failed errno %s\n",
+                        mic->name, strerror(errno));
+                return ret;
+        }
+        mpsslog("MIC name %s %s %d DONE!\n",
+                mic->name, __func__, __LINE__);
+        return 0;
+}
+
+static int tun_alloc(struct mic_info *mic, char *dev)
+{
+        struct ifreq ifr;
+        int fd, err;
+#if GSO_ENABLED
+        unsigned offload;
+#endif
+        fd = open("/dev/net/tun", O_RDWR);
+        if (fd < 0) {
+                mpsslog("Could not open /dev/net/tun %s\n", strerror(errno));
+                goto done;
+        }
+
+        memset(&ifr, 0, sizeof(ifr));
+
+        ifr.ifr_flags = IFF_TAP | IFF_NO_PI | IFF_VNET_HDR;
+        if (*dev)
+                strncpy(ifr.ifr_name, dev, IFNAMSIZ);
+
+        err = ioctl(fd, TUNSETIFF, (void *)&ifr);
+        if (err < 0) {
+                mpsslog("%s %s %d TUNSETIFF failed %s\n",
+                        mic->name, __func__, __LINE__, strerror(errno));
+                close(fd);
+                return err;
+        }
+#if GSO_ENABLED
+        offload = TUN_F_CSUM | TUN_F_TSO4 | TUN_F_TSO6 |
+                TUN_F_TSO_ECN | TUN_F_UFO;
+
+        err = ioctl(fd, TUNSETOFFLOAD, offload);
+        if (err < 0) {
+                mpsslog("%s %s %d TUNSETOFFLOAD failed %s\n",
+                        mic->name, __func__, __LINE__, strerror(errno));
+                close(fd);
+                return err;
+        }
+#endif
+        strcpy(dev, ifr.ifr_name);
+        mpsslog("Created TAP %s\n", dev);
+done:
+        return fd;
+}
+
+#define NET_FD_VIRTIO_NET 0
+#define NET_FD_TUN 1
+#define MAX_NET_FD 2
+
+static void set_dp(struct mic_info *mic, int type, void *dp)
+{
+        switch (type) {
+        case VIRTIO_ID_CONSOLE:
+                mic->mic_console.console_dp = dp;
+                return;
+        case VIRTIO_ID_NET:
+                mic->mic_net.net_dp = dp;
+                return;
+        case VIRTIO_ID_BLOCK:
+                mic->mic_virtblk.block_dp = dp;
+                return;
+        }
+        mpsslog("%s %s %d not found\n", mic->name, __func__, type);
+        assert(0);
+}
+
+static void *get_dp(struct mic_info *mic, int type)
+{
+        switch (type) {
+        case VIRTIO_ID_CONSOLE:
+                return mic->mic_console.console_dp;
+        case VIRTIO_ID_NET:
+                return mic->mic_net.net_dp;
+        case VIRTIO_ID_BLOCK:
+                return mic->mic_virtblk.block_dp;
+        }
+        mpsslog("%s %s %d not found\n", mic->name, __func__, type);
+        assert(0);
+        return NULL;
+}
+
+static struct mic_device_desc *get_device_desc(struct mic_info *mic, int type)
+{
+        struct mic_device_desc *d;
+        int i;
+        void *dp = get_dp(mic, type);
+
+        for (i = mic_aligned_size(struct mic_bootparam); i < PAGE_SIZE;
+                i += mic_total_desc_size(d)) {
+                d = dp + i;
+
+                /* End of list */
+                if (d->type == 0)
+                        break;
+
+                if (d->type == -1)
+                        continue;
+
+                mpsslog("%s %s d-> type %d d %p\n",
+                        mic->name, __func__, d->type, d);
+
+                if (d->type == (__u8)type)
+                        return d;
+        }
+        mpsslog("%s %s %d not found\n", mic->name, __func__, type);
+        assert(0);
+        return NULL;
+}
+
+/* See comments in vhost.c for explanation of next_desc() */
+static unsigned next_desc(struct vring_desc *desc)
+{
+        unsigned int next;
+
+        if (!(le16toh(desc->flags) & VRING_DESC_F_NEXT))
+                return -1U;
+        next = le16toh(desc->next);
+        return next;
+}
+
+/* Sum up all the IOVEC length */
+static ssize_t
+sum_iovec_len(struct mic_copy_desc *copy)
+{
+        ssize_t sum = 0;
+        int i;
+
+        for (i = 0; i < copy->iovcnt; i++)
+                sum += copy->iov[i].iov_len;
+        return sum;
+}
+
+static inline void verify_out_len(struct mic_info *mic,
+        struct mic_copy_desc *copy)
+{
+        if (copy->out_len != sum_iovec_len(copy)) {
+                mpsslog("%s %s %d BUG copy->out_len 0x%x len 0x%zx\n",
+                        mic->name, __func__, __LINE__,
+                        copy->out_len, sum_iovec_len(copy));
+                assert(copy->out_len == sum_iovec_len(copy));
+        }
+}
+
+/* Display an iovec */
+static void
+disp_iovec(struct mic_info *mic, struct mic_copy_desc *copy,
+           const char *s, int line)
+{
+        int i;
+
+        for (i = 0; i < copy->iovcnt; i++)
+                mpsslog("%s %s %d copy->iov[%d] addr %p len 0x%zx\n",
+                        mic->name, s, line, i,
+                        copy->iov[i].iov_base, copy->iov[i].iov_len);
+}
+
+static inline __u16 read_avail_idx(struct mic_vring *vr)
+{
+        return ACCESS_ONCE(vr->info->avail_idx);
+}
+
+static inline void txrx_prepare(int type, bool tx, struct mic_vring *vr,
+                                struct mic_copy_desc *copy, ssize_t len)
+{
+        copy->vr_idx = tx ? 0 : 1;
+        copy->update_used = true;
+        if (type == VIRTIO_ID_NET)
+                copy->iov[1].iov_len = len - sizeof(struct virtio_net_hdr);
+        else
+                copy->iov[0].iov_len = len;
+}
+
+/* Central API which triggers the copies */
+static int
+mic_virtio_copy(struct mic_info *mic, int fd,
+                struct mic_vring *vr, struct mic_copy_desc *copy)
+{
+        int ret;
+
+        ret = ioctl(fd, MIC_VIRTIO_COPY_DESC, copy);
+        if (ret) {
+                mpsslog("%s %s %d errno %s ret %d\n",
+                        mic->name, __func__, __LINE__,
+                        strerror(errno), ret);
+        }
+        return ret;
+}
+
+/*
+ * This initialization routine requires at least one
+ * vring i.e. vr0. vr1 is optional.
+ */
+static void *
+init_vr(struct mic_info *mic, int fd, int type,
+        struct mic_vring *vr0, struct mic_vring *vr1, int num_vq)
+{
+        int vr_size;
+        char *va;
+
+        vr_size = PAGE_ALIGN(vring_size(MIC_VRING_ENTRIES,
+                MIC_VIRTIO_RING_ALIGN) + sizeof(struct _mic_vring_info));
+        va = mmap(NULL, MIC_DEVICE_PAGE_END + vr_size * num_vq,
+                PROT_READ, MAP_SHARED, fd, 0);
+        if (MAP_FAILED == va) {
+                mpsslog("%s %s %d mmap failed errno %s\n",
+                        mic->name, __func__, __LINE__,
+                        strerror(errno));
+                goto done;
+        }
+        set_dp(mic, type, va);
+        vr0->va = (struct mic_vring *)&va[MIC_DEVICE_PAGE_END];
+        vr0->info = vr0->va +
+                vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN);
+        vring_init(&vr0->vr,
+                   MIC_VRING_ENTRIES, vr0->va, MIC_VIRTIO_RING_ALIGN);
+        mpsslog("%s %s vr0 %p vr0->info %p vr_size 0x%x vring 0x%x ",
+                __func__, mic->name, vr0->va, vr0->info, vr_size,
+                vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN));
+        mpsslog("magic 0x%x expected 0x%x\n",
+                vr0->info->magic, MIC_MAGIC + type);
+        assert(vr0->info->magic == MIC_MAGIC + type);
+        if (vr1) {
+                vr1->va = (struct mic_vring *)
+                        &va[MIC_DEVICE_PAGE_END + vr_size];
+                vr1->info = vr1->va + vring_size(MIC_VRING_ENTRIES,
+                        MIC_VIRTIO_RING_ALIGN);
+                vring_init(&vr1->vr,
+                           MIC_VRING_ENTRIES, vr1->va, MIC_VIRTIO_RING_ALIGN);
+                mpsslog("%s %s vr1 %p vr1->info %p vr_size 0x%x vring 0x%x ",
+                        __func__, mic->name, vr1->va, vr1->info, vr_size,
+                        vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN));
+                mpsslog("magic 0x%x expected 0x%x\n",
+                        vr1->info->magic, MIC_MAGIC + type + 1);
+                assert(vr1->info->magic == MIC_MAGIC + type + 1);
+        }
+done:
+        return va;
+}
+
+static void
+wait_for_card_driver(struct mic_info *mic, int fd, int type)
+{
+        struct pollfd pollfd;
+        int err;
+        struct mic_device_desc *desc = get_device_desc(mic, type);
+
+        pollfd.fd = fd;
+        mpsslog("%s %s Waiting .... desc-> type %d status 0x%x\n",
+                mic->name, __func__, type, desc->status);
+        while (1) {
+                pollfd.events = POLLIN;
+                pollfd.revents = 0;
+                err = poll(&pollfd, 1, -1);
+                if (err < 0) {
+                        mpsslog("%s %s poll failed %s\n",
+                                mic->name, __func__, strerror(errno));
+                        continue;
+                }
+
+                if (pollfd.revents) {
+                        mpsslog("%s %s Waiting... desc-> type %d status 0x%x\n",
+                                mic->name, __func__, type, desc->status);
+                        if (desc->status & VIRTIO_CONFIG_S_DRIVER_OK) {
+                                mpsslog("%s %s poll.revents %d\n",
+                                        mic->name, __func__, pollfd.revents);
+                                mpsslog("%s %s desc-> type %d status 0x%x\n",
+                                        mic->name, __func__, type,
+                                        desc->status);
+                                break;
+                        }
+                }
+        }
+}
+
+/* Spin till we have some descriptors */
+static void
+spin_for_descriptors(struct mic_info *mic, struct mic_vring *vr)
+{
+        __u16 avail_idx = read_avail_idx(vr);
+
+        while (avail_idx == le16toh(ACCESS_ONCE(vr->vr.avail->idx))) {
+#ifdef DEBUG
+                mpsslog("%s %s waiting for desc avail %d info_avail %d\n",
+                        mic->name, __func__,
+                        le16toh(vr->vr.avail->idx), vr->info->avail_idx);
+#endif
+                sched_yield();
+        }
+}
+
+static void *
+virtio_net(void *arg)
+{
+        static __u8 vnet_hdr[2][sizeof(struct virtio_net_hdr)];
+        static __u8 vnet_buf[2][MAX_NET_PKT_SIZE] __aligned(64);
+        struct iovec vnet_iov[2][2] = {
+                { { .iov_base = vnet_hdr[0], .iov_len = sizeof(vnet_hdr[0]) },
+                  { .iov_base = vnet_buf[0], .iov_len = sizeof(vnet_buf[0]) } },
+                { { .iov_base = vnet_hdr[1], .iov_len = sizeof(vnet_hdr[1]) },
+                  { .iov_base = vnet_buf[1], .iov_len = sizeof(vnet_buf[1]) } },
+        };
+        struct iovec *iov0 = vnet_iov[0], *iov1 = vnet_iov[1];
+        struct mic_info *mic = (struct mic_info *)arg;
+        char if_name[IFNAMSIZ];
+        struct pollfd net_poll[MAX_NET_FD];
+        struct mic_vring tx_vr, rx_vr;
+        struct mic_copy_desc copy;
+        struct mic_device_desc *desc;
+        int err;
+
+        snprintf(if_name, IFNAMSIZ, "mic%d", mic->id);
+        mic->mic_net.tap_fd = tun_alloc(mic, if_name);
+        if (mic->mic_net.tap_fd < 0)
+                goto done;
+
+        if (tap_configure(mic, if_name))
+                goto done;
+        mpsslog("MIC name %s id %d\n", mic->name, mic->id);
+
+        net_poll[NET_FD_VIRTIO_NET].fd = mic->mic_net.virtio_net_fd;
+        net_poll[NET_FD_VIRTIO_NET].events = POLLIN;
+        net_poll[NET_FD_TUN].fd = mic->mic_net.tap_fd;
+        net_poll[NET_FD_TUN].events = POLLIN;
+
+        if (MAP_FAILED == init_vr(mic, mic->mic_net.virtio_net_fd,
+                                  VIRTIO_ID_NET, &tx_vr, &rx_vr,
+                virtnet_dev_page.dd.num_vq)) {
+                mpsslog("%s init_vr failed %s\n",
+                        mic->name, strerror(errno));
+                goto done;
+        }
+
+        copy.iovcnt = 2;
+        desc = get_device_desc(mic, VIRTIO_ID_NET);
+
+        while (1) {
+                ssize_t len;
+
+                net_poll[NET_FD_VIRTIO_NET].revents = 0;
+                net_poll[NET_FD_TUN].revents = 0;
+
+                /* Start polling for data from tap and virtio net */
+                err = poll(net_poll, 2, -1);
+                if (err < 0) {
+                        mpsslog("%s poll failed %s\n",
+                                __func__, strerror(errno));
+                        continue;
+                }
+                if (!(desc->status & VIRTIO_CONFIG_S_DRIVER_OK))
+                        wait_for_card_driver(mic, mic->mic_net.virtio_net_fd,
+                                             VIRTIO_ID_NET);
+                /*
+                 * Check if there is data to be read from TUN and write to
+                 * virtio net fd if there is.
+                 */
+                if (net_poll[NET_FD_TUN].revents & POLLIN) {
+                        copy.iov = iov0;
+                        len = readv(net_poll[NET_FD_TUN].fd,
+                                copy.iov, copy.iovcnt);
+                        if (len > 0) {
+                                struct virtio_net_hdr *hdr
+                                        = (struct virtio_net_hdr *)vnet_hdr[0];
+
+                                /* Disable checksums on the card since we are on
+                                   a reliable PCIe link */
+                                hdr->flags |= VIRTIO_NET_HDR_F_DATA_VALID;
+#ifdef DEBUG
+                                mpsslog("%s %s %d hdr->flags 0x%x ", mic->name,
+                                        __func__, __LINE__, hdr->flags);
+                                mpsslog("copy.out_len %d hdr->gso_type 0x%x\n",
+                                        copy.out_len, hdr->gso_type);
+#endif
+#ifdef DEBUG
+                                disp_iovec(mic, copy, __func__, __LINE__);
+                                mpsslog("%s %s %d read from tap 0x%lx\n",
+                                        mic->name, __func__, __LINE__,
+                                        len);
+#endif
+                                spin_for_descriptors(mic, &tx_vr);
+                                txrx_prepare(VIRTIO_ID_NET, 1, &tx_vr, &copy,
+                                             len);
+
+                                err = mic_virtio_copy(mic,
+                                        mic->mic_net.virtio_net_fd, &tx_vr,
+                                        &copy);
+                                if (err < 0) {
+                                        mpsslog("%s %s %d mic_virtio_copy %s\n",
+                                                mic->name, __func__, __LINE__,
+                                                strerror(errno));
+                                }
+                                if (!err)
+                                        verify_out_len(mic, &copy);
+#ifdef DEBUG
+                                disp_iovec(mic, copy, __func__, __LINE__);
+                                mpsslog("%s %s %d wrote to net 0x%lx\n",
+                                        mic->name, __func__, __LINE__,
+                                        sum_iovec_len(&copy));
+#endif
+                                /* Reinitialize IOV for next run */
+                                iov0[1].iov_len = MAX_NET_PKT_SIZE;
+                        } else if (len < 0) {
+                                disp_iovec(mic, &copy, __func__, __LINE__);
+                                mpsslog("%s %s %d read failed %s ", mic->name,
+                                        __func__, __LINE__, strerror(errno));
+                                mpsslog("cnt %d sum %zd\n",
+                                        copy.iovcnt, sum_iovec_len(&copy));
+                        }
+                }
+
+                /*
+                 * Check if there is data to be read from virtio net and
+                 * write to TUN if there is.
+                 */
+                if (net_poll[NET_FD_VIRTIO_NET].revents & POLLIN) {
+                        while (rx_vr.info->avail_idx !=
+                                le16toh(rx_vr.vr.avail->idx)) {
+                                copy.iov = iov1;
+                                txrx_prepare(VIRTIO_ID_NET, 0, &rx_vr, &copy,
+                                             MAX_NET_PKT_SIZE
+                                        + sizeof(struct virtio_net_hdr));
+
+                                err = mic_virtio_copy(mic,
+                                        mic->mic_net.virtio_net_fd, &rx_vr,
+                                        &copy);
+                                if (!err) {
+#ifdef DEBUG
+                                        struct virtio_net_hdr *hdr
+                                                = (struct virtio_net_hdr *)
+                                                        vnet_hdr[1];
+
+                                        mpsslog("%s %s %d hdr->flags 0x%x, ",
+                                                mic->name, __func__, __LINE__,
+                                                hdr->flags);
+                                        mpsslog("out_len %d gso_type 0x%x\n",
+                                                copy.out_len,
+                                                hdr->gso_type);
+#endif
+                                        /* Set the correct output iov_len */
+                                        iov1[1].iov_len = copy.out_len -
+                                                sizeof(struct virtio_net_hdr);
+                                        verify_out_len(mic, &copy);
+#ifdef DEBUG
+                                        disp_iovec(mic, copy, __func__,
+                                                   __LINE__);
+                                        mpsslog("%s %s %d ",
+                                                mic->name, __func__, __LINE__);
+                                        mpsslog("read from net 0x%lx\n",
+                                                sum_iovec_len(copy));
+#endif
+                                        len = writev(net_poll[NET_FD_TUN].fd,
+                                                copy.iov, copy.iovcnt);
+                                        if (len != sum_iovec_len(&copy)) {
+                                                mpsslog("Tun write failed %s ",
+                                                        strerror(errno));
+                                                mpsslog("len 0x%zx ", len);
+                                                mpsslog("read_len 0x%zx\n",
+                                                        sum_iovec_len(&copy));
+                                        } else {
+#ifdef DEBUG
+                                                disp_iovec(mic, &copy, __func__,
+                                                           __LINE__);
+                                                mpsslog("%s %s %d ",
+                                                        mic->name, __func__,
+                                                        __LINE__);
+                                                mpsslog("wrote to tap 0x%lx\n",
+                                                        len);
+#endif
+                                        }
+                                } else {
+                                        mpsslog("%s %s %d mic_virtio_copy %s\n",
+                                                mic->name, __func__, __LINE__,
+                                                strerror(errno));
+                                        break;
+                                }
+                        }
+                }
+                if (net_poll[NET_FD_VIRTIO_NET].revents & POLLERR)
+                        mpsslog("%s: %s: POLLERR\n", __func__, mic->name);
+        }
+done:
+        pthread_exit(NULL);
+}
+
+/* virtio_console */
+#define VIRTIO_CONSOLE_FD 0
+#define MONITOR_FD (VIRTIO_CONSOLE_FD + 1)
+#define MAX_CONSOLE_FD (MONITOR_FD + 1)  /* must be the last one + 1 */
+#define MAX_BUFFER_SIZE PAGE_SIZE
+
+static void *
+virtio_console(void *arg)
+{
+        static __u8 vcons_buf[2][PAGE_SIZE];
+        struct iovec vcons_iov[2] = {
+                { .iov_base = vcons_buf[0], .iov_len = sizeof(vcons_buf[0]) },
+                { .iov_base = vcons_buf[1], .iov_len = sizeof(vcons_buf[1]) },
+        };
+        struct iovec *iov0 = &vcons_iov[0], *iov1 = &vcons_iov[1];
+        struct mic_info *mic = (struct mic_info *)arg;
+        int err;
+        struct pollfd console_poll[MAX_CONSOLE_FD];
+        int pty_fd;
+        char *pts_name;
+        ssize_t len;
+        struct mic_vring tx_vr, rx_vr;
+        struct mic_copy_desc copy;
+        struct mic_device_desc *desc;
+
+        pty_fd = posix_openpt(O_RDWR);
+        if (pty_fd < 0) {
+                mpsslog("can't open a pseudoterminal master device: %s\n",
+                        strerror(errno));
+                goto _return;
+        }
+        pts_name = ptsname(pty_fd);
+        if (pts_name == NULL) {
+                mpsslog("can't get pts name\n");
+                goto _close_pty;
+        }
+        printf("%s console message goes to %s\n", mic->name, pts_name);
+        mpsslog("%s console message goes to %s\n", mic->name, pts_name);
+        err = grantpt(pty_fd);
+        if (err < 0) {
+                mpsslog("can't grant access: %s %s\n",
+                        pts_name, strerror(errno));
+                goto _close_pty;
+        }
+        err = unlockpt(pty_fd);
+        if (err < 0) {
+                mpsslog("can't unlock a pseudoterminal: %s %s\n",
+                        pts_name, strerror(errno));
+                goto _close_pty;
+        }
+        console_poll[MONITOR_FD].fd = pty_fd;
+        console_poll[MONITOR_FD].events = POLLIN;
+
+        console_poll[VIRTIO_CONSOLE_FD].fd = mic->mic_console.virtio_console_fd;
+        console_poll[VIRTIO_CONSOLE_FD].events = POLLIN;
+
+        if (MAP_FAILED == init_vr(mic, mic->mic_console.virtio_console_fd,
+                                  VIRTIO_ID_CONSOLE, &tx_vr, &rx_vr,
+                virtcons_dev_page.dd.num_vq)) {
+                mpsslog("%s init_vr failed %s\n",
+                        mic->name, strerror(errno));
+                goto _close_pty;
+        }
+
+        copy.iovcnt = 1;
+        desc = get_device_desc(mic, VIRTIO_ID_CONSOLE);
+
+        for (;;) {
+                console_poll[MONITOR_FD].revents = 0;
+                console_poll[VIRTIO_CONSOLE_FD].revents = 0;
+                err = poll(console_poll, MAX_CONSOLE_FD, -1);
+                if (err < 0) {
+                        mpsslog("%s %d: poll failed: %s\n", __func__, __LINE__,
+                                strerror(errno));
+                        continue;
+                }
+                if (!(desc->status & VIRTIO_CONFIG_S_DRIVER_OK))
+                        wait_for_card_driver(mic,
+                                             mic->mic_console.virtio_console_fd,
+                                VIRTIO_ID_CONSOLE);
+
+                if (console_poll[MONITOR_FD].revents & POLLIN) {
+                        copy.iov = iov0;
+                        len = readv(pty_fd, copy.iov, copy.iovcnt);
+                        if (len > 0) {
+#ifdef DEBUG
+                                disp_iovec(mic, copy, __func__, __LINE__);
+                                mpsslog("%s %s %d read from tap 0x%lx\n",
+                                        mic->name, __func__, __LINE__,
+                                        len);
+#endif
+                                spin_for_descriptors(mic, &tx_vr);
+                                txrx_prepare(VIRTIO_ID_CONSOLE, 1, &tx_vr,
+                                             &copy, len);
+
+                                err = mic_virtio_copy(mic,
+                                        mic->mic_console.virtio_console_fd,
+                                        &tx_vr, &copy);
+                                if (err < 0) {
+                                        mpsslog("%s %s %d mic_virtio_copy %s\n",
+                                                mic->name, __func__, __LINE__,
+                                                strerror(errno));
+                                }
+                                if (!err)
+                                        verify_out_len(mic, &copy);
+#ifdef DEBUG
+                                disp_iovec(mic, copy, __func__, __LINE__);
+                                mpsslog("%s %s %d wrote to net 0x%lx\n",
+                                        mic->name, __func__, __LINE__,
+                                        sum_iovec_len(copy));
+#endif
+                                /* Reinitialize IOV for next run */
+                                iov0->iov_len = PAGE_SIZE;
+                        } else if (len < 0) {
+                                disp_iovec(mic, &copy, __func__, __LINE__);
+                                mpsslog("%s %s %d read failed %s ",
+                                        mic->name, __func__, __LINE__,
+                                        strerror(errno));
+                                mpsslog("cnt %d sum %zd\n",
+                                        copy.iovcnt, sum_iovec_len(&copy));
+                        }
+                }
+
+                if (console_poll[VIRTIO_CONSOLE_FD].revents & POLLIN) {
+                        while (rx_vr.info->avail_idx !=
+                                le16toh(rx_vr.vr.avail->idx)) {
+                                copy.iov = iov1;
+                                txrx_prepare(VIRTIO_ID_CONSOLE, 0, &rx_vr,
+                                             &copy, PAGE_SIZE);
+
+                                err = mic_virtio_copy(mic,
+                                        mic->mic_console.virtio_console_fd,
+                                        &rx_vr, &copy);
+                                if (!err) {
+                                        /* Set the correct output iov_len */
+                                        iov1->iov_len = copy.out_len;
+                                        verify_out_len(mic, &copy);
+#ifdef DEBUG
+                                        disp_iovec(mic, copy, __func__,
+                                                   __LINE__);
+                                        mpsslog("%s %s %d ",
+                                                mic->name, __func__, __LINE__);
+                                        mpsslog("read from net 0x%lx\n",
+                                                sum_iovec_len(copy));
+#endif
+                                        len = writev(pty_fd,
+                                                copy.iov, copy.iovcnt);
+                                        if (len != sum_iovec_len(&copy)) {
+                                                mpsslog("Tun write failed %s ",
+                                                        strerror(errno));
+                                                mpsslog("len 0x%zx ", len);
+                                                mpsslog("read_len 0x%zx\n",
+                                                        sum_iovec_len(&copy));
+                                        } else {
+#ifdef DEBUG
+                                                disp_iovec(mic, copy, __func__,
+                                                           __LINE__);
+                                                mpsslog("%s %s %d ",
+                                                        mic->name, __func__,
+                                                        __LINE__);
+                                                mpsslog("wrote to tap 0x%lx\n",
+                                                        len);
+#endif
+                                        }
+                                } else {
+                                        mpsslog("%s %s %d mic_virtio_copy %s\n",
+                                                mic->name, __func__, __LINE__,
+                                                strerror(errno));
+                                        break;
+                                }
+                        }
+                }
+                if (console_poll[NET_FD_VIRTIO_NET].revents & POLLERR)
+                        mpsslog("%s: %s: POLLERR\n", __func__, mic->name);
+        }
+_close_pty:
+        close(pty_fd);
+_return:
+        pthread_exit(NULL);
+}
+
+static void
+add_virtio_device(struct mic_info *mic, struct mic_device_desc *dd)
+{
+        char path[PATH_MAX];
+        int fd, err;
+
+        snprintf(path, PATH_MAX, "/dev/mic%d", mic->id);
+        fd = open(path, O_RDWR);
+        if (fd < 0) {
+                mpsslog("Could not open %s %s\n", path, strerror(errno));
+                return;
+        }
+
+        err = ioctl(fd, MIC_VIRTIO_ADD_DEVICE, dd);
+        if (err < 0) {
+                mpsslog("Could not add %d %s\n", dd->type, strerror(errno));
+                close(fd);
+                return;
+        }
+        switch (dd->type) {
+        case VIRTIO_ID_NET:
+                mic->mic_net.virtio_net_fd = fd;
+                mpsslog("Added VIRTIO_ID_NET for %s\n", mic->name);
+                break;
+        case VIRTIO_ID_CONSOLE:
+                mic->mic_console.virtio_console_fd = fd;
+                mpsslog("Added VIRTIO_ID_CONSOLE for %s\n", mic->name);
+                break;
+        case VIRTIO_ID_BLOCK:
+                mic->mic_virtblk.virtio_block_fd = fd;
+                mpsslog("Added VIRTIO_ID_BLOCK for %s\n", mic->name);
+                break;
+        }
+}
+
+static bool
+set_backend_file(struct mic_info *mic)
+{
+        FILE *config;
+        char buff[PATH_MAX], *line, *evv, *p;
+
+        snprintf(buff, PATH_MAX, "%s/mpssd%03d.conf", mic_config_dir, mic->id);
+        config = fopen(buff, "r");
+        if (config == NULL)
+                return false;
+        do {  /* look for "virtblk_backend=XXXX" */
+                line = fgets(buff, PATH_MAX, config);
+                if (line == NULL)
+                        break;
+                if (*line == '#')
+                        continue;
+                p = strchr(line, '\n');
+                if (p)
+                        *p = '\0';
+        } while (strncmp(line, virtblk_backend, strlen(virtblk_backend)) != 0);
+        fclose(config);
+        if (line == NULL)
+                return false;
+        evv = strchr(line, '=');
+        if (evv == NULL)
+                return false;
+        mic->mic_virtblk.backend_file = malloc(strlen(evv) + 1);
+        if (mic->mic_virtblk.backend_file == NULL) {
+                mpsslog("%s %d can't allocate memory\n", mic->name, mic->id);
+                return false;
+        }
+        strcpy(mic->mic_virtblk.backend_file, evv + 1);
+        return true;
+}
+
+#define SECTOR_SIZE 512
+static bool
+set_backend_size(struct mic_info *mic)
+{
+        mic->mic_virtblk.backend_size = lseek(mic->mic_virtblk.backend, 0,
+                SEEK_END);
+        if (mic->mic_virtblk.backend_size < 0) {
+                mpsslog("%s: can't seek: %s\n",
+                        mic->name, mic->mic_virtblk.backend_file);
+                return false;
+        }
+        virtblk_dev_page.blk_config.capacity =
+                mic->mic_virtblk.backend_size / SECTOR_SIZE;
+        if ((mic->mic_virtblk.backend_size % SECTOR_SIZE) != 0)
+                virtblk_dev_page.blk_config.capacity++;
+
+        virtblk_dev_page.blk_config.capacity =
+                htole64(virtblk_dev_page.blk_config.capacity);
+
+        return true;
+}
+
+static bool
+open_backend(struct mic_info *mic)
+{
+        if (!set_backend_file(mic))
+                goto _error_exit;
+        mic->mic_virtblk.backend = open(mic->mic_virtblk.backend_file, O_RDWR);
+        if (mic->mic_virtblk.backend < 0) {
+                mpsslog("%s: can't open: %s\n", mic->name,
+                        mic->mic_virtblk.backend_file);
+                goto _error_free;
+        }
+        if (!set_backend_size(mic))
+                goto _error_close;
+        mic->mic_virtblk.backend_addr = mmap(NULL,
+                mic->mic_virtblk.backend_size,
+                PROT_READ|PROT_WRITE, MAP_SHARED,
+                mic->mic_virtblk.backend, 0L);
+        if (mic->mic_virtblk.backend_addr == MAP_FAILED) {
+                mpsslog("%s: can't map: %s %s\n",
+                        mic->name, mic->mic_virtblk.backend_file,
+                        strerror(errno));
+                goto _error_close;
+        }
+        return true;
+
+ _error_close:
+        close(mic->mic_virtblk.backend);
+ _error_free:
+        free(mic->mic_virtblk.backend_file);
+ _error_exit:
+        return false;
+}
+
+static void
+close_backend(struct mic_info *mic)
+{
+        munmap(mic->mic_virtblk.backend_addr, mic->mic_virtblk.backend_size);
+        close(mic->mic_virtblk.backend);
+        free(mic->mic_virtblk.backend_file);
+}
+
+static bool
+start_virtblk(struct mic_info *mic, struct mic_vring *vring)
+{
+        if (((unsigned long)&virtblk_dev_page.blk_config % 8) != 0) {
+                mpsslog("%s: blk_config is not 8 byte aligned.\n",
+                        mic->name);
+                return false;
+        }
+        add_virtio_device(mic, &virtblk_dev_page.dd);
+        if (MAP_FAILED == init_vr(mic, mic->mic_virtblk.virtio_block_fd,
+                                  VIRTIO_ID_BLOCK, vring, NULL,
+                                  virtblk_dev_page.dd.num_vq)) {
+                mpsslog("%s init_vr failed %s\n",
+                        mic->name, strerror(errno));
+                return false;
+        }
+        return true;
+}
+
+static void
+stop_virtblk(struct mic_info *mic)
+{
+        int vr_size, ret;
+
+        vr_size = PAGE_ALIGN(vring_size(MIC_VRING_ENTRIES,
+                MIC_VIRTIO_RING_ALIGN) + sizeof(struct _mic_vring_info));
+        ret = munmap(mic->mic_virtblk.block_dp,
+                MIC_DEVICE_PAGE_END + vr_size * virtblk_dev_page.dd.num_vq);
+        if (ret < 0)
+                mpsslog("%s munmap errno %d\n", mic->name, errno);
+        close(mic->mic_virtblk.virtio_block_fd);
+}
+
+static __u8
+header_error_check(struct vring_desc *desc)
+{
+        if (le32toh(desc->len) != sizeof(struct virtio_blk_outhdr)) {
+                mpsslog("%s() %d: length is not sizeof(virtio_blk_outhd)\n",
+                        __func__, __LINE__);
+                return -EIO;
+        }
+        if (!(le16toh(desc->flags) & VRING_DESC_F_NEXT)) {
+                mpsslog("%s() %d: alone\n",
+                        __func__, __LINE__);
+                return -EIO;
+        }
+        if (le16toh(desc->flags) & VRING_DESC_F_WRITE) {
+                mpsslog("%s() %d: not read\n",
+                        __func__, __LINE__);
+                return -EIO;
+        }
+        return 0;
+}
+
+static int
+read_header(int fd, struct virtio_blk_outhdr *hdr, __u32 desc_idx)
+{
+        struct iovec iovec;
+        struct mic_copy_desc copy;
+
+        iovec.iov_len = sizeof(*hdr);
+        iovec.iov_base = hdr;
+        copy.iov = &iovec;
+        copy.iovcnt = 1;
+        copy.vr_idx = 0;  /* only one vring on virtio_block */
+        copy.update_used = false;  /* do not update used index */
+        return ioctl(fd, MIC_VIRTIO_COPY_DESC, &copy);
+}
+
+static int
+transfer_blocks(int fd, struct iovec *iovec, __u32 iovcnt)
+{
+        struct mic_copy_desc copy;
+
+        copy.iov = iovec;
+        copy.iovcnt = iovcnt;
+        copy.vr_idx = 0;  /* only one vring on virtio_block */
+        copy.update_used = false;  /* do not update used index */
+        return ioctl(fd, MIC_VIRTIO_COPY_DESC, &copy);
+}
+
+static __u8
+status_error_check(struct vring_desc *desc)
+{
+        if (le32toh(desc->len) != sizeof(__u8)) {
+                mpsslog("%s() %d: length is not sizeof(status)\n",
+                        __func__, __LINE__);
+                return -EIO;
+        }
+        return 0;
+}
+
+static int
+write_status(int fd, __u8 *status)
+{
+        struct iovec iovec;
+        struct mic_copy_desc copy;
+
+        iovec.iov_base = status;
+        iovec.iov_len = sizeof(*status);
+        copy.iov = &iovec;
+        copy.iovcnt = 1;
+        copy.vr_idx = 0;  /* only one vring on virtio_block */
+        copy.update_used = true; /* Update used index */
+        return ioctl(fd, MIC_VIRTIO_COPY_DESC, &copy);
+}
+
+static void *
+virtio_block(void *arg)
+{
+        struct mic_info *mic = (struct mic_info *)arg;
+        int ret;
+        struct pollfd block_poll;
+        struct mic_vring vring;
+        __u16 avail_idx;
+        __u32 desc_idx;
+        struct vring_desc *desc;
+        struct iovec *iovec, *piov;
+        __u8 status;
+        __u32 buffer_desc_idx;
+        struct virtio_blk_outhdr hdr;
+        void *fos;
+
+        for (;;) {  /* forever */
+                if (!open_backend(mic)) { /* No virtblk */
+                        for (mic->mic_virtblk.signaled = 0;
+                                !mic->mic_virtblk.signaled;)
+                                sleep(1);
+                        continue;
+                }
+
+                /* backend file is specified. */
+                if (!start_virtblk(mic, &vring))
+                        goto _close_backend;
+                iovec = malloc(sizeof(*iovec) *
+                        le32toh(virtblk_dev_page.blk_config.seg_max));
+                if (!iovec) {
+                        mpsslog("%s: can't alloc iovec: %s\n",
+                                mic->name, strerror(ENOMEM));
+                        goto _stop_virtblk;
+                }
+
+                block_poll.fd = mic->mic_virtblk.virtio_block_fd;
+                block_poll.events = POLLIN;
+                for (mic->mic_virtblk.signaled = 0;
+                     !mic->mic_virtblk.signaled;) {
+                        block_poll.revents = 0;
+                                        /* timeout in 1 sec to see signaled */
+                        ret = poll(&block_poll, 1, 1000);
+                        if (ret < 0) {
+                                mpsslog("%s %d: poll failed: %s\n",
+                                        __func__, __LINE__,
+                                        strerror(errno));
+                                continue;
+                        }
+
+                        if (!(block_poll.revents & POLLIN)) {
+#ifdef DEBUG
+                                mpsslog("%s %d: block_poll.revents=0x%x\n",
+                                        __func__, __LINE__, block_poll.revents);
+#endif
+                                continue;
+                        }
+
+                        /* POLLIN */
+                        while (vring.info->avail_idx !=
+                                le16toh(vring.vr.avail->idx)) {
+                                /* read header element */
+                                avail_idx =
+                                        vring.info->avail_idx &
+                                        (vring.vr.num - 1);
+                                desc_idx = le16toh(
+                                        vring.vr.avail->ring[avail_idx]);
+                                desc = &vring.vr.desc[desc_idx];
+#ifdef DEBUG
+                                mpsslog("%s() %d: avail_idx=%d ",
+                                        __func__, __LINE__,
+                                        vring.info->avail_idx);
+                                mpsslog("vring.vr.num=%d desc=%p\n",
+                                        vring.vr.num, desc);
+#endif
+                                status = header_error_check(desc);
+                                ret = read_header(
+                                        mic->mic_virtblk.virtio_block_fd,
+                                        &hdr, desc_idx);
+                                if (ret < 0) {
+                                        mpsslog("%s() %d %s: ret=%d %s\n",
+                                                __func__, __LINE__,
+                                                mic->name, ret,
+                                                strerror(errno));
+                                        break;
+                                }
+                                /* buffer element */
+                                piov = iovec;
+                                status = 0;
+                                fos = mic->mic_virtblk.backend_addr +
+                                        (hdr.sector * SECTOR_SIZE);
+                                buffer_desc_idx = next_desc(desc);
+                                desc_idx = buffer_desc_idx;
+                                for (desc = &vring.vr.desc[buffer_desc_idx];
+                                     desc->flags & VRING_DESC_F_NEXT;
+                                     desc_idx = next_desc(desc),
+                                             desc = &vring.vr.desc[desc_idx]) {
+                                        piov->iov_len = desc->len;
+                                        piov->iov_base = fos;
+                                        piov++;
+                                        fos += desc->len;
+                                }
+                                /* Returning NULLs for VIRTIO_BLK_T_GET_ID. */
+                                if (hdr.type & ~(VIRTIO_BLK_T_OUT |
+                                        VIRTIO_BLK_T_GET_ID)) {
+                                        /*
+                                          VIRTIO_BLK_T_IN - does not do
+                                          anything. Probably for documenting.
+                                          VIRTIO_BLK_T_SCSI_CMD - for
+                                          virtio_scsi.
+                                          VIRTIO_BLK_T_FLUSH - turned off in
+                                          config space.
+                                          VIRTIO_BLK_T_BARRIER - defined but not
+                                          used in anywhere.
+                                        */
+                                        mpsslog("%s() %d: type %x ",
+                                                __func__, __LINE__,
+                                                hdr.type);
+                                        mpsslog("is not supported\n");
+                                        status = -ENOTSUP;
+
+                                } else {
+                                        ret = transfer_blocks(
+                                        mic->mic_virtblk.virtio_block_fd,
+                                                iovec,
+                                                piov - iovec);
+                                        if (ret < 0 &&
+                                            status != 0)
+                                                status = ret;
+                                }
+                                /* write status and update used pointer */
+                                if (status != 0)
+                                        status = status_error_check(desc);
+                                ret = write_status(
+                                        mic->mic_virtblk.virtio_block_fd,
+                                        &status);
+#ifdef DEBUG
+                                mpsslog("%s() %d: write status=%d on desc=%p\n",
+                                        __func__, __LINE__,
+                                        status, desc);
+#endif
+                        }
+                }
+                free(iovec);
+_stop_virtblk:
+                stop_virtblk(mic);
+_close_backend:
+                close_backend(mic);
+        }  /* forever */
+
+        pthread_exit(NULL);
+}
+
+static void
+reset(struct mic_info *mic)
+{
+#define RESET_TIMEOUT 120
+        int i = RESET_TIMEOUT;
+        setsysfs(mic->name, "state", "reset");
+        while (i) {
+                char *state;
+                state = readsysfs(mic->name, "state");
+                if (!state)
+                        goto retry;
+                mpsslog("%s: %s %d state %s\n",
+                        mic->name, __func__, __LINE__, state);
+
+                /*
+                 * If the shutdown was initiated by OSPM, the state stays
+                 * in "suspended" which is also a valid condition for reset.
+                 */
+                if ((!strcmp(state, "offline")) ||
+                    (!strcmp(state, "suspended"))) {
+                        free(state);
+                        break;
+                }
+                free(state);
+retry:
+                sleep(1);
+                i--;
+        }
+}
+
+static int
+get_mic_shutdown_status(struct mic_info *mic, char *shutdown_status)
+{
+        if (!strcmp(shutdown_status, "nop"))
+                return MIC_NOP;
+        if (!strcmp(shutdown_status, "crashed"))
+                return MIC_CRASHED;
+        if (!strcmp(shutdown_status, "halted"))
+                return MIC_HALTED;
+        if (!strcmp(shutdown_status, "poweroff"))
+                return MIC_POWER_OFF;
+        if (!strcmp(shutdown_status, "restart"))
+                return MIC_RESTART;
+        mpsslog("%s: BUG invalid status %s\n", mic->name, shutdown_status);
+        /* Invalid state */
+        assert(0);
+};
+
+static int get_mic_state(struct mic_info *mic, char *state)
+{
+        if (!strcmp(state, "offline"))
+                return MIC_OFFLINE;
+        if (!strcmp(state, "online"))
+                return MIC_ONLINE;
+        if (!strcmp(state, "shutting_down"))
+                return MIC_SHUTTING_DOWN;
+        if (!strcmp(state, "reset_failed"))
+                return MIC_RESET_FAILED;
+        if (!strcmp(state, "suspending"))
+                return MIC_SUSPENDING;
+        if (!strcmp(state, "suspended"))
+                return MIC_SUSPENDED;
+        mpsslog("%s: BUG invalid state %s\n", mic->name, state);
+        /* Invalid state */
+        assert(0);
+};
+
+static void mic_handle_shutdown(struct mic_info *mic)
+{
+#define SHUTDOWN_TIMEOUT 60
+        int i = SHUTDOWN_TIMEOUT, ret, stat = 0;
+        char *shutdown_status;
+        while (i) {
+                shutdown_status = readsysfs(mic->name, "shutdown_status");
+                if (!shutdown_status)
+                        continue;
+                mpsslog("%s: %s %d shutdown_status %s\n",
+                        mic->name, __func__, __LINE__, shutdown_status);
+                switch (get_mic_shutdown_status(mic, shutdown_status)) {
+                case MIC_RESTART:
+                        mic->restart = 1;
+                case MIC_HALTED:
+                case MIC_POWER_OFF:
+                case MIC_CRASHED:
+                        free(shutdown_status);
+                        goto reset;
+                default:
+                        break;
+                }
+                free(shutdown_status);
+                sleep(1);
+                i--;
+        }
+reset:
+        ret = kill(mic->pid, SIGTERM);
+        mpsslog("%s: %s %d kill pid %d ret %d\n",
+                mic->name, __func__, __LINE__,
+                mic->pid, ret);
+        if (!ret) {
+                ret = waitpid(mic->pid, &stat,
+                        WIFSIGNALED(stat));
+                mpsslog("%s: %s %d waitpid ret %d pid %d\n",
+                        mic->name, __func__, __LINE__,
+                        ret, mic->pid);
+        }
+        if (ret == mic->pid)
+                reset(mic);
+}
+
+static void *
+mic_config(void *arg)
+{
+        struct mic_info *mic = (struct mic_info *)arg;
+        char *state = NULL;
+        char pathname[PATH_MAX];
+        int fd, ret;
+        struct pollfd ufds[1];
+        char value[4096];
+
+        snprintf(pathname, PATH_MAX - 1, "%s/%s/%s",
+                 MICSYSFSDIR, mic->name, "state");
+
+        fd = open(pathname, O_RDONLY);
+        if (fd < 0) {
+                mpsslog("%s: opening file %s failed %s\n",
+                        mic->name, pathname, strerror(errno));
+                goto error;
+        }
+
+        do {
+                ret = read(fd, value, sizeof(value));
+                if (ret < 0) {
+                        mpsslog("%s: Failed to read sysfs entry '%s': %s\n",
+                                mic->name, pathname, strerror(errno));
+                        goto close_error1;
+                }
+retry:
+                state = readsysfs(mic->name, "state");
+                if (!state)
+                        goto retry;
+                mpsslog("%s: %s %d state %s\n",
+                        mic->name, __func__, __LINE__, state);
+                switch (get_mic_state(mic, state)) {
+                case MIC_SHUTTING_DOWN:
+                        mic_handle_shutdown(mic);
+                        goto close_error;
+                case MIC_SUSPENDING:
+                        mic->boot_on_resume = 1;
+                        setsysfs(mic->name, "state", "suspend");
+                        mic_handle_shutdown(mic);
+                        goto close_error;
+                case MIC_OFFLINE:
+                        if (mic->boot_on_resume) {
+                                setsysfs(mic->name, "state", "boot");
+                                mic->boot_on_resume = 0;
+                        }
+                        break;
+                default:
+                        break;
+                }
+                free(state);
+
+                ufds[0].fd = fd;
+                ufds[0].events = POLLERR | POLLPRI;
+                ret = poll(ufds, 1, -1);
+                if (ret < 0) {
+                        mpsslog("%s: poll failed %s\n",
+                                mic->name, strerror(errno));
+                        goto close_error1;
+                }
+        } while (1);
+close_error:
+        free(state);
+close_error1:
+        close(fd);
+error:
+        init_mic(mic);
+        pthread_exit(NULL);
+}
+
+static void
+set_cmdline(struct mic_info *mic)
+{
+        char buffer[PATH_MAX];
+        int len;
+
+        len = snprintf(buffer, PATH_MAX,
+                "clocksource=tsc highres=off nohz=off ");
+        len += snprintf(buffer + len, PATH_MAX,
+                "cpufreq_on;corec6_off;pc3_off;pc6_off ");
+        len += snprintf(buffer + len, PATH_MAX,
+                "ifcfg=static;address,172.31.%d.1;netmask,255.255.255.0",
+                mic->id);
+
+        setsysfs(mic->name, "cmdline", buffer);
+        mpsslog("%s: Command line: \"%s\"\n", mic->name, buffer);
+        snprintf(buffer, PATH_MAX, "172.31.%d.1", mic->id);
+        mpsslog("%s: IPADDR: \"%s\"\n", mic->name, buffer);
+}
+
+static void
+set_log_buf_info(struct mic_info *mic)
+{
+        int fd;
+        off_t len;
+        char system_map[] = "/lib/firmware/mic/System.map";
+        char *map, *temp, log_buf[17] = {'\0'};
+
+        fd = open(system_map, O_RDONLY);
+        if (fd < 0) {
+                mpsslog("%s: Opening System.map failed: %d\n",
+                        mic->name, errno);
+                return;
+        }
+        len = lseek(fd, 0, SEEK_END);
+        if (len < 0) {
+                mpsslog("%s: Reading System.map size failed: %d\n",
+                        mic->name, errno);
+                close(fd);
+                return;
+        }
+        map = mmap(NULL, len, PROT_READ, MAP_PRIVATE, fd, 0);
+        if (map == MAP_FAILED) {
+                mpsslog("%s: mmap of System.map failed: %d\n",
+                        mic->name, errno);
+                close(fd);
+                return;
+        }
+        temp = strstr(map, "__log_buf");
+        if (!temp) {
+                mpsslog("%s: __log_buf not found: %d\n", mic->name, errno);
+                munmap(map, len);
+                close(fd);
+                return;
+        }
+        strncpy(log_buf, temp - 19, 16);
+        setsysfs(mic->name, "log_buf_addr", log_buf);
+        mpsslog("%s: log_buf_addr: %s\n", mic->name, log_buf);
+        temp = strstr(map, "log_buf_len");
+        if (!temp) {
+                mpsslog("%s: log_buf_len not found: %d\n", mic->name, errno);
+                munmap(map, len);
+                close(fd);
+                return;
+        }
+        strncpy(log_buf, temp - 19, 16);
+        setsysfs(mic->name, "log_buf_len", log_buf);
+        mpsslog("%s: log_buf_len: %s\n", mic->name, log_buf);
+        munmap(map, len);
+        close(fd);
+}
+
+static void init_mic(struct mic_info *mic);
+
+static void
+change_virtblk_backend(int x, siginfo_t *siginfo, void *p)
+{
+        struct mic_info *mic;
+
+        for (mic = mic_list.next; mic != NULL; mic = mic->next)
+                mic->mic_virtblk.signaled = 1/* true */;
+}
+
+static void
+init_mic(struct mic_info *mic)
+{
+        struct sigaction ignore = {
+                .sa_flags = 0,
+                .sa_handler = SIG_IGN
+        };
+        struct sigaction act = {
+                .sa_flags = SA_SIGINFO,
+                .sa_sigaction = change_virtblk_backend,
+        };
+        char buffer[PATH_MAX];
+        int err;
+
+        /*
+         * Currently, one virtio block device is supported for each MIC card
+         * at a time. Any user (or test) can send a SIGUSR1 to the MIC daemon.
+         * The signal informs the virtio block backend about a change in the
+         * configuration file which specifies the virtio backend file name on
+         * the host. Virtio block backend then re-reads the configuration file
+         * and switches to the new block device. This signalling mechanism may
+         * not be required once multiple virtio block devices are supported by
+         * the MIC daemon.
+         */
+        sigaction(SIGUSR1, &ignore, NULL);
+
+        mic->pid = fork();
+        switch (mic->pid) {
+        case 0:
+                set_log_buf_info(mic);
+                set_cmdline(mic);
+                add_virtio_device(mic, &virtcons_dev_page.dd);
+                add_virtio_device(mic, &virtnet_dev_page.dd);
+                err = pthread_create(&mic->mic_console.console_thread, NULL,
+                        virtio_console, mic);
+                if (err)
+                        mpsslog("%s virtcons pthread_create failed %s\n",
+                                mic->name, strerror(err));
+                err = pthread_create(&mic->mic_net.net_thread, NULL,
+                        virtio_net, mic);
+                if (err)
+                        mpsslog("%s virtnet pthread_create failed %s\n",
+                                mic->name, strerror(err));
+                err = pthread_create(&mic->mic_virtblk.block_thread, NULL,
+                        virtio_block, mic);
+                if (err)
+                        mpsslog("%s virtblk pthread_create failed %s\n",
+                                mic->name, strerror(err));
+                sigemptyset(&act.sa_mask);
+                err = sigaction(SIGUSR1, &act, NULL);
+                if (err)
+                        mpsslog("%s sigaction SIGUSR1 failed %s\n",
+                                mic->name, strerror(errno));
+                while (1)
+                        sleep(60);
+        case -1:
+                mpsslog("fork failed MIC name %s id %d errno %d\n",
+                        mic->name, mic->id, errno);
+                break;
+        default:
+                if (mic->restart) {
+                        snprintf(buffer, PATH_MAX, "boot");
+                        setsysfs(mic->name, "state", buffer);
+                        mpsslog("%s restarting mic %d\n",
+                                mic->name, mic->restart);
+                        mic->restart = 0;
+                }
+                pthread_create(&mic->config_thread, NULL, mic_config, mic);
+        }
+}
+
+static void
+start_daemon(void)
+{
+        struct mic_info *mic;
+
+        for (mic = mic_list.next; mic != NULL; mic = mic->next)
+                init_mic(mic);
+
+        while (1)
+                sleep(60);
+}
+
+static int
+init_mic_list(void)
+{
+        struct mic_info *mic = &mic_list;
+        struct dirent *file;
+        DIR *dp;
+        int cnt = 0;
+
+        dp = opendir(MICSYSFSDIR);
+        if (!dp)
+                return 0;
+
+        while ((file = readdir(dp)) != NULL) {
+                if (!strncmp(file->d_name, "mic", 3)) {
+                        mic->next = calloc(1, sizeof(struct mic_info));
+                        if (mic->next) {
+                                mic = mic->next;
+                                mic->id = atoi(&file->d_name[3]);
+                                mic->name = malloc(strlen(file->d_name) + 16);
+                                if (mic->name)
+                                        strcpy(mic->name, file->d_name);
+                                mpsslog("MIC name %s id %d\n", mic->name,
+                                        mic->id);
+                                cnt++;
+                        }
+                }
+        }
+
+        closedir(dp);
+        return cnt;
+}
+
+void
+mpsslog(char *format, ...)
+{
+        va_list args;
+        char buffer[4096];
+        char ts[52], *ts1;
+        time_t t;
+
+        if (logfp == NULL)
+                return;
+
+        va_start(args, format);
+        vsprintf(buffer, format, args);
+        va_end(args);
+
+        time(&t);
+        ts1 = ctime_r(&t, ts);
+        ts1[strlen(ts1) - 1] = '\0';
+        fprintf(logfp, "%s: %s", ts1, buffer);
+
+        fflush(logfp);
+}
+
+int
+main(int argc, char *argv[])
+{
+        int cnt;
+        pid_t pid;
+
+        myname = argv[0];
+
+        logfp = fopen(LOGFILE_NAME, "a+");
+        if (!logfp) {
+                fprintf(stderr, "cannot open logfile '%s'\n", LOGFILE_NAME);
+                exit(1);
+        }
+        pid = fork();
+        switch (pid) {
+        case 0:
+                break;
+        case -1:
+                exit(2);
+        default:
+                exit(0);
+        }
+
+        mpsslog("MIC Daemon start\n");
+
+        cnt = init_mic_list();
+        if (cnt == 0) {
+                mpsslog("MIC module not loaded\n");
+                exit(3);
+        }
+        mpsslog("MIC found %d devices\n", cnt);
+
+        start_daemon();
+
+        exit(0);
+}
diff --git a/Documentation/mic/mpssd/mpssd.h b/Documentation/mic/mpssd/mpssd.h
new file mode 100644
index 000000000000..f5f18b15d9a0
--- /dev/null
+++ b/Documentation/mic/mpssd/mpssd.h
@@ -0,0 +1,102 @@
+/*
+ * Intel MIC Platform Software Stack (MPSS)
+ *
+ * Copyright(c) 2013 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Intel MIC User Space Tools.
+ */
+#ifndef _MPSSD_H_
+#define _MPSSD_H_
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <dirent.h>
+#include <libgen.h>
+#include <pthread.h>
+#include <stdarg.h>
+#include <time.h>
+#include <errno.h>
+#include <sys/dir.h>
+#include <sys/ioctl.h>
+#include <sys/poll.h>
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <sys/mman.h>
+#include <sys/utsname.h>
+#include <sys/wait.h>
+#include <netinet/in.h>
+#include <arpa/inet.h>
+#include <netdb.h>
+#include <pthread.h>
+#include <signal.h>
+#include <limits.h>
+#include <syslog.h>
+#include <getopt.h>
+#include <net/if.h>
+#include <linux/if_tun.h>
+#include <linux/if_tun.h>
+#include <linux/virtio_ids.h>
+
+#define MICSYSFSDIR "/sys/class/mic"
+#define LOGFILE_NAME "/var/log/mpssd"
+#define PAGE_SIZE 4096
+
+struct mic_console_info {
+        pthread_t       console_thread;
+        int             virtio_console_fd;
+        void            *console_dp;
+};
+
+struct mic_net_info {
+        pthread_t       net_thread;
+        int             virtio_net_fd;
+        int             tap_fd;
+        void            *net_dp;
+};
+
+struct mic_virtblk_info {
+        pthread_t       block_thread;
+        int             virtio_block_fd;
+        void            *block_dp;
+        volatile sig_atomic_t   signaled;
+        char            *backend_file;
+        int             backend;
+        void            *backend_addr;
+        long            backend_size;
+};
+
+struct mic_info {
+        int             id;
+        char            *name;
+        pthread_t       config_thread;
+        pid_t           pid;
+        struct mic_console_info mic_console;
+        struct mic_net_info     mic_net;
+        struct mic_virtblk_info mic_virtblk;
+        int             restart;
+        int             boot_on_resume;
+        struct mic_info *next;
+};
+
+__attribute__((format(printf, 1, 2)))
+void mpsslog(char *format, ...);
+char *readsysfs(char *dir, char *entry);
+int setsysfs(char *dir, char *entry, char *value);
+#endif
diff --git a/Documentation/mic/mpssd/sysfs.c b/Documentation/mic/mpssd/sysfs.c
new file mode 100644
index 000000000000..8dd326936083
--- /dev/null
+++ b/Documentation/mic/mpssd/sysfs.c
@@ -0,0 +1,102 @@
+/*
+ * Intel MIC Platform Software Stack (MPSS)
+ *
+ * Copyright(c) 2013 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Intel MIC User Space Tools.
+ */
+
+#include "mpssd.h"
+
+#define PAGE_SIZE 4096
+
+char *
+readsysfs(char *dir, char *entry)
+{
+        char filename[PATH_MAX];
+        char value[PAGE_SIZE];
+        char *string = NULL;
+        int fd;
+        int len;
+
+        if (dir == NULL)
+                snprintf(filename, PATH_MAX, "%s/%s", MICSYSFSDIR, entry);
+        else
+                snprintf(filename, PATH_MAX,
+                         "%s/%s/%s", MICSYSFSDIR, dir, entry);
+
+        fd = open(filename, O_RDONLY);
+        if (fd < 0) {
+                mpsslog("Failed to open sysfs entry '%s': %s\n",
+                        filename, strerror(errno));
+                return NULL;
+        }
+
+        len = read(fd, value, sizeof(value));
+        if (len < 0) {
+                mpsslog("Failed to read sysfs entry '%s': %s\n",
+                        filename, strerror(errno));
+                goto readsys_ret;
+        }
+        if (len == 0)
+                goto readsys_ret;
+
+        value[len - 1] = '\0';
+
+        string = malloc(strlen(value) + 1);
+        if (string)
+                strcpy(string, value);
+
+readsys_ret:
+        close(fd);
+        return string;
+}
+
+int
+setsysfs(char *dir, char *entry, char *value)
+{
+        char filename[PATH_MAX];
+        char *oldvalue;
+        int fd, ret = 0;
+
+        if (dir == NULL)
+                snprintf(filename, PATH_MAX, "%s/%s", MICSYSFSDIR, entry);
+        else
+                snprintf(filename, PATH_MAX, "%s/%s/%s",
+                         MICSYSFSDIR, dir, entry);
+
+        oldvalue = readsysfs(dir, entry);
+
+        fd = open(filename, O_RDWR);
+        if (fd < 0) {
+                ret = errno;
+                mpsslog("Failed to open sysfs entry '%s': %s\n",
+                        filename, strerror(errno));
+                goto done;
+        }
+
+        if (!oldvalue || strcmp(value, oldvalue)) {
+                if (write(fd, value, strlen(value)) < 0) {
+                        ret = errno;
+                        mpsslog("Failed to write new sysfs entry '%s': %s\n",
+                                filename, strerror(errno));
+                }
+        }
+        close(fd);
+done:
+        if (oldvalue)
+                free(oldvalue);
+        return ret;
+}
diff --git a/Documentation/mtd/nand_ecc.txt b/Documentation/mtd/nand_ecc.txt
index 990efd7a9818..e129b2479ea8 100644
--- a/Documentation/mtd/nand_ecc.txt
+++ b/Documentation/mtd/nand_ecc.txt
@@ -543,7 +543,7 @@ THe code within the for loop was changed to:
     }
 
 As you can see tmppar is used to accumulate the parity within a for
-iteration. In the last 3 statements is is added to par and, if needed,
+iteration. In the last 3 statements is added to par and, if needed,
 to rp12 and rp14.
 
 While making the changes I also found that I could exploit that tmppar
diff --git a/Documentation/networking/00-INDEX b/Documentation/networking/00-INDEX
index 32dfbd924121..f11580f8719a 100644
--- a/Documentation/networking/00-INDEX
+++ b/Documentation/networking/00-INDEX
@@ -86,6 +86,8 @@ generic_netlink.txt
         - info on Generic Netlink
 gianfar.txt
         - Gianfar Ethernet Driver.
+i40e.txt
+        - README for the Intel Ethernet Controller XL710 Driver (i40e).
 ieee802154.txt
         - Linux IEEE 802.15.4 implementation, API and drivers
 igb.txt
@@ -124,6 +126,8 @@ multiqueue.txt
         - HOWTO for multiqueue network device support.
 netconsole.txt
         - The network console module netconsole.ko: configuration and notes.
+netdev-FAQ.txt
+        - FAQ describing how to submit net changes to netdev mailing list.
 netdev-features.txt
         - Network interface features API description.
 netdevices.txt
diff --git a/Documentation/networking/bonding.txt b/Documentation/networking/bonding.txt
index 87bbcfee2e06..9b28e714831a 100644
--- a/Documentation/networking/bonding.txt
+++ b/Documentation/networking/bonding.txt
@@ -1362,6 +1362,12 @@ To add ARP targets:
 To remove an ARP target:
 # echo -192.168.0.100 > /sys/class/net/bond0/bonding/arp_ip_target
 
+To configure the interval between learning packet transmits:
+# echo 12 > /sys/class/net/bond0/bonding/lp_interval
+        NOTE: the lp_inteval is the number of seconds between instances where
+the bonding driver sends learning packets to each slaves peer switch.  The
+default interval is 1 second.
+
 Example Configuration
 ---------------------
         We begin with the same example that is shown in section 3.3,
diff --git a/Documentation/networking/dccp.txt b/Documentation/networking/dccp.txt
index d718bc2ff1cf..bf5dbe3ab8c5 100644
--- a/Documentation/networking/dccp.txt
+++ b/Documentation/networking/dccp.txt
@@ -18,8 +18,8 @@ Introduction
 Datagram Congestion Control Protocol (DCCP) is an unreliable, connection
 oriented protocol designed to solve issues present in UDP and TCP, particularly
 for real-time and multimedia (streaming) traffic.
-It divides into a base protocol (RFC 4340) and plugable congestion control
-modules called CCIDs. Like plugable TCP congestion control, at least one CCID
+It divides into a base protocol (RFC 4340) and pluggable congestion control
+modules called CCIDs. Like pluggable TCP congestion control, at least one CCID
 needs to be enabled in order for the protocol to function properly. In the Linux
 implementation, this is the TCP-like CCID2 (RFC 4341). Additional CCIDs, such as
 the TCP-friendly CCID3 (RFC 4342), are optional.
diff --git a/Documentation/networking/e100.txt b/Documentation/networking/e100.txt
index fcb6c71cdb69..f862cf3aff34 100644
--- a/Documentation/networking/e100.txt
+++ b/Documentation/networking/e100.txt
@@ -1,7 +1,7 @@
 Linux* Base Driver for the Intel(R) PRO/100 Family of Adapters
 ==============================================================
 
-November 15, 2005
+March 15, 2011
 
 Contents
 ========
@@ -103,7 +103,7 @@ Additional Configurations
   PRO/100 Family of Adapters is e100.
 
   As an example, if you install the e100 driver for two PRO/100 adapters
-  (eth0 and eth1), add the following to a configuraton file in /etc/modprobe.d/
+  (eth0 and eth1), add the following to a configuration file in /etc/modprobe.d/
 
        alias eth0 e100
        alias eth1 e100
@@ -122,7 +122,7 @@ Additional Configurations
   NOTE: This setting is not saved across reboots.
 
 
-  Ethtool
+  ethtool
   -------
 
   The driver utilizes the ethtool interface for driver configuration and
diff --git a/Documentation/networking/e1000.txt b/Documentation/networking/e1000.txt
index 71ca95855671..437b2099cced 100644
--- a/Documentation/networking/e1000.txt
+++ b/Documentation/networking/e1000.txt
@@ -1,8 +1,8 @@
-Linux* Base Driver for the Intel(R) PRO/1000 Family of Adapters
-===============================================================
+Linux* Base Driver for Intel(R) Ethernet Network Connection
+===========================================================
 
 Intel Gigabit Linux driver.
-Copyright(c) 1999 - 2010 Intel Corporation.
+Copyright(c) 1999 - 2013 Intel Corporation.
 
 Contents
 ========
@@ -420,15 +420,15 @@ Additional Configurations
   - The maximum MTU setting for Jumbo Frames is 16110.  This value coincides
     with the maximum Jumbo Frames size of 16128.
 
-  - Using Jumbo Frames at 10 or 100 Mbps may result in poor performance or
-    loss of link.
+  - Using Jumbo frames at 10 or 100 Mbps is not supported and may result in
+    poor performance or loss of link.
 
   - Adapters based on the Intel(R) 82542 and 82573V/E controller do not
     support Jumbo Frames. These correspond to the following product names:
      Intel(R) PRO/1000 Gigabit Server Adapter
      Intel(R) PRO/1000 PM Network Connection
 
-  Ethtool
+  ethtool
   -------
   The driver utilizes the ethtool interface for driver configuration and
   diagnostics, as well as displaying statistical information.  The ethtool
diff --git a/Documentation/networking/e1000e.txt b/Documentation/networking/e1000e.txt
index 97b5ba942ebf..ad2d9f38ce14 100644
--- a/Documentation/networking/e1000e.txt
+++ b/Documentation/networking/e1000e.txt
@@ -1,8 +1,8 @@
-Linux* Driver for Intel(R) Network Connection
-=============================================
+Linux* Driver for Intel(R) Ethernet Network Connection
+======================================================
 
 Intel Gigabit Linux driver.
-Copyright(c) 1999 - 2010 Intel Corporation.
+Copyright(c) 1999 - 2013 Intel Corporation.
 
 Contents
 ========
@@ -259,13 +259,16 @@ Additional Configurations
   - The maximum MTU setting for Jumbo Frames is 9216.  This value coincides
     with the maximum Jumbo Frames size of 9234 bytes.
 
-  - Using Jumbo Frames at 10 or 100 Mbps is not supported and may result in
+  - Using Jumbo frames at 10 or 100 Mbps is not supported and may result in
     poor performance or loss of link.
 
   - Some adapters limit Jumbo Frames sized packets to a maximum of
     4096 bytes and some adapters do not support Jumbo Frames.
 
-  Ethtool
+  - Jumbo Frames cannot be configured on an 82579-based Network device, if
+    MACSec is enabled on the system.
+
+  ethtool
   -------
   The driver utilizes the ethtool interface for driver configuration and
   diagnostics, as well as displaying statistical information.  We
@@ -273,6 +276,9 @@ Additional Configurations
 
   http://ftp.kernel.org/pub/software/network/ethtool/
 
+  NOTE: When validating enable/disable tests on some parts (82578, for example)
+  you need to add a few seconds between tests when working with ethtool.
+
   Speed and Duplex
   ----------------
   Speed and Duplex are configured through the ethtool* utility. For
diff --git a/Documentation/networking/i40e.txt b/Documentation/networking/i40e.txt
new file mode 100644
index 000000000000..f737273c6dc1
--- /dev/null
+++ b/Documentation/networking/i40e.txt
@@ -0,0 +1,115 @@
+Linux Base Driver for the Intel(R) Ethernet Controller XL710 Family
+===================================================================
+
+Intel i40e Linux driver.
+Copyright(c) 2013 Intel Corporation.
+
+Contents
+========
+
+- Identifying Your Adapter
+- Additional Configurations
+- Performance Tuning
+- Known Issues
+- Support
+
+
+Identifying Your Adapter
+========================
+
+The driver in this release is compatible with the Intel Ethernet
+Controller XL710 Family.
+
+For more information on how to identify your adapter, go to the Adapter &
+Driver ID Guide at:
+
+    http://support.intel.com/support/network/sb/CS-012904.htm
+
+
+Enabling the driver
+===================
+
+The driver is enabled via the standard kernel configuration system,
+using the make command:
+
+     Make oldconfig/silentoldconfig/menuconfig/etc.
+
+The driver is located in the menu structure at:
+
+        -> Device Drivers
+          -> Network device support (NETDEVICES [=y])
+            -> Ethernet driver support
+              -> Intel devices
+                -> Intel(R) Ethernet Controller XL710 Family
+
+Additional Configurations
+=========================
+
+  Generic Receive Offload (GRO)
+  -----------------------------
+  The driver supports the in-kernel software implementation of GRO.  GRO has
+  shown that by coalescing Rx traffic into larger chunks of data, CPU
+  utilization can be significantly reduced when under large Rx load.  GRO is
+  an evolution of the previously-used LRO interface.  GRO is able to coalesce
+  other protocols besides TCP.  It's also safe to use with configurations that
+  are problematic for LRO, namely bridging and iSCSI.
+
+  Ethtool
+  -------
+  The driver utilizes the ethtool interface for driver configuration and
+  diagnostics, as well as displaying statistical information. The latest
+  ethtool version is required for this functionality.
+
+  The latest release of ethtool can be found from
+  https://www.kernel.org/pub/software/network/ethtool
+
+  Data Center Bridging (DCB)
+  --------------------------
+  DCB configuration is not currently supported.
+
+  FCoE
+  ----
+  Fiber Channel over Ethernet (FCoE) hardware offload is not currently
+  supported.
+
+  MAC and VLAN anti-spoofing feature
+  ----------------------------------
+  When a malicious driver attempts to send a spoofed packet, it is dropped by
+  the hardware and not transmitted.  An interrupt is sent to the PF driver
+  notifying it of the spoof attempt.
+
+  When a spoofed packet is detected the PF driver will send the following
+  message to the system log (displayed by  the "dmesg" command):
+
+  Spoof event(s) detected on VF (n)
+
+  Where n=the VF that attempted to do the spoofing.
+
+
+Performance Tuning
+==================
+
+An excellent article on performance tuning can be found at:
+
+http://www.redhat.com/promo/summit/2008/downloads/pdf/Thursday/Mark_Wagner.pdf
+
+
+Known Issues
+============
+
+
+Support
+=======
+
+For general information, go to the Intel support website at:
+
+    http://support.intel.com
+
+or the Intel Wired Networking project hosted by Sourceforge at:
+
+    http://e1000.sourceforge.net
+
+If an issue is identified with the released source code on the supported
+kernel with a supported adapter, email the specific information related
+to the issue to e1000-devel@lists.sourceforge.net and copy
+netdev@vger.kernel.org.
diff --git a/Documentation/networking/ieee802154.txt b/Documentation/networking/ieee802154.txt
index 09eb57329f11..22bbc7225f8e 100644
--- a/Documentation/networking/ieee802154.txt
+++ b/Documentation/networking/ieee802154.txt
@@ -4,7 +4,7 @@
 
 Introduction
 ============
-The IEEE 802.15.4 working group focuses on standartization of bottom
+The IEEE 802.15.4 working group focuses on standardization of bottom
 two layers: Medium Access Control (MAC) and Physical (PHY). And there
 are mainly two options available for upper layers:
  - ZigBee - proprietary protocol from ZigBee Alliance
@@ -66,7 +66,7 @@ net_device, with .type = ARPHRD_IEEE802154. Data is exchanged with socket family
 code via plain sk_buffs. On skb reception skb->cb must contain additional
 info as described in the struct ieee802154_mac_cb. During packet transmission
 the skb->cb is used to provide additional data to device's header_ops->create
-function. Be aware, that this data can be overriden later (when socket code
+function. Be aware that this data can be overridden later (when socket code
 submits skb to qdisc), so if you need something from that cb later, you should
 store info in the skb->data on your own.
 
diff --git a/Documentation/networking/igb.txt b/Documentation/networking/igb.txt
index 9a2a037194a5..4ebbd659256f 100644
--- a/Documentation/networking/igb.txt
+++ b/Documentation/networking/igb.txt
@@ -1,8 +1,8 @@
-Linux* Base Driver for Intel(R) Network Connection
-==================================================
+Linux* Base Driver for Intel(R) Ethernet Network Connection
+===========================================================
 
 Intel Gigabit Linux driver.
-Copyright(c) 1999 - 2010 Intel Corporation.
+Copyright(c) 1999 - 2013 Intel Corporation.
 
 Contents
 ========
@@ -36,6 +36,53 @@ Default Value: 0
 This parameter adds support for SR-IOV.  It causes the driver to spawn up to
 max_vfs worth of virtual function.
 
+QueuePairs
+----------
+Valid Range:  0-1
+Default Value:  1 (TX and RX will be paired onto one interrupt vector)
+
+If set to 0, when MSI-X is enabled, the TX and RX will attempt to occupy
+separate vectors.
+
+This option can be overridden to 1 if there are not sufficient interrupts
+available.  This can occur if any combination of RSS, VMDQ, and max_vfs
+results in more than 4 queues being used.
+
+Node
+----
+Valid Range:   0-n
+Default Value: -1 (off)
+
+  0 - n: where n is the number of the NUMA node that should be used to
+         allocate memory for this adapter port.
+  -1: uses the driver default of allocating memory on whichever processor is
+      running insmod/modprobe.
+
+  The Node parameter will allow you to pick which NUMA node you want to have
+  the adapter allocate memory from.  All driver structures, in-memory queues,
+  and receive buffers will be allocated on the node specified.  This parameter
+  is only useful when interrupt affinity is specified, otherwise some portion
+  of the time the interrupt could run on a different core than the memory is
+  allocated on, causing slower memory access and impacting throughput, CPU, or
+  both.
+
+EEE
+---
+Valid Range:  0-1
+Default Value: 1 (enabled)
+
+  A link between two EEE-compliant devices will result in periodic bursts of
+  data followed by long periods where in the link is in an idle state. This Low
+  Power Idle (LPI) state is supported in both 1Gbps and 100Mbps link speeds.
+  NOTE: EEE support requires autonegotiation.
+
+DMAC
+----
+Valid Range: 0-1
+Default Value: 1 (enabled)
+  Enables or disables DMA Coalescing feature.
+
+
 
 Additional Configurations
 =========================
@@ -55,10 +102,10 @@ Additional Configurations
   - The maximum MTU setting for Jumbo Frames is 9216.  This value coincides
     with the maximum Jumbo Frames size of 9234 bytes.
 
-  - Using Jumbo Frames at 10 or 100 Mbps may result in poor performance or
-    loss of link.
+  - Using Jumbo frames at 10 or 100 Mbps is not supported and may result in
+    poor performance or loss of link.
 
-  Ethtool
+  ethtool
   -------
   The driver utilizes the ethtool interface for driver configuration and
   diagnostics, as well as displaying statistical information. The latest
@@ -106,6 +153,14 @@ Additional Configurations
 
   Where n=the VF that attempted to do the spoofing.
 
+  Setting MAC Address, VLAN and Rate Limit Using IProute2 Tool
+  ------------------------------------------------------------
+  You can set a MAC address of a Virtual Function (VF), a default VLAN and the
+  rate limit using the IProute2 tool. Download the latest version of the
+  iproute2 tool from Sourceforge if your version does not have all the
+  features you require.
+
+
 Support
 =======
 
diff --git a/Documentation/networking/igbvf.txt b/Documentation/networking/igbvf.txt
index cbfe4ee65533..40db17a6665b 100644
--- a/Documentation/networking/igbvf.txt
+++ b/Documentation/networking/igbvf.txt
@@ -1,8 +1,8 @@
-Linux* Base Driver for Intel(R) Network Connection
-==================================================
+Linux* Base Driver for Intel(R) Ethernet Network Connection
+===========================================================
 
 Intel Gigabit Linux driver.
-Copyright(c) 1999 - 2010 Intel Corporation.
+Copyright(c) 1999 - 2013 Intel Corporation.
 
 Contents
 ========
@@ -55,7 +55,7 @@ networking link on the left to search for your adapter:
 Additional Configurations
 =========================
 
-  Ethtool
+  ethtool
   -------
   The driver utilizes the ethtool interface for driver configuration and
   diagnostics, as well as displaying statistical information.  The ethtool
diff --git a/Documentation/networking/ip-sysctl.txt b/Documentation/networking/ip-sysctl.txt
index 10742902146f..a46d78583ae1 100644
--- a/Documentation/networking/ip-sysctl.txt
+++ b/Documentation/networking/ip-sysctl.txt
@@ -440,6 +440,10 @@ tcp_syncookies - BOOLEAN
         SYN flood warnings in logs not being really flooded, your server
         is seriously misconfigured.
 
+        If you want to test which effects syncookies have to your
+        network connections you can set this knob to 2 to enable
+        unconditionally generation of syncookies.
+
 tcp_fastopen - INTEGER
         Enable TCP Fast Open feature (draft-ietf-tcpm-fastopen) to send data
         in the opening SYN packet. To use this feature, the client application
@@ -478,6 +482,15 @@ tcp_syn_retries - INTEGER
 tcp_timestamps - BOOLEAN
         Enable timestamps as defined in RFC1323.
 
+tcp_min_tso_segs - INTEGER
+        Minimal number of segments per TSO frame.
+        Since linux-3.12, TCP does an automatic sizing of TSO frames,
+        depending on flow rate, instead of filling 64Kbytes packets.
+        For specific usages, it's possible to force TCP to build big
+        TSO frames. Note that TCP stack might split too big TSO packets
+        if available window is too small.
+        Default: 2
+
 tcp_tso_win_divisor - INTEGER
         This allows control over what percentage of the congestion window
         can be consumed by a single TSO frame.
@@ -516,6 +529,19 @@ tcp_wmem - vector of 3 INTEGERs: min, default, max
         this value is ignored.
         Default: between 64K and 4MB, depending on RAM size.
 
+tcp_notsent_lowat - UNSIGNED INTEGER
+        A TCP socket can control the amount of unsent bytes in its write queue,
+        thanks to TCP_NOTSENT_LOWAT socket option. poll()/select()/epoll()
+        reports POLLOUT events if the amount of unsent bytes is below a per
+        socket value, and if the write queue is not full. sendmsg() will
+        also not add new buffers if the limit is hit.
+
+        This global variable controls the amount of unsent data for
+        sockets not using TCP_NOTSENT_LOWAT. For these sockets, a change
+        to the global variable has immediate effect.
+
+        Default: UINT_MAX (0xFFFFFFFF)
+
 tcp_workaround_signed_windows - BOOLEAN
         If set, assume no receipt of a window scaling option means the
         remote TCP is broken and treats the window as a signed quantity.
@@ -1022,7 +1048,15 @@ disable_policy - BOOLEAN
 disable_xfrm - BOOLEAN
         Disable IPSEC encryption on this interface, whatever the policy
 
+igmpv2_unsolicited_report_interval - INTEGER
+        The interval in milliseconds in which the next unsolicited
+        IGMPv1 or IGMPv2 report retransmit will take place.
+        Default: 10000 (10 seconds)
 
+igmpv3_unsolicited_report_interval - INTEGER
+        The interval in milliseconds in which the next unsolicited
+        IGMPv3 report retransmit will take place.
+        Default: 1000 (1 seconds)
 
 tag - INTEGER
         Allows you to write a number, which can be used as required.
@@ -1314,6 +1348,27 @@ ndisc_notify - BOOLEAN
         1 - Generate unsolicited neighbour advertisements when device is brought
             up or hardware address changes.
 
+mldv1_unsolicited_report_interval - INTEGER
+        The interval in milliseconds in which the next unsolicited
+        MLDv1 report retransmit will take place.
+        Default: 10000 (10 seconds)
+
+mldv2_unsolicited_report_interval - INTEGER
+        The interval in milliseconds in which the next unsolicited
+        MLDv2 report retransmit will take place.
+        Default: 1000 (1 second)
+
+force_mld_version - INTEGER
+        0 - (default) No enforcement of a MLD version, MLDv1 fallback allowed
+        1 - Enforce to use MLD version 1
+        2 - Enforce to use MLD version 2
+
+suppress_frag_ndisc - INTEGER
+        Control RFC 6980 (Security Implications of IPv6 Fragmentation
+        with IPv6 Neighbor Discovery) behavior:
+        1 - (default) discard fragmented neighbor discovery packets
+        0 - allow fragmented neighbor discovery packets
+
 icmp/*:
 ratelimit - INTEGER
         Limit the maximal rates for sending ICMPv6 packets.
diff --git a/Documentation/networking/ixgb.txt b/Documentation/networking/ixgb.txt
index d75a1f9565bb..1e0c045e89f7 100644
--- a/Documentation/networking/ixgb.txt
+++ b/Documentation/networking/ixgb.txt
@@ -1,7 +1,7 @@
-Linux Base Driver for 10 Gigabit Intel(R) Network Connection
-=============================================================
+Linux Base Driver for 10 Gigabit Intel(R) Ethernet Network Connection
+=====================================================================
 
-October 9, 2007
+March 14, 2011
 
 
 Contents
@@ -274,9 +274,9 @@ Additional Configurations
   -------------------------------------------------
   Configuring a network driver to load properly when the system is started is
   distribution dependent. Typically, the configuration process involves adding
-  an alias line to files in /etc/modprobe.d/ as well as editing other system
-  startup scripts and/or configuration files.  Many popular Linux distributions
-  ship with tools to make these changes for you.  To learn the proper way to
+  an alias line to /etc/modprobe.conf as well as editing other system startup
+  scripts and/or configuration files.  Many popular Linux distributions ship
+  with tools to make these changes for you.  To learn the proper way to
   configure a network device for your system, refer to your distribution
   documentation.  If during this process you are asked for the driver or module
   name, the name for the Linux Base Driver for the Intel 10GbE Family of
@@ -306,7 +306,7 @@ Additional Configurations
   with the maximum Jumbo Frames size of 16128.
 
 
-  Ethtool
+  ethtool
   -------
   The driver utilizes the ethtool interface for driver configuration and
   diagnostics, as well as displaying statistical information.  The ethtool
diff --git a/Documentation/networking/ixgbe.txt b/Documentation/networking/ixgbe.txt
index af77ed3c4172..96cccebb839b 100644
--- a/Documentation/networking/ixgbe.txt
+++ b/Documentation/networking/ixgbe.txt
@@ -1,8 +1,9 @@
-Linux Base Driver for 10 Gigabit PCI Express Intel(R) Network Connection
-========================================================================
+Linux* Base Driver for the Intel(R) Ethernet 10 Gigabit PCI Express Family of
+Adapters
+=============================================================================
 
-Intel Gigabit Linux driver.
-Copyright(c) 1999 - 2010 Intel Corporation.
+Intel 10 Gigabit Linux driver.
+Copyright(c) 1999 - 2013 Intel Corporation.
 
 Contents
 ========
@@ -16,8 +17,8 @@ Contents
 Identifying Your Adapter
 ========================
 
-The driver in this release is compatible with 82598 and 82599-based Intel
-Network Connections.
+The driver in this release is compatible with 82598, 82599 and X540-based
+Intel Network Connections.
 
 For more information on how to identify your adapter, go to the Adapter &
 Driver ID Guide at:
@@ -72,7 +73,7 @@ cables that comply with SFF-8431 v4.1 and SFF-8472 v10.4 specifications.
 Laser turns off for SFP+ when ifconfig down
 -------------------------------------------
 "ifconfig down" turns off the laser for 82599-based SFP+ fiber adapters.
-"ifconfig up" turns on the later.
+"ifconfig up" turns on the laser.
 
 
 82598-BASED ADAPTERS
@@ -118,6 +119,93 @@ NOTE: For 82598 backplane cards entering 1 gig mode, flow control default
 behavior is changed to off.  Flow control in 1 gig mode on these devices can
 lead to Tx hangs.
 
+Intel(R) Ethernet Flow Director
+-------------------------------
+Supports advanced filters that direct receive packets by their flows to
+different queues. Enables tight control on routing a flow in the platform.
+Matches flows and CPU cores for flow affinity. Supports multiple parameters
+for flexible flow classification and load balancing.
+
+Flow director is enabled only if the kernel is multiple TX queue capable.
+
+An included script (set_irq_affinity.sh) automates setting the IRQ to CPU
+affinity.
+
+You can verify that the driver is using Flow Director by looking at the counter
+in ethtool: fdir_miss and fdir_match.
+
+Other ethtool Commands:
+To enable Flow Director
+        ethtool -K ethX ntuple on
+To add a filter
+        Use -U switch. e.g., ethtool -U ethX flow-type tcp4 src-ip 0x178000a
+        action 1
+To see the list of filters currently present:
+        ethtool -u ethX
+
+Perfect Filter: Perfect filter is an interface to load the filter table that
+funnels all flow into queue_0 unless an alternative queue is specified using
+"action". In that case, any flow that matches the filter criteria will be
+directed to the appropriate queue.
+
+If the queue is defined as -1, filter will drop matching packets.
+
+To account for filter matches and misses, there are two stats in ethtool:
+fdir_match and fdir_miss. In addition, rx_queue_N_packets shows the number of
+packets processed by the Nth queue.
+
+NOTE: Receive Packet Steering (RPS) and Receive Flow Steering (RFS) are not
+compatible with Flow Director. IF Flow Director is enabled, these will be
+disabled.
+
+The following three parameters impact Flow Director.
+
+FdirMode
+--------
+Valid Range: 0-2 (0=off, 1=ATR, 2=Perfect filter mode)
+Default Value: 1
+
+  Flow Director filtering modes.
+
+FdirPballoc
+-----------
+Valid Range: 0-2 (0=64k, 1=128k, 2=256k)
+Default Value: 0
+
+  Flow Director allocated packet buffer size.
+
+AtrSampleRate
+--------------
+Valid Range: 1-100
+Default Value: 20
+
+  Software ATR Tx packet sample rate. For example, when set to 20, every 20th
+  packet, looks to see if the packet will create a new flow.
+
+Node
+----
+Valid Range:   0-n
+Default Value: 1 (off)
+
+  0 - n: where n is the number of NUMA nodes (i.e. 0 - 3) currently online in
+  your system
+  1: turns this option off
+
+  The Node parameter will allow you to pick which NUMA node you want to have
+  the adapter allocate memory on.
+
+max_vfs
+-------
+Valid Range:   1-63
+Default Value: 0
+
+  If the value is greater than 0 it will also force the VMDq parameter to be 1
+  or more.
+
+  This parameter adds support for SR-IOV.  It causes the driver to spawn up to
+  max_vfs worth of virtual function.
+
+
 Additional Configurations
 =========================
 
@@ -221,9 +309,10 @@ http://www.redhat.com/promo/summit/2008/downloads/pdf/Thursday/Mark_Wagner.pdf
 Known Issues
 ============
 
-  Enabling SR-IOV in a 32-bit Microsoft* Windows* Server 2008 Guest OS using
-  Intel (R) 82576-based GbE or Intel (R) 82599-based 10GbE controller under KVM
-  -----------------------------------------------------------------------------
+  Enabling SR-IOV in a 32-bit or 64-bit Microsoft* Windows* Server 2008/R2
+  Guest OS using Intel (R) 82576-based GbE or Intel (R) 82599-based 10GbE
+  controller under KVM
+  ------------------------------------------------------------------------
   KVM Hypervisor/VMM supports direct assignment of a PCIe device to a VM.  This
   includes traditional PCIe devices, as well as SR-IOV-capable devices using
   Intel 82576-based and 82599-based controllers.
diff --git a/Documentation/networking/ixgbevf.txt b/Documentation/networking/ixgbevf.txt
index 5a91a41fa946..53d8d2a5a6a3 100644
--- a/Documentation/networking/ixgbevf.txt
+++ b/Documentation/networking/ixgbevf.txt
@@ -1,8 +1,8 @@
-Linux* Base Driver for Intel(R) Network Connection
-==================================================
+Linux* Base Driver for Intel(R) Ethernet Network Connection
+===========================================================
 
 Intel Gigabit Linux driver.
-Copyright(c) 1999 - 2010 Intel Corporation.
+Copyright(c) 1999 - 2013 Intel Corporation.
 
 Contents
 ========
diff --git a/Documentation/networking/l2tp.txt b/Documentation/networking/l2tp.txt
index e63fc1f7bf87..c74434de2fa5 100644
--- a/Documentation/networking/l2tp.txt
+++ b/Documentation/networking/l2tp.txt
@@ -197,7 +197,7 @@ state information because the file format is subject to change. It is
 implemented to provide extra debug information to help diagnose
 problems.) Users should use the netlink API.
 
-/proc/net/pppol2tp is also provided for backwards compaibility with
+/proc/net/pppol2tp is also provided for backwards compatibility with
 the original pppol2tp driver. It lists information about L2TPv2
 tunnels and sessions only. Its use is discouraged.
 
diff --git a/Documentation/networking/netdev-FAQ.txt b/Documentation/networking/netdev-FAQ.txt
new file mode 100644
index 000000000000..0fe1c6e0dbcd
--- /dev/null
+++ b/Documentation/networking/netdev-FAQ.txt
@@ -0,0 +1,224 @@
+
+Information you need to know about netdev
+-----------------------------------------
+
+Q: What is netdev?
+
+A: It is a mailing list for all network-related Linux stuff.  This includes
+   anything found under net/  (i.e. core code like IPv6) and drivers/net
+   (i.e. hardware specific drivers) in the Linux source tree.
+
+   Note that some subsystems (e.g. wireless drivers) which have a high volume
+   of traffic have their own specific mailing lists.
+
+   The netdev list is managed (like many other Linux mailing lists) through
+   VGER ( http://vger.kernel.org/ ) and archives can be found below:
+
+        http://marc.info/?l=linux-netdev
+        http://www.spinics.net/lists/netdev/
+
+   Aside from subsystems like that mentioned above, all network-related Linux
+   development (i.e. RFC, review, comments, etc.) takes place on netdev.
+
+Q: How do the changes posted to netdev make their way into Linux?
+
+A: There are always two trees (git repositories) in play.  Both are driven
+   by David Miller, the main network maintainer.  There is the "net" tree,
+   and the "net-next" tree.  As you can probably guess from the names, the
+   net tree is for fixes to existing code already in the mainline tree from
+   Linus, and net-next is where the new code goes for the future release.
+   You can find the trees here:
+
+        http://git.kernel.org/?p=linux/kernel/git/davem/net.git
+        http://git.kernel.org/?p=linux/kernel/git/davem/net-next.git
+
+Q: How often do changes from these trees make it to the mainline Linus tree?
+
+A: To understand this, you need to know a bit of background information
+   on the cadence of Linux development.  Each new release starts off with
+   a two week "merge window" where the main maintainers feed their new
+   stuff to Linus for merging into the mainline tree.  After the two weeks,
+   the merge window is closed, and it is called/tagged "-rc1".  No new
+   features get mainlined after this -- only fixes to the rc1 content
+   are expected.  After roughly a week of collecting fixes to the rc1
+   content, rc2 is released.  This repeats on a roughly weekly basis
+   until rc7 (typically; sometimes rc6 if things are quiet, or rc8 if
+   things are in a state of churn), and a week after the last vX.Y-rcN
+   was done, the official "vX.Y" is released.
+
+   Relating that to netdev:  At the beginning of the 2-week merge window,
+   the net-next tree will be closed - no new changes/features.  The
+   accumulated new content of the past ~10 weeks will be passed onto
+   mainline/Linus via a pull request for vX.Y -- at the same time,
+   the "net" tree will start accumulating fixes for this pulled content
+   relating to vX.Y
+
+   An announcement indicating when net-next has been closed is usually
+   sent to netdev, but knowing the above, you can predict that in advance.
+
+   IMPORTANT:  Do not send new net-next content to netdev during the
+   period during which net-next tree is closed.
+
+   Shortly after the two weeks have passed (and vX.Y-rc1 is released), the
+   tree for net-next reopens to collect content for the next (vX.Y+1) release.
+
+   If you aren't subscribed to netdev and/or are simply unsure if net-next
+   has re-opened yet, simply check the net-next git repository link above for
+   any new networking-related commits.
+
+   The "net" tree continues to collect fixes for the vX.Y content, and
+   is fed back to Linus at regular (~weekly) intervals.  Meaning that the
+   focus for "net" is on stabilization and bugfixes.
+
+   Finally, the vX.Y gets released, and the whole cycle starts over.
+
+Q: So where are we now in this cycle?
+
+A: Load the mainline (Linus) page here:
+
+        http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git
+
+   and note the top of the "tags" section.  If it is rc1, it is early
+   in the dev cycle.  If it was tagged rc7 a week ago, then a release
+   is probably imminent.
+
+Q: How do I indicate which tree (net vs. net-next) my patch should be in?
+
+A: Firstly, think whether you have a bug fix or new "next-like" content.
+   Then once decided, assuming that you use git, use the prefix flag, i.e.
+
+        git format-patch --subject-prefix='PATCH net-next' start..finish
+
+   Use "net" instead of "net-next" (always lower case) in the above for
+   bug-fix net content.  If you don't use git, then note the only magic in
+   the above is just the subject text of the outgoing e-mail, and you can
+   manually change it yourself with whatever MUA you are comfortable with.
+
+Q: I sent a patch and I'm wondering what happened to it.  How can I tell
+   whether it got merged?
+
+A: Start by looking at the main patchworks queue for netdev:
+
+        http://patchwork.ozlabs.org/project/netdev/list/
+
+   The "State" field will tell you exactly where things are at with
+   your patch.
+
+Q: The above only says "Under Review".  How can I find out more?
+
+A: Generally speaking, the patches get triaged quickly (in less than 48h).
+   So be patient.  Asking the maintainer for status updates on your
+   patch is a good way to ensure your patch is ignored or pushed to
+   the bottom of the priority list.
+
+Q: How can I tell what patches are queued up for backporting to the
+   various stable releases?
+
+A: Normally Greg Kroah-Hartman collects stable commits himself, but
+   for networking, Dave collects up patches he deems critical for the
+   networking subsystem, and then hands them off to Greg.
+
+   There is a patchworks queue that you can see here:
+        http://patchwork.ozlabs.org/bundle/davem/stable/?state=*
+
+   It contains the patches which Dave has selected, but not yet handed
+   off to Greg.  If Greg already has the patch, then it will be here:
+        http://git.kernel.org/cgit/linux/kernel/git/stable/stable-queue.git
+
+   A quick way to find whether the patch is in this stable-queue is
+   to simply clone the repo, and then git grep the mainline commit ID, e.g.
+
+        stable-queue$ git grep -l 284041ef21fdf2e
+        releases/3.0.84/ipv6-fix-possible-crashes-in-ip6_cork_release.patch
+        releases/3.4.51/ipv6-fix-possible-crashes-in-ip6_cork_release.patch
+        releases/3.9.8/ipv6-fix-possible-crashes-in-ip6_cork_release.patch
+        stable/stable-queue$
+
+Q: I see a network patch and I think it should be backported to stable.
+   Should I request it via "stable@vger.kernel.org" like the references in
+   the kernel's Documentation/stable_kernel_rules.txt file say?
+
+A: No, not for networking.  Check the stable queues as per above 1st to see
+   if it is already queued.  If not, then send a mail to netdev, listing
+   the upstream commit ID and why you think it should be a stable candidate.
+
+   Before you jump to go do the above, do note that the normal stable rules
+   in Documentation/stable_kernel_rules.txt still apply.  So you need to
+   explicitly indicate why it is a critical fix and exactly what users are
+   impacted.  In addition, you need to convince yourself that you _really_
+   think it has been overlooked, vs. having been considered and rejected.
+
+   Generally speaking, the longer it has had a chance to "soak" in mainline,
+   the better the odds that it is an OK candidate for stable.  So scrambling
+   to request a commit be added the day after it appears should be avoided.
+
+Q: I have created a network patch and I think it should be backported to
+   stable.  Should I add a "Cc: stable@vger.kernel.org" like the references
+   in the kernel's Documentation/ directory say?
+
+A: No.  See above answer.  In short, if you think it really belongs in
+   stable, then ensure you write a decent commit log that describes who
+   gets impacted by the bugfix and how it manifests itself, and when the
+   bug was introduced.  If you do that properly, then the commit will
+   get handled appropriately and most likely get put in the patchworks
+   stable queue if it really warrants it.
+
+   If you think there is some valid information relating to it being in
+   stable that does _not_ belong in the commit log, then use the three
+   dash marker line as described in Documentation/SubmittingPatches to
+   temporarily embed that information into the patch that you send.
+
+Q: Someone said that the comment style and coding convention is different
+   for the networking content.  Is this true?
+
+A: Yes, in a largely trivial way.  Instead of this:
+
+        /*
+         * foobar blah blah blah
+         * another line of text
+         */
+
+   it is requested that you make it look like this:
+
+        /* foobar blah blah blah
+         * another line of text
+         */
+
+Q: I am working in existing code that has the former comment style and not the
+   latter.  Should I submit new code in the former style or the latter?
+
+A: Make it the latter style, so that eventually all code in the domain of
+   netdev is of this format.
+
+Q: I found a bug that might have possible security implications or similar.
+   Should I mail the main netdev maintainer off-list?
+
+A: No. The current netdev maintainer has consistently requested that people
+   use the mailing lists and not reach out directly.  If you aren't OK with
+   that, then perhaps consider mailing "security@kernel.org" or reading about
+   http://oss-security.openwall.org/wiki/mailing-lists/distros
+   as possible alternative mechanisms.
+
+Q: What level of testing is expected before I submit my change?
+
+A: If your changes are against net-next, the expectation is that you
+   have tested by layering your changes on top of net-next.  Ideally you
+   will have done run-time testing specific to your change, but at a
+   minimum, your changes should survive an "allyesconfig" and an
+   "allmodconfig" build without new warnings or failures.
+
+Q: Any other tips to help ensure my net/net-next patch gets OK'd?
+
+A: Attention to detail.  Re-read your own work as if you were the
+   reviewer.  You can start with using checkpatch.pl, perhaps even
+   with the "--strict" flag.  But do not be mindlessly robotic in
+   doing so.  If your change is a bug-fix, make sure your commit log
+   indicates the end-user visible symptom, the underlying reason as
+   to why it happens, and then if necessary, explain why the fix proposed
+   is the best way to get things done.   Don't mangle whitespace, and as
+   is common, don't mis-indent function arguments that span multiple lines.
+   If it is your first patch, mail it to yourself so you can test apply
+   it to an unpatched tree to confirm infrastructure didn't mangle it.
+
+   Finally, go back and read Documentation/SubmittingPatches to be
+   sure you are not repeating some common mistake documented there.
diff --git a/Documentation/networking/netlink_mmap.txt b/Documentation/networking/netlink_mmap.txt
index 533378839546..b26122973525 100644
--- a/Documentation/networking/netlink_mmap.txt
+++ b/Documentation/networking/netlink_mmap.txt
@@ -45,7 +45,7 @@ processing.
 
 Conversion of the reception path involves calling poll() on the file
 descriptor, once the socket is readable the frames from the ring are
-processsed in order until no more messages are available, as indicated by
+processed in order until no more messages are available, as indicated by
 a status word in the frame header.
 
 On kernel side, in order to make use of memory mapped I/O on receive, the
@@ -56,7 +56,7 @@ Dumps of kernel databases automatically support memory mapped I/O.
 
 Conversion of the transmit path involves changing message construction to
 use memory from the TX ring instead of (usually) a buffer declared on the
-stack and setting up the frame header approriately. Optionally poll() can
+stack and setting up the frame header appropriately. Optionally poll() can
 be used to wait for free frames in the TX ring.
 
 Structured and definitions for using memory mapped I/O are contained in
@@ -231,7 +231,7 @@ Ring setup:
         if (setsockopt(fd, NETLINK_TX_RING, &req, sizeof(req)) < 0)
                 exit(1)
 
-        /* Calculate size of each invididual ring */
+        /* Calculate size of each individual ring */
         ring_size = req.nm_block_nr * req.nm_block_size;
 
         /* Map RX/TX rings. The TX ring is located after the RX ring */
diff --git a/Documentation/networking/openvswitch.txt b/Documentation/networking/openvswitch.txt
index 8fa2dd1e792e..37c20ee2455e 100644
--- a/Documentation/networking/openvswitch.txt
+++ b/Documentation/networking/openvswitch.txt
@@ -91,6 +91,46 @@ Often we ellipsize arguments not important to the discussion, e.g.:
     in_port(1), eth(...), eth_type(0x0800), ipv4(...), tcp(...)
 
 
+Wildcarded flow key format
+--------------------------
+
+A wildcarded flow is described with two sequences of Netlink attributes
+passed over the Netlink socket. A flow key, exactly as described above, and an
+optional corresponding flow mask.
+
+A wildcarded flow can represent a group of exact match flows. Each '1' bit
+in the mask specifies a exact match with the corresponding bit in the flow key.
+A '0' bit specifies a don't care bit, which will match either a '1' or '0' bit
+of a incoming packet. Using wildcarded flow can improve the flow set up rate
+by reduce the number of new flows need to be processed by the user space program.
+
+Support for the mask Netlink attribute is optional for both the kernel and user
+space program. The kernel can ignore the mask attribute, installing an exact
+match flow, or reduce the number of don't care bits in the kernel to less than
+what was specified by the user space program. In this case, variations in bits
+that the kernel does not implement will simply result in additional flow setups.
+The kernel module will also work with user space programs that neither support
+nor supply flow mask attributes.
+
+Since the kernel may ignore or modify wildcard bits, it can be difficult for
+the userspace program to know exactly what matches are installed. There are
+two possible approaches: reactively install flows as they miss the kernel
+flow table (and therefore not attempt to determine wildcard changes at all)
+or use the kernel's response messages to determine the installed wildcards.
+
+When interacting with userspace, the kernel should maintain the match portion
+of the key exactly as originally installed. This will provides a handle to
+identify the flow for all future operations. However, when reporting the
+mask of an installed flow, the mask should include any restrictions imposed
+by the kernel.
+
+The behavior when using overlapping wildcarded flows is undefined. It is the
+responsibility of the user space program to ensure that any incoming packet
+can match at most one flow, wildcarded or not. The current implementation
+performs best-effort detection of overlapping wildcarded flows and may reject
+some but not all of them. However, this behavior may change in future versions.
+
+
 Basic rule for evolving flow keys
 ---------------------------------
 
diff --git a/Documentation/networking/operstates.txt b/Documentation/networking/operstates.txt
index 97694572338b..355c6d8ef8ad 100644
--- a/Documentation/networking/operstates.txt
+++ b/Documentation/networking/operstates.txt
@@ -89,8 +89,8 @@ packets. The name 'carrier' and the inversion are historical, think of
 it as lower layer.
 
 Note that for certain kind of soft-devices, which are not managing any
-real hardware, there is possible to set this bit from userpsace.
-One should use TVL IFLA_CARRIER to do so.
+real hardware, it is possible to set this bit from userspace.  One
+should use TVL IFLA_CARRIER to do so.
 
 netif_carrier_ok() can be used to query that bit.
 
diff --git a/Documentation/networking/packet_mmap.txt b/Documentation/networking/packet_mmap.txt
index 8572796b1eb6..c01223628a87 100644
--- a/Documentation/networking/packet_mmap.txt
+++ b/Documentation/networking/packet_mmap.txt
@@ -543,6 +543,14 @@ TPACKET_V2 --> TPACKET_V3:
 In the AF_PACKET fanout mode, packet reception can be load balanced among
 processes. This also works in combination with mmap(2) on packet sockets.
 
+Currently implemented fanout policies are:
+
+  - PACKET_FANOUT_HASH: schedule to socket by skb's rxhash
+  - PACKET_FANOUT_LB: schedule to socket by round-robin
+  - PACKET_FANOUT_CPU: schedule to socket by CPU packet arrives on
+  - PACKET_FANOUT_RND: schedule to socket by random selection
+  - PACKET_FANOUT_ROLLOVER: if one socket is full, rollover to another
+
 Minimal example code by David S. Miller (try things like "./test eth0 hash",
 "./test eth0 lb", etc.):
 
diff --git a/Documentation/networking/rxrpc.txt b/Documentation/networking/rxrpc.txt
index 60d05eb77c64..b89bc82eed46 100644
--- a/Documentation/networking/rxrpc.txt
+++ b/Documentation/networking/rxrpc.txt
@@ -144,7 +144,7 @@ An overview of the RxRPC protocol:
  (*) Calls use ACK packets to handle reliability.  Data packets are also
      explicitly sequenced per call.
 
- (*) There are two types of positive acknowledgement: hard-ACKs and soft-ACKs.
+ (*) There are two types of positive acknowledgment: hard-ACKs and soft-ACKs.
      A hard-ACK indicates to the far side that all the data received to a point
      has been received and processed; a soft-ACK indicates that the data has
      been received but may yet be discarded and re-requested.  The sender may
diff --git a/Documentation/networking/sctp.txt b/Documentation/networking/sctp.txt
index 0c790a76910e..97b810ca9082 100644
--- a/Documentation/networking/sctp.txt
+++ b/Documentation/networking/sctp.txt
@@ -19,7 +19,6 @@ of SCTP that is RFC 2960 compliant and provides an programming interface
 referred to as the  UDP-style API of the Sockets Extensions for SCTP, as 
 proposed in IETF Internet-Drafts.    
 
-
 Caveats:  
 
 -lksctp can be built as statically or as a module.  However, be aware that 
@@ -33,6 +32,4 @@ For more information, please visit the lksctp project website:
    http://www.sf.net/projects/lksctp
 
 Or contact the lksctp developers through the mailing list:
-   <lksctp-developers@lists.sourceforge.net> 
-
-
+   <linux-sctp@vger.kernel.org>
diff --git a/Documentation/networking/stmmac.txt b/Documentation/networking/stmmac.txt
index 654d2e55c8cb..cdd916da838d 100644
--- a/Documentation/networking/stmmac.txt
+++ b/Documentation/networking/stmmac.txt
@@ -123,6 +123,7 @@ struct plat_stmmacenet_data {
         int bugged_jumbo;
         int pmt;
         int force_sf_dma_mode;
+        int force_thresh_dma_mode;
         int riwt_off;
         void (*fix_mac_speed)(void *priv, unsigned int speed);
         void (*bus_setup)(void __iomem *ioaddr);
@@ -159,6 +160,8 @@ Where:
  o pmt: core has the embedded power module (optional).
  o force_sf_dma_mode: force DMA to use the Store and Forward mode
                      instead of the Threshold.
+ o force_thresh_dma_mode: force DMA to use the Threshold mode other than
+                     the Store and Forward mode.
  o riwt_off: force to disable the RX watchdog feature and switch to NAPI mode.
  o fix_mac_speed: this callback is used for modifying some syscfg registers
                  (on ST SoCs) according to the link speed negotiated by the
@@ -172,7 +175,7 @@ Where:
              registers.
  o custom_cfg/custom_data: this is a custom configuration that can be passed
                            while initializing the resources.
- o bsp_priv: another private poiter.
+ o bsp_priv: another private pointer.
 
 For MDIO bus The we have:
 
@@ -268,7 +271,7 @@ reset procedure etc).
  o dwmac1000_dma.c:  dma functions for the GMAC chip;
  o dwmac1000.h: specific header file for the GMAC;
  o dwmac100_core: MAC 100 core and dma code;
- o dwmac100_dma.c: dma funtions for the MAC chip;
+ o dwmac100_dma.c: dma functions for the MAC chip;
  o dwmac1000.h: specific header file for the MAC;
  o dwmac_lib.c: generic DMA functions shared among chips;
  o enh_desc.c: functions for handling enhanced descriptors;
@@ -361,4 +364,4 @@ Auto-negotiated Link Parter Ability.
 10) TODO:
  o XGMAC is not supported.
  o Complete the TBI & RTBI support.
- o extened VLAN support for 3.70a SYNP GMAC.
+ o extend VLAN support for 3.70a SYNP GMAC.
diff --git a/Documentation/networking/tproxy.txt b/Documentation/networking/tproxy.txt
index 7b5996d9357e..ec11429e1d42 100644
--- a/Documentation/networking/tproxy.txt
+++ b/Documentation/networking/tproxy.txt
@@ -2,9 +2,8 @@ Transparent proxy support
 =========================
 
 This feature adds Linux 2.2-like transparent proxy support to current kernels.
-To use it, enable NETFILTER_TPROXY, the socket match and the TPROXY target in
-your kernel config. You will need policy routing too, so be sure to enable that
-as well.
+To use it, enable the socket match and the TPROXY target in your kernel config.
+You will need policy routing too, so be sure to enable that as well.
 
 
 1. Making non-local sockets work
diff --git a/Documentation/networking/vortex.txt b/Documentation/networking/vortex.txt
index 9a8041dcbb53..97282da82b75 100644
--- a/Documentation/networking/vortex.txt
+++ b/Documentation/networking/vortex.txt
@@ -68,7 +68,7 @@ Module parameters
 
 There are several parameters which may be provided to the driver when
 its module is loaded.  These are usually placed in /etc/modprobe.d/*.conf
-configuretion files.  Example:
+configuration files.  Example:
 
 options 3c59x debug=3 rx_copybreak=300
 
@@ -178,7 +178,7 @@ max_interrupt_work=N
 
   The driver's interrupt service routine can handle many receive and
   transmit packets in a single invocation.  It does this in a loop. 
-  The value of max_interrupt_work governs how mnay times the interrupt
+  The value of max_interrupt_work governs how many times the interrupt
   service routine will loop.  The default value is 32 loops.  If this
   is exceeded the interrupt service routine gives up and generates a
   warning message "eth0: Too much work in interrupt".
diff --git a/Documentation/networking/x25-iface.txt b/Documentation/networking/x25-iface.txt
index 78f662ee0622..7f213b556e85 100644
--- a/Documentation/networking/x25-iface.txt
+++ b/Documentation/networking/x25-iface.txt
@@ -105,7 +105,7 @@ reduced by the following measures or a combination thereof:
     later.
     The lapb module interface was modified to support this. Its
     data_indication() method should now transparently pass the
-    netif_rx() return value to the (lapb mopdule) caller.
+    netif_rx() return value to the (lapb module) caller.
 (2) Drivers for kernel versions 2.2.x should always check the global
     variable netdev_dropping when a new frame is received. The driver
     should only call netif_rx() if netdev_dropping is zero. Otherwise
diff --git a/Documentation/phy.txt b/Documentation/phy.txt
new file mode 100644
index 000000000000..0103e4b15b0e
--- /dev/null
+++ b/Documentation/phy.txt
@@ -0,0 +1,166 @@
+                            PHY SUBSYSTEM
+                  Kishon Vijay Abraham I <kishon@ti.com>
+
+This document explains the Generic PHY Framework along with the APIs provided,
+and how-to-use.
+
+1. Introduction
+
+*PHY* is the abbreviation for physical layer. It is used to connect a device
+to the physical medium e.g., the USB controller has a PHY to provide functions
+such as serialization, de-serialization, encoding, decoding and is responsible
+for obtaining the required data transmission rate. Note that some USB
+controllers have PHY functionality embedded into it and others use an external
+PHY. Other peripherals that use PHY include Wireless LAN, Ethernet,
+SATA etc.
+
+The intention of creating this framework is to bring the PHY drivers spread
+all over the Linux kernel to drivers/phy to increase code re-use and for
+better code maintainability.
+
+This framework will be of use only to devices that use external PHY (PHY
+functionality is not embedded within the controller).
+
+2. Registering/Unregistering the PHY provider
+
+PHY provider refers to an entity that implements one or more PHY instances.
+For the simple case where the PHY provider implements only a single instance of
+the PHY, the framework provides its own implementation of of_xlate in
+of_phy_simple_xlate. If the PHY provider implements multiple instances, it
+should provide its own implementation of of_xlate. of_xlate is used only for
+dt boot case.
+
+#define of_phy_provider_register(dev, xlate)    \
+        __of_phy_provider_register((dev), THIS_MODULE, (xlate))
+
+#define devm_of_phy_provider_register(dev, xlate)       \
+        __devm_of_phy_provider_register((dev), THIS_MODULE, (xlate))
+
+of_phy_provider_register and devm_of_phy_provider_register macros can be used to
+register the phy_provider and it takes device and of_xlate as
+arguments. For the dt boot case, all PHY providers should use one of the above
+2 macros to register the PHY provider.
+
+void devm_of_phy_provider_unregister(struct device *dev,
+        struct phy_provider *phy_provider);
+void of_phy_provider_unregister(struct phy_provider *phy_provider);
+
+devm_of_phy_provider_unregister and of_phy_provider_unregister can be used to
+unregister the PHY.
+
+3. Creating the PHY
+
+The PHY driver should create the PHY in order for other peripheral controllers
+to make use of it. The PHY framework provides 2 APIs to create the PHY.
+
+struct phy *phy_create(struct device *dev, const struct phy_ops *ops,
+        struct phy_init_data *init_data);
+struct phy *devm_phy_create(struct device *dev, const struct phy_ops *ops,
+        struct phy_init_data *init_data);
+
+The PHY drivers can use one of the above 2 APIs to create the PHY by passing
+the device pointer, phy ops and init_data.
+phy_ops is a set of function pointers for performing PHY operations such as
+init, exit, power_on and power_off. *init_data* is mandatory to get a reference
+to the PHY in the case of non-dt boot. See section *Board File Initialization*
+on how init_data should be used.
+
+Inorder to dereference the private data (in phy_ops), the phy provider driver
+can use phy_set_drvdata() after creating the PHY and use phy_get_drvdata() in
+phy_ops to get back the private data.
+
+4. Getting a reference to the PHY
+
+Before the controller can make use of the PHY, it has to get a reference to
+it. This framework provides the following APIs to get a reference to the PHY.
+
+struct phy *phy_get(struct device *dev, const char *string);
+struct phy *devm_phy_get(struct device *dev, const char *string);
+
+phy_get and devm_phy_get can be used to get the PHY. In the case of dt boot,
+the string arguments should contain the phy name as given in the dt data and
+in the case of non-dt boot, it should contain the label of the PHY.
+The only difference between the two APIs is that devm_phy_get associates the
+device with the PHY using devres on successful PHY get. On driver detach,
+release function is invoked on the the devres data and devres data is freed.
+
+5. Releasing a reference to the PHY
+
+When the controller no longer needs the PHY, it has to release the reference
+to the PHY it has obtained using the APIs mentioned in the above section. The
+PHY framework provides 2 APIs to release a reference to the PHY.
+
+void phy_put(struct phy *phy);
+void devm_phy_put(struct device *dev, struct phy *phy);
+
+Both these APIs are used to release a reference to the PHY and devm_phy_put
+destroys the devres associated with this PHY.
+
+6. Destroying the PHY
+
+When the driver that created the PHY is unloaded, it should destroy the PHY it
+created using one of the following 2 APIs.
+
+void phy_destroy(struct phy *phy);
+void devm_phy_destroy(struct device *dev, struct phy *phy);
+
+Both these APIs destroy the PHY and devm_phy_destroy destroys the devres
+associated with this PHY.
+
+7. PM Runtime
+
+This subsystem is pm runtime enabled. So while creating the PHY,
+pm_runtime_enable of the phy device created by this subsystem is called and
+while destroying the PHY, pm_runtime_disable is called. Note that the phy
+device created by this subsystem will be a child of the device that calls
+phy_create (PHY provider device).
+
+So pm_runtime_get_sync of the phy_device created by this subsystem will invoke
+pm_runtime_get_sync of PHY provider device because of parent-child relationship.
+It should also be noted that phy_power_on and phy_power_off performs
+phy_pm_runtime_get_sync and phy_pm_runtime_put respectively.
+There are exported APIs like phy_pm_runtime_get, phy_pm_runtime_get_sync,
+phy_pm_runtime_put, phy_pm_runtime_put_sync, phy_pm_runtime_allow and
+phy_pm_runtime_forbid for performing PM operations.
+
+8. Board File Initialization
+
+Certain board file initialization is necessary in order to get a reference
+to the PHY in the case of non-dt boot.
+Say we have a single device that implements 3 PHYs that of USB, SATA and PCIe,
+then in the board file the following initialization should be done.
+
+struct phy_consumer consumers[] = {
+        PHY_CONSUMER("dwc3.0", "usb"),
+        PHY_CONSUMER("pcie.0", "pcie"),
+        PHY_CONSUMER("sata.0", "sata"),
+};
+PHY_CONSUMER takes 2 parameters, first is the device name of the controller
+(PHY consumer) and second is the port name.
+
+struct phy_init_data init_data = {
+        .consumers = consumers,
+        .num_consumers = ARRAY_SIZE(consumers),
+};
+
+static const struct platform_device pipe3_phy_dev = {
+        .name = "pipe3-phy",
+        .id = -1,
+        .dev = {
+                .platform_data = {
+                        .init_data = &init_data,
+                },
+        },
+};
+
+then, while doing phy_create, the PHY driver should pass this init_data
+        phy_create(dev, ops, pdata->init_data);
+
+and the controller driver (phy consumer) should pass the port name along with
+the device to get a reference to the PHY
+        phy_get(dev, "pcie");
+
+9. DeviceTree Binding
+
+The documentation for PHY dt binding can be found @
+Documentation/devicetree/bindings/phy/phy-bindings.txt
diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
index 052e13af2d38..a7929cb47e7c 100644
--- a/Documentation/pinctrl.txt
+++ b/Documentation/pinctrl.txt
@@ -81,7 +81,7 @@ int __init foo_probe(void)
         struct pinctrl_dev *pctl;
 
         pctl = pinctrl_register(&foo_desc, <PARENT>, NULL);
-        if (IS_ERR(pctl))
+        if (!pctl)
                 pr_err("could not register foo pin driver\n");
 }
 
@@ -358,7 +358,12 @@ static struct pinctrl_gpio_range gpio_range = {
         .gc = &chip;
 };
 
-In this case the pin_base property will be ignored.
+In this case the pin_base property will be ignored. If the name of a pin
+group is known, the pins and npins elements of the above structure can be
+initialised using the function pinctrl_get_group_pins(), e.g. for pin
+group "foo":
+
+pinctrl_get_group_pins(pctl, "foo", &gpio_range.pins, &gpio_range.npins);
 
 When GPIO-specific functions in the pin control subsystem are called, these
 ranges will be used to look up the appropriate pin controller by inspecting
@@ -795,18 +800,97 @@ special GPIO-handler is registered.
 GPIO mode pitfalls
 ==================
 
-Sometime the developer may be confused by a datasheet talking about a pin
-being possible to set into "GPIO mode". It appears that what hardware
-engineers mean with "GPIO mode" is not necessarily the use case that is
-implied in the kernel interface <linux/gpio.h>: a pin that you grab from
-kernel code and then either listen for input or drive high/low to
-assert/deassert some external line.
+Due to the naming conventions used by hardware engineers, where "GPIO"
+is taken to mean different things than what the kernel does, the developer
+may be confused by a datasheet talking about a pin being possible to set
+into "GPIO mode". It appears that what hardware engineers mean with
+"GPIO mode" is not necessarily the use case that is implied in the kernel
+interface <linux/gpio.h>: a pin that you grab from kernel code and then
+either listen for input or drive high/low to assert/deassert some
+external line.
 
 Rather hardware engineers think that "GPIO mode" means that you can
 software-control a few electrical properties of the pin that you would
 not be able to control if the pin was in some other mode, such as muxed in
 for a device.
 
+The GPIO portions of a pin and its relation to a certain pin controller
+configuration and muxing logic can be constructed in several ways. Here
+are two examples:
+
+(A)
+                       pin config
+                       logic regs
+                       |               +- SPI
+     Physical pins --- pad --- pinmux -+- I2C
+                               |       +- mmc
+                               |       +- GPIO
+                               pin
+                               multiplex
+                               logic regs
+
+Here some electrical properties of the pin can be configured no matter
+whether the pin is used for GPIO or not. If you multiplex a GPIO onto a
+pin, you can also drive it high/low from "GPIO" registers.
+Alternatively, the pin can be controlled by a certain peripheral, while
+still applying desired pin config properties. GPIO functionality is thus
+orthogonal to any other device using the pin.
+
+In this arrangement the registers for the GPIO portions of the pin controller,
+or the registers for the GPIO hardware module are likely to reside in a
+separate memory range only intended for GPIO driving, and the register
+range dealing with pin config and pin multiplexing get placed into a
+different memory range and a separate section of the data sheet.
+
+(B)
+
+                       pin config
+                       logic regs
+                       |               +- SPI
+     Physical pins --- pad --- pinmux -+- I2C
+                       |       |       +- mmc
+                       |       |
+                       GPIO    pin
+                               multiplex
+                               logic regs
+
+In this arrangement, the GPIO functionality can always be enabled, such that
+e.g. a GPIO input can be used to "spy" on the SPI/I2C/MMC signal while it is
+pulsed out. It is likely possible to disrupt the traffic on the pin by doing
+wrong things on the GPIO block, as it is never really disconnected. It is
+possible that the GPIO, pin config and pin multiplex registers are placed into
+the same memory range and the same section of the data sheet, although that
+need not be the case.
+
+From a kernel point of view, however, these are different aspects of the
+hardware and shall be put into different subsystems:
+
+- Registers (or fields within registers) that control electrical
+  properties of the pin such as biasing and drive strength should be
+  exposed through the pinctrl subsystem, as "pin configuration" settings.
+
+- Registers (or fields within registers) that control muxing of signals
+  from various other HW blocks (e.g. I2C, MMC, or GPIO) onto pins should
+  be exposed through the pinctrl subssytem, as mux functions.
+
+- Registers (or fields within registers) that control GPIO functionality
+  such as setting a GPIO's output value, reading a GPIO's input value, or
+  setting GPIO pin direction should be exposed through the GPIO subsystem,
+  and if they also support interrupt capabilities, through the irqchip
+  abstraction.
+
+Depending on the exact HW register design, some functions exposed by the
+GPIO subsystem may call into the pinctrl subsystem in order to
+co-ordinate register settings across HW modules. In particular, this may
+be needed for HW with separate GPIO and pin controller HW modules, where
+e.g. GPIO direction is determined by a register in the pin controller HW
+module rather than the GPIO HW module.
+
+Electrical properties of the pin such as biasing and drive strength
+may be placed at some pin-specific register in all cases or as part
+of the GPIO register in case (B) especially. This doesn't mean that such
+properties necessarily pertain to what the Linux kernel calls "GPIO".
+
 Example: a pin is usually muxed in to be used as a UART TX line. But during
 system sleep, we need to put this pin into "GPIO mode" and ground it.
 
@@ -856,7 +940,7 @@ static unsigned long uart_sleep_mode[] = {
     PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, 0),
 };
 
-static struct pinctrl_map __initdata pinmap[] = {
+static struct pinctrl_map pinmap[] __initdata = {
     PIN_MAP_MUX_GROUP("uart", PINCTRL_STATE_DEFAULT, "pinctrl-foo",
                       "u0_group", "u0"),
     PIN_MAP_CONFIGS_PIN("uart", PINCTRL_STATE_DEFAULT, "pinctrl-foo",
@@ -951,7 +1035,7 @@ Since the above construct is pretty common there is a helper macro to make
 it even more compact which assumes you want to use pinctrl-foo and position
 0 for mapping, for example:
 
-static struct pinctrl_map __initdata mapping[] = {
+static struct pinctrl_map mapping[] __initdata = {
         PIN_MAP_MUX_GROUP("foo-i2c.o", PINCTRL_STATE_DEFAULT, "pinctrl-foo", NULL, "i2c0"),
 };
 
@@ -970,7 +1054,7 @@ static unsigned long i2c_pin_configs[] = {
         FOO_SLEW_RATE_SLOW,
 };
 
-static struct pinctrl_map __initdata mapping[] = {
+static struct pinctrl_map mapping[] __initdata = {
         PIN_MAP_MUX_GROUP("foo-i2c.0", PINCTRL_STATE_DEFAULT, "pinctrl-foo", "i2c0", "i2c0"),
         PIN_MAP_CONFIGS_GROUP("foo-i2c.0", PINCTRL_STATE_DEFAULT, "pinctrl-foo", "i2c0", i2c_grp_configs),
         PIN_MAP_CONFIGS_PIN("foo-i2c.0", PINCTRL_STATE_DEFAULT, "pinctrl-foo", "i2c0scl", i2c_pin_configs),
@@ -984,7 +1068,7 @@ order to explicitly indicate that the states were provided and intended to
 be empty. Table entry macro PIN_MAP_DUMMY_STATE serves the purpose of defining
 a named state without causing any pin controller to be programmed:
 
-static struct pinctrl_map __initdata mapping[] = {
+static struct pinctrl_map mapping[] __initdata = {
         PIN_MAP_DUMMY_STATE("foo-i2c.0", PINCTRL_STATE_DEFAULT),
 };
 
diff --git a/Documentation/power/basic-pm-debugging.txt b/Documentation/power/basic-pm-debugging.txt
index 262acf56fa79..e9b54de8fdf7 100644
--- a/Documentation/power/basic-pm-debugging.txt
+++ b/Documentation/power/basic-pm-debugging.txt
@@ -179,7 +179,7 @@ use the PM_TRACE mechanism documented in Documentation/power/s2ram.txt .
 
 To verify that the STR works, it is generally more convenient to use the s2ram
 tool available from http://suspend.sf.net and documented at
-http://en.opensuse.org/SDB:Suspend_to_RAM.
+http://en.opensuse.org/SDB:Suspend_to_RAM (S2RAM_LINK).
 
 Namely, after writing "freezer", "devices", "platform", "processors", or "core"
 into /sys/power/pm_test (available if the kernel is compiled with
@@ -194,10 +194,10 @@ Among other things, the testing with the help of /sys/power/pm_test may allow
 you to identify drivers that fail to suspend or resume their devices.  They
 should be unloaded every time before an STR transition.
 
-Next, you can follow the instructions at http://en.opensuse.org/s2ram to test
-the system, but if it does not work "out of the box", you may need to boot it
-with "init=/bin/bash" and test s2ram in the minimal configuration.  In that
-case, you may be able to search for failing drivers by following the procedure
+Next, you can follow the instructions at S2RAM_LINK to test the system, but if
+it does not work "out of the box", you may need to boot it with
+"init=/bin/bash" and test s2ram in the minimal configuration.  In that case,
+you may be able to search for failing drivers by following the procedure
 analogous to the one described in section 1.  If you find some failing drivers,
 you will have to unload them every time before an STR transition (ie. before
 you run s2ram), and please report the problems with them.
diff --git a/Documentation/power/swsusp.txt b/Documentation/power/swsusp.txt
index 0b4b63e7e9b6..079160e22bcc 100644
--- a/Documentation/power/swsusp.txt
+++ b/Documentation/power/swsusp.txt
@@ -50,6 +50,19 @@ echo N > /sys/power/image_size
 
 before suspend (it is limited to 500 MB by default).
 
+. The resume process checks for the presence of the resume device,
+if found, it then checks the contents for the hibernation image signature.
+If both are found, it resumes the hibernation image.
+
+. The resume process may be triggered in two ways:
+  1) During lateinit:  If resume=/dev/your_swap_partition is specified on
+     the kernel command line, lateinit runs the resume process.  If the
+     resume device has not been probed yet, the resume process fails and
+     bootup continues.
+  2) Manually from an initrd or initramfs:  May be run from
+     the init script by using the /sys/power/resume file.  It is vital
+     that this be done prior to remounting any filesystems (even as
+     read-only) otherwise data may be corrupted.
 
 Article about goals and implementation of Software Suspend for Linux
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -326,7 +339,7 @@ Q: How can distributions ship a swsusp-supporting kernel with modular
 disk drivers (especially SATA)?
 
 A: Well, it can be done, load the drivers, then do echo into
-/sys/power/disk/resume file from initrd. Be sure not to mount
+/sys/power/resume file from initrd. Be sure not to mount
 anything, not even read-only mount, or you are going to lose your
 data.
 
diff --git a/Documentation/powerpc/00-INDEX b/Documentation/powerpc/00-INDEX
index 05026ce1875e..6db73df04278 100644
--- a/Documentation/powerpc/00-INDEX
+++ b/Documentation/powerpc/00-INDEX
@@ -5,13 +5,20 @@ please mail me.
 
 00-INDEX
         - this file
+bootwrapper.txt
+        - Information on how the powerpc kernel is wrapped for boot on various
+          different platforms.
 cpu_features.txt
         - info on how we support a variety of CPUs with minimal compile-time
         options.
 eeh-pci-error-recovery.txt
         - info on PCI Bus EEH Error Recovery
+firmware-assisted-dump.txt
+        - Documentation on the firmware assisted dump mechanism "fadump".
 hvcs.txt
         - IBM "Hypervisor Virtual Console Server" Installation Guide
+kvm_440.txt
+        - Various notes on the implementation of KVM for PowerPC 440.
 mpc52xx.txt
         - Linux 2.6.x on MPC52xx family
 pmu-ebb.txt
@@ -19,3 +26,7 @@ pmu-ebb.txt
 qe_firmware.txt
         - describes the layout of firmware binaries for the Freescale QUICC
           Engine and the code that parses and uploads the microcode therein.
+ptrace.txt
+        - Information on the ptrace interfaces for hardware debug registers.
+transactional_memory.txt
+        - Overview of the Power8 transactional memory support.
diff --git a/Documentation/pps/pps.txt b/Documentation/pps/pps.txt
index d35dcdd82ff6..c03b1be5eb15 100644
--- a/Documentation/pps/pps.txt
+++ b/Documentation/pps/pps.txt
@@ -66,6 +66,21 @@ In LinuxPPS the PPS sources are simply char devices usually mapped
 into files /dev/pps0, /dev/pps1, etc..
 
 
+PPS with USB to serial devices
+------------------------------
+
+It is possible to grab the PPS from an USB to serial device. However,
+you should take into account the latencies and jitter introduced by
+the USB stack. Users has reported clock instability around +-1ms when
+synchronized with PPS through USB. This isn't suited for time server
+synchronization.
+
+If your device doesn't report PPS, you can check that the feature is
+supported by its driver. Most of the time, you only need to add a call
+to usb_serial_handle_dcd_change after checking the DCD status (see
+ch341 and pl2303 examples).
+
+
 Coding example
 --------------
 
diff --git a/Documentation/printk-formats.txt b/Documentation/printk-formats.txt
index 3e8cb73ac43c..445ad743ec81 100644
--- a/Documentation/printk-formats.txt
+++ b/Documentation/printk-formats.txt
@@ -97,7 +97,7 @@ IPv4 addresses:
 
         %pI4    1.2.3.4
         %pi4    001.002.003.004
-        %p[Ii][hnbl]
+        %p[Ii]4[hnbl]
 
         For printing IPv4 dot-separated decimal addresses. The 'I4' and 'i4'
         specifiers result in a printed address with ('i4') or without ('I4')
@@ -168,6 +168,15 @@ UUID/GUID addresses:
         Where no additional specifiers are used the default little endian
         order with lower case hex characters will be printed.
 
+dentry names:
+        %pd{,2,3,4}
+        %pD{,2,3,4}
+
+        For printing dentry name; if we race with d_move(), the name might be
+        a mix of old and new ones, but it won't oops.  %pd dentry is a safer
+        equivalent of %s dentry->d_name.name we used to use, %pd<n> prints
+        n last components.  %pD does the same thing for struct file.
+
 struct va_format:
 
         %pV
@@ -185,11 +194,11 @@ struct va_format:
 
 u64 SHOULD be printed with %llu/%llx, (unsigned long long):
 
-        printk("%llu", (unsigned long long)u64_var);
+        printk("%llu", u64_var);
 
 s64 SHOULD be printed with %lld/%llx, (long long):
 
-        printk("%lld", (long long)s64_var);
+        printk("%lld", s64_var);
 
 If <type> is dependent on a config option for its size (e.g., sector_t,
 blkcnt_t) or is architecture-dependent for its size (e.g., tcflag_t), use a
diff --git a/Documentation/rapidio/rapidio.txt b/Documentation/rapidio/rapidio.txt
index 717f5aa388b1..28fbd877f85a 100644
--- a/Documentation/rapidio/rapidio.txt
+++ b/Documentation/rapidio/rapidio.txt
@@ -300,7 +300,7 @@ initialization.
 -------------------------------------------
 
 RapidIO subsystem code organization allows addition of new enumeration/discovery
-methods as new configuration options without significant impact to to the core
+methods as new configuration options without significant impact to the core
 RapidIO code.
 
 A new enumeration/discovery method has to be attached to one or more mport
diff --git a/Documentation/s390/s390dbf.txt b/Documentation/s390/s390dbf.txt
index fcaf0b4efba2..3da163383c93 100644
--- a/Documentation/s390/s390dbf.txt
+++ b/Documentation/s390/s390dbf.txt
@@ -158,6 +158,16 @@ Return Value:  none
 Description:   Sets new actual debug level if new_level is valid. 
 
 ---------------------------------------------------------------------------
+bool debug_level_enabled (debug_info_t * id, int level);
+
+Parameter:    id:         handle for debug log
+              level:      debug level
+
+Return Value: True if level is less or equal to the current debug level.
+
+Description:  Returns true if debug events for the specified level would be
+              logged. Otherwise returns false.
+---------------------------------------------------------------------------
 void debug_stop_all(void);
 
 Parameter:     none
diff --git a/Documentation/scheduler/sched-arch.txt b/Documentation/scheduler/sched-arch.txt
index b1b8587b86f0..9290de703450 100644
--- a/Documentation/scheduler/sched-arch.txt
+++ b/Documentation/scheduler/sched-arch.txt
@@ -65,11 +65,6 @@ Possible arch/ problems
 
 Possible arch problems I found (and either tried to fix or didn't):
 
-h8300 - Is such sleeping racy vs interrupts? (See #4a).
-        The H8/300 manual I found indicates yes, however disabling IRQs
-        over the sleep mean only NMIs can wake it up, so can't fix easily
-        without doing spin waiting.
-
 ia64 - is safe_halt call racy vs interrupts? (does it sleep?) (See #4a)
 
 sh64 - Is sleeping racy vs interrupts? (See #4a)
diff --git a/Documentation/scheduler/sched-design-CFS.txt b/Documentation/scheduler/sched-design-CFS.txt
index d529e02d928d..f14f49304222 100644
--- a/Documentation/scheduler/sched-design-CFS.txt
+++ b/Documentation/scheduler/sched-design-CFS.txt
@@ -66,9 +66,7 @@ rq->cfs.load value, which is the sum of the weights of the tasks queued on the
 runqueue.
 
 CFS maintains a time-ordered rbtree, where all runnable tasks are sorted by the
-p->se.vruntime key (there is a subtraction using rq->cfs.min_vruntime to
-account for possible wraparounds).  CFS picks the "leftmost" task from this
-tree and sticks to it.
+p->se.vruntime key. CFS picks the "leftmost" task from this tree and sticks to it.
 As the system progresses forwards, the executed tasks are put into the tree
 more and more to the right --- slowly but surely giving a chance for every task
 to become the "leftmost task" and thus get on the CPU within a deterministic
diff --git a/Documentation/scsi/ChangeLog.megaraid_sas b/Documentation/scsi/ChangeLog.megaraid_sas
index cc92ca8c8963..6edaa65b0818 100644
--- a/Documentation/scsi/ChangeLog.megaraid_sas
+++ b/Documentation/scsi/ChangeLog.megaraid_sas
@@ -1,3 +1,13 @@
+Release Date    : Sat. Aug 31, 2013 17:00:00 PST 2013 -
+                        (emaild-id:megaraidlinux@lsi.com)
+                        Adam Radford
+                        Kashyap Desai
+                        Sumit Saxena
+Current Version : 06.700.06.00-rc1
+Old Version     : 06.600.18.00-rc1
+    1. Add High Availability clustering support using shared Logical Disks.
+    2. Version and Changelog update.
+-------------------------------------------------------------------------------
 Release Date    : Wed. May 15, 2013 17:00:00 PST 2013 -
                         (emaild-id:megaraidlinux@lsi.com)
                         Adam Radford
diff --git a/Documentation/scsi/LICENSE.qla4xxx b/Documentation/scsi/LICENSE.qla4xxx
index 78c169f0d7c6..fcc27ad27d74 100644
--- a/Documentation/scsi/LICENSE.qla4xxx
+++ b/Documentation/scsi/LICENSE.qla4xxx
@@ -1,4 +1,4 @@
-Copyright (c) 2003-2012 QLogic Corporation
+Copyright (c) 2003-2013 QLogic Corporation
 QLogic Linux iSCSI Driver
 
 This program includes a device driver for Linux 3.x.
diff --git a/Documentation/scsi/hptiop.txt b/Documentation/scsi/hptiop.txt
index 4a4f47e759cd..12ecfd308e55 100644
--- a/Documentation/scsi/hptiop.txt
+++ b/Documentation/scsi/hptiop.txt
@@ -151,7 +151,7 @@ To send a request to the controller:
       generated.
 
     - The host read the outbound list copy pointer shadow register and compare
-      with previous saved read ponter N. If they are different, the host will
+      with previous saved read pointer N. If they are different, the host will
       read the (N+1)th outbound list unit.
 
       The host get the index of the request from the (N+1)th outbound list
diff --git a/Documentation/serial/driver b/Documentation/serial/driver
index 067c47d46917..c3a7689a90e6 100644
--- a/Documentation/serial/driver
+++ b/Documentation/serial/driver
@@ -264,10 +264,6 @@ hardware.
         Locking: none.
         Interrupts: caller dependent.
 
-  set_wake(port,state)
-        Enable/disable power management wakeup on serial activity.  Not
-        currently implemented.
-
   type(port)
         Return a pointer to a string constant describing the specified
         port, or return NULL, in which case the string 'unknown' is
diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt
index 95731a08f257..b8dd0df76952 100644
--- a/Documentation/sound/alsa/ALSA-Configuration.txt
+++ b/Documentation/sound/alsa/ALSA-Configuration.txt
@@ -616,7 +616,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
 
     As default, snd-dummy drivers doesn't allocate the real buffers
     but either ignores read/write or mmap a single dummy page to all
-    buffer pages, in order to save the resouces.  If your apps need
+    buffer pages, in order to save the resources.  If your apps need
     the read/ written buffer data to be consistent, pass fake_buffer=0
     option.
 
diff --git a/Documentation/sound/alsa/Audiophile-Usb.txt b/Documentation/sound/alsa/Audiophile-Usb.txt
index 654dd3b694a8..e7a5ed4dcae8 100644
--- a/Documentation/sound/alsa/Audiophile-Usb.txt
+++ b/Documentation/sound/alsa/Audiophile-Usb.txt
@@ -232,7 +232,7 @@ The parameter can be given:
    # modprobe snd-usb-audio index=1 device_setup=0x09
 
  * Or while configuring the modules options in your modules configuration file
-   (tipically a .conf file in /etc/modprobe.d/ directory:
+   (typically a .conf file in /etc/modprobe.d/ directory:
        alias snd-card-1 snd-usb-audio
        options snd-usb-audio index=1 device_setup=0x09
 
diff --git a/Documentation/sound/alsa/CMIPCI.txt b/Documentation/sound/alsa/CMIPCI.txt
index 16935c8561f7..4e36e6e809ca 100644
--- a/Documentation/sound/alsa/CMIPCI.txt
+++ b/Documentation/sound/alsa/CMIPCI.txt
@@ -87,7 +87,7 @@ with 4 channels,
 
 and use the interleaved 4 channel data.
 
-There are some control switchs affecting to the speaker connections:
+There are some control switches affecting to the speaker connections:
 
 "Line-In Mode"  - an enum control to change the behavior of line-in
         jack.  Either "Line-In", "Rear Output" or "Bass Output" can
diff --git a/Documentation/sound/alsa/HD-Audio-Models.txt b/Documentation/sound/alsa/HD-Audio-Models.txt
index 809d72b8eff1..85c362d8ea34 100644
--- a/Documentation/sound/alsa/HD-Audio-Models.txt
+++ b/Documentation/sound/alsa/HD-Audio-Models.txt
@@ -28,6 +28,7 @@ ALC269/270/275/276/28x/29x
   alc269-dmic           Enable ALC269(VA) digital mic workaround
   alc271-dmic           Enable ALC271X digital mic workaround
   inv-dmic              Inverted internal mic workaround
+  headset-mic           Indicates a combined headset (headphone+mic) jack
   lenovo-dock           Enables docking station I/O for some Lenovos
   dell-headset-multi    Headset jack, which can also be used as mic-in
   dell-headset-dock     Headset jack (without mic-in), and also dock I/O
@@ -244,6 +245,7 @@ STAC9227/9228/9229/927x
   5stack-no-fp  D965 5stack without front panel
   dell-3stack   Dell Dimension E520
   dell-bios     Fixes with Dell BIOS setup
+  dell-bios-amic Fixes with Dell BIOS setup including analog mic
   volknob       Fixes with volume-knob widget 0x24
   auto          BIOS setup (default)
 
@@ -295,6 +297,12 @@ Cirrus Logic CS4206/4207
   imac27        IMac 27 Inch
   auto          BIOS setup (default)
 
+Cirrus Logic CS4208
+===================
+  mba6          MacBook Air 6,1 and 6,2
+  gpio0         Enable GPIO 0 amp
+  auto          BIOS setup (default)
+
 VIA VT17xx/VT18xx/VT20xx
 ========================
   auto          BIOS setup (default)
diff --git a/Documentation/sound/alsa/HD-Audio.txt b/Documentation/sound/alsa/HD-Audio.txt
index c3c912d023cc..42a0a39b77e6 100644
--- a/Documentation/sound/alsa/HD-Audio.txt
+++ b/Documentation/sound/alsa/HD-Audio.txt
@@ -454,6 +454,8 @@ The generic parser supports the following hints:
 - need_dac_fix (bool): limits the DACs depending on the channel count
 - primary_hp (bool): probe headphone jacks as the primary outputs;
   default true
+- multi_io (bool): try probing multi-I/O config (e.g. shared
+  line-in/surround, mic/clfe jacks)
 - multi_cap_vol (bool): provide multiple capture volumes
 - inv_dmic_split (bool): provide split internal mic volume/switch for
   phase-inverted digital mics
diff --git a/Documentation/sound/alsa/README.maya44 b/Documentation/sound/alsa/README.maya44
index 0e41576fa13e..67b2ea1cc31d 100644
--- a/Documentation/sound/alsa/README.maya44
+++ b/Documentation/sound/alsa/README.maya44
@@ -120,7 +120,7 @@ Mic Phantom+48V: switch for +48V phantom power for electrostatic microphones on
     Make sure this is not turned on while any other source is connected to input 1/2.
     It might damage the source and/or the maya44 card.
 
-Mic/Line input: if switch is is on, input jack 1/2 is microphone input (mono), otherwise line input (stereo).
+Mic/Line input: if switch is on, input jack 1/2 is microphone input (mono), otherwise line input (stereo).
 
 Bypass: analogue bypass from ADC input to output for channel 1+2. Same as "Monitor" in the windows driver.
 Bypass 1: same for channel 3+4.
diff --git a/Documentation/sound/alsa/compress_offload.txt b/Documentation/sound/alsa/compress_offload.txt
index 0bcc55155911..630c492c3dc2 100644
--- a/Documentation/sound/alsa/compress_offload.txt
+++ b/Documentation/sound/alsa/compress_offload.txt
@@ -73,7 +73,7 @@ The main requirements are:
 
 Design
 
-The new API shares a number of concepts with with the PCM API for flow
+The new API shares a number of concepts with the PCM API for flow
 control. Start, pause, resume, drain and stop commands have the same
 semantics no matter what the content is.
 
@@ -130,7 +130,7 @@ the settings should remain the exception.
 The timestamp becomes a multiple field structure. It lists the number
 of bytes transferred, the number of samples processed and the number
 of samples rendered/grabbed. All these values can be used to determine
-the avarage bitrate, figure out if the ring buffer needs to be
+the average bitrate, figure out if the ring buffer needs to be
 refilled or the delay due to decoding/encoding/io on the DSP.
 
 Note that the list of codecs/profiles/modes was derived from the
@@ -217,12 +217,12 @@ Not supported:
   would be enabled with ALSA kcontrols.
 
 - Audio policy/resource management. This API does not provide any
-  hooks to query the utilization of the audio DSP, nor any premption
+  hooks to query the utilization of the audio DSP, nor any preemption
   mechanisms.
 
-- No notion of underun/overrun. Since the bytes written are compressed
+- No notion of underrun/overrun. Since the bytes written are compressed
   in nature and data written/read doesn't translate directly to
-  rendered output in time, this does not deal with underrun/overun and
+  rendered output in time, this does not deal with underrun/overrun and
   maybe dealt in user-library
 
 Credits:
diff --git a/Documentation/sound/alsa/soc/DPCM.txt b/Documentation/sound/alsa/soc/DPCM.txt
new file mode 100644
index 000000000000..0110180b7ac6
--- /dev/null
+++ b/Documentation/sound/alsa/soc/DPCM.txt
@@ -0,0 +1,380 @@
+Dynamic PCM
+===========
+
+1. Description
+==============
+
+Dynamic PCM allows an ALSA PCM device to digitally route its PCM audio to
+various digital endpoints during the PCM stream runtime. e.g. PCM0 can route
+digital audio to I2S DAI0, I2S DAI1 or PDM DAI2. This is useful for on SoC DSP
+drivers that expose several ALSA PCMs and can route to multiple DAIs.
+
+The DPCM runtime routing is determined by the ALSA mixer settings in the same
+way as the analog signal is routed in an ASoC codec driver. DPCM uses a DAPM
+graph representing the DSP internal audio paths and uses the mixer settings to
+determine the patch used by each ALSA PCM.
+
+DPCM re-uses all the existing component codec, platform and DAI drivers without
+any modifications.
+
+
+Phone Audio System with SoC based DSP
+-------------------------------------
+
+Consider the following phone audio subsystem. This will be used in this
+document for all examples :-
+
+| Front End PCMs    |  SoC DSP  | Back End DAIs | Audio devices |
+
+                    *************
+PCM0 <------------> *           * <----DAI0-----> Codec Headset
+                    *           *
+PCM1 <------------> *           * <----DAI1-----> Codec Speakers
+                    *   DSP     *
+PCM2 <------------> *           * <----DAI2-----> MODEM
+                    *           *
+PCM3 <------------> *           * <----DAI3-----> BT
+                    *           *
+                    *           * <----DAI4-----> DMIC
+                    *           *
+                    *           * <----DAI5-----> FM
+                    *************
+
+This diagram shows a simple smart phone audio subsystem. It supports Bluetooth,
+FM digital radio, Speakers, Headset Jack, digital microphones and cellular
+modem. This sound card exposes 4 DSP front end (FE) ALSA PCM devices and
+supports 6 back end (BE) DAIs. Each FE PCM can digitally route audio data to any
+of the BE DAIs. The FE PCM devices can also route audio to more than 1 BE DAI.
+
+
+
+Example - DPCM Switching playback from DAI0 to DAI1
+---------------------------------------------------
+
+Audio is being played to the Headset. After a while the user removes the headset
+and audio continues playing on the speakers.
+
+Playback on PCM0 to Headset would look like :-
+
+                    *************
+PCM0 <============> *           * <====DAI0=====> Codec Headset
+                    *           *
+PCM1 <------------> *           * <----DAI1-----> Codec Speakers
+                    *   DSP     *
+PCM2 <------------> *           * <----DAI2-----> MODEM
+                    *           *
+PCM3 <------------> *           * <----DAI3-----> BT
+                    *           *
+                    *           * <----DAI4-----> DMIC
+                    *           *
+                    *           * <----DAI5-----> FM
+                    *************
+
+The headset is removed from the jack by user so the speakers must now be used :-
+
+                    *************
+PCM0 <============> *           * <----DAI0-----> Codec Headset
+                    *           *
+PCM1 <------------> *           * <====DAI1=====> Codec Speakers
+                    *   DSP     *
+PCM2 <------------> *           * <----DAI2-----> MODEM
+                    *           *
+PCM3 <------------> *           * <----DAI3-----> BT
+                    *           *
+                    *           * <----DAI4-----> DMIC
+                    *           *
+                    *           * <----DAI5-----> FM
+                    *************
+
+The audio driver processes this as follows :-
+
+ 1) Machine driver receives Jack removal event.
+
+ 2) Machine driver OR audio HAL disables the Headset path.
+
+ 3) DPCM runs the PCM trigger(stop), hw_free(), shutdown() operations on DAI0
+    for headset since the path is now disabled.
+
+ 4) Machine driver or audio HAL enables the speaker path.
+
+ 5) DPCM runs the PCM ops for startup(), hw_params(), prepapre() and
+    trigger(start) for DAI1 Speakers since the path is enabled.
+
+In this example, the machine driver or userspace audio HAL can alter the routing
+and then DPCM will take care of managing the DAI PCM operations to either bring
+the link up or down. Audio playback does not stop during this transition.
+
+
+
+DPCM machine driver
+===================
+
+The DPCM enabled ASoC machine driver is similar to normal machine drivers
+except that we also have to :-
+
+ 1) Define the FE and BE DAI links.
+
+ 2) Define any FE/BE PCM operations.
+
+ 3) Define widget graph connections.
+
+
+1 FE and BE DAI links
+---------------------
+
+| Front End PCMs    |  SoC DSP  | Back End DAIs | Audio devices |
+
+                    *************
+PCM0 <------------> *           * <----DAI0-----> Codec Headset
+                    *           *
+PCM1 <------------> *           * <----DAI1-----> Codec Speakers
+                    *   DSP     *
+PCM2 <------------> *           * <----DAI2-----> MODEM
+                    *           *
+PCM3 <------------> *           * <----DAI3-----> BT
+                    *           *
+                    *           * <----DAI4-----> DMIC
+                    *           *
+                    *           * <----DAI5-----> FM
+                    *************
+
+For the example above we have to define 4 FE DAI links and 6 BE DAI links. The
+FE DAI links are defined as follows :-
+
+static struct snd_soc_dai_link machine_dais[] = {
+        {
+                .name = "PCM0 System",
+                .stream_name = "System Playback",
+                .cpu_dai_name = "System Pin",
+                .platform_name = "dsp-audio",
+                .codec_name = "snd-soc-dummy",
+                .codec_dai_name = "snd-soc-dummy-dai",
+                .dynamic = 1,
+                .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST},
+                .dpcm_playback = 1,
+        },
+        .....< other FE and BE DAI links here >
+};
+
+This FE DAI link is pretty similar to a regular DAI link except that we also
+set the DAI link to a DPCM FE with the "dynamic = 1". The supported FE stream
+directions should also be set with the "dpcm_playback" and "dpcm_capture"
+flags. There is also an option to specify the ordering of the trigger call for
+each FE. This allows the ASoC core to trigger the DSP before or after the other
+components (as some DSPs have strong requirements for the ordering DAI/DSP
+start and stop sequences).
+
+The FE DAI above sets the codec and code DAIs to dummy devices since the BE is
+dynamic and will change depending on runtime config.
+
+The BE DAIs are configured as follows :-
+
+static struct snd_soc_dai_link machine_dais[] = {
+        .....< FE DAI links here >
+        {
+                .name = "Codec Headset",
+                .cpu_dai_name = "ssp-dai.0",
+                .platform_name = "snd-soc-dummy",
+                .no_pcm = 1,
+                .codec_name = "rt5640.0-001c",
+                .codec_dai_name = "rt5640-aif1",
+                .ignore_suspend = 1,
+                .ignore_pmdown_time = 1,
+                .be_hw_params_fixup = hswult_ssp0_fixup,
+                .ops = &haswell_ops,
+                .dpcm_playback = 1,
+                .dpcm_capture = 1,
+        },
+        .....< other BE DAI links here >
+};
+
+This BE DAI link connects DAI0 to the codec (in this case RT5460 AIF1). It sets
+the "no_pcm" flag to mark it has a BE and sets flags for supported stream
+directions using "dpcm_playback" and "dpcm_capture" above.
+
+The BE has also flags set for ignoring suspend and PM down time. This allows
+the BE to work in a hostless mode where the host CPU is not transferring data
+like a BT phone call :-
+
+                    *************
+PCM0 <------------> *           * <----DAI0-----> Codec Headset
+                    *           *
+PCM1 <------------> *           * <----DAI1-----> Codec Speakers
+                    *   DSP     *
+PCM2 <------------> *           * <====DAI2=====> MODEM
+                    *           *
+PCM3 <------------> *           * <====DAI3=====> BT
+                    *           *
+                    *           * <----DAI4-----> DMIC
+                    *           *
+                    *           * <----DAI5-----> FM
+                    *************
+
+This allows the host CPU to sleep whilst the DSP, MODEM DAI and the BT DAI are
+still in operation.
+
+A BE DAI link can also set the codec to a dummy device if the code is a device
+that is managed externally.
+
+Likewise a BE DAI can also set a dummy cpu DAI if the CPU DAI is managed by the
+DSP firmware.
+
+
+2 FE/BE PCM operations
+----------------------
+
+The BE above also exports some PCM operations and a "fixup" callback. The fixup
+callback is used by the machine driver to (re)configure the DAI based upon the
+FE hw params. i.e. the DSP may perform SRC or ASRC from the FE to BE.
+
+e.g. DSP converts all FE hw params to run at fixed rate of 48k, 16bit, stereo for
+DAI0. This means all FE hw_params have to be fixed in the machine driver for
+DAI0 so that the DAI is running at desired configuration regardless of the FE
+configuration.
+
+static int dai0_fixup(struct snd_soc_pcm_runtime *rtd,
+                        struct snd_pcm_hw_params *params)
+{
+        struct snd_interval *rate = hw_param_interval(params,
+                        SNDRV_PCM_HW_PARAM_RATE);
+        struct snd_interval *channels = hw_param_interval(params,
+                                                SNDRV_PCM_HW_PARAM_CHANNELS);
+
+        /* The DSP will covert the FE rate to 48k, stereo */
+        rate->min = rate->max = 48000;
+        channels->min = channels->max = 2;
+
+        /* set DAI0 to 16 bit */
+        snd_mask_set(&params->masks[SNDRV_PCM_HW_PARAM_FORMAT -
+                                    SNDRV_PCM_HW_PARAM_FIRST_MASK],
+                                    SNDRV_PCM_FORMAT_S16_LE);
+        return 0;
+}
+
+The other PCM operation are the same as for regular DAI links. Use as necessary.
+
+
+3 Widget graph connections
+--------------------------
+
+The BE DAI links will normally be connected to the graph at initialisation time
+by the ASoC DAPM core. However, if the BE codec or BE DAI is a dummy then this
+has to be set explicitly in the driver :-
+
+/* BE for codec Headset -  DAI0 is dummy and managed by DSP FW */
+{"DAI0 CODEC IN", NULL, "AIF1 Capture"},
+{"AIF1 Playback", NULL, "DAI0 CODEC OUT"},
+
+
+Writing a DPCM DSP driver
+=========================
+
+The DPCM DSP driver looks much like a standard platform class ASoC driver
+combined with elements from a codec class driver. A DSP platform driver must
+implement :-
+
+ 1) Front End PCM DAIs - i.e. struct snd_soc_dai_driver.
+
+ 2) DAPM graph showing DSP audio routing from FE DAIs to BEs.
+
+ 3) DAPM widgets from DSP graph.
+
+ 4) Mixers for gains, routing, etc.
+
+ 5) DMA configuration.
+
+ 6) BE AIF widgets.
+
+Items 6 is important for routing the audio outside of the DSP. AIF need to be
+defined for each BE and each stream direction. e.g for BE DAI0 above we would
+have :-
+
+SND_SOC_DAPM_AIF_IN("DAI0 RX", NULL, 0, SND_SOC_NOPM, 0, 0),
+SND_SOC_DAPM_AIF_OUT("DAI0 TX", NULL, 0, SND_SOC_NOPM, 0, 0),
+
+The BE AIF are used to connect the DSP graph to the graphs for the other
+component drivers (e.g. codec graph).
+
+
+Hostless PCM streams
+====================
+
+A hostless PCM stream is a stream that is not routed through the host CPU. An
+example of this would be a phone call from handset to modem.
+
+
+                    *************
+PCM0 <------------> *           * <----DAI0-----> Codec Headset
+                    *           *
+PCM1 <------------> *           * <====DAI1=====> Codec Speakers/Mic
+                    *   DSP     *
+PCM2 <------------> *           * <====DAI2=====> MODEM
+                    *           *
+PCM3 <------------> *           * <----DAI3-----> BT
+                    *           *
+                    *           * <----DAI4-----> DMIC
+                    *           *
+                    *           * <----DAI5-----> FM
+                    *************
+
+In this case the PCM data is routed via the DSP. The host CPU in this use case
+is only used for control and can sleep during the runtime of the stream.
+
+The host can control the hostless link either by :-
+
+ 1) Configuring the link as a CODEC <-> CODEC style link. In this case the link
+    is enabled or disabled by the state of the DAPM graph. This usually means
+    there is a mixer control that can be used to connect or disconnect the path
+    between both DAIs.
+
+ 2) Hostless FE. This FE has a virtual connection to the BE DAI links on the DAPM
+    graph. Control is then carried out by the FE as regular PCM operations.
+    This method gives more control over the DAI links, but requires much more
+    userspace code to control the link. Its recommended to use CODEC<->CODEC
+    unless your HW needs more fine grained sequencing of the PCM ops.
+
+
+CODEC <-> CODEC link
+--------------------
+
+This DAI link is enabled when DAPM detects a valid path within the DAPM graph.
+The machine driver sets some additional parameters to the DAI link i.e.
+
+static const struct snd_soc_pcm_stream dai_params = {
+        .formats = SNDRV_PCM_FMTBIT_S32_LE,
+        .rate_min = 8000,
+        .rate_max = 8000,
+        .channels_min = 2,
+        .channels_max = 2,
+};
+
+static struct snd_soc_dai_link dais[] = {
+        < ... more DAI links above ... >
+        {
+                .name = "MODEM",
+                .stream_name = "MODEM",
+                .cpu_dai_name = "dai2",
+                .codec_dai_name = "modem-aif1",
+                .codec_name = "modem",
+                .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
+                                | SND_SOC_DAIFMT_CBM_CFM,
+                .params = &dai_params,
+        }
+        < ... more DAI links here ... >
+
+These parameters are used to configure the DAI hw_params() when DAPM detects a
+valid path and then calls the PCM operations to start the link. DAPM will also
+call the appropriate PCM operations to disable the DAI when the path is no
+longer valid.
+
+
+Hostless FE
+-----------
+
+The DAI link(s) are enabled by a FE that does not read or write any PCM data.
+This means creating a new FE that is connected with a virtual path to both
+DAI links. The DAI links will be started when the FE PCM is started and stopped
+when the FE PCM is stopped. Note that the FE PCM cannot read or write data in
+this configuration.
+
+
diff --git a/Documentation/sound/alsa/soc/codec.txt b/Documentation/sound/alsa/soc/codec.txt
index bce23a4a7875..db5f9c9ae149 100644
--- a/Documentation/sound/alsa/soc/codec.txt
+++ b/Documentation/sound/alsa/soc/codec.txt
@@ -1,22 +1,23 @@
-ASoC Codec Driver
-=================
+ASoC Codec Class Driver
+=======================
 
-The codec driver is generic and hardware independent code that configures the
-codec to provide audio capture and playback. It should contain no code that is
-specific to the target platform or machine. All platform and machine specific
-code should be added to the platform and machine drivers respectively.
+The codec class driver is generic and hardware independent code that configures
+the codec, FM, MODEM, BT or external DSP to provide audio capture and playback.
+It should contain no code that is specific to the target platform or machine.
+All platform and machine specific code should be added to the platform and
+machine drivers respectively.
 
-Each codec driver *must* provide the following features:-
+Each codec class driver *must* provide the following features:-
 
  1) Codec DAI and PCM configuration
- 2) Codec control IO - using I2C, 3 Wire(SPI) or both APIs
+ 2) Codec control IO - using RegMap API
  3) Mixers and audio controls
  4) Codec audio operations
+ 5) DAPM description.
+ 6) DAPM event handler.
 
 Optionally, codec drivers can also provide:-
 
- 5) DAPM description.
- 6) DAPM event handler.
  7) DAC Digital mute control.
 
 Its probably best to use this guide in conjunction with the existing codec
@@ -64,26 +65,9 @@ struct snd_soc_dai_driver wm8731_dai = {
 2 - Codec control IO
 --------------------
 The codec can usually be controlled via an I2C or SPI style interface
-(AC97 combines control with data in the DAI). The codec drivers provide
-functions to read and write the codec registers along with supplying a
-register cache:-
-
-        /* IO control data and register cache */
-        void *control_data; /* codec control (i2c/3wire) data */
-        void *reg_cache;
-
-Codec read/write should do any data formatting and call the hardware
-read write below to perform the IO. These functions are called by the
-core and ALSA when performing DAPM or changing the mixer:-
-
-    unsigned int (*read)(struct snd_soc_codec *, unsigned int);
-    int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
-
-Codec hardware IO functions - usually points to either the I2C, SPI or AC97
-read/write:-
-
-        hw_write_t hw_write;
-        hw_read_t hw_read;
+(AC97 combines control with data in the DAI). The codec driver should use the
+Regmap API for all codec IO. Please see include/linux/regmap.h and existing
+codec drivers for example regmap usage.
 
 
 3 - Mixers and audio controls
@@ -127,7 +111,7 @@ Defines a stereo enumerated control
 
 4 - Codec Audio Operations
 --------------------------
-The codec driver also supports the following ALSA operations:-
+The codec driver also supports the following ALSA PCM operations:-
 
 /* SoC audio ops */
 struct snd_soc_ops {
diff --git a/Documentation/sound/alsa/soc/dapm.txt b/Documentation/sound/alsa/soc/dapm.txt
index 05bf5a0eee41..6faab4880006 100644
--- a/Documentation/sound/alsa/soc/dapm.txt
+++ b/Documentation/sound/alsa/soc/dapm.txt
@@ -21,7 +21,7 @@ level power systems.
 
 There are 4 power domains within DAPM
 
-   1. Codec domain - VREF, VMID (core codec and audio power)
+   1. Codec bias domain - VREF, VMID (core codec and audio power)
       Usually controlled at codec probe/remove and suspend/resume, although
       can be set at stream time if power is not needed for sidetone, etc.
 
@@ -30,7 +30,7 @@ There are 4 power domains within DAPM
       machine driver and responds to asynchronous events e.g when HP
       are inserted
 
-   3. Path domain - audio susbsystem signal paths
+   3. Path domain - audio subsystem signal paths
       Automatically set when mixer and mux settings are changed by the user.
       e.g. alsamixer, amixer.
 
@@ -63,14 +63,22 @@ Audio DAPM widgets fall into a number of types:-
  o Line       - Line Input/Output (and optional Jack)
  o Speaker    - Speaker
  o Supply     - Power or clock supply widget used by other widgets.
+ o Regulator  - External regulator that supplies power to audio components.
+ o Clock      - External clock that supplies clock to audio components.
+ o AIF IN     - Audio Interface Input (with TDM slot mask).
+ o AIF OUT    - Audio Interface Output (with TDM slot mask).
+ o Siggen     - Signal Generator.
+ o DAI IN     - Digital Audio Interface Input.
+ o DAI OUT    - Digital Audio Interface Output.
+ o DAI Link   - DAI Link between two DAI structures */
  o Pre        - Special PRE widget (exec before all others)
  o Post       - Special POST widget (exec after all others)
 
 (Widgets are defined in include/sound/soc-dapm.h)
 
-Widgets are usually added in the codec driver and the machine driver. There are
-convenience macros defined in soc-dapm.h that can be used to quickly build a
-list of widgets of the codecs and machines DAPM widgets.
+Widgets can be added to the sound card by any of the component driver types.
+There are convenience macros defined in soc-dapm.h that can be used to quickly
+build a list of widgets of the codecs and machines DAPM widgets.
 
 Most widgets have a name, register, shift and invert. Some widgets have extra
 parameters for stream name and kcontrols.
@@ -80,11 +88,13 @@ parameters for stream name and kcontrols.
 -------------------------
 
 Stream Widgets relate to the stream power domain and only consist of ADCs
-(analog to digital converters) and DACs (digital to analog converters).
+(analog to digital converters), DACs (digital to analog converters),
+AIF IN and AIF OUT.
 
 Stream widgets have the following format:-
 
 SND_SOC_DAPM_DAC(name, stream name, reg, shift, invert),
+SND_SOC_DAPM_AIF_IN(name, stream, slot, reg, shift, invert)
 
 NOTE: the stream name must match the corresponding stream name in your codec
 snd_soc_codec_dai.
@@ -94,6 +104,11 @@ e.g. stream widgets for HiFi playback and capture
 SND_SOC_DAPM_DAC("HiFi DAC", "HiFi Playback", REG, 3, 1),
 SND_SOC_DAPM_ADC("HiFi ADC", "HiFi Capture", REG, 2, 1),
 
+e.g. stream widgets for AIF
+
+SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
+SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
+
 
 2.2 Path Domain Widgets
 -----------------------
@@ -121,12 +136,14 @@ If you dont want the mixer elements prefixed with the name of the mixer widget,
 you can use SND_SOC_DAPM_MIXER_NAMED_CTL instead. the parameters are the same
 as for SND_SOC_DAPM_MIXER.
 
-2.3 Platform/Machine domain Widgets
------------------------------------
+
+2.3 Machine domain Widgets
+--------------------------
 
 Machine widgets are different from codec widgets in that they don't have a
 codec register bit associated with them. A machine widget is assigned to each
-machine audio component (non codec) that can be independently powered. e.g.
+machine audio component (non codec or DSP) that can be independently
+powered. e.g.
 
  o Speaker Amp
  o Microphone Bias
@@ -146,12 +163,12 @@ static int spitz_mic_bias(struct snd_soc_dapm_widget* w, int event)
 SND_SOC_DAPM_MIC("Mic Jack", spitz_mic_bias),
 
 
-2.4 Codec Domain
-----------------
+2.4 Codec (BIAS) Domain
+-----------------------
 
-The codec power domain has no widgets and is handled by the codecs DAPM event
-handler. This handler is called when the codec powerstate is changed wrt to any
-stream event or by kernel PM events.
+The codec bias power domain has no widgets and is handled by the codecs DAPM
+event handler. This handler is called when the codec powerstate is changed wrt
+to any stream event or by kernel PM events.
 
 
 2.5 Virtual Widgets
@@ -169,15 +186,16 @@ After all the widgets have been defined, they can then be added to the DAPM
 subsystem individually with a call to snd_soc_dapm_new_control().
 
 
-3. Codec Widget Interconnections
-================================
+3. Codec/DSP Widget Interconnections
+====================================
 
-Widgets are connected to each other within the codec and machine by audio paths
-(called interconnections). Each interconnection must be defined in order to
-create a map of all audio paths between widgets.
+Widgets are connected to each other within the codec, platform and machine by
+audio paths (called interconnections). Each interconnection must be defined in
+order to create a map of all audio paths between widgets.
 
-This is easiest with a diagram of the codec (and schematic of the machine audio
-system), as it requires joining widgets together via their audio signal paths.
+This is easiest with a diagram of the codec or DSP (and schematic of the machine
+audio system), as it requires joining widgets together via their audio signal
+paths.
 
 e.g., from the WM8731 output mixer (wm8731.c)
 
@@ -247,16 +265,9 @@ machine and includes the codec. e.g.
  o Mic Jack
  o Codec Pins
 
-When a codec pin is NC it can be marked as not used with a call to
-
-snd_soc_dapm_set_endpoint(codec, "Widget Name", 0);
-
-The last argument is 0 for inactive and 1 for active. This way the pin and its
-input widget will never be powered up and consume power.
-
-This also applies to machine widgets. e.g. if a headphone is connected to a
-jack then the jack can be marked active. If the headphone is removed, then
-the headphone jack can be marked inactive.
+Endpoints are added to the DAPM graph so that their usage can be determined in
+order to save power. e.g. NC codecs pins will be switched OFF, unconnected
+jacks can also be switched OFF.
 
 
 5 DAPM Widget Events
diff --git a/Documentation/sound/alsa/soc/machine.txt b/Documentation/sound/alsa/soc/machine.txt
index d50c14df3411..74056dba52be 100644
--- a/Documentation/sound/alsa/soc/machine.txt
+++ b/Documentation/sound/alsa/soc/machine.txt
@@ -1,8 +1,10 @@
 ASoC Machine Driver
 ===================
 
-The ASoC machine (or board) driver is the code that glues together the platform
-and codec drivers.
+The ASoC machine (or board) driver is the code that glues together all the
+component drivers (e.g. codecs, platforms and DAIs). It also describes the
+relationships between each componnent which include audio paths, GPIOs,
+interrupts, clocking, jacks and voltage regulators.
 
 The machine driver can contain codec and platform specific code. It registers
 the audio subsystem with the kernel as a platform device and is represented by
diff --git a/Documentation/sound/alsa/soc/platform.txt b/Documentation/sound/alsa/soc/platform.txt
index d57efad37e0a..3a08a2c9150c 100644
--- a/Documentation/sound/alsa/soc/platform.txt
+++ b/Documentation/sound/alsa/soc/platform.txt
@@ -1,9 +1,9 @@
 ASoC Platform Driver
 ====================
 
-An ASoC platform driver can be divided into audio DMA and SoC DAI configuration
-and control. The platform drivers only target the SoC CPU and must have no board
-specific code.
+An ASoC platform driver class can be divided into audio DMA drivers, SoC DAI
+drivers and DSP drivers. The platform drivers only target the SoC CPU and must
+have no board specific code.
 
 Audio DMA
 =========
@@ -64,3 +64,16 @@ Each SoC DAI driver must provide the following features:-
  5) Suspend and resume (optional)
 
 Please see codec.txt for a description of items 1 - 4.
+
+
+SoC DSP Drivers
+===============
+
+Each SoC DSP driver usually supplies the following features :-
+
+ 1) DAPM graph
+ 2) Mixer controls
+ 3) DMA IO to/from DSP buffers (if applicable)
+ 4) Definition of DSP front end (FE) PCM devices.
+
+Please see DPCM.txt for a description of item 4.
diff --git a/Documentation/spi/spi-summary b/Documentation/spi/spi-summary
index 2331eb214146..f21edb983413 100644
--- a/Documentation/spi/spi-summary
+++ b/Documentation/spi/spi-summary
@@ -215,7 +215,7 @@ So for example arch/.../mach-*/board-*.c files might have code like:
         /* if your mach-* infrastructure doesn't support kernels that can
          * run on multiple boards, pdata wouldn't benefit from "__init".
          */
-        static struct mysoc_spi_data __initdata pdata = { ... };
+        static struct mysoc_spi_data pdata __initdata = { ... };
 
         static __init board_init(void)
         {
diff --git a/Documentation/sysctl/kernel.txt b/Documentation/sysctl/kernel.txt
index ab7d16efa96b..4273b2d71a27 100644
--- a/Documentation/sysctl/kernel.txt
+++ b/Documentation/sysctl/kernel.txt
@@ -182,6 +182,7 @@ core_pattern is used to specify a core dumpfile pattern name.
         %<NUL>  '%' is dropped
         %%      output one '%'
         %p      pid
+        %P      global pid (init PID namespace)
         %u      uid
         %g      gid
         %d      dump mode, matches PR_SET_DUMPABLE and
@@ -354,6 +355,82 @@ utilize.
 
 ==============================================================
 
+numa_balancing
+
+Enables/disables automatic page fault based NUMA memory
+balancing. Memory is moved automatically to nodes
+that access it often.
+
+Enables/disables automatic NUMA memory balancing. On NUMA machines, there
+is a performance penalty if remote memory is accessed by a CPU. When this
+feature is enabled the kernel samples what task thread is accessing memory
+by periodically unmapping pages and later trapping a page fault. At the
+time of the page fault, it is determined if the data being accessed should
+be migrated to a local memory node.
+
+The unmapping of pages and trapping faults incur additional overhead that
+ideally is offset by improved memory locality but there is no universal
+guarantee. If the target workload is already bound to NUMA nodes then this
+feature should be disabled. Otherwise, if the system overhead from the
+feature is too high then the rate the kernel samples for NUMA hinting
+faults may be controlled by the numa_balancing_scan_period_min_ms,
+numa_balancing_scan_delay_ms, numa_balancing_scan_period_max_ms,
+numa_balancing_scan_size_mb, numa_balancing_settle_count sysctls and
+numa_balancing_migrate_deferred.
+
+==============================================================
+
+numa_balancing_scan_period_min_ms, numa_balancing_scan_delay_ms,
+numa_balancing_scan_period_max_ms, numa_balancing_scan_size_mb
+
+Automatic NUMA balancing scans tasks address space and unmaps pages to
+detect if pages are properly placed or if the data should be migrated to a
+memory node local to where the task is running.  Every "scan delay" the task
+scans the next "scan size" number of pages in its address space. When the
+end of the address space is reached the scanner restarts from the beginning.
+
+In combination, the "scan delay" and "scan size" determine the scan rate.
+When "scan delay" decreases, the scan rate increases.  The scan delay and
+hence the scan rate of every task is adaptive and depends on historical
+behaviour. If pages are properly placed then the scan delay increases,
+otherwise the scan delay decreases.  The "scan size" is not adaptive but
+the higher the "scan size", the higher the scan rate.
+
+Higher scan rates incur higher system overhead as page faults must be
+trapped and potentially data must be migrated. However, the higher the scan
+rate, the more quickly a tasks memory is migrated to a local node if the
+workload pattern changes and minimises performance impact due to remote
+memory accesses. These sysctls control the thresholds for scan delays and
+the number of pages scanned.
+
+numa_balancing_scan_period_min_ms is the minimum time in milliseconds to
+scan a tasks virtual memory. It effectively controls the maximum scanning
+rate for each task.
+
+numa_balancing_scan_delay_ms is the starting "scan delay" used for a task
+when it initially forks.
+
+numa_balancing_scan_period_max_ms is the maximum time in milliseconds to
+scan a tasks virtual memory. It effectively controls the minimum scanning
+rate for each task.
+
+numa_balancing_scan_size_mb is how many megabytes worth of pages are
+scanned for a given scan.
+
+numa_balancing_settle_count is how many scan periods must complete before
+the schedule balancer stops pushing the task towards a preferred node. This
+gives the scheduler a chance to place the task on an alternative node if the
+preferred node is overloaded.
+
+numa_balancing_migrate_deferred is how many page migrations get skipped
+unconditionally, after a page migration is skipped because a page is shared
+with other tasks. This reduces page migration overhead, and determines
+how much stronger the "move task near its memory" policy scheduler becomes,
+versus the "move memory near its task" memory management policy, for workloads
+with shared memory.
+
+==============================================================
+
 osrelease, ostype & version:
 
 # cat osrelease
diff --git a/Documentation/sysctl/net.txt b/Documentation/sysctl/net.txt
index d569f2a424d5..9a0319a82470 100644
--- a/Documentation/sysctl/net.txt
+++ b/Documentation/sysctl/net.txt
@@ -50,6 +50,19 @@ The maximum number of packets that kernel can handle on a NAPI interrupt,
 it's a Per-CPU variable.
 Default: 64
 
+default_qdisc
+--------------
+
+The default queuing discipline to use for network devices. This allows
+overriding the default queue discipline of pfifo_fast with an
+alternative. Since the default queuing discipline is created with the
+no additional parameters so is best suited to queuing disciplines that
+work well without configuration like stochastic fair queue (sfq),
+CoDel (codel) or fair queue CoDel (fq_codel). Don't use queuing disciplines
+like Hierarchical Token Bucket or Deficit Round Robin which require setting
+up classes and bandwidths.
+Default: pfifo_fast
+
 busy_read
 ----------------
 Low latency busy poll timeout for socket reads. (needs CONFIG_NET_RX_BUSY_POLL)
diff --git a/Documentation/sysctl/vm.txt b/Documentation/sysctl/vm.txt
index 36ecc26c7433..79a797eb3e87 100644
--- a/Documentation/sysctl/vm.txt
+++ b/Documentation/sysctl/vm.txt
@@ -200,17 +200,25 @@ fragmentation index is <= extfrag_threshold. The default value is 500.
 
 hugepages_treat_as_movable
 
-This parameter is only useful when kernelcore= is specified at boot time to
-create ZONE_MOVABLE for pages that may be reclaimed or migrated. Huge pages
-are not movable so are not normally allocated from ZONE_MOVABLE. A non-zero
-value written to hugepages_treat_as_movable allows huge pages to be allocated
-from ZONE_MOVABLE.
-
-Once enabled, the ZONE_MOVABLE is treated as an area of memory the huge
-pages pool can easily grow or shrink within. Assuming that applications are
-not running that mlock() a lot of memory, it is likely the huge pages pool
-can grow to the size of ZONE_MOVABLE by repeatedly entering the desired value
-into nr_hugepages and triggering page reclaim.
+This parameter controls whether we can allocate hugepages from ZONE_MOVABLE
+or not. If set to non-zero, hugepages can be allocated from ZONE_MOVABLE.
+ZONE_MOVABLE is created when kernel boot parameter kernelcore= is specified,
+so this parameter has no effect if used without kernelcore=.
+
+Hugepage migration is now available in some situations which depend on the
+architecture and/or the hugepage size. If a hugepage supports migration,
+allocation from ZONE_MOVABLE is always enabled for the hugepage regardless
+of the value of this parameter.
+IOW, this parameter affects only non-migratable hugepages.
+
+Assuming that hugepages are not migratable in your system, one usecase of
+this parameter is that users can make hugepage pool more extensible by
+enabling the allocation from ZONE_MOVABLE. This is because on ZONE_MOVABLE
+page reclaim/migration/compaction work more and you can get contiguous
+memory more likely. Note that using ZONE_MOVABLE for non-migratable
+hugepages can do harm to other features like memory hotremove (because
+memory hotremove expects that memory blocks on ZONE_MOVABLE are always
+removable,) so it's a trade-off responsible for the users.
 
 ==============================================================
 
diff --git a/Documentation/sysfs-rules.txt b/Documentation/sysfs-rules.txt
index c1a1fd636bf9..a5f985ee1822 100644
--- a/Documentation/sysfs-rules.txt
+++ b/Documentation/sysfs-rules.txt
@@ -47,7 +47,7 @@ versions of the sysfs interface.
         at device creation and removal
       - the unique key to the device at that point in time
       - the kernel's path to the device directory without the leading
-        /sys, and always starting with with a slash
+        /sys, and always starting with a slash
       - all elements of a devpath must be real directories. Symlinks
         pointing to /sys/devices must always be resolved to their real
         target and the target path must be used to access the device.
diff --git a/Documentation/sysrq.txt b/Documentation/sysrq.txt
index 8cb4d7842a5f..0e307c94809a 100644
--- a/Documentation/sysrq.txt
+++ b/Documentation/sysrq.txt
@@ -11,27 +11,29 @@ regardless of whatever else it is doing, unless it is completely locked up.
 You need to say "yes" to 'Magic SysRq key (CONFIG_MAGIC_SYSRQ)' when
 configuring the kernel. When running a kernel with SysRq compiled in,
 /proc/sys/kernel/sysrq controls the functions allowed to be invoked via
-the SysRq key. By default the file contains 1 which means that every
-possible SysRq request is allowed (in older versions SysRq was disabled
-by default, and you were required to specifically enable it at run-time
-but this is not the case any more). Here is the list of possible values
-in /proc/sys/kernel/sysrq:
+the SysRq key. The default value in this file is set by the
+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE config symbol, which itself defaults
+to 1. Here is the list of possible values in /proc/sys/kernel/sysrq:
    0 - disable sysrq completely
    1 - enable all functions of sysrq
   >1 - bitmask of allowed sysrq functions (see below for detailed function
        description):
-          2 - enable control of console logging level
-          4 - enable control of keyboard (SAK, unraw)
-          8 - enable debugging dumps of processes etc.
-         16 - enable sync command
-         32 - enable remount read-only
-         64 - enable signalling of processes (term, kill, oom-kill)
-        128 - allow reboot/poweroff
-        256 - allow nicing of all RT tasks
+          2 =   0x2 - enable control of console logging level
+          4 =   0x4 - enable control of keyboard (SAK, unraw)
+          8 =   0x8 - enable debugging dumps of processes etc.
+         16 =  0x10 - enable sync command
+         32 =  0x20 - enable remount read-only
+         64 =  0x40 - enable signalling of processes (term, kill, oom-kill)
+        128 =  0x80 - allow reboot/poweroff
+        256 = 0x100 - allow nicing of all RT tasks
 
 You can set the value in the file by the following command:
     echo "number" >/proc/sys/kernel/sysrq
 
+The number may be written here either as decimal or as hexadecimal
+with the 0x prefix. CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE must always be
+written in hexadecimal.
+
 Note that the value of /proc/sys/kernel/sysrq influences only the invocation
 via a keyboard. Invocation of any operation via /proc/sysrq-trigger is always
 allowed (by a user with admin privileges).
diff --git a/Documentation/target/tcm_mod_builder.py b/Documentation/target/tcm_mod_builder.py
index 3fe0d812dcec..54d29c1320ed 100755
--- a/Documentation/target/tcm_mod_builder.py
+++ b/Documentation/target/tcm_mod_builder.py
@@ -300,7 +300,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
         buf += "        int ret;\n\n"
         buf += "        if (strstr(name, \"tpgt_\") != name)\n"
         buf += "                return ERR_PTR(-EINVAL);\n"
-        buf += "        if (strict_strtoul(name + 5, 10, &tpgt) || tpgt > UINT_MAX)\n"
+        buf += "        if (kstrtoul(name + 5, 10, &tpgt) || tpgt > UINT_MAX)\n"
         buf += "                return ERR_PTR(-EINVAL);\n\n"
         buf += "        tpg = kzalloc(sizeof(struct " + fabric_mod_name + "_tpg), GFP_KERNEL);\n"
         buf += "        if (!tpg) {\n"
diff --git a/Documentation/thermal/exynos_thermal b/Documentation/thermal/exynos_thermal
index 2b46f67b1ccb..9010c4416967 100644
--- a/Documentation/thermal/exynos_thermal
+++ b/Documentation/thermal/exynos_thermal
@@ -1,17 +1,17 @@
-Kernel driver exynos4_tmu
+Kernel driver exynos_tmu
 =================
 
 Supported chips:
-* ARM SAMSUNG EXYNOS4 series of SoC
-  Prefix: 'exynos4-tmu'
+* ARM SAMSUNG EXYNOS4, EXYNOS5 series of SoC
   Datasheet: Not publicly available
 
 Authors: Donggeun Kim <dg77.kim@samsung.com>
+Authors: Amit Daniel <amit.daniel@samsung.com>
 
-Description
------------
+TMU controller Description:
+---------------------------
 
-This driver allows to read temperature inside SAMSUNG EXYNOS4 series of SoC.
+This driver allows to read temperature inside SAMSUNG EXYNOS4/5 series of SoC.
 
 The chip only exposes the measured 8-bit temperature code value
 through a register.
@@ -34,9 +34,9 @@ The three equations are:
   TI2: Trimming info for 85 degree Celsius (stored at TRIMINFO register)
        Temperature code measured at 85 degree Celsius which is unchanged
 
-TMU(Thermal Management Unit) in EXYNOS4 generates interrupt
+TMU(Thermal Management Unit) in EXYNOS4/5 generates interrupt
 when temperature exceeds pre-defined levels.
-The maximum number of configurable threshold is four.
+The maximum number of configurable threshold is five.
 The threshold levels are defined as follows:
   Level_0: current temperature > trigger_level_0 + threshold
   Level_1: current temperature > trigger_level_1 + threshold
@@ -47,6 +47,31 @@ The threshold levels are defined as follows:
   through the corresponding registers.
 
 When an interrupt occurs, this driver notify kernel thermal framework
-with the function exynos4_report_trigger.
+with the function exynos_report_trigger.
 Although an interrupt condition for level_0 can be set,
 it can be used to synchronize the cooling action.
+
+TMU driver description:
+-----------------------
+
+The exynos thermal driver is structured as,
+
+                                        Kernel Core thermal framework
+                                (thermal_core.c, step_wise.c, cpu_cooling.c)
+                                                                ^
+                                                                |
+                                                                |
+TMU configuration data -------> TMU Driver  <------> Exynos Core thermal wrapper
+(exynos_tmu_data.c)           (exynos_tmu.c)       (exynos_thermal_common.c)
+(exynos_tmu_data.h)           (exynos_tmu.h)       (exynos_thermal_common.h)
+
+a) TMU configuration data: This consist of TMU register offsets/bitfields
+                described through structure exynos_tmu_registers. Also several
+                other platform data (struct exynos_tmu_platform_data) members
+                are used to configure the TMU.
+b) TMU driver: This component initialises the TMU controller and sets different
+                thresholds. It invokes core thermal implementation with the call
+                exynos_report_trigger.
+c) Exynos Core thermal wrapper: This provides 3 wrapper function to use the
+                Kernel core thermal framework. They are exynos_unregister_thermal,
+                exynos_register_thermal and exynos_report_trigger.
diff --git a/Documentation/thermal/sysfs-api.txt b/Documentation/thermal/sysfs-api.txt
index a71bd5b90fe8..87519cb379ee 100644
--- a/Documentation/thermal/sysfs-api.txt
+++ b/Documentation/thermal/sysfs-api.txt
@@ -134,6 +134,13 @@ temperature) and throttle appropriate devices.
                this thermal zone and cdev, for a particular trip point.
                If nth bit is set, then the cdev and thermal zone are bound
                for trip point n.
+    .limits: This is an array of cooling state limits. Must have exactly
+         2 * thermal_zone.number_of_trip_points. It is an array consisting
+         of tuples <lower-state upper-state> of state limits. Each trip
+         will be associated with one state limit tuple when binding.
+         A NULL pointer means <THERMAL_NO_LIMITS THERMAL_NO_LIMITS>
+         on all trips. These limits are used when binding a cdev to a
+         trip point.
     .match: This call back returns success(0) if the 'tz and cdev' need to
             be bound, as per platform data.
 1.4.2 struct thermal_zone_params
@@ -142,6 +149,11 @@ temperature) and throttle appropriate devices.
     This is an optional feature where some platforms can choose not to
     provide this data.
     .governor_name: Name of the thermal governor used for this zone
+    .no_hwmon: a boolean to indicate if the thermal to hwmon sysfs interface
+               is required. when no_hwmon == false, a hwmon sysfs interface
+               will be created. when no_hwmon == true, nothing will be done.
+               In case the thermal_zone_params is NULL, the hwmon interface
+               will be created (for backward compatibility).
     .num_tbps: Number of thermal_bind_params entries for this zone
     .tbp: thermal_bind_params entries
 
diff --git a/Documentation/timers/NO_HZ.txt b/Documentation/timers/NO_HZ.txt
index 88697584242b..cca122f25120 100644
--- a/Documentation/timers/NO_HZ.txt
+++ b/Documentation/timers/NO_HZ.txt
@@ -24,8 +24,8 @@ There are three main ways of managing scheduling-clock interrupts
         workloads, you will normally -not- want this option.
 
 These three cases are described in the following three sections, followed
-by a third section on RCU-specific considerations and a fourth and final
-section listing known issues.
+by a third section on RCU-specific considerations, a fourth section
+discussing testing, and a fifth and final section listing known issues.
 
 
 NEVER OMIT SCHEDULING-CLOCK TICKS
@@ -121,14 +121,15 @@ boot parameter specifies the adaptive-ticks CPUs.  For example,
 "nohz_full=1,6-8" says that CPUs 1, 6, 7, and 8 are to be adaptive-ticks
 CPUs.  Note that you are prohibited from marking all of the CPUs as
 adaptive-tick CPUs:  At least one non-adaptive-tick CPU must remain
-online to handle timekeeping tasks in order to ensure that system calls
-like gettimeofday() returns accurate values on adaptive-tick CPUs.
-(This is not an issue for CONFIG_NO_HZ_IDLE=y because there are no
-running user processes to observe slight drifts in clock rate.)
-Therefore, the boot CPU is prohibited from entering adaptive-ticks
-mode.  Specifying a "nohz_full=" mask that includes the boot CPU will
-result in a boot-time error message, and the boot CPU will be removed
-from the mask.
+online to handle timekeeping tasks in order to ensure that system
+calls like gettimeofday() returns accurate values on adaptive-tick CPUs.
+(This is not an issue for CONFIG_NO_HZ_IDLE=y because there are no running
+user processes to observe slight drifts in clock rate.)  Therefore, the
+boot CPU is prohibited from entering adaptive-ticks mode.  Specifying a
+"nohz_full=" mask that includes the boot CPU will result in a boot-time
+error message, and the boot CPU will be removed from the mask.  Note that
+this means that your system must have at least two CPUs in order for
+CONFIG_NO_HZ_FULL=y to do anything for you.
 
 Alternatively, the CONFIG_NO_HZ_FULL_ALL=y Kconfig parameter specifies
 that all CPUs other than the boot CPU are adaptive-ticks CPUs.  This
@@ -232,6 +233,29 @@ scheduler will decide where to run them, which might or might not be
 where you want them to run.
 
 
+TESTING
+
+So you enable all the OS-jitter features described in this document,
+but do not see any change in your workload's behavior.  Is this because
+your workload isn't affected that much by OS jitter, or is it because
+something else is in the way?  This section helps answer this question
+by providing a simple OS-jitter test suite, which is available on branch
+master of the following git archive:
+
+git://git.kernel.org/pub/scm/linux/kernel/git/frederic/dynticks-testing.git
+
+Clone this archive and follow the instructions in the README file.
+This test procedure will produce a trace that will allow you to evaluate
+whether or not you have succeeded in removing OS jitter from your system.
+If this trace shows that you have removed OS jitter as much as is
+possible, then you can conclude that your workload is not all that
+sensitive to OS jitter.
+
+Note: this test requires that your system have at least two CPUs.
+We do not currently have a good way to remove OS jitter from single-CPU
+systems.
+
+
 KNOWN ISSUES
 
 o       Dyntick-idle slows transitions to and from idle slightly.
diff --git a/Documentation/tpm/xen-tpmfront.txt b/Documentation/tpm/xen-tpmfront.txt
new file mode 100644
index 000000000000..69346de87ff3
--- /dev/null
+++ b/Documentation/tpm/xen-tpmfront.txt
@@ -0,0 +1,113 @@
+Virtual TPM interface for Xen
+
+Authors: Matthew Fioravante (JHUAPL), Daniel De Graaf (NSA)
+
+This document describes the virtual Trusted Platform Module (vTPM) subsystem for
+Xen. The reader is assumed to have familiarity with building and installing Xen,
+Linux, and a basic understanding of the TPM and vTPM concepts.
+
+INTRODUCTION
+
+The goal of this work is to provide a TPM functionality to a virtual guest
+operating system (in Xen terms, a DomU).  This allows programs to interact with
+a TPM in a virtual system the same way they interact with a TPM on the physical
+system.  Each guest gets its own unique, emulated, software TPM.  However, each
+of the vTPM's secrets (Keys, NVRAM, etc) are managed by a vTPM Manager domain,
+which seals the secrets to the Physical TPM.  If the process of creating each of
+these domains (manager, vTPM, and guest) is trusted, the vTPM subsystem extends
+the chain of trust rooted in the hardware TPM to virtual machines in Xen. Each
+major component of vTPM is implemented as a separate domain, providing secure
+separation guaranteed by the hypervisor. The vTPM domains are implemented in
+mini-os to reduce memory and processor overhead.
+
+This mini-os vTPM subsystem was built on top of the previous vTPM work done by
+IBM and Intel corporation.
+
+
+DESIGN OVERVIEW
+---------------
+
+The architecture of vTPM is described below:
+
++------------------+
+|    Linux DomU    | ...
+|       |  ^       |
+|       v  |       |
+|   xen-tpmfront   |
++------------------+
+        |  ^
+        v  |
++------------------+
+| mini-os/tpmback  |
+|       |  ^       |
+|       v  |       |
+|  vtpm-stubdom    | ...
+|       |  ^       |
+|       v  |       |
+| mini-os/tpmfront |
++------------------+
+        |  ^
+        v  |
++------------------+
+| mini-os/tpmback  |
+|       |  ^       |
+|       v  |       |
+| vtpmmgr-stubdom  |
+|       |  ^       |
+|       v  |       |
+| mini-os/tpm_tis  |
++------------------+
+        |  ^
+        v  |
++------------------+
+|   Hardware TPM   |
++------------------+
+
+ * Linux DomU: The Linux based guest that wants to use a vTPM. There may be
+               more than one of these.
+
+ * xen-tpmfront.ko: Linux kernel virtual TPM frontend driver. This driver
+                    provides vTPM access to a Linux-based DomU.
+
+ * mini-os/tpmback: Mini-os TPM backend driver. The Linux frontend driver
+                    connects to this backend driver to facilitate communications
+                    between the Linux DomU and its vTPM. This driver is also
+                    used by vtpmmgr-stubdom to communicate with vtpm-stubdom.
+
+ * vtpm-stubdom: A mini-os stub domain that implements a vTPM. There is a
+                 one to one mapping between running vtpm-stubdom instances and
+                 logical vtpms on the system. The vTPM Platform Configuration
+                 Registers (PCRs) are normally all initialized to zero.
+
+ * mini-os/tpmfront: Mini-os TPM frontend driver. The vTPM mini-os domain
+                     vtpm-stubdom uses this driver to communicate with
+                     vtpmmgr-stubdom. This driver is also used in mini-os
+                     domains such as pv-grub that talk to the vTPM domain.
+
+ * vtpmmgr-stubdom: A mini-os domain that implements the vTPM manager. There is
+                    only one vTPM manager and it should be running during the
+                    entire lifetime of the machine.  This domain regulates
+                    access to the physical TPM on the system and secures the
+                    persistent state of each vTPM.
+
+ * mini-os/tpm_tis: Mini-os TPM version 1.2 TPM Interface Specification (TIS)
+                    driver. This driver used by vtpmmgr-stubdom to talk directly to
+                    the hardware TPM. Communication is facilitated by mapping
+                    hardware memory pages into vtpmmgr-stubdom.
+
+ * Hardware TPM: The physical TPM that is soldered onto the motherboard.
+
+
+INTEGRATION WITH XEN
+--------------------
+
+Support for the vTPM driver was added in Xen using the libxl toolstack in Xen
+4.3.  See the Xen documentation (docs/misc/vtpm.txt) for details on setting up
+the vTPM and vTPM Manager stub domains.  Once the stub domains are running, a
+vTPM device is set up in the same manner as a disk or network device in the
+domain's configuration file.
+
+In order to use features such as IMA that require a TPM to be loaded prior to
+the initrd, the xen-tpmfront driver must be compiled in to the kernel.  If not
+using such features, the driver can be compiled as a module and will be loaded
+as usual.
diff --git a/Documentation/trace/ftrace.txt b/Documentation/trace/ftrace.txt
index b937c6e2163c..bd365988e8d8 100644
--- a/Documentation/trace/ftrace.txt
+++ b/Documentation/trace/ftrace.txt
@@ -655,7 +655,11 @@ explains which is which.
                   read the irq flags variable, an 'X' will always
                   be printed here.
 
-  need-resched: 'N' task need_resched is set, '.' otherwise.
+  need-resched:
+        'N' both TIF_NEED_RESCHED and PREEMPT_NEED_RESCHED is set,
+        'n' only TIF_NEED_RESCHED is set,
+        'p' only PREEMPT_NEED_RESCHED is set,
+        '.' otherwise.
 
   hardirq/softirq:
         'H' - hard irq occurred inside a softirq.
@@ -735,7 +739,7 @@ Here are the available options:
                  function as well as the function being traced.
 
   print-parent:
-   bash-4000  [01]  1477.606694: simple_strtoul <-strict_strtoul
+   bash-4000  [01]  1477.606694: simple_strtoul <-kstrtoul
 
   noprint-parent:
    bash-4000  [01]  1477.606694: simple_strtoul
@@ -759,7 +763,7 @@ Here are the available options:
             latency-format option is enabled.
 
     bash  4000 1 0 00000000 00010a95 [58127d26] 1720.415ms \
-    (+0.000ms): simple_strtoul (strict_strtoul)
+    (+0.000ms): simple_strtoul (kstrtoul)
 
   raw - This will display raw numbers. This option is best for
         use with user applications that can translate the raw
diff --git a/Documentation/trace/tracepoints.txt b/Documentation/trace/tracepoints.txt
index da49437d5aeb..ac4170dd0f24 100644
--- a/Documentation/trace/tracepoints.txt
+++ b/Documentation/trace/tracepoints.txt
@@ -40,7 +40,13 @@ Two elements are required for tracepoints :
 
 In order to use tracepoints, you should include linux/tracepoint.h.
 
-In include/trace/subsys.h :
+In include/trace/events/subsys.h :
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM subsys
+
+#if !defined(_TRACE_SUBSYS_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_SUBSYS_H
 
 #include <linux/tracepoint.h>
 
@@ -48,10 +54,16 @@ DECLARE_TRACE(subsys_eventname,
         TP_PROTO(int firstarg, struct task_struct *p),
         TP_ARGS(firstarg, p));
 
+#endif /* _TRACE_SUBSYS_H */
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
+
 In subsys/file.c (where the tracing statement must be added) :
 
-#include <trace/subsys.h>
+#include <trace/events/subsys.h>
 
+#define CREATE_TRACE_POINTS
 DEFINE_TRACE(subsys_eventname);
 
 void somefct(void)
@@ -72,6 +84,9 @@ Where :
 - TP_ARGS(firstarg, p) are the parameters names, same as found in the
   prototype.
 
+- if you use the header in multiple source files, #define CREATE_TRACE_POINTS
+  should appear only in one source file.
+
 Connecting a function (probe) to a tracepoint is done by providing a
 probe (function to call) for the specific tracepoint through
 register_trace_subsys_eventname().  Removing a probe is done through
diff --git a/Documentation/usb/URB.txt b/Documentation/usb/URB.txt
index 00d2c644068e..50da0d455444 100644
--- a/Documentation/usb/URB.txt
+++ b/Documentation/usb/URB.txt
@@ -195,13 +195,12 @@ by the completion handler.
 
 The handler is of the following type:
 
-        typedef void (*usb_complete_t)(struct urb *, struct pt_regs *)
+        typedef void (*usb_complete_t)(struct urb *)
 
-I.e., it gets the URB that caused the completion call, plus the
-register values at the time of the corresponding interrupt (if any).
-In the completion handler, you should have a look at urb->status to
-detect any USB errors. Since the context parameter is included in the URB,
-you can pass information to the completion handler. 
+I.e., it gets the URB that caused the completion call. In the completion
+handler, you should have a look at urb->status to detect any USB errors.
+Since the context parameter is included in the URB, you can pass
+information to the completion handler.
 
 Note that even when an error (or unlink) is reported, data may have been
 transferred.  That's because USB transfers are packetized; it might take
@@ -210,12 +209,12 @@ have transferred successfully before the completion was called.
 
 
 NOTE:  ***** WARNING *****
-NEVER SLEEP IN A COMPLETION HANDLER.  These are normally called
-during hardware interrupt processing.  If you can, defer substantial
-work to a tasklet (bottom half) to keep system latencies low.  You'll
-probably need to use spinlocks to protect data structures you manipulate
-in completion handlers.
+NEVER SLEEP IN A COMPLETION HANDLER.  These are often called in atomic
+context.
 
+In the current kernel, completion handlers run with local interrupts
+disabled, but in the future this will be changed, so don't assume that
+local IRQs are always disabled inside completion handlers.
 
 1.8. How to do isochronous (ISO) transfers?
 
diff --git a/Documentation/usb/proc_usb_info.txt b/Documentation/usb/proc_usb_info.txt
index c9c3f0f5ad7b..98be91982677 100644
--- a/Documentation/usb/proc_usb_info.txt
+++ b/Documentation/usb/proc_usb_info.txt
@@ -54,9 +54,12 @@ it and 002/048 sometime later.
 
 These files can be read as binary data.  The binary data consists
 of first the device descriptor, then the descriptors for each
-configuration of the device.  Multi-byte fields in the device and
-configuration descriptors, but not other descriptors, are converted
-to host endianness by the kernel.  This information is also shown
+configuration of the device.  Multi-byte fields in the device descriptor
+are converted to host endianness by the kernel.  The configuration
+descriptors are in bus endian format! The configuration descriptor
+are wTotalLength bytes apart. If a device returns less configuration
+descriptor data than indicated by wTotalLength there will be a hole in
+the file for the missing bytes.  This information is also shown
 in text form by the /proc/bus/usb/devices file, described later.
 
 These files may also be used to write user-level drivers for the USB
diff --git a/Documentation/vfio.txt b/Documentation/vfio.txt
index d7993dcf8537..b9ca02370d46 100644
--- a/Documentation/vfio.txt
+++ b/Documentation/vfio.txt
@@ -167,8 +167,8 @@ group and can access them as follows:
         int container, group, device, i;
         struct vfio_group_status group_status =
                                         { .argsz = sizeof(group_status) };
-        struct vfio_iommu_x86_info iommu_info = { .argsz = sizeof(iommu_info) };
-        struct vfio_iommu_x86_dma_map dma_map = { .argsz = sizeof(dma_map) };
+        struct vfio_iommu_type1_info iommu_info = { .argsz = sizeof(iommu_info) };
+        struct vfio_iommu_type1_dma_map dma_map = { .argsz = sizeof(dma_map) };
         struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
 
         /* Create a new container */
@@ -193,7 +193,7 @@ group and can access them as follows:
         ioctl(group, VFIO_GROUP_SET_CONTAINER, &container);
 
         /* Enable the IOMMU model we want */
-        ioctl(container, VFIO_SET_IOMMU, VFIO_TYPE1_IOMMU)
+        ioctl(container, VFIO_SET_IOMMU, VFIO_TYPE1_IOMMU);
 
         /* Get addition IOMMU info */
         ioctl(container, VFIO_IOMMU_GET_INFO, &iommu_info);
@@ -229,7 +229,7 @@ group and can access them as follows:
 
                 irq.index = i;
 
-                ioctl(device, VFIO_DEVICE_GET_IRQ_INFO, &reg);
+                ioctl(device, VFIO_DEVICE_GET_IRQ_INFO, &irq);
 
                 /* Setup IRQs... eventfds, VFIO_DEVICE_SET_IRQS */
         }
diff --git a/Documentation/video4linux/v4l2-controls.txt b/Documentation/video4linux/v4l2-controls.txt
index 676f87366025..06cf3ac83631 100644
--- a/Documentation/video4linux/v4l2-controls.txt
+++ b/Documentation/video4linux/v4l2-controls.txt
@@ -124,26 +124,27 @@ You add non-menu controls by calling v4l2_ctrl_new_std:
                         const struct v4l2_ctrl_ops *ops,
                         u32 id, s32 min, s32 max, u32 step, s32 def);
 
-Menu controls are added by calling v4l2_ctrl_new_std_menu:
+Menu and integer menu controls are added by calling v4l2_ctrl_new_std_menu:
 
         struct v4l2_ctrl *v4l2_ctrl_new_std_menu(struct v4l2_ctrl_handler *hdl,
                         const struct v4l2_ctrl_ops *ops,
                         u32 id, s32 max, s32 skip_mask, s32 def);
 
-Or alternatively for integer menu controls, by calling v4l2_ctrl_new_int_menu:
+Menu controls with a driver specific menu are added by calling
+v4l2_ctrl_new_std_menu_items:
+
+       struct v4l2_ctrl *v4l2_ctrl_new_std_menu_items(
+                       struct v4l2_ctrl_handler *hdl,
+                       const struct v4l2_ctrl_ops *ops, u32 id, s32 max,
+                       s32 skip_mask, s32 def, const char * const *qmenu);
+
+Integer menu controls with a driver specific menu can be added by calling
+v4l2_ctrl_new_int_menu:
 
         struct v4l2_ctrl *v4l2_ctrl_new_int_menu(struct v4l2_ctrl_handler *hdl,
                         const struct v4l2_ctrl_ops *ops,
                         u32 id, s32 max, s32 def, const s64 *qmenu_int);
 
-Standard menu controls with a driver specific menu are added by calling
-v4l2_ctrl_new_std_menu_items:
-
-        struct v4l2_ctrl *v4l2_ctrl_new_std_menu_items(
-                struct v4l2_ctrl_handler *hdl,
-                const struct v4l2_ctrl_ops *ops, u32 id, s32 max,
-                s32 skip_mask, s32 def, const char * const *qmenu);
-
 These functions are typically called right after the v4l2_ctrl_handler_init:
 
         static const s64 exp_bias_qmenu[] = {
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
index ef925eaa1460..858aecf21db2 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -53,7 +53,7 @@ incompatible change are allowed.  However, there is an extension
 facility that allows backward-compatible extensions to the API to be
 queried and used.
 
-The extension mechanism is not based on on the Linux version number.
+The extension mechanism is not based on the Linux version number.
 Instead, kvm defines extension identifiers and a facility to query
 whether a particular extension identifier is available.  If it is, a
 set of ioctls is available for application use.
diff --git a/Documentation/virtual/kvm/cpuid.txt b/Documentation/virtual/kvm/cpuid.txt
index 83afe65d4966..22ff659bc0fb 100644
--- a/Documentation/virtual/kvm/cpuid.txt
+++ b/Documentation/virtual/kvm/cpuid.txt
@@ -43,6 +43,10 @@ KVM_FEATURE_CLOCKSOURCE2           ||     3 || kvmclock available at msrs
 KVM_FEATURE_ASYNC_PF               ||     4 || async pf can be enabled by
                                    ||       || writing to msr 0x4b564d02
 ------------------------------------------------------------------------------
+KVM_FEATURE_PV_UNHALT              ||     7 || guest checks this feature bit
+                                   ||       || before enabling paravirtualized
+                                   ||       || spinlock support.
+------------------------------------------------------------------------------
 KVM_FEATURE_CLOCKSOURCE_STABLE_BIT ||    24 || host will warn if no guest-side
                                    ||       || per-cpu warps are expected in
                                    ||       || kvmclock.
diff --git a/Documentation/virtual/kvm/hypercalls.txt b/Documentation/virtual/kvm/hypercalls.txt
index ea113b5d87a4..022198e389d7 100644
--- a/Documentation/virtual/kvm/hypercalls.txt
+++ b/Documentation/virtual/kvm/hypercalls.txt
@@ -64,3 +64,17 @@ Purpose: To enable communication between the hypervisor and guest there is a
 shared page that contains parts of supervisor visible register state.
 The guest can map this shared page to access its supervisor register through
 memory using this hypercall.
+
+5. KVM_HC_KICK_CPU
+------------------------
+Architecture: x86
+Status: active
+Purpose: Hypercall used to wakeup a vcpu from HLT state
+Usage example : A vcpu of a paravirtualized guest that is busywaiting in guest
+kernel mode for an event to occur (ex: a spinlock to become available) can
+execute HLT instruction once it has busy-waited for more than a threshold
+time-interval. Execution of HLT instruction would cause the hypervisor to put
+the vcpu to sleep until occurence of an appropriate event. Another vcpu of the
+same guest can wakeup the sleeping vcpu by issuing KVM_HC_KICK_CPU hypercall,
+specifying APIC ID (a1) of the vcpu to be woken up. An additional argument (a0)
+is used in the hypercall for future use.
diff --git a/Documentation/vm/hugetlbpage.txt b/Documentation/vm/hugetlbpage.txt
index 4ac359b7aa17..bdd4bb97fff7 100644
--- a/Documentation/vm/hugetlbpage.txt
+++ b/Documentation/vm/hugetlbpage.txt
@@ -165,6 +165,7 @@ which function as described above for the default huge page-sized case.
 
 
 Interaction of Task Memory Policy with Huge Page Allocation/Freeing
+===================================================================
 
 Whether huge pages are allocated and freed via the /proc interface or
 the /sysfs interface using the nr_hugepages_mempolicy attribute, the NUMA
@@ -229,6 +230,7 @@ resulting effect on persistent huge page allocation is as follows:
    of huge pages over all on-lines nodes with memory.
 
 Per Node Hugepages Attributes
+=============================
 
 A subset of the contents of the root huge page control directory in sysfs,
 described above, will be replicated under each the system device of each
@@ -258,6 +260,7 @@ applied, from which node the huge page allocation will be attempted.
 
 
 Using Huge Pages
+================
 
 If the user applications are going to request huge pages using mmap system
 call, then it is required that system administrator mount a file system of
@@ -296,20 +299,16 @@ calls, though the mount of filesystem will be required for using mmap calls
 without MAP_HUGETLB.  For an example of how to use mmap with MAP_HUGETLB see
 map_hugetlb.c.
 
-*******************************************************************
+Examples
+========
 
-/*
- * map_hugetlb: see tools/testing/selftests/vm/map_hugetlb.c
- */
+1) map_hugetlb: see tools/testing/selftests/vm/map_hugetlb.c
 
-*******************************************************************
+2) hugepage-shm:  see tools/testing/selftests/vm/hugepage-shm.c
 
-/*
- * hugepage-shm:  see tools/testing/selftests/vm/hugepage-shm.c
- */
+3) hugepage-mmap:  see tools/testing/selftests/vm/hugepage-mmap.c
 
-*******************************************************************
-
-/*
- * hugepage-mmap:  see tools/testing/selftests/vm/hugepage-mmap.c
- */
+4) The libhugetlbfs (http://libhugetlbfs.sourceforge.net) library provides a
+   wide range of userspace tools to help with huge page usability, environment
+   setup, and control. Furthermore it provides useful test cases that should be
+   used when modifying code to ensure no regressions are introduced.
diff --git a/Documentation/vm/soft-dirty.txt b/Documentation/vm/soft-dirty.txt
index 9a12a5956bc0..55684d11a1e8 100644
--- a/Documentation/vm/soft-dirty.txt
+++ b/Documentation/vm/soft-dirty.txt
@@ -28,6 +28,13 @@ This is so, since the pages are still mapped to physical memory, and thus all
 the kernel does is finds this fact out and puts both writable and soft-dirty
 bits on the PTE.
 
+  While in most cases tracking memory changes by #PF-s is more than enough
+there is still a scenario when we can lose soft dirty bits -- a task
+unmaps a previously mapped memory region and then maps a new one at exactly
+the same place. When unmap is called, the kernel internally clears PTE values
+including soft dirty bits. To notify user space application about such
+memory region renewal the kernel always marks new memory regions (and
+expanded regions) as soft dirty.
 
   This feature is actively used by the checkpoint-restore project. You
 can find more details about it on http://criu.org
diff --git a/Documentation/workqueue.txt b/Documentation/workqueue.txt
index a6ab4b62d926..f81a65b54c29 100644
--- a/Documentation/workqueue.txt
+++ b/Documentation/workqueue.txt
@@ -85,32 +85,31 @@ workqueue.
 Special purpose threads, called worker threads, execute the functions
 off of the queue, one after the other.  If no work is queued, the
 worker threads become idle.  These worker threads are managed in so
-called thread-pools.
+called worker-pools.
 
 The cmwq design differentiates between the user-facing workqueues that
 subsystems and drivers queue work items on and the backend mechanism
-which manages thread-pools and processes the queued work items.
+which manages worker-pools and processes the queued work items.
 
-The backend is called gcwq.  There is one gcwq for each possible CPU
-and one gcwq to serve work items queued on unbound workqueues.  Each
-gcwq has two thread-pools - one for normal work items and the other
-for high priority ones.
+There are two worker-pools, one for normal work items and the other
+for high priority ones, for each possible CPU and some extra
+worker-pools to serve work items queued on unbound workqueues - the
+number of these backing pools is dynamic.
 
 Subsystems and drivers can create and queue work items through special
 workqueue API functions as they see fit. They can influence some
 aspects of the way the work items are executed by setting flags on the
 workqueue they are putting the work item on. These flags include
-things like CPU locality, reentrancy, concurrency limits, priority and
-more.  To get a detailed overview refer to the API description of
+things like CPU locality, concurrency limits, priority and more.  To
+get a detailed overview refer to the API description of
 alloc_workqueue() below.
 
-When a work item is queued to a workqueue, the target gcwq and
-thread-pool is determined according to the queue parameters and
-workqueue attributes and appended on the shared worklist of the
-thread-pool.  For example, unless specifically overridden, a work item
-of a bound workqueue will be queued on the worklist of either normal
-or highpri thread-pool of the gcwq that is associated to the CPU the
-issuer is running on.
+When a work item is queued to a workqueue, the target worker-pool is
+determined according to the queue parameters and workqueue attributes
+and appended on the shared worklist of the worker-pool.  For example,
+unless specifically overridden, a work item of a bound workqueue will
+be queued on the worklist of either normal or highpri worker-pool that
+is associated to the CPU the issuer is running on.
 
 For any worker pool implementation, managing the concurrency level
 (how many execution contexts are active) is an important issue.  cmwq
@@ -118,14 +117,14 @@ tries to keep the concurrency at a minimal but sufficient level.
 Minimal to save resources and sufficient in that the system is used at
 its full capacity.
 
-Each thread-pool bound to an actual CPU implements concurrency
-management by hooking into the scheduler.  The thread-pool is notified
+Each worker-pool bound to an actual CPU implements concurrency
+management by hooking into the scheduler.  The worker-pool is notified
 whenever an active worker wakes up or sleeps and keeps track of the
 number of the currently runnable workers.  Generally, work items are
 not expected to hog a CPU and consume many cycles.  That means
 maintaining just enough concurrency to prevent work processing from
 stalling should be optimal.  As long as there are one or more runnable
-workers on the CPU, the thread-pool doesn't start execution of a new
+workers on the CPU, the worker-pool doesn't start execution of a new
 work, but, when the last running worker goes to sleep, it immediately
 schedules a new worker so that the CPU doesn't sit idle while there
 are pending work items.  This allows using a minimal number of workers
@@ -135,19 +134,20 @@ Keeping idle workers around doesn't cost other than the memory space
 for kthreads, so cmwq holds onto idle ones for a while before killing
 them.
 
-For an unbound wq, the above concurrency management doesn't apply and
-the thread-pools for the pseudo unbound CPU try to start executing all
-work items as soon as possible.  The responsibility of regulating
-concurrency level is on the users.  There is also a flag to mark a
-bound wq to ignore the concurrency management.  Please refer to the
-API section for details.
+For unbound workqueues, the number of backing pools is dynamic.
+Unbound workqueue can be assigned custom attributes using
+apply_workqueue_attrs() and workqueue will automatically create
+backing worker pools matching the attributes.  The responsibility of
+regulating concurrency level is on the users.  There is also a flag to
+mark a bound wq to ignore the concurrency management.  Please refer to
+the API section for details.
 
 Forward progress guarantee relies on that workers can be created when
 more execution contexts are necessary, which in turn is guaranteed
 through the use of rescue workers.  All work items which might be used
 on code paths that handle memory reclaim are required to be queued on
 wq's that have a rescue-worker reserved for execution under memory
-pressure.  Else it is possible that the thread-pool deadlocks waiting
+pressure.  Else it is possible that the worker-pool deadlocks waiting
 for execution contexts to free up.
 
 
@@ -166,25 +166,15 @@ resources, scheduled and executed.
 
 @flags:
 
-  WQ_NON_REENTRANT
-
-        By default, a wq guarantees non-reentrance only on the same
-        CPU.  A work item may not be executed concurrently on the same
-        CPU by multiple workers but is allowed to be executed
-        concurrently on multiple CPUs.  This flag makes sure
-        non-reentrance is enforced across all CPUs.  Work items queued
-        to a non-reentrant wq are guaranteed to be executed by at most
-        one worker system-wide at any given time.
-
   WQ_UNBOUND
 
-        Work items queued to an unbound wq are served by a special
-        gcwq which hosts workers which are not bound to any specific
-        CPU.  This makes the wq behave as a simple execution context
-        provider without concurrency management.  The unbound gcwq
-        tries to start execution of work items as soon as possible.
-        Unbound wq sacrifices locality but is useful for the following
-        cases.
+        Work items queued to an unbound wq are served by the special
+        woker-pools which host workers which are not bound to any
+        specific CPU.  This makes the wq behave as a simple execution
+        context provider without concurrency management.  The unbound
+        worker-pools try to start execution of work items as soon as
+        possible.  Unbound wq sacrifices locality but is useful for
+        the following cases.
 
         * Wide fluctuation in the concurrency level requirement is
           expected and using bound wq may end up creating large number
@@ -209,10 +199,10 @@ resources, scheduled and executed.
   WQ_HIGHPRI
 
         Work items of a highpri wq are queued to the highpri
-        thread-pool of the target gcwq.  Highpri thread-pools are
+        worker-pool of the target cpu.  Highpri worker-pools are
         served by worker threads with elevated nice level.
 
-        Note that normal and highpri thread-pools don't interact with
+        Note that normal and highpri worker-pools don't interact with
         each other.  Each maintain its separate pool of workers and
         implements concurrency management among its workers.
 
@@ -221,7 +211,7 @@ resources, scheduled and executed.
         Work items of a CPU intensive wq do not contribute to the
         concurrency level.  In other words, runnable CPU intensive
         work items will not prevent other work items in the same
-        thread-pool from starting execution.  This is useful for bound
+        worker-pool from starting execution.  This is useful for bound
         work items which are expected to hog CPU cycles so that their
         execution is regulated by the system scheduler.
 
@@ -233,6 +223,10 @@ resources, scheduled and executed.
 
         This flag is meaningless for unbound wq.
 
+Note that the flag WQ_NON_REENTRANT no longer exists as all workqueues
+are now non-reentrant - any work item is guaranteed to be executed by
+at most one worker system-wide at any given time.
+
 @max_active:
 
 @max_active determines the maximum number of execution contexts per
@@ -254,9 +248,9 @@ recommended.
 
 Some users depend on the strict execution ordering of ST wq.  The
 combination of @max_active of 1 and WQ_UNBOUND is used to achieve this
-behavior.  Work items on such wq are always queued to the unbound gcwq
-and only one work item can be active at any given time thus achieving
-the same ordering property as ST wq.
+behavior.  Work items on such wq are always queued to the unbound
+worker-pools and only one work item can be active at any given time thus
+achieving the same ordering property as ST wq.
 
 
 5. Example Execution Scenarios
diff --git a/Documentation/x86/boot.txt b/Documentation/x86/boot.txt
index fc66d42422ee..f4f268c2b826 100644
--- a/Documentation/x86/boot.txt
+++ b/Documentation/x86/boot.txt
@@ -58,7 +58,7 @@ Protocol 2.11:	(Kernel 3.6) Added a field for offset of EFI handover
                 protocol entry point.
 
 Protocol 2.12:  (Kernel 3.8) Added the xloadflags field and extension fields
-                to struct boot_params for for loading bzImage and ramdisk
+                to struct boot_params for loading bzImage and ramdisk
                 above 4G in 64bit.
 
 **** MEMORY LAYOUT
diff --git a/Documentation/x86/x86_64/boot-options.txt b/Documentation/x86/x86_64/boot-options.txt
index e9e8ddbbf376..1228b22e142b 100644
--- a/Documentation/x86/x86_64/boot-options.txt
+++ b/Documentation/x86/x86_64/boot-options.txt
@@ -176,6 +176,11 @@ ACPI
 
   acpi=noirq    Don't route interrupts
 
+  acpi=nocmcff  Disable firmware first mode for corrected errors. This
+                disables parsing the HEST CMC error source to check if
+                firmware has set the FF flag. This may result in
+                duplicate corrected error reports.
+
 PCI
 
   pci=off               Don't use PCI
diff --git a/Documentation/zh_CN/SubmittingPatches b/Documentation/zh_CN/SubmittingPatches
index 0f4385a62a49..be0bd4725062 100644
--- a/Documentation/zh_CN/SubmittingPatches
+++ b/Documentation/zh_CN/SubmittingPatches
@@ -146,7 +146,7 @@ Majordomo lists of VGER.KERNEL.ORG at:
         <http://vger.kernel.org/vger-lists.html>
 
 如果改动影响了用户空间和内核之间的接口，请给 MAN-PAGES 的维护者（列在
-MAITAINERS 文件里的）发送一个手册页（man-pages）补丁，或者至少通知一下改
+MAINTAINERS 文件里的）发送一个手册页（man-pages）补丁，或者至少通知一下改
 变，让一些信息有途径进入手册页。
 
 即使在第四步的时候，维护者没有作出回应，也要确认在修改他们的代码的时候