aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation
diff options
context:
space:
mode:
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/SubmittingPatches3
-rw-r--r--Documentation/arm/sunxi/clocks.txt56
-rw-r--r--Documentation/clk.txt4
-rw-r--r--Documentation/device-mapper/dm-raid.txt44
-rw-r--r--Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt67
-rw-r--r--Documentation/devicetree/bindings/bus/ti-gpmc.txt103
-rw-r--r--Documentation/devicetree/bindings/clock/axi-clkgen.txt22
-rw-r--r--Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt303
-rw-r--r--Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt4
-rw-r--r--Documentation/devicetree/bindings/clock/sunxi.txt44
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-vt8500.txt24
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt53
-rw-r--r--Documentation/devicetree/bindings/mfd/ab8500.txt6
-rw-r--r--Documentation/devicetree/bindings/mtd/gpmc-nor.txt98
-rw-r--r--Documentation/devicetree/bindings/mtd/gpmc-onenand.txt3
-rw-r--r--Documentation/devicetree/bindings/net/gpmc-eth.txt97
-rw-r--r--Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt57
-rw-r--r--Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt17
-rw-r--r--Documentation/devicetree/bindings/tty/serial/of-serial.txt3
-rw-r--r--Documentation/hwmon/adm12752
-rw-r--r--Documentation/hwmon/adt741011
-rw-r--r--Documentation/hwmon/jc422
-rw-r--r--Documentation/hwmon/lineage-pem2
-rw-r--r--Documentation/hwmon/lm250662
-rw-r--r--Documentation/hwmon/lm752
-rw-r--r--Documentation/hwmon/ltc29786
-rw-r--r--Documentation/hwmon/ltc42612
-rw-r--r--Documentation/hwmon/max160642
-rw-r--r--Documentation/hwmon/max160652
-rw-r--r--Documentation/hwmon/max344402
-rw-r--r--Documentation/hwmon/max86882
-rw-r--r--Documentation/hwmon/pmbus2
-rw-r--r--Documentation/hwmon/smm6652
-rw-r--r--Documentation/hwmon/ucd90002
-rw-r--r--Documentation/hwmon/ucd92002
-rw-r--r--Documentation/hwmon/zl61002
-rw-r--r--Documentation/i2c/busses/i2c-diolan-u2c2
-rw-r--r--Documentation/input/alps.txt67
-rw-r--r--Documentation/networking/ipvs-sysctl.txt7
-rw-r--r--Documentation/networking/tuntap.txt77
-rw-r--r--Documentation/power/opp.txt25
-rw-r--r--Documentation/printk-formats.txt2
-rw-r--r--Documentation/sound/alsa/ALSA-Configuration.txt2
-rw-r--r--Documentation/sound/alsa/seq_oss.html2
-rw-r--r--Documentation/trace/ftrace.txt2
45 files changed, 1134 insertions, 107 deletions
diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches
index c379a2a6949f..aa0c1e63f050 100644
--- a/Documentation/SubmittingPatches
+++ b/Documentation/SubmittingPatches
@@ -60,8 +60,7 @@ own source tree. For example:
60"dontdiff" is a list of files which are generated by the kernel during 60"dontdiff" is a list of files which are generated by the kernel during
61the build process, and should be ignored in any diff(1)-generated 61the build process, and should be ignored in any diff(1)-generated
62patch. The "dontdiff" file is included in the kernel tree in 62patch. The "dontdiff" file is included in the kernel tree in
632.6.12 and later. For earlier kernel versions, you can get it 632.6.12 and later.
64from <http://www.xenotime.net/linux/doc/dontdiff>.
65 64
66Make sure your patch does not include any extra files which do not 65Make sure your patch does not include any extra files which do not
67belong in a patch submission. Make sure to review your patch -after- 66belong in a patch submission. Make sure to review your patch -after-
diff --git a/Documentation/arm/sunxi/clocks.txt b/Documentation/arm/sunxi/clocks.txt
new file mode 100644
index 000000000000..e09a88aa3136
--- /dev/null
+++ b/Documentation/arm/sunxi/clocks.txt
@@ -0,0 +1,56 @@
1Frequently asked questions about the sunxi clock system
2=======================================================
3
4This document contains useful bits of information that people tend to ask
5about the sunxi clock system, as well as accompanying ASCII art when adequate.
6
7Q: Why is the main 24MHz oscillator gatable? Wouldn't that break the
8 system?
9
10A: The 24MHz oscillator allows gating to save power. Indeed, if gated
11 carelessly the system would stop functioning, but with the right
12 steps, one can gate it and keep the system running. Consider this
13 simplified suspend example:
14
15 While the system is operational, you would see something like
16
17 24MHz 32kHz
18 |
19 PLL1
20 \
21 \_ CPU Mux
22 |
23 [CPU]
24
25 When you are about to suspend, you switch the CPU Mux to the 32kHz
26 oscillator:
27
28 24Mhz 32kHz
29 | |
30 PLL1 |
31 /
32 CPU Mux _/
33 |
34 [CPU]
35
36 Finally you can gate the main oscillator
37
38 32kHz
39 |
40 |
41 /
42 CPU Mux _/
43 |
44 [CPU]
45
46Q: Were can I learn more about the sunxi clocks?
47
48A: The linux-sunxi wiki contains a page documenting the clock registers,
49 you can find it at
50
51 http://linux-sunxi.org/A10/CCM
52
53 The authoritative source for information at this time is the ccmu driver
54 released by Allwinner, you can find it at
55
56 https://github.com/linux-sunxi/linux-sunxi/tree/sunxi-3.0/arch/arm/mach-sun4i/clock/ccmu
diff --git a/Documentation/clk.txt b/Documentation/clk.txt
index 1943fae014fd..4274a546eb57 100644
--- a/Documentation/clk.txt
+++ b/Documentation/clk.txt
@@ -174,9 +174,9 @@ int clk_foo_enable(struct clk_hw *hw)
174}; 174};
175 175
176Below is a matrix detailing which clk_ops are mandatory based upon the 176Below is a matrix detailing which clk_ops are mandatory based upon the
177hardware capbilities of that clock. A cell marked as "y" means 177hardware capabilities of that clock. A cell marked as "y" means
178mandatory, a cell marked as "n" implies that either including that 178mandatory, a cell marked as "n" implies that either including that
179callback is invalid or otherwise uneccesary. Empty cells are either 179callback is invalid or otherwise unnecessary. Empty cells are either
180optional or must be evaluated on a case-by-case basis. 180optional or must be evaluated on a case-by-case basis.
181 181
182 clock hardware characteristics 182 clock hardware characteristics
diff --git a/Documentation/device-mapper/dm-raid.txt b/Documentation/device-mapper/dm-raid.txt
index 56fb62b09fc5..b428556197c9 100644
--- a/Documentation/device-mapper/dm-raid.txt
+++ b/Documentation/device-mapper/dm-raid.txt
@@ -30,6 +30,7 @@ The target is named "raid" and it accepts the following parameters:
30 raid10 Various RAID10 inspired algorithms chosen by additional params 30 raid10 Various RAID10 inspired algorithms chosen by additional params
31 - RAID10: Striped Mirrors (aka 'Striping on top of mirrors') 31 - RAID10: Striped Mirrors (aka 'Striping on top of mirrors')
32 - RAID1E: Integrated Adjacent Stripe Mirroring 32 - RAID1E: Integrated Adjacent Stripe Mirroring
33 - RAID1E: Integrated Offset Stripe Mirroring
33 - and other similar RAID10 variants 34 - and other similar RAID10 variants
34 35
35 Reference: Chapter 4 of 36 Reference: Chapter 4 of
@@ -64,15 +65,15 @@ The target is named "raid" and it accepts the following parameters:
64 synchronisation state for each region. 65 synchronisation state for each region.
65 66
66 [raid10_copies <# copies>] 67 [raid10_copies <# copies>]
67 [raid10_format near] 68 [raid10_format <near|far|offset>]
68 These two options are used to alter the default layout of 69 These two options are used to alter the default layout of
69 a RAID10 configuration. The number of copies is can be 70 a RAID10 configuration. The number of copies is can be
70 specified, but the default is 2. There are other variations 71 specified, but the default is 2. There are also three
71 to how the copies are laid down - the default and only current 72 variations to how the copies are laid down - the default
72 option is "near". Near copies are what most people think of 73 is "near". Near copies are what most people think of with
73 with respect to mirroring. If these options are left 74 respect to mirroring. If these options are left unspecified,
74 unspecified, or 'raid10_copies 2' and/or 'raid10_format near' 75 or 'raid10_copies 2' and/or 'raid10_format near' are given,
75 are given, then the layouts for 2, 3 and 4 devices are: 76 then the layouts for 2, 3 and 4 devices are:
76 2 drives 3 drives 4 drives 77 2 drives 3 drives 4 drives
77 -------- ---------- -------------- 78 -------- ---------- --------------
78 A1 A1 A1 A1 A2 A1 A1 A2 A2 79 A1 A1 A1 A1 A2 A1 A1 A2 A2
@@ -85,6 +86,33 @@ The target is named "raid" and it accepts the following parameters:
85 3-device layout is what might be called a 'RAID1E - Integrated 86 3-device layout is what might be called a 'RAID1E - Integrated
86 Adjacent Stripe Mirroring'. 87 Adjacent Stripe Mirroring'.
87 88
89 If 'raid10_copies 2' and 'raid10_format far', then the layouts
90 for 2, 3 and 4 devices are:
91 2 drives 3 drives 4 drives
92 -------- -------------- --------------------
93 A1 A2 A1 A2 A3 A1 A2 A3 A4
94 A3 A4 A4 A5 A6 A5 A6 A7 A8
95 A5 A6 A7 A8 A9 A9 A10 A11 A12
96 .. .. .. .. .. .. .. .. ..
97 A2 A1 A3 A1 A2 A2 A1 A4 A3
98 A4 A3 A6 A4 A5 A6 A5 A8 A7
99 A6 A5 A9 A7 A8 A10 A9 A12 A11
100 .. .. .. .. .. .. .. .. ..
101
102 If 'raid10_copies 2' and 'raid10_format offset', then the
103 layouts for 2, 3 and 4 devices are:
104 2 drives 3 drives 4 drives
105 -------- ------------ -----------------
106 A1 A2 A1 A2 A3 A1 A2 A3 A4
107 A2 A1 A3 A1 A2 A2 A1 A4 A3
108 A3 A4 A4 A5 A6 A5 A6 A7 A8
109 A4 A3 A6 A4 A5 A6 A5 A8 A7
110 A5 A6 A7 A8 A9 A9 A10 A11 A12
111 A6 A5 A9 A7 A8 A10 A9 A12 A11
112 .. .. .. .. .. .. .. .. ..
113 Here we see layouts closely akin to 'RAID1E - Integrated
114 Offset Stripe Mirroring'.
115
88<#raid_devs>: The number of devices composing the array. 116<#raid_devs>: The number of devices composing the array.
89 Each device consists of two entries. The first is the device 117 Each device consists of two entries. The first is the device
90 containing the metadata (if any); the second is the one containing the 118 containing the metadata (if any); the second is the one containing the
@@ -142,3 +170,5 @@ Version History
1421.3.0 Added support for RAID 10 1701.3.0 Added support for RAID 10
1431.3.1 Allow device replacement/rebuild for RAID 10 1711.3.1 Allow device replacement/rebuild for RAID 10
1441.3.2 Fix/improve redundancy checking for RAID10 1721.3.2 Fix/improve redundancy checking for RAID10
1731.4.0 Non-functional change. Removes arg from mapping function.
1741.4.1 Add RAID10 "far" and "offset" algorithm support.
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index b5846e21cc2e..1608a54e90e1 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -1,19 +1,84 @@
1NVIDIA Tegra Power Management Controller (PMC) 1NVIDIA Tegra Power Management Controller (PMC)
2 2
3Properties: 3The PMC block interacts with an external Power Management Unit. The PMC
4mostly controls the entry and exit of the system from different sleep
5modes. It provides power-gating controllers for SoC and CPU power-islands.
6
7Required properties:
4- name : Should be pmc 8- name : Should be pmc
5- compatible : Should contain "nvidia,tegra<chip>-pmc". 9- compatible : Should contain "nvidia,tegra<chip>-pmc".
6- reg : Offset and length of the register set for the device 10- reg : Offset and length of the register set for the device
11- clocks : Must contain an entry for each entry in clock-names.
12- clock-names : Must include the following entries:
13 "pclk" (The Tegra clock of that name),
14 "clk32k_in" (The 32KHz clock input to Tegra).
15
16Optional properties:
7- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal. 17- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal.
8 The PMU is an external Power Management Unit, whose interrupt output 18 The PMU is an external Power Management Unit, whose interrupt output
9 signal is fed into the PMC. This signal is optionally inverted, and then 19 signal is fed into the PMC. This signal is optionally inverted, and then
10 fed into the ARM GIC. The PMC is not involved in the detection or 20 fed into the ARM GIC. The PMC is not involved in the detection or
11 handling of this interrupt signal, merely its inversion. 21 handling of this interrupt signal, merely its inversion.
22- nvidia,suspend-mode : The suspend mode that the platform should use.
23 Valid values are 0, 1 and 2:
24 0 (LP0): CPU + Core voltage off and DRAM in self-refresh
25 1 (LP1): CPU voltage off and DRAM in self-refresh
26 2 (LP2): CPU voltage off
27- nvidia,core-power-req-active-high : Boolean, core power request active-high
28- nvidia,sys-clock-req-active-high : Boolean, system clock request active-high
29- nvidia,combined-power-req : Boolean, combined power request for CPU & Core
30- nvidia,cpu-pwr-good-en : Boolean, CPU power good signal (from PMIC to PMC)
31 is enabled.
32
33Required properties when nvidia,suspend-mode is specified:
34- nvidia,cpu-pwr-good-time : CPU power good time in uS.
35- nvidia,cpu-pwr-off-time : CPU power off time in uS.
36- nvidia,core-pwr-good-time : <Oscillator-stable-time Power-stable-time>
37 Core power good time in uS.
38- nvidia,core-pwr-off-time : Core power off time in uS.
39
40Required properties when nvidia,suspend-mode=<0>:
41- nvidia,lp0-vec : <start length> Starting address and length of LP0 vector
42 The LP0 vector contains the warm boot code that is executed by AVP when
43 resuming from the LP0 state. The AVP (Audio-Video Processor) is an ARM7
44 processor and always being the first boot processor when chip is power on
45 or resume from deep sleep mode. When the system is resumed from the deep
46 sleep mode, the warm boot code will restore some PLLs, clocks and then
47 bring up CPU0 for resuming the system.
12 48
13Example: 49Example:
14 50
51/ SoC dts including file
15pmc@7000f400 { 52pmc@7000f400 {
16 compatible = "nvidia,tegra20-pmc"; 53 compatible = "nvidia,tegra20-pmc";
17 reg = <0x7000e400 0x400>; 54 reg = <0x7000e400 0x400>;
55 clocks = <&tegra_car 110>, <&clk32k_in>;
56 clock-names = "pclk", "clk32k_in";
18 nvidia,invert-interrupt; 57 nvidia,invert-interrupt;
58 nvidia,suspend-mode = <1>;
59 nvidia,cpu-pwr-good-time = <2000>;
60 nvidia,cpu-pwr-off-time = <100>;
61 nvidia,core-pwr-good-time = <3845 3845>;
62 nvidia,core-pwr-off-time = <458>;
63 nvidia,core-power-req-active-high;
64 nvidia,sys-clock-req-active-high;
65 nvidia,lp0-vec = <0xbdffd000 0x2000>;
66};
67
68/ Tegra board dts file
69{
70 ...
71 clocks {
72 compatible = "simple-bus";
73 #address-cells = <1>;
74 #size-cells = <0>;
75
76 clk32k_in: clock {
77 compatible = "fixed-clock";
78 reg=<0>;
79 #clock-cells = <0>;
80 clock-frequency = <32768>;
81 };
82 };
83 ...
19}; 84};
diff --git a/Documentation/devicetree/bindings/bus/ti-gpmc.txt b/Documentation/devicetree/bindings/bus/ti-gpmc.txt
index 5ddb2e9efaaa..4b87ea1194e3 100644
--- a/Documentation/devicetree/bindings/bus/ti-gpmc.txt
+++ b/Documentation/devicetree/bindings/bus/ti-gpmc.txt
@@ -35,36 +35,83 @@ Required properties:
35 35
36Timing properties for child nodes. All are optional and default to 0. 36Timing properties for child nodes. All are optional and default to 0.
37 37
38 - gpmc,sync-clk: Minimum clock period for synchronous mode, in picoseconds 38 - gpmc,sync-clk-ps: Minimum clock period for synchronous mode, in picoseconds
39 39
40 Chip-select signal timings corresponding to GPMC_CONFIG2: 40 Chip-select signal timings (in nanoseconds) corresponding to GPMC_CONFIG2:
41 - gpmc,cs-on: Assertion time 41 - gpmc,cs-on-ns: Assertion time
42 - gpmc,cs-rd-off: Read deassertion time 42 - gpmc,cs-rd-off-ns: Read deassertion time
43 - gpmc,cs-wr-off: Write deassertion time 43 - gpmc,cs-wr-off-ns: Write deassertion time
44 44
45 ADV signal timings corresponding to GPMC_CONFIG3: 45 ADV signal timings (in nanoseconds) corresponding to GPMC_CONFIG3:
46 - gpmc,adv-on: Assertion time 46 - gpmc,adv-on-ns: Assertion time
47 - gpmc,adv-rd-off: Read deassertion time 47 - gpmc,adv-rd-off-ns: Read deassertion time
48 - gpmc,adv-wr-off: Write deassertion time 48 - gpmc,adv-wr-off-ns: Write deassertion time
49 49
50 WE signals timings corresponding to GPMC_CONFIG4: 50 WE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4:
51 - gpmc,we-on: Assertion time 51 - gpmc,we-on-ns Assertion time
52 - gpmc,we-off: Deassertion time 52 - gpmc,we-off-ns: Deassertion time
53 53
54 OE signals timings corresponding to GPMC_CONFIG4: 54 OE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4:
55 - gpmc,oe-on: Assertion time 55 - gpmc,oe-on-ns: Assertion time
56 - gpmc,oe-off: Deassertion time 56 - gpmc,oe-off-ns: Deassertion time
57 57
58 Access time and cycle time timings corresponding to GPMC_CONFIG5: 58 Access time and cycle time timings (in nanoseconds) corresponding to
59 - gpmc,page-burst-access: Multiple access word delay 59 GPMC_CONFIG5:
60 - gpmc,access: Start-cycle to first data valid delay 60 - gpmc,page-burst-access-ns: Multiple access word delay
61 - gpmc,rd-cycle: Total read cycle time 61 - gpmc,access-ns: Start-cycle to first data valid delay
62 - gpmc,wr-cycle: Total write cycle time 62 - gpmc,rd-cycle-ns: Total read cycle time
63 - gpmc,wr-cycle-ns: Total write cycle time
64 - gpmc,bus-turnaround-ns: Turn-around time between successive accesses
65 - gpmc,cycle2cycle-delay-ns: Delay between chip-select pulses
66 - gpmc,clk-activation-ns: GPMC clock activation time
67 - gpmc,wait-monitoring-ns: Start of wait monitoring with regard to valid
68 data
69
70Boolean timing parameters. If property is present parameter enabled and
71disabled if omitted:
72 - gpmc,adv-extra-delay: ADV signal is delayed by half GPMC clock
73 - gpmc,cs-extra-delay: CS signal is delayed by half GPMC clock
74 - gpmc,cycle2cycle-diffcsen: Add "cycle2cycle-delay" between successive
75 accesses to a different CS
76 - gpmc,cycle2cycle-samecsen: Add "cycle2cycle-delay" between successive
77 accesses to the same CS
78 - gpmc,oe-extra-delay: OE signal is delayed by half GPMC clock
79 - gpmc,we-extra-delay: WE signal is delayed by half GPMC clock
80 - gpmc,time-para-granularity: Multiply all access times by 2
63 81
64The following are only applicable to OMAP3+ and AM335x: 82The following are only applicable to OMAP3+ and AM335x:
65 - gpmc,wr-access 83 - gpmc,wr-access-ns: In synchronous write mode, for single or
66 - gpmc,wr-data-mux-bus 84 burst accesses, defines the number of
67 85 GPMC_FCLK cycles from start access time
86 to the GPMC_CLK rising edge used by the
87 memory device for the first data capture.
88 - gpmc,wr-data-mux-bus-ns: In address-data multiplex mode, specifies
89 the time when the first data is driven on
90 the address-data bus.
91
92GPMC chip-select settings properties for child nodes. All are optional.
93
94- gpmc,burst-length Page/burst length. Must be 4, 8 or 16.
95- gpmc,burst-wrap Enables wrap bursting
96- gpmc,burst-read Enables read page/burst mode
97- gpmc,burst-write Enables write page/burst mode
98- gpmc,device-nand Device is NAND
99- gpmc,device-width Total width of device(s) connected to a GPMC
100 chip-select in bytes. The GPMC supports 8-bit
101 and 16-bit devices and so this property must be
102 1 or 2.
103- gpmc,mux-add-data Address and data multiplexing configuration.
104 Valid values are 1 for address-address-data
105 multiplexing mode and 2 for address-data
106 multiplexing mode.
107- gpmc,sync-read Enables synchronous read. Defaults to asynchronous
108 is this is not set.
109- gpmc,sync-write Enables synchronous writes. Defaults to asynchronous
110 is this is not set.
111- gpmc,wait-pin Wait-pin used by client. Must be less than
112 "gpmc,num-waitpins".
113- gpmc,wait-on-read Enables wait monitoring on reads.
114- gpmc,wait-on-write Enables wait monitoring on writes.
68 115
69Example for an AM33xx board: 116Example for an AM33xx board:
70 117
diff --git a/Documentation/devicetree/bindings/clock/axi-clkgen.txt b/Documentation/devicetree/bindings/clock/axi-clkgen.txt
new file mode 100644
index 000000000000..028b493e97ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/axi-clkgen.txt
@@ -0,0 +1,22 @@
1Binding for the axi-clkgen clock generator
2
3This binding uses the common clock binding[1].
4
5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
6
7Required properties:
8- compatible : shall be "adi,axi-clkgen".
9- #clock-cells : from common clock binding; Should always be set to 0.
10- reg : Address and length of the axi-clkgen register set.
11- clocks : Phandle and clock specifier for the parent clock.
12
13Optional properties:
14- clock-output-names : From common clock binding.
15
16Example:
17 clock@0xff000000 {
18 compatible = "adi,axi-clkgen";
19 #clock-cells = <0>;
20 reg = <0xff000000 0x1000>;
21 clocks = <&osc 1>;
22 };
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
new file mode 100644
index 000000000000..d6cb083b90a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
@@ -0,0 +1,303 @@
1NVIDIA Tegra114 Clock And Reset Controller
2
3This binding uses the common clock binding:
4Documentation/devicetree/bindings/clock/clock-bindings.txt
5
6The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
7for muxing and gating Tegra's clocks, and setting their rates.
8
9Required properties :
10- compatible : Should be "nvidia,tegra114-car"
11- reg : Should contain CAR registers location and length
12- clocks : Should contain phandle and clock specifiers for two clocks:
13 the 32 KHz "32k_in", and the board-specific oscillator "osc".
14- #clock-cells : Should be 1.
15 In clock consumers, this cell represents the clock ID exposed by the CAR.
16
17 The first 160 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB
18 registers. These IDs often match those in the CAR's RST_DEVICES registers,
19 but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In
20 this case, those clocks are assigned IDs above 160 in order to highlight
21 this issue. Implementations that interpret these clock IDs as bit values
22 within the CLK_OUT_ENB or RST_DEVICES registers should be careful to
23 explicitly handle these special cases.
24
25 The balance of the clocks controlled by the CAR are assigned IDs of 160 and
26 above.
27
28 0 unassigned
29 1 unassigned
30 2 unassigned
31 3 unassigned
32 4 rtc
33 5 timer
34 6 uarta
35 7 unassigned (register bit affects uartb and vfir)
36 8 unassigned
37 9 sdmmc2
38 10 unassigned (register bit affects spdif_in and spdif_out)
39 11 i2s1
40 12 i2c1
41 13 ndflash
42 14 sdmmc1
43 15 sdmmc4
44 16 unassigned
45 17 pwm
46 18 i2s2
47 19 epp
48 20 unassigned (register bit affects vi and vi_sensor)
49 21 2d
50 22 usbd
51 23 isp
52 24 3d
53 25 unassigned
54 26 disp2
55 27 disp1
56 28 host1x
57 29 vcp
58 30 i2s0
59 31 unassigned
60
61 32 unassigned
62 33 unassigned
63 34 apbdma
64 35 unassigned
65 36 kbc
66 37 unassigned
67 38 unassigned
68 39 unassigned (register bit affects fuse and fuse_burn)
69 40 kfuse
70 41 sbc1
71 42 nor
72 43 unassigned
73 44 sbc2
74 45 unassigned
75 46 sbc3
76 47 i2c5
77 48 dsia
78 49 unassigned
79 50 mipi
80 51 hdmi
81 52 csi
82 53 unassigned
83 54 i2c2
84 55 uartc
85 56 mipi-cal
86 57 emc
87 58 usb2
88 59 usb3
89 60 msenc
90 61 vde
91 62 bsea
92 63 bsev
93
94 64 unassigned
95 65 uartd
96 66 unassigned
97 67 i2c3
98 68 sbc4
99 69 sdmmc3
100 70 unassigned
101 71 owr
102 72 afi
103 73 csite
104 74 unassigned
105 75 unassigned
106 76 la
107 77 trace
108 78 soc_therm
109 79 dtv
110 80 ndspeed
111 81 i2cslow
112 82 dsib
113 83 tsec
114 84 unassigned
115 85 unassigned
116 86 unassigned
117 87 unassigned
118 88 unassigned
119 89 xusb_host
120 90 unassigned
121 91 msenc
122 92 csus
123 93 unassigned
124 94 unassigned
125 95 unassigned (bit affects xusb_dev and xusb_dev_src)
126
127 96 unassigned
128 97 unassigned
129 98 unassigned
130 99 mselect
131 100 tsensor
132 101 i2s3
133 102 i2s4
134 103 i2c4
135 104 sbc5
136 105 sbc6
137 106 d_audio
138 107 apbif
139 108 dam0
140 109 dam1
141 110 dam2
142 111 hda2codec_2x
143 112 unassigned
144 113 audio0_2x
145 114 audio1_2x
146 115 audio2_2x
147 116 audio3_2x
148 117 audio4_2x
149 118 spdif_2x
150 119 actmon
151 120 extern1
152 121 extern2
153 122 extern3
154 123 unassigned
155 124 unassigned
156 125 hda
157 126 unassigned
158 127 se
159
160 128 hda2hdmi
161 129 unassigned
162 130 unassigned
163 131 unassigned
164 132 unassigned
165 133 unassigned
166 134 unassigned
167 135 unassigned
168 136 unassigned
169 137 unassigned
170 138 unassigned
171 139 unassigned
172 140 unassigned
173 141 unassigned
174 142 unassigned
175 143 unassigned (bit affects xusb_falcon_src, xusb_fs_src,
176 xusb_host_src and xusb_ss_src)
177 144 cilab
178 145 cilcd
179 146 cile
180 147 dsialp
181 148 dsiblp
182 149 unassigned
183 150 dds
184 151 unassigned
185 152 dp2
186 153 amx
187 154 adx
188 155 unassigned (bit affects dfll_ref and dfll_soc)
189 156 xusb_ss
190
191 192 uartb
192 193 vfir
193 194 spdif_in
194 195 spdif_out
195 196 vi
196 197 vi_sensor
197 198 fuse
198 199 fuse_burn
199 200 clk_32k
200 201 clk_m
201 202 clk_m_div2
202 203 clk_m_div4
203 204 pll_ref
204 205 pll_c
205 206 pll_c_out1
206 207 pll_c2
207 208 pll_c3
208 209 pll_m
209 210 pll_m_out1
210 211 pll_p
211 212 pll_p_out1
212 213 pll_p_out2
213 214 pll_p_out3
214 215 pll_p_out4
215 216 pll_a
216 217 pll_a_out0
217 218 pll_d
218 219 pll_d_out0
219 220 pll_d2
220 221 pll_d2_out0
221 222 pll_u
222 223 pll_u_480M
223 224 pll_u_60M
224 225 pll_u_48M
225 226 pll_u_12M
226 227 pll_x
227 228 pll_x_out0
228 229 pll_re_vco
229 230 pll_re_out
230 231 pll_e_out0
231 232 spdif_in_sync
232 233 i2s0_sync
233 234 i2s1_sync
234 235 i2s2_sync
235 236 i2s3_sync
236 237 i2s4_sync
237 238 vimclk_sync
238 239 audio0
239 240 audio1
240 241 audio2
241 242 audio3
242 243 audio4
243 244 spdif
244 245 clk_out_1
245 246 clk_out_2
246 247 clk_out_3
247 248 blink
248 252 xusb_host_src
249 253 xusb_falcon_src
250 254 xusb_fs_src
251 255 xusb_ss_src
252 256 xusb_dev_src
253 257 xusb_dev
254 258 xusb_hs_src
255 259 sclk
256 260 hclk
257 261 pclk
258 262 cclk_g
259 263 cclk_lp
260 264 dfll_ref
261 265 dfll_soc
262
263Example SoC include file:
264
265/ {
266 tegra_car: clock {
267 compatible = "nvidia,tegra114-car";
268 reg = <0x60006000 0x1000>;
269 #clock-cells = <1>;
270 };
271
272 usb@c5004000 {
273 clocks = <&tegra_car 58>; /* usb2 */
274 };
275};
276
277Example board file:
278
279/ {
280 clocks {
281 compatible = "simple-bus";
282 #address-cells = <1>;
283 #size-cells = <0>;
284
285 osc: clock@0 {
286 compatible = "fixed-clock";
287 reg = <0>;
288 #clock-cells = <0>;
289 clock-frequency = <12000000>;
290 };
291
292 clk_32k: clock@1 {
293 compatible = "fixed-clock";
294 reg = <1>;
295 #clock-cells = <0>;
296 clock-frequency = <32768>;
297 };
298 };
299
300 &tegra_car {
301 clocks = <&clk_32k> <&osc>;
302 };
303};
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
index 0921fac73528..e885680f6b45 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
@@ -120,8 +120,8 @@ Required properties :
120 90 clk_d 120 90 clk_d
121 91 unassigned 121 91 unassigned
122 92 sus 122 92 sus
123 93 cdev1 123 93 cdev2
124 94 cdev2 124 94 cdev1
125 95 unassigned 125 95 unassigned
126 126
127 96 uart2 127 96 uart2
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
new file mode 100644
index 000000000000..20b8479c2760
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -0,0 +1,44 @@
1Device Tree Clock bindings for arch-sunxi
2
3This binding uses the common clock binding[1].
4
5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
6
7Required properties:
8- compatible : shall be one of the following:
9 "allwinner,sun4i-osc-clk" - for a gatable oscillator
10 "allwinner,sun4i-pll1-clk" - for the main PLL clock
11 "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock
12 "allwinner,sun4i-axi-clk" - for the AXI clock
13 "allwinner,sun4i-ahb-clk" - for the AHB clock
14 "allwinner,sun4i-apb0-clk" - for the APB0 clock
15 "allwinner,sun4i-apb1-clk" - for the APB1 clock
16 "allwinner,sun4i-apb1-mux-clk" - for the APB1 clock muxing
17
18Required properties for all clocks:
19- reg : shall be the control register address for the clock.
20- clocks : shall be the input parent clock(s) phandle for the clock
21- #clock-cells : from common clock binding; shall be set to 0.
22
23For example:
24
25osc24M: osc24M@01c20050 {
26 #clock-cells = <0>;
27 compatible = "allwinner,sun4i-osc-clk";
28 reg = <0x01c20050 0x4>;
29 clocks = <&osc24M_fixed>;
30};
31
32pll1: pll1@01c20000 {
33 #clock-cells = <0>;
34 compatible = "allwinner,sun4i-pll1-clk";
35 reg = <0x01c20000 0x4>;
36 clocks = <&osc24M>;
37};
38
39cpu: cpu@01c20054 {
40 #clock-cells = <0>;
41 compatible = "allwinner,sun4i-cpu-clk";
42 reg = <0x01c20054 0x4>;
43 clocks = <&osc32k>, <&osc24M>, <&pll1>;
44};
diff --git a/Documentation/devicetree/bindings/gpio/gpio-vt8500.txt b/Documentation/devicetree/bindings/gpio/gpio-vt8500.txt
deleted file mode 100644
index f4dc5233167e..000000000000
--- a/Documentation/devicetree/bindings/gpio/gpio-vt8500.txt
+++ /dev/null
@@ -1,24 +0,0 @@
1VIA/Wondermedia VT8500 GPIO Controller
2-----------------------------------------------------
3
4Required properties:
5- compatible : "via,vt8500-gpio", "wm,wm8505-gpio"
6 or "wm,wm8650-gpio" depending on your SoC
7- reg : Should contain 1 register range (address and length)
8- #gpio-cells : should be <3>.
9 1) bank
10 2) pin number
11 3) flags - should be 0
12
13Example:
14
15 gpio: gpio-controller@d8110000 {
16 compatible = "via,vt8500-gpio";
17 gpio-controller;
18 reg = <0xd8110000 0x10000>;
19 #gpio-cells = <3>;
20 };
21
22 vibrate {
23 gpios = <&gpio 0 1 0>; /* Bank 0, Pin 1, No flags */
24 };
diff --git a/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt
new file mode 100644
index 000000000000..c54c5a9a2a90
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt
@@ -0,0 +1,53 @@
1Samsung S3C24XX Interrupt Controllers
2
3The S3C24XX SoCs contain a custom set of interrupt controllers providing a
4varying number of interrupt sources. The set consists of a main- and sub-
5controller and on newer SoCs even a second main controller.
6
7Required properties:
8- compatible: Compatible property value should be "samsung,s3c2410-irq"
9 for machines before s3c2416 and "samsung,s3c2416-irq" for s3c2416 and later.
10
11- reg: Physical base address of the controller and length of memory mapped
12 region.
13
14- interrupt-controller : Identifies the node as an interrupt controller
15
16- #interrupt-cells : Specifies the number of cells needed to encode an
17 interrupt source. The value shall be 4 and interrupt descriptor shall
18 have the following format:
19 <ctrl_num parent_irq ctrl_irq type>
20
21 ctrl_num contains the controller to use:
22 - 0 ... main controller
23 - 1 ... sub controller
24 - 2 ... second main controller on s3c2416 and s3c2450
25 parent_irq contains the parent bit in the main controller and will be
26 ignored in main controllers
27 ctrl_irq contains the interrupt bit of the controller
28 type contains the trigger type to use
29
30Example:
31
32 interrupt-controller@4a000000 {
33 compatible = "samsung,s3c2410-irq";
34 reg = <0x4a000000 0x100>;
35 interrupt-controller;
36 #interrupt-cells=<4>;
37 };
38
39 [...]
40
41 serial@50000000 {
42 compatible = "samsung,s3c2410-uart";
43 reg = <0x50000000 0x4000>;
44 interrupt-parent = <&subintc>;
45 interrupts = <1 28 0 4>, <1 28 1 4>;
46 };
47
48 rtc@57000000 {
49 compatible = "samsung,s3c2410-rtc";
50 reg = <0x57000000 0x100>;
51 interrupt-parent = <&intc>;
52 interrupts = <0 30 0 3>, <0 8 0 3>;
53 };
diff --git a/Documentation/devicetree/bindings/mfd/ab8500.txt b/Documentation/devicetree/bindings/mfd/ab8500.txt
index 13b707b7355c..c3a14e0ad0ad 100644
--- a/Documentation/devicetree/bindings/mfd/ab8500.txt
+++ b/Documentation/devicetree/bindings/mfd/ab8500.txt
@@ -13,9 +13,6 @@ Required parent device properties:
13 4 = active high level-sensitive 13 4 = active high level-sensitive
14 8 = active low level-sensitive 14 8 = active low level-sensitive
15 15
16Optional parent device properties:
17- reg : contains the PRCMU mailbox address for the AB8500 i2c port
18
19The AB8500 consists of a large and varied group of sub-devices: 16The AB8500 consists of a large and varied group of sub-devices:
20 17
21Device IRQ Names Supply Names Description 18Device IRQ Names Supply Names Description
@@ -86,9 +83,8 @@ Non-standard child device properties:
86 - stericsson,amic2-bias-vamic1 : Analoge Mic wishes to use a non-standard Vamic 83 - stericsson,amic2-bias-vamic1 : Analoge Mic wishes to use a non-standard Vamic
87 - stericsson,earpeice-cmv : Earpeice voltage (only: 950 | 1100 | 1270 | 1580) 84 - stericsson,earpeice-cmv : Earpeice voltage (only: 950 | 1100 | 1270 | 1580)
88 85
89ab8500@5 { 86ab8500 {
90 compatible = "stericsson,ab8500"; 87 compatible = "stericsson,ab8500";
91 reg = <5>; /* mailbox 5 is i2c */
92 interrupts = <0 40 0x4>; 88 interrupts = <0 40 0x4>;
93 interrupt-controller; 89 interrupt-controller;
94 #interrupt-cells = <2>; 90 #interrupt-cells = <2>;
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nor.txt b/Documentation/devicetree/bindings/mtd/gpmc-nor.txt
new file mode 100644
index 000000000000..420b3ab18890
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nor.txt
@@ -0,0 +1,98 @@
1Device tree bindings for NOR flash connect to TI GPMC
2
3NOR flash connected to the TI GPMC (found on OMAP boards) are represented as
4child nodes of the GPMC controller with a name of "nor".
5
6All timing relevant properties as well as generic GPMC child properties are
7explained in a separate documents. Please refer to
8Documentation/devicetree/bindings/bus/ti-gpmc.txt
9
10Required properties:
11- bank-width: Width of NOR flash in bytes. GPMC supports 8-bit and
12 16-bit devices and so must be either 1 or 2 bytes.
13- compatible: Documentation/devicetree/bindings/mtd/mtd-physmap.txt
14- gpmc,cs-on-ns: Chip-select assertion time
15- gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
16- gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
17- gpmc,oe-on-ns: Output-enable assertion time
18- gpmc,oe-off-ns: Output-enable de-assertion time
19- gpmc,we-on-ns Write-enable assertion time
20- gpmc,we-off-ns: Write-enable de-assertion time
21- gpmc,access-ns: Start cycle to first data capture (read access)
22- gpmc,rd-cycle-ns: Total read cycle time
23- gpmc,wr-cycle-ns: Total write cycle time
24- linux,mtd-name: Documentation/devicetree/bindings/mtd/mtd-physmap.txt
25- reg: Chip-select, base address (relative to chip-select)
26 and size of NOR flash. Note that base address will be
27 typically 0 as this is the start of the chip-select.
28
29Optional properties:
30- gpmc,XXX Additional GPMC timings and settings parameters. See
31 Documentation/devicetree/bindings/bus/ti-gpmc.txt
32
33Optional properties for partiton table parsing:
34- #address-cells: should be set to 1
35- #size-cells: should be set to 1
36
37Example:
38
39gpmc: gpmc@6e000000 {
40 compatible = "ti,omap3430-gpmc", "simple-bus";
41 ti,hwmods = "gpmc";
42 reg = <0x6e000000 0x1000>;
43 interrupts = <20>;
44 gpmc,num-cs = <8>;
45 gpmc,num-waitpins = <4>;
46 #address-cells = <2>;
47 #size-cells = <1>;
48
49 ranges = <0 0 0x10000000 0x08000000>;
50
51 nor@0,0 {
52 compatible = "cfi-flash";
53 linux,mtd-name= "intel,pf48f6000m0y1be";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 reg = <0 0 0x08000000>;
57 bank-width = <2>;
58
59 gpmc,mux-add-data;
60 gpmc,cs-on-ns = <0>;
61 gpmc,cs-rd-off-ns = <186>;
62 gpmc,cs-wr-off-ns = <186>;
63 gpmc,adv-on-ns = <12>;
64 gpmc,adv-rd-off-ns = <48>;
65 gpmc,adv-wr-off-ns = <48>;
66 gpmc,oe-on-ns = <54>;
67 gpmc,oe-off-ns = <168>;
68 gpmc,we-on-ns = <54>;
69 gpmc,we-off-ns = <168>;
70 gpmc,rd-cycle-ns = <186>;
71 gpmc,wr-cycle-ns = <186>;
72 gpmc,access-ns = <114>;
73 gpmc,page-burst-access-ns = <6>;
74 gpmc,bus-turnaround-ns = <12>;
75 gpmc,cycle2cycle-delay-ns = <18>;
76 gpmc,wr-data-mux-bus-ns = <90>;
77 gpmc,wr-access-ns = <186>;
78 gpmc,cycle2cycle-samecsen;
79 gpmc,cycle2cycle-diffcsen;
80
81 partition@0 {
82 label = "bootloader-nor";
83 reg = <0 0x40000>;
84 };
85 partition@0x40000 {
86 label = "params-nor";
87 reg = <0x40000 0x40000>;
88 };
89 partition@0x80000 {
90 label = "kernel-nor";
91 reg = <0x80000 0x200000>;
92 };
93 partition@0x280000 {
94 label = "filesystem-nor";
95 reg = <0x240000 0x7d80000>;
96 };
97 };
98};
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-onenand.txt b/Documentation/devicetree/bindings/mtd/gpmc-onenand.txt
index deec9da224a2..b7529424ac88 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-onenand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-onenand.txt
@@ -10,6 +10,8 @@ Documentation/devicetree/bindings/bus/ti-gpmc.txt
10Required properties: 10Required properties:
11 11
12 - reg: The CS line the peripheral is connected to 12 - reg: The CS line the peripheral is connected to
13 - gpmc,device-width Width of the ONENAND device connected to the GPMC
14 in bytes. Must be 1 or 2.
13 15
14Optional properties: 16Optional properties:
15 17
@@ -34,6 +36,7 @@ Example for an OMAP3430 board:
34 36
35 onenand@0 { 37 onenand@0 {
36 reg = <0 0 0>; /* CS0, offset 0 */ 38 reg = <0 0 0>; /* CS0, offset 0 */
39 gpmc,device-width = <2>;
37 40
38 #address-cells = <1>; 41 #address-cells = <1>;
39 #size-cells = <1>; 42 #size-cells = <1>;
diff --git a/Documentation/devicetree/bindings/net/gpmc-eth.txt b/Documentation/devicetree/bindings/net/gpmc-eth.txt
new file mode 100644
index 000000000000..24cb4e46f675
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/gpmc-eth.txt
@@ -0,0 +1,97 @@
1Device tree bindings for Ethernet chip connected to TI GPMC
2
3Besides being used to interface with external memory devices, the
4General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices
5such as ethernet controllers to processors using the TI GPMC as a data bus.
6
7Ethernet controllers connected to TI GPMC are represented as child nodes of
8the GPMC controller with an "ethernet" name.
9
10All timing relevant properties as well as generic GPMC child properties are
11explained in a separate documents. Please refer to
12Documentation/devicetree/bindings/bus/ti-gpmc.txt
13
14For the properties relevant to the ethernet controller connected to the GPMC
15refer to the binding documentation of the device. For example, the documentation
16for the SMSC 911x is Documentation/devicetree/bindings/net/smsc911x.txt
17
18Child nodes need to specify the GPMC bus address width using the "bank-width"
19property but is possible that an ethernet controller also has a property to
20specify the I/O registers address width. Even when the GPMC has a maximum 16-bit
21address width, it supports devices with 32-bit word registers.
22For example with an SMSC LAN911x/912x controller connected to the TI GPMC on an
23OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;".
24
25Required properties:
26- bank-width: Address width of the device in bytes. GPMC supports 8-bit
27 and 16-bit devices and so must be either 1 or 2 bytes.
28- compatible: Compatible string property for the ethernet child device.
29- gpmc,cs-on: Chip-select assertion time
30- gpmc,cs-rd-off: Chip-select de-assertion time for reads
31- gpmc,cs-wr-off: Chip-select de-assertion time for writes
32- gpmc,oe-on: Output-enable assertion time
33- gpmc,oe-off Output-enable de-assertion time
34- gpmc,we-on: Write-enable assertion time
35- gpmc,we-off: Write-enable de-assertion time
36- gpmc,access: Start cycle to first data capture (read access)
37- gpmc,rd-cycle: Total read cycle time
38- gpmc,wr-cycle: Total write cycle time
39- reg: Chip-select, base address (relative to chip-select)
40 and size of the memory mapped for the device.
41 Note that base address will be typically 0 as this
42 is the start of the chip-select.
43
44Optional properties:
45- gpmc,XXX Additional GPMC timings and settings parameters. See
46 Documentation/devicetree/bindings/bus/ti-gpmc.txt
47
48Example:
49
50gpmc: gpmc@6e000000 {
51 compatible = "ti,omap3430-gpmc";
52 ti,hwmods = "gpmc";
53 reg = <0x6e000000 0x1000>;
54 interrupts = <20>;
55 gpmc,num-cs = <8>;
56 gpmc,num-waitpins = <4>;
57 #address-cells = <2>;
58 #size-cells = <1>;
59
60 ranges = <5 0 0x2c000000 0x1000000>;
61
62 ethernet@5,0 {
63 compatible = "smsc,lan9221", "smsc,lan9115";
64 reg = <5 0 0xff>;
65 bank-width = <2>;
66
67 gpmc,mux-add-data;
68 gpmc,cs-on = <0>;
69 gpmc,cs-rd-off = <186>;
70 gpmc,cs-wr-off = <186>;
71 gpmc,adv-on = <12>;
72 gpmc,adv-rd-off = <48>;
73 gpmc,adv-wr-off = <48>;
74 gpmc,oe-on = <54>;
75 gpmc,oe-off = <168>;
76 gpmc,we-on = <54>;
77 gpmc,we-off = <168>;
78 gpmc,rd-cycle = <186>;
79 gpmc,wr-cycle = <186>;
80 gpmc,access = <114>;
81 gpmc,page-burst-access = <6>;
82 gpmc,bus-turnaround = <12>;
83 gpmc,cycle2cycle-delay = <18>;
84 gpmc,wr-data-mux-bus = <90>;
85 gpmc,wr-access = <186>;
86 gpmc,cycle2cycle-samecsen;
87 gpmc,cycle2cycle-diffcsen;
88
89 interrupt-parent = <&gpio6>;
90 interrupts = <16>;
91 vmmc-supply = <&vddvario>;
92 vmmc_aux-supply = <&vdd33a>;
93 reg-io-width = <4>;
94
95 smsc,save-mac-address;
96 };
97};
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt
new file mode 100644
index 000000000000..b3aa90f0ce44
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt
@@ -0,0 +1,57 @@
1VIA VT8500 and Wondermedia WM8xxx-series pinmux/gpio controller
2
3These SoCs contain a combined Pinmux/GPIO module. Each pin may operate as
4either a GPIO in, GPIO out or as an alternate function (I2C, SPI etc).
5
6Required properties:
7- compatible: "via,vt8500-pinctrl", "wm,wm8505-pinctrl", "wm,wm8650-pinctrl",
8 "wm8750-pinctrl" or "wm,wm8850-pinctrl"
9- reg: Should contain the physical address of the module's registers.
10- interrupt-controller: Marks the device node as an interrupt controller.
11- #interrupt-cells: Should be two.
12- gpio-controller: Marks the device node as a GPIO controller.
13- #gpio-cells : Should be two. The first cell is the pin number and the
14 second cell is used to specify optional parameters.
15 bit 0 - active low
16
17Please refer to ../gpio/gpio.txt for a general description of GPIO bindings.
18
19Please refer to pinctrl-bindings.txt in this directory for details of the
20common pinctrl bindings used by client devices, including the meaning of the
21phrase "pin configuration node".
22
23Each pin configuration node lists the pin(s) to which it applies, and one or
24more of the mux functions to select on those pin(s), and pull-up/down
25configuration. Each subnode only affects those parameters that are explicitly
26listed. In other words, a subnode that lists only a mux function implies no
27information about any pull configuration. Similarly, a subnode that lists only
28a pull parameter implies no information about the mux function.
29
30Required subnode-properties:
31- wm,pins: An array of cells. Each cell contains the ID of a pin.
32
33Optional subnode-properties:
34- wm,function: Integer, containing the function to mux to the pin(s):
35 0: GPIO in
36 1: GPIO out
37 2: alternate
38
39- wm,pull: Integer, representing the pull-down/up to apply to the pin(s):
40 0: none
41 1: down
42 2: up
43
44Each of wm,function and wm,pull may contain either a single value which
45will be applied to all pins in wm,pins, or one value for each entry in
46wm,pins.
47
48Example:
49
50 pinctrl: pinctrl {
51 compatible = "wm,wm8505-pinctrl";
52 reg = <0xD8110000 0x10000>;
53 interrupt-controller;
54 #interrupt-cells = <2>;
55 gpio-controller;
56 #gpio-cells = <2>;
57 };
diff --git a/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt b/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt
new file mode 100644
index 000000000000..993695c659e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt
@@ -0,0 +1,17 @@
1Cadence TTC - Triple Timer Counter
2
3Required properties:
4- compatible : Should be "cdns,ttc".
5- reg : Specifies base physical address and size of the registers.
6- interrupts : A list of 3 interrupts; one per timer channel.
7- clocks: phandle to the source clock
8
9Example:
10
11ttc0: ttc0@f8001000 {
12 interrupt-parent = <&intc>;
13 interrupts = < 0 10 4 0 11 4 0 12 4 >;
14 compatible = "cdns,ttc";
15 reg = <0xF8001000 0x1000>;
16 clocks = <&cpu_clk 3>;
17};
diff --git a/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
index 1e1145ca4f3c..8f01cb190f25 100644
--- a/Documentation/devicetree/bindings/tty/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
@@ -11,6 +11,9 @@ Required properties:
11 - "nvidia,tegra20-uart" 11 - "nvidia,tegra20-uart"
12 - "nxp,lpc3220-uart" 12 - "nxp,lpc3220-uart"
13 - "ibm,qpace-nwp-serial" 13 - "ibm,qpace-nwp-serial"
14 - "altr,16550-FIFO32"
15 - "altr,16550-FIFO64"
16 - "altr,16550-FIFO128"
14 - "serial" if the port type is unknown. 17 - "serial" if the port type is unknown.
15- reg : offset and length of the register set for the device. 18- reg : offset and length of the register set for the device.
16- interrupts : should contain uart interrupt. 19- interrupts : should contain uart interrupt.
diff --git a/Documentation/hwmon/adm1275 b/Documentation/hwmon/adm1275
index 2cfa25667123..15b4a20d5062 100644
--- a/Documentation/hwmon/adm1275
+++ b/Documentation/hwmon/adm1275
@@ -15,7 +15,7 @@ Supported chips:
15 Addresses scanned: - 15 Addresses scanned: -
16 Datasheet: www.analog.com/static/imported-files/data_sheets/ADM1276.pdf 16 Datasheet: www.analog.com/static/imported-files/data_sheets/ADM1276.pdf
17 17
18Author: Guenter Roeck <guenter.roeck@ericsson.com> 18Author: Guenter Roeck <linux@roeck-us.net>
19 19
20 20
21Description 21Description
diff --git a/Documentation/hwmon/adt7410 b/Documentation/hwmon/adt7410
index 96004000dc2a..58150c480e56 100644
--- a/Documentation/hwmon/adt7410
+++ b/Documentation/hwmon/adt7410
@@ -4,9 +4,14 @@ Kernel driver adt7410
4Supported chips: 4Supported chips:
5 * Analog Devices ADT7410 5 * Analog Devices ADT7410
6 Prefix: 'adt7410' 6 Prefix: 'adt7410'
7 Addresses scanned: I2C 0x48 - 0x4B 7 Addresses scanned: None
8 Datasheet: Publicly available at the Analog Devices website 8 Datasheet: Publicly available at the Analog Devices website
9 http://www.analog.com/static/imported-files/data_sheets/ADT7410.pdf 9 http://www.analog.com/static/imported-files/data_sheets/ADT7410.pdf
10 * Analog Devices ADT7420
11 Prefix: 'adt7420'
12 Addresses scanned: None
13 Datasheet: Publicly available at the Analog Devices website
14 http://www.analog.com/static/imported-files/data_sheets/ADT7420.pdf
10 15
11Author: Hartmut Knaack <knaack.h@gmx.de> 16Author: Hartmut Knaack <knaack.h@gmx.de>
12 17
@@ -27,6 +32,10 @@ value per second or even justget one sample on demand for power saving.
27Besides, it can completely power down its ADC, if power management is 32Besides, it can completely power down its ADC, if power management is
28required. 33required.
29 34
35The ADT7420 is register compatible, the only differences being the package,
36a slightly narrower operating temperature range (-40°C to +150°C), and a
37better accuracy (0.25°C instead of 0.50°C.)
38
30Configuration Notes 39Configuration Notes
31------------------- 40-------------------
32 41
diff --git a/Documentation/hwmon/jc42 b/Documentation/hwmon/jc42
index 165077121238..868d74d6b773 100644
--- a/Documentation/hwmon/jc42
+++ b/Documentation/hwmon/jc42
@@ -49,7 +49,7 @@ Supported chips:
49 Addresses scanned: I2C 0x18 - 0x1f 49 Addresses scanned: I2C 0x18 - 0x1f
50 50
51Author: 51Author:
52 Guenter Roeck <guenter.roeck@ericsson.com> 52 Guenter Roeck <linux@roeck-us.net>
53 53
54 54
55Description 55Description
diff --git a/Documentation/hwmon/lineage-pem b/Documentation/hwmon/lineage-pem
index 2ba5ed126858..83b2ddc160c8 100644
--- a/Documentation/hwmon/lineage-pem
+++ b/Documentation/hwmon/lineage-pem
@@ -8,7 +8,7 @@ Supported devices:
8 Documentation: 8 Documentation:
9 http://www.lineagepower.com/oem/pdf/CPLI2C.pdf 9 http://www.lineagepower.com/oem/pdf/CPLI2C.pdf
10 10
11Author: Guenter Roeck <guenter.roeck@ericsson.com> 11Author: Guenter Roeck <linux@roeck-us.net>
12 12
13 13
14Description 14Description
diff --git a/Documentation/hwmon/lm25066 b/Documentation/hwmon/lm25066
index a21db81c4591..26025e419d35 100644
--- a/Documentation/hwmon/lm25066
+++ b/Documentation/hwmon/lm25066
@@ -19,7 +19,7 @@ Supported chips:
19 Datasheet: 19 Datasheet:
20 http://www.national.com/pf/LM/LM5066.html 20 http://www.national.com/pf/LM/LM5066.html
21 21
22Author: Guenter Roeck <guenter.roeck@ericsson.com> 22Author: Guenter Roeck <linux@roeck-us.net>
23 23
24 24
25Description 25Description
diff --git a/Documentation/hwmon/lm75 b/Documentation/hwmon/lm75
index c91a1d15fa28..69af1c7db6b7 100644
--- a/Documentation/hwmon/lm75
+++ b/Documentation/hwmon/lm75
@@ -23,7 +23,7 @@ Supported chips:
23 Datasheet: Publicly available at the Maxim website 23 Datasheet: Publicly available at the Maxim website
24 http://www.maxim-ic.com/ 24 http://www.maxim-ic.com/
25 * Microchip (TelCom) TCN75 25 * Microchip (TelCom) TCN75
26 Prefix: 'lm75' 26 Prefix: 'tcn75'
27 Addresses scanned: none 27 Addresses scanned: none
28 Datasheet: Publicly available at the Microchip website 28 Datasheet: Publicly available at the Microchip website
29 http://www.microchip.com/ 29 http://www.microchip.com/
diff --git a/Documentation/hwmon/ltc2978 b/Documentation/hwmon/ltc2978
index c365f9beb5dd..e4d75c606c97 100644
--- a/Documentation/hwmon/ltc2978
+++ b/Documentation/hwmon/ltc2978
@@ -5,13 +5,13 @@ Supported chips:
5 * Linear Technology LTC2978 5 * Linear Technology LTC2978
6 Prefix: 'ltc2978' 6 Prefix: 'ltc2978'
7 Addresses scanned: - 7 Addresses scanned: -
8 Datasheet: http://cds.linear.com/docs/Datasheet/2978fa.pdf 8 Datasheet: http://www.linear.com/product/ltc2978
9 * Linear Technology LTC3880 9 * Linear Technology LTC3880
10 Prefix: 'ltc3880' 10 Prefix: 'ltc3880'
11 Addresses scanned: - 11 Addresses scanned: -
12 Datasheet: http://cds.linear.com/docs/Datasheet/3880f.pdf 12 Datasheet: http://www.linear.com/product/ltc3880
13 13
14Author: Guenter Roeck <guenter.roeck@ericsson.com> 14Author: Guenter Roeck <linux@roeck-us.net>
15 15
16 16
17Description 17Description
diff --git a/Documentation/hwmon/ltc4261 b/Documentation/hwmon/ltc4261
index eba2e2c4b94d..9378a75c6134 100644
--- a/Documentation/hwmon/ltc4261
+++ b/Documentation/hwmon/ltc4261
@@ -8,7 +8,7 @@ Supported chips:
8 Datasheet: 8 Datasheet:
9 http://cds.linear.com/docs/Datasheet/42612fb.pdf 9 http://cds.linear.com/docs/Datasheet/42612fb.pdf
10 10
11Author: Guenter Roeck <guenter.roeck@ericsson.com> 11Author: Guenter Roeck <linux@roeck-us.net>
12 12
13 13
14Description 14Description
diff --git a/Documentation/hwmon/max16064 b/Documentation/hwmon/max16064
index f8b478076f6d..d59cc7829bec 100644
--- a/Documentation/hwmon/max16064
+++ b/Documentation/hwmon/max16064
@@ -7,7 +7,7 @@ Supported chips:
7 Addresses scanned: - 7 Addresses scanned: -
8 Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX16064.pdf 8 Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX16064.pdf
9 9
10Author: Guenter Roeck <guenter.roeck@ericsson.com> 10Author: Guenter Roeck <linux@roeck-us.net>
11 11
12 12
13Description 13Description
diff --git a/Documentation/hwmon/max16065 b/Documentation/hwmon/max16065
index c11f64a1f2ad..208a29e43010 100644
--- a/Documentation/hwmon/max16065
+++ b/Documentation/hwmon/max16065
@@ -24,7 +24,7 @@ Supported chips:
24 http://datasheets.maxim-ic.com/en/ds/MAX16070-MAX16071.pdf 24 http://datasheets.maxim-ic.com/en/ds/MAX16070-MAX16071.pdf
25 25
26 26
27Author: Guenter Roeck <guenter.roeck@ericsson.com> 27Author: Guenter Roeck <linux@roeck-us.net>
28 28
29 29
30Description 30Description
diff --git a/Documentation/hwmon/max34440 b/Documentation/hwmon/max34440
index 47651ff341ae..37cbf472a19d 100644
--- a/Documentation/hwmon/max34440
+++ b/Documentation/hwmon/max34440
@@ -27,7 +27,7 @@ Supported chips:
27 Addresses scanned: - 27 Addresses scanned: -
28 Datasheet: http://datasheets.maximintegrated.com/en/ds/MAX34461.pdf 28 Datasheet: http://datasheets.maximintegrated.com/en/ds/MAX34461.pdf
29 29
30Author: Guenter Roeck <guenter.roeck@ericsson.com> 30Author: Guenter Roeck <linux@roeck-us.net>
31 31
32 32
33Description 33Description
diff --git a/Documentation/hwmon/max8688 b/Documentation/hwmon/max8688
index fe849871df32..e78078638b91 100644
--- a/Documentation/hwmon/max8688
+++ b/Documentation/hwmon/max8688
@@ -7,7 +7,7 @@ Supported chips:
7 Addresses scanned: - 7 Addresses scanned: -
8 Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8688.pdf 8 Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8688.pdf
9 9
10Author: Guenter Roeck <guenter.roeck@ericsson.com> 10Author: Guenter Roeck <linux@roeck-us.net>
11 11
12 12
13Description 13Description
diff --git a/Documentation/hwmon/pmbus b/Documentation/hwmon/pmbus
index 3d3a0f97f966..cf756ed48ff9 100644
--- a/Documentation/hwmon/pmbus
+++ b/Documentation/hwmon/pmbus
@@ -34,7 +34,7 @@ Supported chips:
34 Addresses scanned: - 34 Addresses scanned: -
35 Datasheet: n.a. 35 Datasheet: n.a.
36 36
37Author: Guenter Roeck <guenter.roeck@ericsson.com> 37Author: Guenter Roeck <linux@roeck-us.net>
38 38
39 39
40Description 40Description
diff --git a/Documentation/hwmon/smm665 b/Documentation/hwmon/smm665
index 59e316140542..a341eeedab75 100644
--- a/Documentation/hwmon/smm665
+++ b/Documentation/hwmon/smm665
@@ -29,7 +29,7 @@ Supported chips:
29 http://www.summitmicro.com/prod_select/summary/SMM766/SMM766_2086.pdf 29 http://www.summitmicro.com/prod_select/summary/SMM766/SMM766_2086.pdf
30 http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf 30 http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf
31 31
32Author: Guenter Roeck <guenter.roeck@ericsson.com> 32Author: Guenter Roeck <linux@roeck-us.net>
33 33
34 34
35Module Parameters 35Module Parameters
diff --git a/Documentation/hwmon/ucd9000 b/Documentation/hwmon/ucd9000
index 0df5f276505b..805e33edb978 100644
--- a/Documentation/hwmon/ucd9000
+++ b/Documentation/hwmon/ucd9000
@@ -11,7 +11,7 @@ Supported chips:
11 http://focus.ti.com/lit/ds/symlink/ucd9090.pdf 11 http://focus.ti.com/lit/ds/symlink/ucd9090.pdf
12 http://focus.ti.com/lit/ds/symlink/ucd90910.pdf 12 http://focus.ti.com/lit/ds/symlink/ucd90910.pdf
13 13
14Author: Guenter Roeck <guenter.roeck@ericsson.com> 14Author: Guenter Roeck <linux@roeck-us.net>
15 15
16 16
17Description 17Description
diff --git a/Documentation/hwmon/ucd9200 b/Documentation/hwmon/ucd9200
index fd7d07b1908a..1e8060e631bd 100644
--- a/Documentation/hwmon/ucd9200
+++ b/Documentation/hwmon/ucd9200
@@ -15,7 +15,7 @@ Supported chips:
15 http://focus.ti.com/lit/ds/symlink/ucd9246.pdf 15 http://focus.ti.com/lit/ds/symlink/ucd9246.pdf
16 http://focus.ti.com/lit/ds/symlink/ucd9248.pdf 16 http://focus.ti.com/lit/ds/symlink/ucd9248.pdf
17 17
18Author: Guenter Roeck <guenter.roeck@ericsson.com> 18Author: Guenter Roeck <linux@roeck-us.net>
19 19
20 20
21Description 21Description
diff --git a/Documentation/hwmon/zl6100 b/Documentation/hwmon/zl6100
index 3d924b6b59e9..756b57c6b73e 100644
--- a/Documentation/hwmon/zl6100
+++ b/Documentation/hwmon/zl6100
@@ -54,7 +54,7 @@ http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146401
54http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146256 54http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146256
55 55
56 56
57Author: Guenter Roeck <guenter.roeck@ericsson.com> 57Author: Guenter Roeck <linux@roeck-us.net>
58 58
59 59
60Description 60Description
diff --git a/Documentation/i2c/busses/i2c-diolan-u2c b/Documentation/i2c/busses/i2c-diolan-u2c
index 30fe4bb9a069..0d6018c316c7 100644
--- a/Documentation/i2c/busses/i2c-diolan-u2c
+++ b/Documentation/i2c/busses/i2c-diolan-u2c
@@ -5,7 +5,7 @@ Supported adapters:
5 Documentation: 5 Documentation:
6 http://www.diolan.com/i2c/u2c12.html 6 http://www.diolan.com/i2c/u2c12.html
7 7
8Author: Guenter Roeck <guenter.roeck@ericsson.com> 8Author: Guenter Roeck <linux@roeck-us.net>
9 9
10Description 10Description
11----------- 11-----------
diff --git a/Documentation/input/alps.txt b/Documentation/input/alps.txt
index 3262b6e4d686..e544c7ff8cfa 100644
--- a/Documentation/input/alps.txt
+++ b/Documentation/input/alps.txt
@@ -3,10 +3,26 @@ ALPS Touchpad Protocol
3 3
4Introduction 4Introduction
5------------ 5------------
6 6Currently the ALPS touchpad driver supports five protocol versions in use by
7Currently the ALPS touchpad driver supports four protocol versions in use by 7ALPS touchpads, called versions 1, 2, 3, 4 and 5.
8ALPS touchpads, called versions 1, 2, 3, and 4. Information about the various 8
9protocol versions is contained in the following sections. 9Since roughly mid-2010 several new ALPS touchpads have been released and
10integrated into a variety of laptops and netbooks. These new touchpads
11have enough behavior differences that the alps_model_data definition
12table, describing the properties of the different versions, is no longer
13adequate. The design choices were to re-define the alps_model_data
14table, with the risk of regression testing existing devices, or isolate
15the new devices outside of the alps_model_data table. The latter design
16choice was made. The new touchpad signatures are named: "Rushmore",
17"Pinnacle", and "Dolphin", which you will see in the alps.c code.
18For the purposes of this document, this group of ALPS touchpads will
19generically be called "new ALPS touchpads".
20
21We experimented with probing the ACPI interface _HID (Hardware ID)/_CID
22(Compatibility ID) definition as a way to uniquely identify the
23different ALPS variants but there did not appear to be a 1:1 mapping.
24In fact, it appeared to be an m:n mapping between the _HID and actual
25hardware type.
10 26
11Detection 27Detection
12--------- 28---------
@@ -20,9 +36,13 @@ If the E6 report is successful, the touchpad model is identified using the "E7
20report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is 36report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
21matched against known models in the alps_model_data_array. 37matched against known models in the alps_model_data_array.
22 38
23With protocol versions 3 and 4, the E7 report model signature is always 39For older touchpads supporting protocol versions 3 and 4, the E7 report
2473-02-64. To differentiate between these versions, the response from the 40model signature is always 73-02-64. To differentiate between these
25"Enter Command Mode" sequence must be inspected as described below. 41versions, the response from the "Enter Command Mode" sequence must be
42inspected as described below.
43
44The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
45seem to be better differentiated by the EC Command Mode response.
26 46
27Command Mode 47Command Mode
28------------ 48------------
@@ -47,6 +67,14 @@ address of the register being read, and the third contains the value of the
47register. Registers are written by writing the value one nibble at a time 67register. Registers are written by writing the value one nibble at a time
48using the same encoding used for addresses. 68using the same encoding used for addresses.
49 69
70For the new ALPS touchpads, the EC command is used to enter command
71mode. The response in the new ALPS touchpads is significantly different,
72and more important in determining the behavior. This code has been
73separated from the original alps_model_data table and put in the
74alps_identify function. For example, there seem to be two hardware init
75sequences for the "Dolphin" touchpads as determined by the second byte
76of the EC response.
77
50Packet Format 78Packet Format
51------------- 79-------------
52 80
@@ -187,3 +215,28 @@ There are several things worth noting here.
187 well. 215 well.
188 216
189So far no v4 devices with tracksticks have been encountered. 217So far no v4 devices with tracksticks have been encountered.
218
219ALPS Absolute Mode - Protocol Version 5
220---------------------------------------
221This is basically Protocol Version 3 but with different logic for packet
222decode. It uses the same alps_process_touchpad_packet_v3 call with a
223specialized decode_fields function pointer to correctly interpret the
224packets. This appears to only be used by the Dolphin devices.
225
226For single-touch, the 6-byte packet format is:
227
228 byte 0: 1 1 0 0 1 0 0 0
229 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
230 byte 2: 0 y6 y5 y4 y3 y2 y1 y0
231 byte 3: 0 M R L 1 m r l
232 byte 4: y10 y9 y8 y7 x10 x9 x8 x7
233 byte 5: 0 z6 z5 z4 z3 z2 z1 z0
234
235For mt, the format is:
236
237 byte 0: 1 1 1 n3 1 n2 n1 x24
238 byte 1: 1 y7 y6 y5 y4 y3 y2 y1
239 byte 2: ? x2 x1 y12 y11 y10 y9 y8
240 byte 3: 0 x23 x22 x21 x20 x19 x18 x17
241 byte 4: 0 x9 x8 x7 x6 x5 x4 x3
242 byte 5: 0 x16 x15 x14 x13 x12 x11 x10
diff --git a/Documentation/networking/ipvs-sysctl.txt b/Documentation/networking/ipvs-sysctl.txt
index f2a2488f1bf3..9573d0c48c6e 100644
--- a/Documentation/networking/ipvs-sysctl.txt
+++ b/Documentation/networking/ipvs-sysctl.txt
@@ -15,6 +15,13 @@ amemthresh - INTEGER
15 enabled and the variable is automatically set to 2, otherwise 15 enabled and the variable is automatically set to 2, otherwise
16 the strategy is disabled and the variable is set to 1. 16 the strategy is disabled and the variable is set to 1.
17 17
18backup_only - BOOLEAN
19 0 - disabled (default)
20 not 0 - enabled
21
22 If set, disable the director function while the server is
23 in backup mode to avoid packet loops for DR/TUN methods.
24
18conntrack - BOOLEAN 25conntrack - BOOLEAN
19 0 - disabled (default) 26 0 - disabled (default)
20 not 0 - enabled 27 not 0 - enabled
diff --git a/Documentation/networking/tuntap.txt b/Documentation/networking/tuntap.txt
index c0aab985bad9..949d5dcdd9a3 100644
--- a/Documentation/networking/tuntap.txt
+++ b/Documentation/networking/tuntap.txt
@@ -105,6 +105,83 @@ Copyright (C) 1999-2000 Maxim Krasnyansky <max_mk@yahoo.com>
105 Proto [2 bytes] 105 Proto [2 bytes]
106 Raw protocol(IP, IPv6, etc) frame. 106 Raw protocol(IP, IPv6, etc) frame.
107 107
108 3.3 Multiqueue tuntap interface:
109
110 From version 3.8, Linux supports multiqueue tuntap which can uses multiple
111 file descriptors (queues) to parallelize packets sending or receiving. The
112 device allocation is the same as before, and if user wants to create multiple
113 queues, TUNSETIFF with the same device name must be called many times with
114 IFF_MULTI_QUEUE flag.
115
116 char *dev should be the name of the device, queues is the number of queues to
117 be created, fds is used to store and return the file descriptors (queues)
118 created to the caller. Each file descriptor were served as the interface of a
119 queue which could be accessed by userspace.
120
121 #include <linux/if.h>
122 #include <linux/if_tun.h>
123
124 int tun_alloc_mq(char *dev, int queues, int *fds)
125 {
126 struct ifreq ifr;
127 int fd, err, i;
128
129 if (!dev)
130 return -1;
131
132 memset(&ifr, 0, sizeof(ifr));
133 /* Flags: IFF_TUN - TUN device (no Ethernet headers)
134 * IFF_TAP - TAP device
135 *
136 * IFF_NO_PI - Do not provide packet information
137 * IFF_MULTI_QUEUE - Create a queue of multiqueue device
138 */
139 ifr.ifr_flags = IFF_TAP | IFF_NO_PI | IFF_MULTI_QUEUE;
140 strcpy(ifr.ifr_name, dev);
141
142 for (i = 0; i < queues; i++) {
143 if ((fd = open("/dev/net/tun", O_RDWR)) < 0)
144 goto err;
145 err = ioctl(fd, TUNSETIFF, (void *)&ifr);
146 if (err) {
147 close(fd);
148 goto err;
149 }
150 fds[i] = fd;
151 }
152
153 return 0;
154 err:
155 for (--i; i >= 0; i--)
156 close(fds[i]);
157 return err;
158 }
159
160 A new ioctl(TUNSETQUEUE) were introduced to enable or disable a queue. When
161 calling it with IFF_DETACH_QUEUE flag, the queue were disabled. And when
162 calling it with IFF_ATTACH_QUEUE flag, the queue were enabled. The queue were
163 enabled by default after it was created through TUNSETIFF.
164
165 fd is the file descriptor (queue) that we want to enable or disable, when
166 enable is true we enable it, otherwise we disable it
167
168 #include <linux/if.h>
169 #include <linux/if_tun.h>
170
171 int tun_set_queue(int fd, int enable)
172 {
173 struct ifreq ifr;
174
175 memset(&ifr, 0, sizeof(ifr));
176
177 if (enable)
178 ifr.ifr_flags = IFF_ATTACH_QUEUE;
179 else
180 ifr.ifr_flags = IFF_DETACH_QUEUE;
181
182 return ioctl(fd, TUNSETQUEUE, (void *)&ifr);
183 }
184
108Universal TUN/TAP device driver Frequently Asked Question. 185Universal TUN/TAP device driver Frequently Asked Question.
109 186
1101. What platforms are supported by TUN/TAP driver ? 1871. What platforms are supported by TUN/TAP driver ?
diff --git a/Documentation/power/opp.txt b/Documentation/power/opp.txt
index 3035d00757ad..425c51d56aef 100644
--- a/Documentation/power/opp.txt
+++ b/Documentation/power/opp.txt
@@ -1,6 +1,5 @@
1*=============* 1Operating Performance Points (OPP) Library
2* OPP Library * 2==========================================
3*=============*
4 3
5(C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated 4(C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated
6 5
@@ -16,15 +15,31 @@ Contents
16 15
171. Introduction 161. Introduction
18=============== 17===============
181.1 What is an Operating Performance Point (OPP)?
19
19Complex SoCs of today consists of a multiple sub-modules working in conjunction. 20Complex SoCs of today consists of a multiple sub-modules working in conjunction.
20In an operational system executing varied use cases, not all modules in the SoC 21In an operational system executing varied use cases, not all modules in the SoC
21need to function at their highest performing frequency all the time. To 22need to function at their highest performing frequency all the time. To
22facilitate this, sub-modules in a SoC are grouped into domains, allowing some 23facilitate this, sub-modules in a SoC are grouped into domains, allowing some
23domains to run at lower voltage and frequency while other domains are loaded 24domains to run at lower voltage and frequency while other domains run at
24more. The set of discrete tuples consisting of frequency and voltage pairs that 25voltage/frequency pairs that are higher.
26
27The set of discrete tuples consisting of frequency and voltage pairs that
25the device will support per domain are called Operating Performance Points or 28the device will support per domain are called Operating Performance Points or
26OPPs. 29OPPs.
27 30
31As an example:
32Let us consider an MPU device which supports the following:
33{300MHz at minimum voltage of 1V}, {800MHz at minimum voltage of 1.2V},
34{1GHz at minimum voltage of 1.3V}
35
36We can represent these as three OPPs as the following {Hz, uV} tuples:
37{300000000, 1000000}
38{800000000, 1200000}
39{1000000000, 1300000}
40
411.2 Operating Performance Points Library
42
28OPP library provides a set of helper functions to organize and query the OPP 43OPP library provides a set of helper functions to organize and query the OPP
29information. The library is located in drivers/base/power/opp.c and the header 44information. The library is located in drivers/base/power/opp.c and the header
30is located in include/linux/opp.h. OPP library can be enabled by enabling 45is located in include/linux/opp.h. OPP library can be enabled by enabling
diff --git a/Documentation/printk-formats.txt b/Documentation/printk-formats.txt
index e8a6aa473bab..6e953564de03 100644
--- a/Documentation/printk-formats.txt
+++ b/Documentation/printk-formats.txt
@@ -170,5 +170,5 @@ Reminder: sizeof() result is of type size_t.
170Thank you for your cooperation and attention. 170Thank you for your cooperation and attention.
171 171
172 172
173By Randy Dunlap <rdunlap@xenotime.net> and 173By Randy Dunlap <rdunlap@infradead.org> and
174Andrew Murray <amurray@mpc-data.co.uk> 174Andrew Murray <amurray@mpc-data.co.uk>
diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt
index ce6581c8ca26..4499bd948860 100644
--- a/Documentation/sound/alsa/ALSA-Configuration.txt
+++ b/Documentation/sound/alsa/ALSA-Configuration.txt
@@ -912,7 +912,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
912 models depending on the codec chip. The list of available models 912 models depending on the codec chip. The list of available models
913 is found in HD-Audio-Models.txt 913 is found in HD-Audio-Models.txt
914 914
915 The model name "genric" is treated as a special case. When this 915 The model name "generic" is treated as a special case. When this
916 model is given, the driver uses the generic codec parser without 916 model is given, the driver uses the generic codec parser without
917 "codec-patch". It's sometimes good for testing and debugging. 917 "codec-patch". It's sometimes good for testing and debugging.
918 918
diff --git a/Documentation/sound/alsa/seq_oss.html b/Documentation/sound/alsa/seq_oss.html
index d9776cf60c07..9663b45f6fde 100644
--- a/Documentation/sound/alsa/seq_oss.html
+++ b/Documentation/sound/alsa/seq_oss.html
@@ -285,7 +285,7 @@ sample data.
285<H4> 285<H4>
2867.2.4 Close Callback</H4> 2867.2.4 Close Callback</H4>
287The <TT>close</TT> callback is called when this device is closed by the 287The <TT>close</TT> callback is called when this device is closed by the
288applicaion. If any private data was allocated in open callback, it must 288application. If any private data was allocated in open callback, it must
289be released in the close callback. The deletion of ALSA port should be 289be released in the close callback. The deletion of ALSA port should be
290done here, too. This callback must not be NULL. 290done here, too. This callback must not be NULL.
291<H4> 291<H4>
diff --git a/Documentation/trace/ftrace.txt b/Documentation/trace/ftrace.txt
index 53d6a3c51d87..a372304aef10 100644
--- a/Documentation/trace/ftrace.txt
+++ b/Documentation/trace/ftrace.txt
@@ -1873,7 +1873,7 @@ feature:
1873 1873
1874 status\input | 0 | 1 | else | 1874 status\input | 0 | 1 | else |
1875 --------------+------------+------------+------------+ 1875 --------------+------------+------------+------------+
1876 not allocated |(do nothing)| alloc+swap | EINVAL | 1876 not allocated |(do nothing)| alloc+swap |(do nothing)|
1877 --------------+------------+------------+------------+ 1877 --------------+------------+------------+------------+
1878 allocated | free | swap | clear | 1878 allocated | free | swap | clear |
1879 --------------+------------+------------+------------+ 1879 --------------+------------+------------+------------+
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-08 07:44:38 -0500