8 files changed, 657 insertions, 5 deletions

diff --git a/Documentation/SubmittingDrivers b/Documentation/SubmittingDrivers
index dd311cff1cc3..6bd30fdd0786 100644
--- a/Documentation/SubmittingDrivers
+++ b/Documentation/SubmittingDrivers
@@ -143,7 +143,7 @@ KernelNewbies:
         http://kernelnewbies.org/
 
 Linux USB project:
-        http://linux-usb.sourceforge.net/
+        http://www.linux-usb.org/
 
 How to NOT write kernel driver by arjanv@redhat.com
         http://people.redhat.com/arjanv/olspaper.pdf
diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches
index 6198e5ebcf65..c2c85bcb3d43 100644
--- a/Documentation/SubmittingPatches
+++ b/Documentation/SubmittingPatches
@@ -478,10 +478,11 @@ Andrew Morton, "The perfect patch" (tpp).
 Jeff Garzik, "Linux kernel patch submission format."
   <http://linux.yyz.us/patch-format.html>
 
-Greg Kroah, "How to piss off a kernel subsystem maintainer".
+Greg Kroah-Hartman "How to piss off a kernel subsystem maintainer".
   <http://www.kroah.com/log/2005/03/31/>
   <http://www.kroah.com/log/2005/07/08/>
   <http://www.kroah.com/log/2005/10/19/>
+  <http://www.kroah.com/log/2006/01/11/>
 
 NO!!!! No more huge patch bombs to linux-kernel@vger.kernel.org people!.
   <http://marc.theaimsgroup.com/?l=linux-kernel&m=112112749912944&w=2>
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index 9474501dd6cc..b4a1ea762698 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -123,6 +123,15 @@ Who:	Christoph Hellwig <hch@lst.de>
 
 ---------------------------
 
+What:   CONFIG_FORCED_INLINING
+When:   June 2006
+Why:    Config option is there to see if gcc is good enough. (in january
+        2006). If it is, the behavior should just be the default. If it's not,
+        the option should just go away entirely.
+Who:    Arjan van de Ven
+
+---------------------------
+
 What:   START_ARRAY ioctl for md
 When:   July 2006
 Files:  drivers/md/md.c
diff --git a/Documentation/filesystems/tmpfs.txt b/Documentation/filesystems/tmpfs.txt
index 0d783c504ead..dbe4d87d2615 100644
--- a/Documentation/filesystems/tmpfs.txt
+++ b/Documentation/filesystems/tmpfs.txt
@@ -78,6 +78,18 @@ use up all the memory on the machine; but enhances the scalability of
 that instance in a system with many cpus making intensive use of it.
 
 
+tmpfs has a mount option to set the NUMA memory allocation policy for
+all files in that instance:
+mpol=interleave         prefers to allocate memory from each node in turn
+mpol=default            prefers to allocate memory from the local node
+mpol=bind               prefers to allocate from mpol_nodelist
+mpol=preferred          prefers to allocate from first node in mpol_nodelist
+
+The following mount option is used in conjunction with mpol=interleave,
+mpol=bind or mpol=preferred:
+mpol_nodelist:  nodelist suitable for parsing with nodelist_parse.
+
+
 To specify the initial root directory you can use the following mount
 options:
 
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index fe11fccf7e41..1cbcf65b764b 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -471,7 +471,7 @@ running once the system is up.
                         arch/i386/kernel/cpu/cpufreq/elanfreq.c.
 
         elevator=       [IOSCHED]
-                        Format: {"as" | "cfq" | "deadline" | "noop"}
+                        Format: {"anticipatory" | "cfq" | "deadline" | "noop"}
                         See Documentation/block/as-iosched.txt and
                         Documentation/block/deadline-iosched.txt for details.
 
@@ -712,9 +712,17 @@ running once the system is up.
         load_ramdisk=   [RAM] List of ramdisks to load from floppy
                         See Documentation/ramdisk.txt.
 
-        lockd.udpport=  [NFS]
+        lockd.nlm_grace_period=P  [NFS] Assign grace period.
+                        Format: <integer>
+
+        lockd.nlm_tcpport=N     [NFS] Assign TCP port.
+                        Format: <integer>
 
-        lockd.tcpport=  [NFS]
+        lockd.nlm_timeout=T     [NFS] Assign timeout value.
+                        Format: <integer>
+
+        lockd.nlm_udpport=M     [NFS] Assign UDP port.
+                        Format: <integer>
 
         logibm.irq=     [HW,MOUSE] Logitech Bus Mouse Driver
                         Format: <irq>
diff --git a/Documentation/scsi/aacraid.txt b/Documentation/scsi/aacraid.txt
new file mode 100644
index 000000000000..820fd0793502
--- /dev/null
+++ b/Documentation/scsi/aacraid.txt
@@ -0,0 +1,108 @@
+AACRAID Driver for Linux (take two)
+
+Introduction
+-------------------------
+The aacraid driver adds support for Adaptec (http://www.adaptec.com)
+RAID controllers. This is a major rewrite from the original
+Adaptec supplied driver. It has signficantly cleaned up both the code
+and the running binary size (the module is less than half the size of
+the original).
+
+Supported Cards/Chipsets
+-------------------------
+        PCI ID (pci.ids)        OEM     Product
+        9005:0285:9005:028a     Adaptec 2020ZCR (Skyhawk)
+        9005:0285:9005:028e     Adaptec 2020SA (Skyhawk)
+        9005:0285:9005:028b     Adaptec 2025ZCR (Terminator)
+        9005:0285:9005:028f     Adaptec 2025SA (Terminator)
+        9005:0285:9005:0286     Adaptec 2120S (Crusader)
+        9005:0286:9005:028d     Adaptec 2130S (Lancer)
+        9005:0285:9005:0285     Adaptec 2200S (Vulcan)
+        9005:0285:9005:0287     Adaptec 2200S (Vulcan-2m)
+        9005:0286:9005:028c     Adaptec 2230S (Lancer)
+        9005:0286:9005:028c     Adaptec 2230SLP (Lancer)
+        9005:0285:9005:0296     Adaptec 2240S (SabreExpress)
+        9005:0285:9005:0290     Adaptec 2410SA (Jaguar)
+        9005:0285:9005:0293     Adaptec 21610SA (Corsair-16)
+        9005:0285:103c:3227     Adaptec 2610SA (Bearcat)
+        9005:0285:9005:0292     Adaptec 2810SA (Corsair-8)
+        9005:0285:9005:0294     Adaptec Prowler
+        9005:0286:9005:029d     Adaptec 2420SA (Intruder)
+        9005:0286:9005:029c     Adaptec 2620SA (Intruder)
+        9005:0286:9005:029b     Adaptec 2820SA (Intruder)
+        9005:0286:9005:02a7     Adaptec 2830SA (Skyray)
+        9005:0286:9005:02a8     Adaptec 2430SA (Skyray)
+        9005:0285:9005:0288     Adaptec 3230S (Harrier)
+        9005:0285:9005:0289     Adaptec 3240S (Tornado)
+        9005:0285:9005:0298     Adaptec 4000SAS (BlackBird)
+        9005:0285:9005:0297     Adaptec 4005SAS (AvonPark)
+        9005:0285:9005:0299     Adaptec 4800SAS (Marauder-X)
+        9005:0285:9005:029a     Adaptec 4805SAS (Marauder-E)
+        9005:0286:9005:02a2     Adaptec 4810SAS (Hurricane)
+        1011:0046:9005:0364     Adaptec 5400S (Mustang)
+        1011:0046:9005:0365     Adaptec 5400S (Mustang)
+        9005:0283:9005:0283     Adaptec Catapult (3210S with arc firmware)
+        9005:0284:9005:0284     Adaptec Tomcat (3410S with arc firmware)
+        9005:0287:9005:0800     Adaptec Themisto (Jupiter)
+        9005:0200:9005:0200     Adaptec Themisto (Jupiter)
+        9005:0286:9005:0800     Adaptec Callisto (Jupiter)
+        1011:0046:9005:1364     Dell    PERC 2/QC (Quad Channel, Mustang)
+        1028:0001:1028:0001     Dell    PERC 2/Si (Iguana)
+        1028:0003:1028:0003     Dell    PERC 3/Si (SlimFast)
+        1028:0002:1028:0002     Dell    PERC 3/Di (Opal)
+        1028:0004:1028:0004     Dell    PERC 3/DiF (Iguana)
+        1028:0002:1028:00d1     Dell    PERC 3/DiV (Viper)
+        1028:0002:1028:00d9     Dell    PERC 3/DiL (Lexus)
+        1028:000a:1028:0106     Dell    PERC 3/DiJ (Jaguar)
+        1028:000a:1028:011b     Dell    PERC 3/DiD (Dagger)
+        1028:000a:1028:0121     Dell    PERC 3/DiB (Boxster)
+        9005:0285:1028:0287     Dell    PERC 320/DC (Vulcan)
+        9005:0285:1028:0291     Dell    CERC 2 (DellCorsair)
+        1011:0046:103c:10c2     HP      NetRAID-4M (Mustang)
+        9005:0285:17aa:0286     Legend  S220 (Crusader)
+        9005:0285:17aa:0287     Legend  S230 (Vulcan)
+        9005:0285:9005:0290     IBM     ServeRAID 7t (Jaguar)
+        9005:0285:1014:02F2     IBM     ServeRAID 8i (AvonPark)
+        9005:0285:1014:0312     IBM     ServeRAID 8i (AvonParkLite)
+        9005:0286:1014:9580     IBM     ServeRAID 8k/8k-l8 (Aurora)
+        9005:0286:1014:9540     IBM     ServeRAID 8k/8k-l4 (AuroraLite)
+        9005:0286:9005:029f     ICP     ICP9014R0 (Lancer)
+        9005:0286:9005:029e     ICP     ICP9024R0 (Lancer)
+        9005:0286:9005:02a0     ICP     ICP9047MA (Lancer)
+        9005:0286:9005:02a1     ICP     ICP9087MA (Lancer)
+        9005:0286:9005:02a4     ICP     ICP9085LI (Marauder-X)
+        9005:0286:9005:02a5     ICP     ICP5085BR (Marauder-E)
+        9005:0286:9005:02a3     ICP     ICP5085AU (Hurricane)
+        9005:0286:9005:02a6     ICP     ICP9067MA (Intruder-6)
+        9005:0286:9005:02a9     ICP     ICP5087AU (Skyray)
+        9005:0286:9005:02aa     ICP     ICP5047AU (Skyray)
+
+People
+-------------------------
+Alan Cox <alan@redhat.com>
+Christoph Hellwig <hch@infradead.org>   (updates for new-style PCI probing and SCSI host registration,
+                                         small cleanups/fixes)
+Matt Domsch <matt_domsch@dell.com>      (revision ioctl, adapter messages)
+Deanna Bonds                            (non-DASD support, PAE fibs and 64 bit, added new adaptec controllers
+                                         added new ioctls, changed scsi interface to use new error handler,
+                                         increased the number of fibs and outstanding commands to a container)
+
+                                        (fixed 64bit and 64G memory model, changed confusing naming convention
+                                         where fibs that go to the hardware are consistently called hw_fibs and
+                                         not just fibs like the name of the driver tracking structure)
+Mark Salyzyn <Mark_Salyzyn@adaptec.com> Fixed panic issues and added some new product ids for upcoming hbas. Performance tuning, card failover and bug mitigations.
+
+Original Driver
+-------------------------
+Adaptec Unix OEM Product Group
+
+Mailing List
+-------------------------
+linux-scsi@vger.kernel.org (Interested parties troll here)
+Also note this is very different to Brian's original driver
+so don't expect him to support it.
+Adaptec does support this driver.  Contact Adaptec tech support or
+aacraid@adaptec.com
+
+Original by Brian Boerner February 2001
+Rewritten by Alan Cox, November 2001
diff --git a/Documentation/spi/butterfly b/Documentation/spi/butterfly
new file mode 100644
index 000000000000..a2e8c8d90e35
--- /dev/null
+++ b/Documentation/spi/butterfly
@@ -0,0 +1,57 @@
+spi_butterfly - parport-to-butterfly adapter driver
+===================================================
+
+This is a hardware and software project that includes building and using
+a parallel port adapter cable, together with an "AVR Butterfly" to run
+firmware for user interfacing and/or sensors.  A Butterfly is a $US20
+battery powered card with an AVR microcontroller and lots of goodies:
+sensors, LCD, flash, toggle stick, and more.  You can use AVR-GCC to
+develop firmware for this, and flash it using this adapter cable.
+
+You can make this adapter from an old printer cable and solder things
+directly to the Butterfly.  Or (if you have the parts and skills) you
+can come up with something fancier, providing ciruit protection to the
+Butterfly and the printer port, or with a better power supply than two
+signal pins from the printer port.
+
+
+The first cable connections will hook Linux up to one SPI bus, with the
+AVR and a DataFlash chip; and to the AVR reset line.  This is all you
+need to reflash the firmware, and the pins are the standard Atmel "ISP"
+connector pins (used also on non-Butterfly AVR boards).
+
+        Signal    Butterfly       Parport (DB-25)
+        ------    ---------       ---------------
+        SCK     = J403.PB1/SCK  = pin 2/D0
+        RESET   = J403.nRST     = pin 3/D1
+        VCC     = J403.VCC_EXT  = pin 8/D6
+        MOSI    = J403.PB2/MOSI = pin 9/D7
+        MISO    = J403.PB3/MISO = pin 11/S7,nBUSY
+        GND     = J403.GND      = pin 23/GND
+
+Then to let Linux master that bus to talk to the DataFlash chip, you must
+(a) flash new firmware that disables SPI (set PRR.2, and disable pullups
+by clearing PORTB.[0-3]); (b) configure the mtd_dataflash driver; and
+(c) cable in the chipselect.
+
+        Signal    Butterfly       Parport (DB-25)
+        ------    ---------       ---------------
+        VCC     = J400.VCC_EXT  = pin 7/D5
+        SELECT  = J400.PB0/nSS  = pin 17/C3,nSELECT
+        GND     = J400.GND      = pin 24/GND
+
+The "USI" controller, using J405, can be used for a second SPI bus.  That
+would let you talk to the AVR over SPI, running firmware that makes it act
+as an SPI slave, while letting either Linux or the AVR use the DataFlash.
+There are plenty of spare parport pins to wire this one up, such as:
+
+        Signal    Butterfly       Parport (DB-25)
+        ------    ---------       ---------------
+        SCK     = J403.PE4/USCK = pin 5/D3
+        MOSI    = J403.PE5/DI   = pin 6/D4
+        MISO    = J403.PE6/DO   = pin 12/S5,nPAPEROUT
+        GND     = J403.GND      = pin 22/GND
+
+        IRQ     = J402.PF4      = pin 10/S6,ACK
+        GND     = J402.GND(P2)  = pin 25/GND
+
diff --git a/Documentation/spi/spi-summary b/Documentation/spi/spi-summary
new file mode 100644
index 000000000000..a5ffba33a351
--- /dev/null
+++ b/Documentation/spi/spi-summary
@@ -0,0 +1,457 @@
+Overview of Linux kernel SPI support
+====================================
+
+02-Dec-2005
+
+What is SPI?
+------------
+The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
+link used to connect microcontrollers to sensors, memory, and peripherals.
+
+The three signal wires hold a clock (SCLK, often on the order of 10 MHz),
+and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
+Slave Out" (MISO) signals.  (Other names are also used.)  There are four
+clocking modes through which data is exchanged; mode-0 and mode-3 are most
+commonly used.  Each clock cycle shifts data out and data in; the clock
+doesn't cycle except when there is data to shift.
+
+SPI masters may use a "chip select" line to activate a given SPI slave
+device, so those three signal wires may be connected to several chips
+in parallel.  All SPI slaves support chipselects.  Some devices have
+other signals, often including an interrupt to the master.
+
+Unlike serial busses like USB or SMBUS, even low level protocols for
+SPI slave functions are usually not interoperable between vendors
+(except for cases like SPI memory chips).
+
+  - SPI may be used for request/response style device protocols, as with
+    touchscreen sensors and memory chips.
+
+  - It may also be used to stream data in either direction (half duplex),
+    or both of them at the same time (full duplex).
+
+  - Some devices may use eight bit words.  Others may different word
+    lengths, such as streams of 12-bit or 20-bit digital samples.
+
+In the same way, SPI slaves will only rarely support any kind of automatic
+discovery/enumeration protocol.  The tree of slave devices accessible from
+a given SPI master will normally be set up manually, with configuration
+tables.
+
+SPI is only one of the names used by such four-wire protocols, and
+most controllers have no problem handling "MicroWire" (think of it as
+half-duplex SPI, for request/response protocols), SSP ("Synchronous
+Serial Protocol"), PSP ("Programmable Serial Protocol"), and other
+related protocols.
+
+Microcontrollers often support both master and slave sides of the SPI
+protocol.  This document (and Linux) currently only supports the master
+side of SPI interactions.
+
+
+Who uses it?  On what kinds of systems?
+---------------------------------------
+Linux developers using SPI are probably writing device drivers for embedded
+systems boards.  SPI is used to control external chips, and it is also a
+protocol supported by every MMC or SD memory card.  (The older "DataFlash"
+cards, predating MMC cards but using the same connectors and card shape,
+support only SPI.)  Some PC hardware uses SPI flash for BIOS code.
+
+SPI slave chips range from digital/analog converters used for analog
+sensors and codecs, to memory, to peripherals like USB controllers
+or Ethernet adapters; and more.
+
+Most systems using SPI will integrate a few devices on a mainboard.
+Some provide SPI links on expansion connectors; in cases where no
+dedicated SPI controller exists, GPIO pins can be used to create a
+low speed "bitbanging" adapter.  Very few systems will "hotplug" an SPI
+controller; the reasons to use SPI focus on low cost and simple operation,
+and if dynamic reconfiguration is important, USB will often be a more
+appropriate low-pincount peripheral bus.
+
+Many microcontrollers that can run Linux integrate one or more I/O
+interfaces with SPI modes.  Given SPI support, they could use MMC or SD
+cards without needing a special purpose MMC/SD/SDIO controller.
+
+
+How do these driver programming interfaces work?
+------------------------------------------------
+The <linux/spi/spi.h> header file includes kerneldoc, as does the
+main source code, and you should certainly read that.  This is just
+an overview, so you get the big picture before the details.
+
+SPI requests always go into I/O queues.  Requests for a given SPI device
+are always executed in FIFO order, and complete asynchronously through
+completion callbacks.  There are also some simple synchronous wrappers
+for those calls, including ones for common transaction types like writing
+a command and then reading its response.
+
+There are two types of SPI driver, here called:
+
+  Controller drivers ... these are often built in to System-On-Chip
+        processors, and often support both Master and Slave roles.
+        These drivers touch hardware registers and may use DMA.
+        Or they can be PIO bitbangers, needing just GPIO pins.
+
+  Protocol drivers ... these pass messages through the controller
+        driver to communicate with a Slave or Master device on the
+        other side of an SPI link.
+
+So for example one protocol driver might talk to the MTD layer to export
+data to filesystems stored on SPI flash like DataFlash; and others might
+control audio interfaces, present touchscreen sensors as input interfaces,
+or monitor temperature and voltage levels during industrial processing.
+And those might all be sharing the same controller driver.
+
+A "struct spi_device" encapsulates the master-side interface between
+those two types of driver.  At this writing, Linux has no slave side
+programming interface.
+
+There is a minimal core of SPI programming interfaces, focussing on
+using driver model to connect controller and protocol drivers using
+device tables provided by board specific initialization code.  SPI
+shows up in sysfs in several locations:
+
+   /sys/devices/.../CTLR/spiB.C ... spi_device for on bus "B",
+        chipselect C, accessed through CTLR.
+
+   /sys/devices/.../CTLR/spiB.C/modalias ... identifies the driver
+        that should be used with this device (for hotplug/coldplug)
+
+   /sys/bus/spi/devices/spiB.C ... symlink to the physical
+        spiB-C device
+
+   /sys/bus/spi/drivers/D ... driver for one or more spi*.* devices
+
+   /sys/class/spi_master/spiB ... class device for the controller
+        managing bus "B".  All the spiB.* devices share the same
+        physical SPI bus segment, with SCLK, MOSI, and MISO.
+
+
+How does board-specific init code declare SPI devices?
+------------------------------------------------------
+Linux needs several kinds of information to properly configure SPI devices.
+That information is normally provided by board-specific code, even for
+chips that do support some of automated discovery/enumeration.
+
+DECLARE CONTROLLERS
+
+The first kind of information is a list of what SPI controllers exist.
+For System-on-Chip (SOC) based boards, these will usually be platform
+devices, and the controller may need some platform_data in order to
+operate properly.  The "struct platform_device" will include resources
+like the physical address of the controller's first register and its IRQ.
+
+Platforms will often abstract the "register SPI controller" operation,
+maybe coupling it with code to initialize pin configurations, so that
+the arch/.../mach-*/board-*.c files for several boards can all share the
+same basic controller setup code.  This is because most SOCs have several
+SPI-capable controllers, and only the ones actually usable on a given
+board should normally be set up and registered.
+
+So for example arch/.../mach-*/board-*.c files might have code like:
+
+        #include <asm/arch/spi.h>       /* for mysoc_spi_data */
+
+        /* if your mach-* infrastructure doesn't support kernels that can
+         * run on multiple boards, pdata wouldn't benefit from "__init".
+         */
+        static struct mysoc_spi_data __init pdata = { ... };
+
+        static __init board_init(void)
+        {
+                ...
+                /* this board only uses SPI controller #2 */
+                mysoc_register_spi(2, &pdata);
+                ...
+        }
+
+And SOC-specific utility code might look something like:
+
+        #include <asm/arch/spi.h>
+
+        static struct platform_device spi2 = { ... };
+
+        void mysoc_register_spi(unsigned n, struct mysoc_spi_data *pdata)
+        {
+                struct mysoc_spi_data *pdata2;
+
+                pdata2 = kmalloc(sizeof *pdata2, GFP_KERNEL);
+                *pdata2 = pdata;
+                ...
+                if (n == 2) {
+                        spi2->dev.platform_data = pdata2;
+                        register_platform_device(&spi2);
+
+                        /* also: set up pin modes so the spi2 signals are
+                         * visible on the relevant pins ... bootloaders on
+                         * production boards may already have done this, but
+                         * developer boards will often need Linux to do it.
+                         */
+                }
+                ...
+        }
+
+Notice how the platform_data for boards may be different, even if the
+same SOC controller is used.  For example, on one board SPI might use
+an external clock, where another derives the SPI clock from current
+settings of some master clock.
+
+
+DECLARE SLAVE DEVICES
+
+The second kind of information is a list of what SPI slave devices exist
+on the target board, often with some board-specific data needed for the
+driver to work correctly.
+
+Normally your arch/.../mach-*/board-*.c files would provide a small table
+listing the SPI devices on each board.  (This would typically be only a
+small handful.)  That might look like:
+
+        static struct ads7846_platform_data ads_info = {
+                .vref_delay_usecs       = 100,
+                .x_plate_ohms           = 580,
+                .y_plate_ohms           = 410,
+        };
+
+        static struct spi_board_info spi_board_info[] __initdata = {
+        {
+                .modalias       = "ads7846",
+                .platform_data  = &ads_info,
+                .mode           = SPI_MODE_0,
+                .irq            = GPIO_IRQ(31),
+                .max_speed_hz   = 120000 /* max sample rate at 3V */ * 16,
+                .bus_num        = 1,
+                .chip_select    = 0,
+        },
+        };
+
+Again, notice how board-specific information is provided; each chip may need
+several types.  This example shows generic constraints like the fastest SPI
+clock to allow (a function of board voltage in this case) or how an IRQ pin
+is wired, plus chip-specific constraints like an important delay that's
+changed by the capacitance at one pin.
+
+(There's also "controller_data", information that may be useful to the
+controller driver.  An example would be peripheral-specific DMA tuning
+data or chipselect callbacks.  This is stored in spi_device later.)
+
+The board_info should provide enough information to let the system work
+without the chip's driver being loaded.  The most troublesome aspect of
+that is likely the SPI_CS_HIGH bit in the spi_device.mode field, since
+sharing a bus with a device that interprets chipselect "backwards" is
+not possible.
+
+Then your board initialization code would register that table with the SPI
+infrastructure, so that it's available later when the SPI master controller
+driver is registered:
+
+        spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
+
+Like with other static board-specific setup, you won't unregister those.
+
+The widely used "card" style computers bundle memory, cpu, and little else
+onto a card that's maybe just thirty square centimeters.  On such systems,
+your arch/.../mach-.../board-*.c file would primarily provide information
+about the devices on the mainboard into which such a card is plugged.  That
+certainly includes SPI devices hooked up through the card connectors!
+
+
+NON-STATIC CONFIGURATIONS
+
+Developer boards often play by different rules than product boards, and one
+example is the potential need to hotplug SPI devices and/or controllers.
+
+For those cases you might need to use use spi_busnum_to_master() to look
+up the spi bus master, and will likely need spi_new_device() to provide the
+board info based on the board that was hotplugged.  Of course, you'd later
+call at least spi_unregister_device() when that board is removed.
+
+When Linux includes support for MMC/SD/SDIO/DataFlash cards through SPI, those
+configurations will also be dynamic.  Fortunately, those devices all support
+basic device identification probes, so that support should hotplug normally.
+
+
+How do I write an "SPI Protocol Driver"?
+----------------------------------------
+All SPI drivers are currently kernel drivers.  A userspace driver API
+would just be another kernel driver, probably offering some lowlevel
+access through aio_read(), aio_write(), and ioctl() calls and using the
+standard userspace sysfs mechanisms to bind to a given SPI device.
+
+SPI protocol drivers somewhat resemble platform device drivers:
+
+        static struct spi_driver CHIP_driver = {
+                .driver = {
+                        .name           = "CHIP",
+                        .bus            = &spi_bus_type,
+                        .owner          = THIS_MODULE,
+                },
+
+                .probe          = CHIP_probe,
+                .remove         = __devexit_p(CHIP_remove),
+                .suspend        = CHIP_suspend,
+                .resume         = CHIP_resume,
+        };
+
+The driver core will autmatically attempt to bind this driver to any SPI
+device whose board_info gave a modalias of "CHIP".  Your probe() code
+might look like this unless you're creating a class_device:
+
+        static int __devinit CHIP_probe(struct spi_device *spi)
+        {
+                struct CHIP                     *chip;
+                struct CHIP_platform_data       *pdata;
+
+                /* assuming the driver requires board-specific data: */
+                pdata = &spi->dev.platform_data;
+                if (!pdata)
+                        return -ENODEV;
+
+                /* get memory for driver's per-chip state */
+                chip = kzalloc(sizeof *chip, GFP_KERNEL);
+                if (!chip)
+                        return -ENOMEM;
+                dev_set_drvdata(&spi->dev, chip);
+
+                ... etc
+                return 0;
+        }
+
+As soon as it enters probe(), the driver may issue I/O requests to
+the SPI device using "struct spi_message".  When remove() returns,
+the driver guarantees that it won't submit any more such messages.
+
+  - An spi_message is a sequence of of protocol operations, executed
+    as one atomic sequence.  SPI driver controls include:
+
+      + when bidirectional reads and writes start ... by how its
+        sequence of spi_transfer requests is arranged;
+
+      + optionally defining short delays after transfers ... using
+        the spi_transfer.delay_usecs setting;
+
+      + whether the chipselect becomes inactive after a transfer and
+        any delay ... by using the spi_transfer.cs_change flag;
+
+      + hinting whether the next message is likely to go to this same
+        device ... using the spi_transfer.cs_change flag on the last
+        transfer in that atomic group, and potentially saving costs
+        for chip deselect and select operations.
+
+  - Follow standard kernel rules, and provide DMA-safe buffers in
+    your messages.  That way controller drivers using DMA aren't forced
+    to make extra copies unless the hardware requires it (e.g. working
+    around hardware errata that force the use of bounce buffering).
+
+    If standard dma_map_single() handling of these buffers is inappropriate,
+    you can use spi_message.is_dma_mapped to tell the controller driver
+    that you've already provided the relevant DMA addresses.
+
+  - The basic I/O primitive is spi_async().  Async requests may be
+    issued in any context (irq handler, task, etc) and completion
+    is reported using a callback provided with the message.
+    After any detected error, the chip is deselected and processing
+    of that spi_message is aborted.
+
+  - There are also synchronous wrappers like spi_sync(), and wrappers
+    like spi_read(), spi_write(), and spi_write_then_read().  These
+    may be issued only in contexts that may sleep, and they're all
+    clean (and small, and "optional") layers over spi_async().
+
+  - The spi_write_then_read() call, and convenience wrappers around
+    it, should only be used with small amounts of data where the
+    cost of an extra copy may be ignored.  It's designed to support
+    common RPC-style requests, such as writing an eight bit command
+    and reading a sixteen bit response -- spi_w8r16() being one its
+    wrappers, doing exactly that.
+
+Some drivers may need to modify spi_device characteristics like the
+transfer mode, wordsize, or clock rate.  This is done with spi_setup(),
+which would normally be called from probe() before the first I/O is
+done to the device.
+
+While "spi_device" would be the bottom boundary of the driver, the
+upper boundaries might include sysfs (especially for sensor readings),
+the input layer, ALSA, networking, MTD, the character device framework,
+or other Linux subsystems.
+
+Note that there are two types of memory your driver must manage as part
+of interacting with SPI devices.
+
+  - I/O buffers use the usual Linux rules, and must be DMA-safe.
+    You'd normally allocate them from the heap or free page pool.
+    Don't use the stack, or anything that's declared "static".
+
+  - The spi_message and spi_transfer metadata used to glue those
+    I/O buffers into a group of protocol transactions.  These can
+    be allocated anywhere it's convenient, including as part of
+    other allocate-once driver data structures.  Zero-init these.
+
+If you like, spi_message_alloc() and spi_message_free() convenience
+routines are available to allocate and zero-initialize an spi_message
+with several transfers.
+
+
+How do I write an "SPI Master Controller Driver"?
+-------------------------------------------------
+An SPI controller will probably be registered on the platform_bus; write
+a driver to bind to the device, whichever bus is involved.
+
+The main task of this type of driver is to provide an "spi_master".
+Use spi_alloc_master() to allocate the master, and class_get_devdata()
+to get the driver-private data allocated for that device.
+
+        struct spi_master       *master;
+        struct CONTROLLER       *c;
+
+        master = spi_alloc_master(dev, sizeof *c);
+        if (!master)
+                return -ENODEV;
+
+        c = class_get_devdata(&master->cdev);
+
+The driver will initialize the fields of that spi_master, including the
+bus number (maybe the same as the platform device ID) and three methods
+used to interact with the SPI core and SPI protocol drivers.  It will
+also initialize its own internal state.
+
+    master->setup(struct spi_device *spi)
+        This sets up the device clock rate, SPI mode, and word sizes.
+        Drivers may change the defaults provided by board_info, and then
+        call spi_setup(spi) to invoke this routine.  It may sleep.
+
+    master->transfer(struct spi_device *spi, struct spi_message *message)
+        This must not sleep.  Its responsibility is arrange that the
+        transfer happens and its complete() callback is issued; the two
+        will normally happen later, after other transfers complete.
+
+    master->cleanup(struct spi_device *spi)
+        Your controller driver may use spi_device.controller_state to hold
+        state it dynamically associates with that device.  If you do that,
+        be sure to provide the cleanup() method to free that state.
+
+The bulk of the driver will be managing the I/O queue fed by transfer().
+
+That queue could be purely conceptual.  For example, a driver used only
+for low-frequency sensor acess might be fine using synchronous PIO.
+
+But the queue will probably be very real, using message->queue, PIO,
+often DMA (especially if the root filesystem is in SPI flash), and
+execution contexts like IRQ handlers, tasklets, or workqueues (such
+as keventd).  Your driver can be as fancy, or as simple, as you need.
+
+
+THANKS TO
+---------
+Contributors to Linux-SPI discussions include (in alphabetical order,
+by last name):
+
+David Brownell
+Russell King
+Dmitry Pervushin
+Stephen Street
+Mark Underwood
+Andrew Victor
+Vitaly Wool
+