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-rw-r--r--Documentation/devicetree/bindings/arm/primecell.txt21
-rw-r--r--Documentation/devicetree/bindings/crypto/fsl-sec2.txt (renamed from Documentation/devicetree/bindings/powerpc/fsl/sec.txt)2
-rw-r--r--Documentation/devicetree/bindings/tty/serial/of-serial.txt36
3 files changed, 58 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/primecell.txt b/Documentation/devicetree/bindings/arm/primecell.txt
new file mode 100644
index 000000000000..1d5d7a870ec7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/primecell.txt
@@ -0,0 +1,21 @@
1* ARM Primecell Peripherals
2
3ARM, Ltd. Primecell peripherals have a standard id register that can be used to
4identify the peripheral type, vendor, and revision. This value can be used for
5driver matching.
6
7Required properties:
8
9- compatible : should be a specific value for peripheral and "arm,primecell"
10
11Optional properties:
12
13- arm,primecell-periphid : Value to override the h/w value with
14
15Example:
16
17serial@fff36000 {
18 compatible = "arm,pl011", "arm,primecell";
19 arm,primecell-periphid = <0x00341011>;
20};
21
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/sec.txt b/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
index 2b6f2d45c45a..38988ef1336b 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/sec.txt
+++ b/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
@@ -1,4 +1,4 @@
1Freescale SoC SEC Security Engines 1Freescale SoC SEC Security Engines versions 2.x-3.x
2 2
3Required properties: 3Required properties:
4 4
diff --git a/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
new file mode 100644
index 000000000000..b8b27b0aca10
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
@@ -0,0 +1,36 @@
1* UART (Universal Asynchronous Receiver/Transmitter)
2
3Required properties:
4- compatible : one of:
5 - "ns8250"
6 - "ns16450"
7 - "ns16550a"
8 - "ns16550"
9 - "ns16750"
10 - "ns16850"
11 - "nvidia,tegra20-uart"
12 - "ibm,qpace-nwp-serial"
13 - "serial" if the port type is unknown.
14- reg : offset and length of the register set for the device.
15- interrupts : should contain uart interrupt.
16- clock-frequency : the input clock frequency for the UART.
17
18Optional properties:
19- current-speed : the current active speed of the UART.
20- reg-offset : offset to apply to the mapbase from the start of the registers.
21- reg-shift : quantity to shift the register offsets by.
22- reg-io-width : the size (in bytes) of the IO accesses that should be
23 performed on the device. There are some systems that require 32-bit
24 accesses to the UART (e.g. TI davinci).
25- used-by-rtas : set to indicate that the port is in use by the OpenFirmware
26 RTAS and should not be registered.
27
28Example:
29
30 uart@80230000 {
31 compatible = "ns8250";
32 reg = <0x80230000 0x100>;
33 clock-frequency = <3686400>;
34 interrupts = <10>;
35 reg-shift = <2>;
36 };