diff options
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/cpu-hotplug.txt | 49 | ||||
-rw-r--r-- | Documentation/hwmon/k10temp | 60 | ||||
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/mpic.txt | 42 | ||||
-rw-r--r-- | Documentation/trace/events-kmem.txt | 14 |
4 files changed, 126 insertions, 39 deletions
diff --git a/Documentation/cpu-hotplug.txt b/Documentation/cpu-hotplug.txt index 4d4a644b505e..a99d7031cdf9 100644 --- a/Documentation/cpu-hotplug.txt +++ b/Documentation/cpu-hotplug.txt | |||
@@ -315,41 +315,26 @@ A: The following are what is required for CPU hotplug infrastructure to work | |||
315 | 315 | ||
316 | Q: I need to ensure that a particular cpu is not removed when there is some | 316 | Q: I need to ensure that a particular cpu is not removed when there is some |
317 | work specific to this cpu is in progress. | 317 | work specific to this cpu is in progress. |
318 | A: First switch the current thread context to preferred cpu | 318 | A: There are two ways. If your code can be run in interrupt context, use |
319 | smp_call_function_single(), otherwise use work_on_cpu(). Note that | ||
320 | work_on_cpu() is slow, and can fail due to out of memory: | ||
319 | 321 | ||
320 | int my_func_on_cpu(int cpu) | 322 | int my_func_on_cpu(int cpu) |
321 | { | 323 | { |
322 | cpumask_t saved_mask, new_mask = CPU_MASK_NONE; | 324 | int err; |
323 | int curr_cpu, err = 0; | 325 | get_online_cpus(); |
324 | 326 | if (!cpu_online(cpu)) | |
325 | saved_mask = current->cpus_allowed; | 327 | err = -EINVAL; |
326 | cpu_set(cpu, new_mask); | 328 | else |
327 | err = set_cpus_allowed(current, new_mask); | 329 | #if NEEDS_BLOCKING |
328 | 330 | err = work_on_cpu(cpu, __my_func_on_cpu, NULL); | |
329 | if (err) | 331 | #else |
330 | return err; | 332 | smp_call_function_single(cpu, __my_func_on_cpu, &err, |
331 | 333 | true); | |
332 | /* | 334 | #endif |
333 | * If we got scheduled out just after the return from | 335 | put_online_cpus(); |
334 | * set_cpus_allowed() before running the work, this ensures | 336 | return err; |
335 | * we stay locked. | 337 | } |
336 | */ | ||
337 | curr_cpu = get_cpu(); | ||
338 | |||
339 | if (curr_cpu != cpu) { | ||
340 | err = -EAGAIN; | ||
341 | goto ret; | ||
342 | } else { | ||
343 | /* | ||
344 | * Do work : But cant sleep, since get_cpu() disables preempt | ||
345 | */ | ||
346 | } | ||
347 | ret: | ||
348 | put_cpu(); | ||
349 | set_cpus_allowed(current, saved_mask); | ||
350 | return err; | ||
351 | } | ||
352 | |||
353 | 338 | ||
354 | Q: How do we determine how many CPUs are available for hotplug. | 339 | Q: How do we determine how many CPUs are available for hotplug. |
355 | A: There is no clear spec defined way from ACPI that can give us that | 340 | A: There is no clear spec defined way from ACPI that can give us that |
diff --git a/Documentation/hwmon/k10temp b/Documentation/hwmon/k10temp new file mode 100644 index 000000000000..a7a18d453a51 --- /dev/null +++ b/Documentation/hwmon/k10temp | |||
@@ -0,0 +1,60 @@ | |||
1 | Kernel driver k10temp | ||
2 | ===================== | ||
3 | |||
4 | Supported chips: | ||
5 | * AMD Family 10h processors: | ||
6 | Socket F: Quad-Core/Six-Core/Embedded Opteron | ||
7 | Socket AM2+: Opteron, Phenom (II) X3/X4 | ||
8 | Socket AM3: Quad-Core Opteron, Athlon/Phenom II X2/X3/X4, Sempron II | ||
9 | Socket S1G3: Athlon II, Sempron, Turion II | ||
10 | * AMD Family 11h processors: | ||
11 | Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra) | ||
12 | |||
13 | Prefix: 'k10temp' | ||
14 | Addresses scanned: PCI space | ||
15 | Datasheets: | ||
16 | BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors: | ||
17 | http://support.amd.com/us/Processor_TechDocs/31116.pdf | ||
18 | BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors: | ||
19 | http://support.amd.com/us/Processor_TechDocs/41256.pdf | ||
20 | Revision Guide for AMD Family 10h Processors: | ||
21 | http://support.amd.com/us/Processor_TechDocs/41322.pdf | ||
22 | Revision Guide for AMD Family 11h Processors: | ||
23 | http://support.amd.com/us/Processor_TechDocs/41788.pdf | ||
24 | AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks: | ||
25 | http://support.amd.com/us/Processor_TechDocs/43373.pdf | ||
26 | AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet: | ||
27 | http://support.amd.com/us/Processor_TechDocs/43374.pdf | ||
28 | AMD Family 10h Desktop Processor Power and Thermal Data Sheet: | ||
29 | http://support.amd.com/us/Processor_TechDocs/43375.pdf | ||
30 | |||
31 | Author: Clemens Ladisch <clemens@ladisch.de> | ||
32 | |||
33 | Description | ||
34 | ----------- | ||
35 | |||
36 | This driver permits reading of the internal temperature sensor of AMD | ||
37 | Family 10h and 11h processors. | ||
38 | |||
39 | All these processors have a sensor, but on older revisions of Family 10h | ||
40 | processors, the sensor may return inconsistent values (erratum 319). The | ||
41 | driver will refuse to load on these revisions unless you specify the | ||
42 | "force=1" module parameter. | ||
43 | |||
44 | There is one temperature measurement value, available as temp1_input in | ||
45 | sysfs. It is measured in degrees Celsius with a resolution of 1/8th degree. | ||
46 | Please note that it is defined as a relative value; to quote the AMD manual: | ||
47 | |||
48 | Tctl is the processor temperature control value, used by the platform to | ||
49 | control cooling systems. Tctl is a non-physical temperature on an | ||
50 | arbitrary scale measured in degrees. It does _not_ represent an actual | ||
51 | physical temperature like die or case temperature. Instead, it specifies | ||
52 | the processor temperature relative to the point at which the system must | ||
53 | supply the maximum cooling for the processor's specified maximum case | ||
54 | temperature and maximum thermal power dissipation. | ||
55 | |||
56 | The maximum value for Tctl is available in the file temp1_max. | ||
57 | |||
58 | If the BIOS has enabled hardware temperature control, the threshold at | ||
59 | which the processor will throttle itself to avoid damage is available in | ||
60 | temp1_crit and temp1_crit_hyst. | ||
diff --git a/Documentation/powerpc/dts-bindings/fsl/mpic.txt b/Documentation/powerpc/dts-bindings/fsl/mpic.txt new file mode 100644 index 000000000000..71e39cf3215b --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/mpic.txt | |||
@@ -0,0 +1,42 @@ | |||
1 | * OpenPIC and its interrupt numbers on Freescale's e500/e600 cores | ||
2 | |||
3 | The OpenPIC specification does not specify which interrupt source has to | ||
4 | become which interrupt number. This is up to the software implementation | ||
5 | of the interrupt controller. The only requirement is that every | ||
6 | interrupt source has to have an unique interrupt number / vector number. | ||
7 | To accomplish this the current implementation assigns the number zero to | ||
8 | the first source, the number one to the second source and so on until | ||
9 | all interrupt sources have their unique number. | ||
10 | Usually the assigned vector number equals the interrupt number mentioned | ||
11 | in the documentation for a given core / CPU. This is however not true | ||
12 | for the e500 cores (MPC85XX CPUs) where the documentation distinguishes | ||
13 | between internal and external interrupt sources and starts counting at | ||
14 | zero for both of them. | ||
15 | |||
16 | So what to write for external interrupt source X or internal interrupt | ||
17 | source Y into the device tree? Here is an example: | ||
18 | |||
19 | The memory map for the interrupt controller in the MPC8544[0] shows, | ||
20 | that the first interrupt source starts at 0x5_0000 (PIC Register Address | ||
21 | Map-Interrupt Source Configuration Registers). This source becomes the | ||
22 | number zero therefore: | ||
23 | External interrupt 0 = interrupt number 0 | ||
24 | External interrupt 1 = interrupt number 1 | ||
25 | External interrupt 2 = interrupt number 2 | ||
26 | ... | ||
27 | Every interrupt number allocates 0x20 bytes register space. So to get | ||
28 | its number it is sufficient to shift the lower 16bits to right by five. | ||
29 | So for the external interrupt 10 we have: | ||
30 | 0x0140 >> 5 = 10 | ||
31 | |||
32 | After the external sources, the internal sources follow. The in core I2C | ||
33 | controller on the MPC8544 for instance has the internal source number | ||
34 | 27. Oo obtain its interrupt number we take the lower 16bits of its memory | ||
35 | address (0x5_0560) and shift it right: | ||
36 | 0x0560 >> 5 = 43 | ||
37 | |||
38 | Therefore the I2C device node for the MPC8544 CPU has to have the | ||
39 | interrupt number 43 specified in the device tree. | ||
40 | |||
41 | [0] MPC8544E PowerQUICCTM III, Integrated Host Processor Family Reference Manual | ||
42 | MPC8544ERM Rev. 1 10/2007 | ||
diff --git a/Documentation/trace/events-kmem.txt b/Documentation/trace/events-kmem.txt index 6ef2a8652e17..aa82ee4a5a87 100644 --- a/Documentation/trace/events-kmem.txt +++ b/Documentation/trace/events-kmem.txt | |||
@@ -1,7 +1,7 @@ | |||
1 | Subsystem Trace Points: kmem | 1 | Subsystem Trace Points: kmem |
2 | 2 | ||
3 | The tracing system kmem captures events related to object and page allocation | 3 | The kmem tracing system captures events related to object and page allocation |
4 | within the kernel. Broadly speaking there are four major subheadings. | 4 | within the kernel. Broadly speaking there are five major subheadings. |
5 | 5 | ||
6 | o Slab allocation of small objects of unknown type (kmalloc) | 6 | o Slab allocation of small objects of unknown type (kmalloc) |
7 | o Slab allocation of small objects of known type | 7 | o Slab allocation of small objects of known type |
@@ -9,7 +9,7 @@ within the kernel. Broadly speaking there are four major subheadings. | |||
9 | o Per-CPU Allocator Activity | 9 | o Per-CPU Allocator Activity |
10 | o External Fragmentation | 10 | o External Fragmentation |
11 | 11 | ||
12 | This document will describe what each of the tracepoints are and why they | 12 | This document describes what each of the tracepoints is and why they |
13 | might be useful. | 13 | might be useful. |
14 | 14 | ||
15 | 1. Slab allocation of small objects of unknown type | 15 | 1. Slab allocation of small objects of unknown type |
@@ -34,7 +34,7 @@ kmem_cache_free call_site=%lx ptr=%p | |||
34 | These events are similar in usage to the kmalloc-related events except that | 34 | These events are similar in usage to the kmalloc-related events except that |
35 | it is likely easier to pin the event down to a specific cache. At the time | 35 | it is likely easier to pin the event down to a specific cache. At the time |
36 | of writing, no information is available on what slab is being allocated from, | 36 | of writing, no information is available on what slab is being allocated from, |
37 | but the call_site can usually be used to extrapolate that information | 37 | but the call_site can usually be used to extrapolate that information. |
38 | 38 | ||
39 | 3. Page allocation | 39 | 3. Page allocation |
40 | ================== | 40 | ================== |
@@ -80,9 +80,9 @@ event indicating whether it is for a percpu_refill or not. | |||
80 | When the per-CPU list is too full, a number of pages are freed, each one | 80 | When the per-CPU list is too full, a number of pages are freed, each one |
81 | which triggers a mm_page_pcpu_drain event. | 81 | which triggers a mm_page_pcpu_drain event. |
82 | 82 | ||
83 | The individual nature of the events are so that pages can be tracked | 83 | The individual nature of the events is so that pages can be tracked |
84 | between allocation and freeing. A number of drain or refill pages that occur | 84 | between allocation and freeing. A number of drain or refill pages that occur |
85 | consecutively imply the zone->lock being taken once. Large amounts of PCP | 85 | consecutively imply the zone->lock being taken once. Large amounts of per-CPU |
86 | refills and drains could imply an imbalance between CPUs where too much work | 86 | refills and drains could imply an imbalance between CPUs where too much work |
87 | is being concentrated in one place. It could also indicate that the per-CPU | 87 | is being concentrated in one place. It could also indicate that the per-CPU |
88 | lists should be a larger size. Finally, large amounts of refills on one CPU | 88 | lists should be a larger size. Finally, large amounts of refills on one CPU |
@@ -102,6 +102,6 @@ is important. | |||
102 | 102 | ||
103 | Large numbers of this event implies that memory is fragmenting and | 103 | Large numbers of this event implies that memory is fragmenting and |
104 | high-order allocations will start failing at some time in the future. One | 104 | high-order allocations will start failing at some time in the future. One |
105 | means of reducing the occurange of this event is to increase the size of | 105 | means of reducing the occurrence of this event is to increase the size of |
106 | min_free_kbytes in increments of 3*pageblock_size*nr_online_nodes where | 106 | min_free_kbytes in increments of 3*pageblock_size*nr_online_nodes where |
107 | pageblock_size is usually the size of the default hugepage size. | 107 | pageblock_size is usually the size of the default hugepage size. |