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-rw-r--r--Documentation/powerpc/dts-bindings/fsl/i2c.txt30
1 files changed, 22 insertions, 8 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
index b6d2e21474f9..50da20310585 100644
--- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
@@ -2,15 +2,14 @@
2 2
3Required properties : 3Required properties :
4 4
5 - device_type : Should be "i2c"
6 - reg : Offset and length of the register set for the device 5 - reg : Offset and length of the register set for the device
6 - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
7 compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
8 mpc5200 or mpc5200b. For the mpc5121, an additional node
9 "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
7 10
8Recommended properties : 11Recommended properties :
9 12
10 - compatible : compatibility list with 2 entries, the first should
11 be "fsl,CHIP-i2c" where CHIP is the name of a compatible processor,
12 e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
13 should be "fsl-i2c".
14 - interrupts : <a b> where a is the interrupt number and b is a 13 - interrupts : <a b> where a is the interrupt number and b is a
15 field that represents an encoding of the sense and level 14 field that represents an encoding of the sense and level
16 information for the interrupt. This should be encoded based on 15 information for the interrupt. This should be encoded based on
@@ -24,25 +23,40 @@ Recommended properties :
24 23
25Examples : 24Examples :
26 25
26 /* MPC5121 based board */
27 i2c@1740 {
28 #address-cells = <1>;
29 #size-cells = <0>;
30 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
31 reg = <0x1740 0x20>;
32 interrupts = <11 0x8>;
33 interrupt-parent = <&ipic>;
34 clock-frequency = <100000>;
35 };
36
37 i2ccontrol@1760 {
38 compatible = "fsl,mpc5121-i2c-ctrl";
39 reg = <0x1760 0x8>;
40 };
41
42 /* MPC5200B based board */
27 i2c@3d00 { 43 i2c@3d00 {
28 #address-cells = <1>; 44 #address-cells = <1>;
29 #size-cells = <0>; 45 #size-cells = <0>;
30 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 46 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
31 cell-index = <0>;
32 reg = <0x3d00 0x40>; 47 reg = <0x3d00 0x40>;
33 interrupts = <2 15 0>; 48 interrupts = <2 15 0>;
34 interrupt-parent = <&mpc5200_pic>; 49 interrupt-parent = <&mpc5200_pic>;
35 fsl,preserve-clocking; 50 fsl,preserve-clocking;
36 }; 51 };
37 52
53 /* MPC8544 base board */
38 i2c@3100 { 54 i2c@3100 {
39 #address-cells = <1>; 55 #address-cells = <1>;
40 #size-cells = <0>; 56 #size-cells = <0>;
41 cell-index = <1>;
42 compatible = "fsl,mpc8544-i2c", "fsl-i2c"; 57 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
43 reg = <0x3100 0x100>; 58 reg = <0x3100 0x100>;
44 interrupts = <43 2>; 59 interrupts = <43 2>;
45 interrupt-parent = <&mpic>; 60 interrupt-parent = <&mpic>;
46 clock-frequency = <400000>; 61 clock-frequency = <400000>;
47 }; 62 };
48