2 files changed, 35 insertions, 1 deletions

diff --git a/Documentation/devicetree/bindings/arm/primecell.txt b/Documentation/devicetree/bindings/arm/primecell.txt
index 64fc82bc8928..0df6acacfaea 100644
--- a/Documentation/devicetree/bindings/arm/primecell.txt
+++ b/Documentation/devicetree/bindings/arm/primecell.txt
@@ -16,14 +16,31 @@ Optional properties:
 - clocks : From common clock binding. First clock is phandle to clock for apb
         pclk. Additional clocks are optional and specific to those peripherals.
 - clock-names : From common clock binding. Shall be "apb_pclk" for first clock.
+- dmas : From common DMA binding. If present, refers to one or more dma channels.
+- dma-names : From common DMA binding, needs to match the 'dmas' property.
+              Devices with exactly one receive and transmit channel shall name
+              these "rx" and "tx", respectively.
+- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
+- pinctrl-names : Names corresponding to the numbered pinctrl states
+- interrupts : one or more interrupt specifiers
+- interrupt-names : names corresponding to the interrupts properties
 
 Example:
 
 serial@fff36000 {
         compatible = "arm,pl011", "arm,primecell";
         arm,primecell-periphid = <0x00341011>;
+
         clocks = <&pclk>;
         clock-names = "apb_pclk";
-        
+
+        dmas = <&dma-controller 4>, <&dma-controller 5>;
+        dma-names = "rx", "tx"; 
+
+        pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>;
+        pinctrl-1 = <&uart0_sleep_mode>;
+        pinctrl-names = "default","sleep";
+
+        interrupts = <0 11 0x4>;
 };
 
diff --git a/Documentation/devicetree/bindings/serial/pl011.txt b/Documentation/devicetree/bindings/serial/pl011.txt
new file mode 100644
index 000000000000..5d2e840ae65c
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/pl011.txt
@@ -0,0 +1,17 @@
+* ARM AMBA Primecell PL011 serial UART
+
+Required properties:
+- compatible: must be "arm,primecell", "arm,pl011"
+- reg: exactly one register range with length 0x1000
+- interrupts: exactly one interrupt specifier
+
+Optional properties:
+- pinctrl: When present, must have one state named "sleep"
+           and one state named "default"
+- clocks:  When present, must refer to exactly one clock named
+           "apb_pclk"
+- dmas:    When present, may have one or two dma channels.
+           The first one must be named "rx", the second one
+           must be named "tx".
+
+See also bindings/arm/primecell.txt