3 files changed, 47 insertions, 3 deletions

diff --git a/Documentation/cpu-hotplug.txt b/Documentation/cpu-hotplug.txt
index 08c5d04f3086..e71bc6cbbc5e 100644
--- a/Documentation/cpu-hotplug.txt
+++ b/Documentation/cpu-hotplug.txt
@@ -11,6 +11,8 @@
                         Joel Schopp <jschopp@austin.ibm.com>
                 ia64/x86_64:
                         Ashok Raj <ashok.raj@intel.com>
+                s390:
+                        Heiko Carstens <heiko.carstens@de.ibm.com>
 
 Authors: Ashok Raj <ashok.raj@intel.com>
 Lots of feedback: Nathan Lynch <nathanl@austin.ibm.com>,
@@ -44,9 +46,23 @@ maxcpus=n    Restrict boot time cpus to n. Say if you have 4 cpus, using
              maxcpus=2 will only boot 2. You can choose to bring the
              other cpus later online, read FAQ's for more info.
 
-additional_cpus=n       [x86_64 only] use this to limit hotpluggable cpus.
-                        This option sets
-                        cpu_possible_map = cpu_present_map + additional_cpus
+additional_cpus=n       [x86_64, s390 only] use this to limit hotpluggable cpus.
+                          This option sets
+                        cpu_possible_map = cpu_present_map + additional_cpus
+
+ia64 and x86_64 use the number of disabled local apics in ACPI tables MADT
+to determine the number of potentially hot-pluggable cpus. The implementation
+should only rely on this to count the #of cpus, but *MUST* not rely on the
+apicid values in those tables for disabled apics. In the event BIOS doesnt
+mark such hot-pluggable cpus as disabled entries, one could use this
+parameter "additional_cpus=x" to represent those cpus in the cpu_possible_map.
+
+
+possible_cpus=n         [s390 only] use this to set hotpluggable cpus.
+                        This option sets possible_cpus bits in
+                        cpu_possible_map. Thus keeping the numbers of bits set
+                        constant even if the machine gets rebooted.
+                        This option overrides additional_cpus.
 
 CPU maps and such
 -----------------
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 84370363da80..b874771385cd 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1133,6 +1133,8 @@ running once the system is up.
                                 Mechanism 1.
                 conf2           [IA-32] Force use of PCI Configuration
                                 Mechanism 2.
+                nommconf        [IA-32,X86_64] Disable use of MMCONFIG for PCI
+                                Configuration
                 nosort          [IA-32] Don't sort PCI devices according to
                                 order given by the PCI BIOS. This sorting is
                                 done to get a device order compatible with
@@ -1636,6 +1638,9 @@ running once the system is up.
                         Format:
                         <irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]]
 
+        norandmaps      Don't use address space randomization
+                        Equivalent to echo 0 > /proc/sys/kernel/randomize_va_space
+
 
 ______________________________________________________________________
 Changelog:
diff --git a/Documentation/scsi/ChangeLog.megaraid_sas b/Documentation/scsi/ChangeLog.megaraid_sas
index f8c16cbf56ba..2dafa63bd370 100644
--- a/Documentation/scsi/ChangeLog.megaraid_sas
+++ b/Documentation/scsi/ChangeLog.megaraid_sas
@@ -1,3 +1,26 @@
+1 Release Date    : Wed Feb 03 14:31:44 PST 2006 - Sumant Patro <Sumant.Patro@lsil.com>
+2 Current Version : 00.00.02.04
+3 Older Version   : 00.00.02.04 
+
+i.      Support for 1078 type (ppc IOP) controller, device id : 0x60 added.
+        During initialization, depending on the device id, the template members 
+        are initialized with function pointers specific to the ppc or 
+        xscale controllers.  
+
+                -Sumant Patro <Sumant.Patro@lsil.com>
+                
+1 Release Date    : Fri Feb 03 14:16:25 PST 2006 - Sumant Patro 
+                                                        <Sumant.Patro@lsil.com>
+2 Current Version : 00.00.02.04
+3 Older Version   : 00.00.02.02 
+i.      Register 16 byte CDB capability with scsi midlayer 
+
+        "Ths patch properly registers the 16 byte command length capability of the 
+        megaraid_sas controlled hardware with the scsi midlayer. All megaraid_sas 
+        hardware supports 16 byte CDB's."
+
+                -Joshua Giles <joshua_giles@dell.com> 
+
 1 Release Date    : Mon Jan 23 14:09:01 PST 2006 - Sumant Patro <Sumant.Patro@lsil.com>
 2 Current Version : 00.00.02.02
 3 Older Version   : 00.00.02.01