77 files changed, 3633 insertions, 1521 deletions

diff --git a/Documentation/ABI/testing/configfs-usb-gadget-mass-storage b/Documentation/ABI/testing/configfs-usb-gadget-mass-storage
new file mode 100644
index 000000000000..ad72a37ee9ff
--- /dev/null
+++ b/Documentation/ABI/testing/configfs-usb-gadget-mass-storage
@@ -0,0 +1,31 @@
+What:           /config/usb-gadget/gadget/functions/mass_storage.name
+Date:           Oct 2013
+KenelVersion:   3.13
+Description:
+                The attributes:
+
+                stall           - Set to permit function to halt bulk endpoints.
+                                Disabled on some USB devices known not to work
+                                correctly. You should set it to true.
+                num_buffers     - Number of pipeline buffers. Valid numbers
+                                are 2..4. Available only if
+                                CONFIG_USB_GADGET_DEBUG_FILES is set.
+
+What:           /config/usb-gadget/gadget/functions/mass_storage.name/lun.name
+Date:           Oct 2013
+KenelVersion:   3.13
+Description:
+                The attributes:
+
+                file            - The path to the backing file for the LUN.
+                                Required if LUN is not marked as removable.
+                ro              - Flag specifying access to the LUN shall be
+                                read-only. This is implied if CD-ROM emulation
+                                is enabled as well as when it was impossible
+                                to open "filename" in R/W mode.
+                removable       - Flag specifying that LUN shall be indicated as
+                                being removable.
+                cdrom           - Flag specifying that LUN shall be reported as
+                                being a CD-ROM.
+                nofua           - Flag specifying that FUA flag
+                                in SCSI WRITE(10,12)
diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio
index 39c8de0e53d0..b20e829d350f 100644
--- a/Documentation/ABI/testing/sysfs-bus-iio
+++ b/Documentation/ABI/testing/sysfs-bus-iio
@@ -79,7 +79,7 @@ Description:
                 correspond to externally available input one of the named
                 versions may be used. The number must always be specified and
                 unique to allow association with event codes. Units after
-                application of scale and offset are microvolts.
+                application of scale and offset are millivolts.
 
 What:           /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_raw
 KernelVersion:  2.6.35
@@ -90,7 +90,7 @@ Description:
                 physically equivalent inputs when non differential readings are
                 separately available. In differential only parts, then all that
                 is required is a consistent labeling.  Units after application
-                of scale and offset are microvolts.
+                of scale and offset are millivolts.
 
 What:           /sys/bus/iio/devices/iio:deviceX/in_capacitanceY_raw
 KernelVersion:  3.2
@@ -537,6 +537,62 @@ Description:
                 value is in raw device units or in processed units (as _raw
                 and _input do on sysfs direct channel read attributes).
 
+What:           /sys/.../events/in_accel_x_thresh_rising_hysteresis
+What:           /sys/.../events/in_accel_x_thresh_falling_hysteresis
+What:           /sys/.../events/in_accel_x_thresh_either_hysteresis
+What:           /sys/.../events/in_accel_y_thresh_rising_hysteresis
+What:           /sys/.../events/in_accel_y_thresh_falling_hysteresis
+What:           /sys/.../events/in_accel_y_thresh_either_hysteresis
+What:           /sys/.../events/in_accel_z_thresh_rising_hysteresis
+What:           /sys/.../events/in_accel_z_thresh_falling_hysteresis
+What:           /sys/.../events/in_accel_z_thresh_either_hysteresis
+What:           /sys/.../events/in_anglvel_x_thresh_rising_hysteresis
+What:           /sys/.../events/in_anglvel_x_thresh_falling_hysteresis
+What:           /sys/.../events/in_anglvel_x_thresh_either_hysteresis
+What:           /sys/.../events/in_anglvel_y_thresh_rising_hysteresis
+What:           /sys/.../events/in_anglvel_y_thresh_falling_hysteresis
+What:           /sys/.../events/in_anglvel_y_thresh_either_hysteresis
+What:           /sys/.../events/in_anglvel_z_thresh_rising_hysteresis
+What:           /sys/.../events/in_anglvel_z_thresh_falling_hysteresis
+What:           /sys/.../events/in_anglvel_z_thresh_either_hysteresis
+What:           /sys/.../events/in_magn_x_thresh_rising_hysteresis
+What:           /sys/.../events/in_magn_x_thresh_falling_hysteresis
+What:           /sys/.../events/in_magn_x_thresh_either_hysteresis
+What:           /sys/.../events/in_magn_y_thresh_rising_hysteresis
+What:           /sys/.../events/in_magn_y_thresh_falling_hysteresis
+What:           /sys/.../events/in_magn_y_thresh_either_hysteresis
+What:           /sys/.../events/in_magn_z_thresh_rising_hysteresis
+What:           /sys/.../events/in_magn_z_thresh_falling_hysteresis
+What:           /sys/.../events/in_magn_z_thresh_either_hysteresis
+What:           /sys/.../events/in_voltageY_thresh_rising_hysteresis
+What:           /sys/.../events/in_voltageY_thresh_falling_hysteresis
+What:           /sys/.../events/in_voltageY_thresh_either_hysteresis
+What:           /sys/.../events/in_tempY_thresh_rising_hysteresis
+What:           /sys/.../events/in_tempY_thresh_falling_hysteresis
+What:           /sys/.../events/in_tempY_thresh_either_hysteresis
+What:           /sys/.../events/in_illuminance0_thresh_falling_hysteresis
+what:           /sys/.../events/in_illuminance0_thresh_rising_hysteresis
+what:           /sys/.../events/in_illuminance0_thresh_either_hysteresis
+what:           /sys/.../events/in_proximity0_thresh_falling_hysteresis
+what:           /sys/.../events/in_proximity0_thresh_rising_hysteresis
+what:           /sys/.../events/in_proximity0_thresh_either_hysteresis
+KernelVersion:  3.13
+Contact:        linux-iio@vger.kernel.org
+Description:
+                Specifies the hysteresis of threshold that the device is comparing
+                against for the events enabled by
+                <type>Y[_name]_thresh[_(rising|falling)]_hysteresis.
+                If separate attributes exist for the two directions, but
+                direction is not specified for this attribute, then a single
+                hysteresis value applies to both directions.
+                For falling events the hysteresis is added to the _value attribute for
+                this event to get the upper threshold for when the event goes back to
+                normal, for rising events the hysteresis is subtracted from the _value
+                attribute. E.g. if in_voltage0_raw_thresh_rising_value is set to 1200
+                and in_voltage0_raw_thresh_rising_hysteresis is set to 50. The event
+                will get activated once in_voltage0_raw goes above 1200 and will become
+                deactived again once the value falls below 1150.
+
 What:           /sys/.../events/in_accel_x_raw_roc_rising_value
 What:           /sys/.../events/in_accel_x_raw_roc_falling_value
 What:           /sys/.../events/in_accel_y_raw_roc_rising_value
@@ -811,3 +867,14 @@ Description:
                 Writing '1' stores the current device configuration into
                 on-chip EEPROM. After power-up or chip reset the device will
                 automatically load the saved configuration.
+
+What:           /sys/.../iio:deviceX/in_intensity_red_integration_time
+What:           /sys/.../iio:deviceX/in_intensity_green_integration_time
+What:           /sys/.../iio:deviceX/in_intensity_blue_integration_time
+What:           /sys/.../iio:deviceX/in_intensity_clear_integration_time
+What:           /sys/.../iio:deviceX/in_illuminance_integration_time
+KernelVersion:  3.12
+Contact:        linux-iio@vger.kernel.org
+Description:
+                This attribute is used to get/set the integration time in
+                seconds.
diff --git a/Documentation/ABI/testing/sysfs-class-mic.txt b/Documentation/ABI/testing/sysfs-class-mic.txt
new file mode 100644
index 000000000000..13f48afc534f
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-mic.txt
@@ -0,0 +1,157 @@
+What:           /sys/class/mic/
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                The mic class directory belongs to Intel MIC devices and
+                provides information per MIC device. An Intel MIC device is a
+                PCIe form factor add-in Coprocessor card based on the Intel Many
+                Integrated Core (MIC) architecture that runs a Linux OS.
+
+What:           /sys/class/mic/mic(x)
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                The directories /sys/class/mic/mic0, /sys/class/mic/mic1 etc.,
+                represent MIC devices (0,1,..etc). Each directory has
+                information specific to that MIC device.
+
+What:           /sys/class/mic/mic(x)/family
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                Provides information about the Coprocessor family for an Intel
+                MIC device. For example - "x100"
+
+What:           /sys/class/mic/mic(x)/stepping
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                Provides information about the silicon stepping for an Intel
+                MIC device. For example - "A0" or "B0"
+
+What:           /sys/class/mic/mic(x)/state
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                When read, this entry provides the current state of an Intel
+                MIC device in the context of the card OS. Possible values that
+                will be read are:
+                "offline" - The MIC device is ready to boot the card OS. On
+                reading this entry after an OSPM resume, a "boot" has to be
+                written to this entry if the card was previously shutdown
+                during OSPM suspend.
+                "online" - The MIC device has initiated booting a card OS.
+                "shutting_down" - The card OS is shutting down.
+                "reset_failed" - The MIC device has failed to reset.
+                "suspending" - The MIC device is currently being prepared for
+                suspend. On reading this entry, a "suspend" has to be written
+                to the state sysfs entry to ensure the card is shutdown during
+                OSPM suspend.
+                "suspended" - The MIC device has been suspended.
+
+                When written, this sysfs entry triggers different state change
+                operations depending upon the current state of the card OS.
+                Acceptable values are:
+                "boot" - Boot the card OS image specified by the combination
+                         of firmware, ramdisk, cmdline and bootmode
+                        sysfs entries.
+                "reset" - Initiates device reset.
+                "shutdown" - Initiates card OS shutdown.
+                "suspend" - Initiates card OS shutdown and also marks the card
+                as suspended.
+
+What:           /sys/class/mic/mic(x)/shutdown_status
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                An Intel MIC device runs a Linux OS during its operation. This
+                OS can shutdown because of various reasons. When read, this
+                entry provides the status on why the card OS was shutdown.
+                Possible values are:
+                "nop" -  shutdown status is not applicable, when the card OS is
+                        "online"
+                "crashed" - Shutdown because of a HW or SW crash.
+                "halted" - Shutdown because of a halt command.
+                "poweroff" - Shutdown because of a poweroff command.
+                "restart" - Shutdown because of a restart command.
+
+What:           /sys/class/mic/mic(x)/cmdline
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                An Intel MIC device runs a Linux OS during its operation. Before
+                booting this card OS, it is possible to pass kernel command line
+                options to configure various features in it, similar to
+                self-bootable machines. When read, this entry provides
+                information about the current kernel command line options set to
+                boot the card OS. This entry can be written to change the
+                existing kernel command line options. Typically, the user would
+                want to read the current command line options, append new ones
+                or modify existing ones and then write the whole kernel command
+                line back to this entry.
+
+What:           /sys/class/mic/mic(x)/firmware
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                When read, this sysfs entry provides the path name under
+                /lib/firmware/ where the firmware image to be booted on the
+                card can be found. The entry can be written to change the
+                firmware image location under /lib/firmware/.
+
+What:           /sys/class/mic/mic(x)/ramdisk
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                When read, this sysfs entry provides the path name under
+                /lib/firmware/ where the ramdisk image to be used during card
+                OS boot can be found. The entry can be written to change
+                the ramdisk image location under /lib/firmware/.
+
+What:           /sys/class/mic/mic(x)/bootmode
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                When read, this sysfs entry provides the current bootmode for
+                the card. This sysfs entry can be written with the following
+                valid strings:
+                a) linux - Boot a Linux image.
+                b) elf - Boot an elf image for flash updates.
+
+What:           /sys/class/mic/mic(x)/log_buf_addr
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                An Intel MIC device runs a Linux OS during its operation. For
+                debugging purpose and early kernel boot messages, the user can
+                access the card OS log buffer via debugfs. When read, this entry
+                provides the kernel virtual address of the buffer where the card
+                OS log buffer can be read. This entry is written by the host
+                configuration daemon to set the log buffer address. The correct
+                log buffer address to be written can be found in the System.map
+                file of the card OS.
+
+What:           /sys/class/mic/mic(x)/log_buf_len
+Date:           October 2013
+KernelVersion:  3.13
+Contact:        Sudeep Dutt <sudeep.dutt@intel.com>
+Description:
+                An Intel MIC device runs a Linux OS during its operation. For
+                debugging purpose and early kernel boot messages, the user can
+                access the card OS log buffer via debugfs. When read, this entry
+                provides the kernel virtual address where the card OS log buffer
+                length can be read. This entry is written by host configuration
+                daemon to set the log buffer length address. The correct log
+                buffer length address to be written can be found in the
+                System.map file of the card OS.
diff --git a/Documentation/ABI/testing/sysfs-driver-sunxi-sid b/Documentation/ABI/testing/sysfs-driver-sunxi-sid
new file mode 100644
index 000000000000..ffb9536f6ecc
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-sunxi-sid
@@ -0,0 +1,22 @@
+What:           /sys/devices/*/<our-device>/eeprom
+Date:           August 2013
+Contact:        Oliver Schinagl <oliver@schinagl.nl>
+Description:    read-only access to the SID (Security-ID) on current
+                A-series SoC's from Allwinner. Currently supports A10, A10s, A13
+                and A20 CPU's. The earlier A1x series of SoCs exports 16 bytes,
+                whereas the newer A20 SoC exposes 512 bytes split into sections.
+                Besides the 16 bytes of SID, there's also an SJTAG area,
+                HDMI-HDCP key and some custom keys. Below a quick overview, for
+                details see the user manual:
+                0x000  128 bit root-key (sun[457]i)
+                0x010  128 bit boot-key (sun7i)
+                0x020   64 bit security-jtag-key (sun7i)
+                0x028   16 bit key configuration (sun7i)
+                0x02b   16 bit custom-vendor-key (sun7i)
+                0x02c  320 bit low general key (sun7i)
+                0x040   32 bit read-control access (sun7i)
+                0x064  224 bit low general key (sun7i)
+                0x080 2304 bit HDCP-key (sun7i)
+                0x1a0  768 bit high general key (sun7i)
+Users:          any user space application which wants to read the SID on
+                Allwinner's A-series of CPU's.
diff --git a/Documentation/DocBook/filesystems.tmpl b/Documentation/DocBook/filesystems.tmpl
index 25b58efd955d..4f676838da06 100644
--- a/Documentation/DocBook/filesystems.tmpl
+++ b/Documentation/DocBook/filesystems.tmpl
@@ -91,7 +91,6 @@
      <title>The Filesystem for Exporting Kernel Objects</title>
 !Efs/sysfs/file.c
 !Efs/sysfs/symlink.c
-!Efs/sysfs/bin.c
   </chapter>
 
   <chapter id="debugfs">
diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README
index 8f08a86e03b7..da0151db9964 100644
--- a/Documentation/arm/Marvell/README
+++ b/Documentation/arm/Marvell/README
@@ -88,6 +88,7 @@ EBU Armada family
         MV78230
         MV78260
         MV78460
+    NOTE: not to be confused with the non-SMP 78xx0 SoCs
 
   Product Brief: http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf
   No public datasheet available.
diff --git a/Documentation/arm/sunxi/README b/Documentation/arm/sunxi/README
index e3f93fb9224e..7945238453ed 100644
--- a/Documentation/arm/sunxi/README
+++ b/Documentation/arm/sunxi/README
@@ -10,6 +10,10 @@ SunXi family
   Linux kernel mach directory: arch/arm/mach-sunxi
 
   Flavors:
+    * ARM926 based SoCs
+      - Allwinner F20 (sun3i)
+        + Not Supported
+
     * ARM Cortex-A8 based SoCs
       - Allwinner A10 (sun4i)
         + Datasheet
@@ -25,4 +29,24 @@ SunXi family
         + Datasheet
           http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
         + User Manual
-          http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-08-08%29.pdf
+          http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-01-08%29.pdf
+
+    * Dual ARM Cortex-A7 based SoCs
+      - Allwinner A20 (sun7i)
+        + User Manual
+          http://dl.linux-sunxi.org/A20/A20%20User%20Manual%202013-03-22.pdf
+
+      - Allwinner A23
+        + Not Supported
+
+    * Quad ARM Cortex-A7 based SoCs
+      - Allwinner A31 (sun6i)
+        + Datasheet
+          http://dl.linux-sunxi.org/A31/A31%20Datasheet%20-%20v1.00%20(2012-12-24).pdf
+
+      - Allwinner A31s (sun6i)
+        + Not Supported
+
+    * Quad ARM Cortex-A15, Quad ARM Cortex-A7 based SoCs
+      - Allwinner A80
+        + Not Supported
\ No newline at end of file
diff --git a/Documentation/arm64/booting.txt b/Documentation/arm64/booting.txt
index 98df4a03807e..a9691cc48fe3 100644
--- a/Documentation/arm64/booting.txt
+++ b/Documentation/arm64/booting.txt
@@ -115,9 +115,10 @@ Before jumping into the kernel, the following conditions must be met:
   External caches (if present) must be configured and disabled.
 
 - Architected timers
-  CNTFRQ must be programmed with the timer frequency.
-  If entering the kernel at EL1, CNTHCTL_EL2 must have EL1PCTEN (bit 0)
-  set where available.
+  CNTFRQ must be programmed with the timer frequency and CNTVOFF must
+  be programmed with a consistent value on all CPUs.  If entering the
+  kernel at EL1, CNTHCTL_EL2 must have EL1PCTEN (bit 0) set where
+  available.
 
 - Coherency
   All CPUs to be booted by the kernel must be part of the same coherency
@@ -130,30 +131,46 @@ Before jumping into the kernel, the following conditions must be met:
   the kernel image will be entered must be initialised by software at a
   higher exception level to prevent execution in an UNKNOWN state.
 
+The requirements described above for CPU mode, caches, MMUs, architected
+timers, coherency and system registers apply to all CPUs.  All CPUs must
+enter the kernel in the same exception level.
+
 The boot loader is expected to enter the kernel on each CPU in the
 following manner:
 
 - The primary CPU must jump directly to the first instruction of the
   kernel image.  The device tree blob passed by this CPU must contain
-  for each CPU node:
-
-    1. An 'enable-method' property. Currently, the only supported value
-       for this field is the string "spin-table".
-
-    2. A 'cpu-release-addr' property identifying a 64-bit,
-       zero-initialised memory location.
+  an 'enable-method' property for each cpu node.  The supported
+  enable-methods are described below.
 
   It is expected that the bootloader will generate these device tree
   properties and insert them into the blob prior to kernel entry.
 
-- Any secondary CPUs must spin outside of the kernel in a reserved area
-  of memory (communicated to the kernel by a /memreserve/ region in the
+- CPUs with a "spin-table" enable-method must have a 'cpu-release-addr'
+  property in their cpu node.  This property identifies a
+  naturally-aligned 64-bit zero-initalised memory location.
+
+  These CPUs should spin outside of the kernel in a reserved area of
+  memory (communicated to the kernel by a /memreserve/ region in the
   device tree) polling their cpu-release-addr location, which must be
   contained in the reserved region.  A wfe instruction may be inserted
   to reduce the overhead of the busy-loop and a sev will be issued by
   the primary CPU.  When a read of the location pointed to by the
-  cpu-release-addr returns a non-zero value, the CPU must jump directly
-  to this value.
+  cpu-release-addr returns a non-zero value, the CPU must jump to this
+  value.  The value will be written as a single 64-bit little-endian
+  value, so CPUs must convert the read value to their native endianness
+  before jumping to it.
+
+- CPUs with a "psci" enable method should remain outside of
+  the kernel (i.e. outside of the regions of memory described to the
+  kernel in the memory node, or in a reserved area of memory described
+  to the kernel by a /memreserve/ region in the device tree).  The
+  kernel will issue CPU_ON calls as described in ARM document number ARM
+  DEN 0022A ("Power State Coordination Interface System Software on ARM
+  processors") to bring CPUs into the kernel.
+
+  The device tree should contain a 'psci' node, as described in
+  Documentation/devicetree/bindings/arm/psci.txt.
 
 - Secondary CPU general-purpose register settings
   x0 = 0 (reserved for future use)
diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt
index 78a377124ef0..5e054bfe4dde 100644
--- a/Documentation/arm64/memory.txt
+++ b/Documentation/arm64/memory.txt
@@ -21,7 +21,7 @@ The swapper_pgd_dir address is written to TTBR1 and never written to
 TTBR0.
 
 
-AArch64 Linux memory layout:
+AArch64 Linux memory layout with 4KB pages:
 
 Start                   End                     Size            Use
 -----------------------------------------------------------------------
@@ -39,13 +39,38 @@ ffffffbffbc00000	ffffffbffbdfffff	   2MB		earlyprintk device
 
 ffffffbffbe00000        ffffffbffbe0ffff          64KB          PCI I/O space
 
-ffffffbbffff0000        ffffffbcffffffff          ~2MB          [guard]
+ffffffbffbe10000        ffffffbcffffffff          ~2MB          [guard]
 
 ffffffbffc000000        ffffffbfffffffff          64MB          modules
 
 ffffffc000000000        ffffffffffffffff         256GB          kernel logical memory map
 
 
+AArch64 Linux memory layout with 64KB pages:
+
+Start                   End                     Size            Use
+-----------------------------------------------------------------------
+0000000000000000        000003ffffffffff           4TB          user
+
+fffffc0000000000        fffffdfbfffeffff          ~2TB          vmalloc
+
+fffffdfbffff0000        fffffdfbffffffff          64KB          [guard page]
+
+fffffdfc00000000        fffffdfdffffffff           8GB          vmemmap
+
+fffffdfe00000000        fffffdfffbbfffff          ~8GB          [guard, future vmmemap]
+
+fffffdfffbc00000        fffffdfffbdfffff           2MB          earlyprintk device
+
+fffffdfffbe00000        fffffdfffbe0ffff          64KB          PCI I/O space
+
+fffffdfffbe10000        fffffdfffbffffff          ~2MB          [guard]
+
+fffffdfffc000000        fffffdffffffffff          64MB          modules
+
+fffffe0000000000        ffffffffffffffff           2TB          kernel logical memory map
+
+
 Translation table lookup with 4KB pages:
 
 +--------+--------+--------+--------+--------+--------+--------+--------+
diff --git a/Documentation/connector/ucon.c b/Documentation/connector/ucon.c
index 4848db8c71ff..8a4da64e02a8 100644
--- a/Documentation/connector/ucon.c
+++ b/Documentation/connector/ucon.c
@@ -71,7 +71,7 @@ static int netlink_send(int s, struct cn_msg *msg)
         nlh->nlmsg_seq = seq++;
         nlh->nlmsg_pid = getpid();
         nlh->nlmsg_type = NLMSG_DONE;
-        nlh->nlmsg_len = NLMSG_LENGTH(size - sizeof(*nlh));
+        nlh->nlmsg_len = size;
         nlh->nlmsg_flags = 0;
 
         m = NLMSG_DATA(nlh);
diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards
index db5858e32d3f..5fac246a9530 100644
--- a/Documentation/devicetree/bindings/arm/arm-boards
+++ b/Documentation/devicetree/bindings/arm/arm-boards
@@ -9,9 +9,53 @@ Required properties (in root node):
 
 FPGA type interrupt controllers, see the versatile-fpga-irq binding doc.
 
-In the root node the Integrator/CP must have a /cpcon node pointing
-to the CP control registers, and the Integrator/AP must have a
-/syscon node pointing to the Integrator/AP system controller.
+Required nodes:
+
+- core-module: the root node to the Integrator platforms must have
+  a core-module with regs and the compatible string
+  "arm,core-module-integrator"
+
+  Required properties for the core module:
+  - regs: the location and size of the core module registers, one
+    range of 0x200 bytes.
+
+- syscon: the root node of the Integrator platforms must have a
+  system controller node pointong to the control registers,
+  with the compatible string
+  "arm,integrator-ap-syscon"
+  "arm,integrator-cp-syscon"
+  respectively.
+
+  Required properties for the system controller:
+  - regs: the location and size of the system controller registers,
+    one range of 0x100 bytes.
+
+  Required properties for the AP system controller:
+  - interrupts: the AP syscon node must include the logical module
+    interrupts, stated in order of module instance <module 0>,
+    <module 1>, <module 2> ... for the CP system controller this
+    is not required not of any use.
+
+/dts-v1/;
+/include/ "integrator.dtsi"
+
+/ {
+        model = "ARM Integrator/AP";
+        compatible = "arm,integrator-ap";
+
+        core-module@10000000 {
+                compatible = "arm,core-module-integrator";
+                reg = <0x10000000 0x200>;
+        };
+
+        syscon {
+                compatible = "arm,integrator-ap-syscon";
+                reg = <0x11000000 0x100>;
+                interrupt-parent = <&pic>;
+                /* These are the logic module IRQs */
+                interrupts = <9>, <10>, <11>, <12>;
+        };
+};
 
 
 ARM Versatile Application and Platform Baseboards
diff --git a/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt b/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt
index 61df564c0d23..d74091a8a3bf 100644
--- a/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt
+++ b/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt
@@ -4,6 +4,8 @@ Marvell Armada 370 and Armada XP Interrupt Controller
 Required properties:
 - compatible: Should be "marvell,mpic"
 - interrupt-controller: Identifies the node as an interrupt controller.
+- msi-controller: Identifies the node as an PCI Message Signaled
+  Interrupt controller.
 - #interrupt-cells: The number of cells to define the interrupts. Should be 1.
   The cell is the IRQ number
 
@@ -24,6 +26,7 @@ Example:
               #address-cells = <1>;
               #size-cells = <1>;
               interrupt-controller;
+              msi-controller;
               reg = <0xd0020a00 0x1d0>,
                     <0xd0021070 0x58>;
         };
diff --git a/Documentation/devicetree/bindings/arm/atmel-adc.txt b/Documentation/devicetree/bindings/arm/atmel-adc.txt
index 723c205cb10d..d1061469f63d 100644
--- a/Documentation/devicetree/bindings/arm/atmel-adc.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-adc.txt
@@ -7,7 +7,6 @@ Required properties:
   - interrupts: Should contain the IRQ line for the ADC
   - atmel,adc-channels-used: Bitmask of the channels muxed and enable for this
     device
-  - atmel,adc-num-channels: Number of channels available in the ADC
   - atmel,adc-startup-time: Startup Time of the ADC in microseconds as
     defined in the datasheet
   - atmel,adc-vref: Reference voltage in millivolts for the conversions
@@ -24,6 +23,13 @@ Optional properties:
                        resolution will be used.
   - atmel,adc-sleep-mode: Boolean to enable sleep mode when no conversion
   - atmel,adc-sample-hold-time: Sample and Hold Time in microseconds
+  - atmel,adc-ts-wires: Number of touch screen wires. Should be 4 or 5. If this
+                        value is set, then adc driver will enable touch screen
+                        support.
+    NOTE: when adc touch screen enabled, the adc hardware trigger will be
+          disabled. Since touch screen will occupied the trigger register.
+  - atmel,adc-ts-pressure-threshold: a pressure threshold for touchscreen. It
+                                     make touch detect more precision.
  
 Optional trigger Nodes:
   - Required properties:
diff --git a/Documentation/devicetree/bindings/arm/cci.txt b/Documentation/devicetree/bindings/arm/cci.txt
index 92d36e2aa877..f28d82bbbc56 100644
--- a/Documentation/devicetree/bindings/arm/cci.txt
+++ b/Documentation/devicetree/bindings/arm/cci.txt
@@ -36,14 +36,18 @@ specific to ARM.
 
         - reg
                 Usage: required
-                Value type: <prop-encoded-array>
+                Value type: Integer cells. A register entry, expressed as a pair
+                            of cells, containing base and size.
                 Definition: A standard property. Specifies base physical
                             address of CCI control registers common to all
                             interfaces.
 
         - ranges:
                 Usage: required
-                Value type: <prop-encoded-array>
+                Value type: Integer cells. An array of range entries, expressed
+                            as a tuple of cells, containing child address,
+                            parent address and the size of the region in the
+                            child address space.
                 Definition: A standard property. Follow rules in the ePAPR for
                             hierarchical bus addressing. CCI interfaces
                             addresses refer to the parent node addressing
@@ -74,11 +78,49 @@ specific to ARM.
 
                 - reg:
                         Usage: required
-                        Value type: <prop-encoded-array>
+                        Value type: Integer cells. A register entry, expressed
+                                    as a pair of cells, containing base and
+                                    size.
                         Definition: the base address and size of the
                                     corresponding interface programming
                                     registers.
 
+        - CCI PMU node
+
+                Parent node must be CCI interconnect node.
+
+                A CCI pmu node must contain the following properties:
+
+                - compatible
+                        Usage: required
+                        Value type: <string>
+                        Definition: must be "arm,cci-400-pmu"
+
+                - reg:
+                        Usage: required
+                        Value type: Integer cells. A register entry, expressed
+                                    as a pair of cells, containing base and
+                                    size.
+                        Definition: the base address and size of the
+                                    corresponding interface programming
+                                    registers.
+
+                - interrupts:
+                        Usage: required
+                        Value type: Integer cells. Array of interrupt specifier
+                                    entries, as defined in
+                                    ../interrupt-controller/interrupts.txt.
+                        Definition: list of counter overflow interrupts, one per
+                                    counter. The interrupts must be specified
+                                    starting with the cycle counter overflow
+                                    interrupt, followed by counter0 overflow
+                                    interrupt, counter1 overflow interrupt,...
+                                    ,counterN overflow interrupt.
+
+                                    The CCI PMU has an interrupt signal for each
+                                    counter. The number of interrupts must be
+                                    equal to the number of counters.
+
 * CCI interconnect bus masters
 
         Description: masters in the device tree connected to a CCI port
@@ -144,7 +186,7 @@ Example:
                 #address-cells = <1>;
                 #size-cells = <1>;
                 reg = <0x0 0x2c090000 0 0x1000>;
-                ranges = <0x0 0x0 0x2c090000 0x6000>;
+                ranges = <0x0 0x0 0x2c090000 0x10000>;
 
                 cci_control0: slave-if@1000 {
                         compatible = "arm,cci-400-ctrl-if";
@@ -163,6 +205,16 @@ Example:
                         interface-type = "ace";
                         reg = <0x5000 0x1000>;
                 };
+
+                pmu@9000 {
+                         compatible = "arm,cci-400-pmu";
+                         reg = <0x9000 0x5000>;
+                         interrupts = <0 101 4>,
+                                      <0 102 4>,
+                                      <0 103 4>,
+                                      <0 104 4>,
+                                      <0 105 4>;
+                };
         };
 
 This CCI node corresponds to a CCI component whose control registers sits
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 91b7049affa1..808c1543b0f8 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -21,7 +21,8 @@ Required properties:
 Optional properties:
 - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module
   during suspend.
-
+- ti,no-reset-on-init: When present, the module should not be reset at init
+- ti,no-idle-on-init: When present, the module should not be idled at init
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/arm/vic.txt b/Documentation/devicetree/bindings/arm/vic.txt
index 266716b23437..dd527216c5fb 100644
--- a/Documentation/devicetree/bindings/arm/vic.txt
+++ b/Documentation/devicetree/bindings/arm/vic.txt
@@ -18,6 +18,15 @@ Required properties:
 Optional properties:
 
 - interrupts : Interrupt source for parent controllers if the VIC is nested.
+- valid-mask : A one cell big bit mask of valid interrupt sources. Each bit
+  represents single interrupt source, starting from source 0 at LSb and ending
+  at source 31 at MSb. A bit that is set means that the source is wired and
+  clear means otherwise. If unspecified, defaults to all valid.
+- valid-wakeup-mask : A one cell big bit mask of interrupt sources that can be
+  configured as wake up source for the system. Order of bits is the same as for
+  valid-mask property. A set bit means that this interrupt source can be
+  configured as a wake up source for the system. If unspecied, defaults to all
+  interrupt sources configurable as wake up sources.
 
 Example:
 
@@ -26,4 +35,7 @@ Example:
                 interrupt-controller;
                 #interrupt-cells = <1>;
                 reg = <0x60000 0x1000>;
+
+                valid-mask = <0xffffff7f>;
+                valid-wakeup-mask = <0x0000ff7f>;
         };
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index 5a90a724b520..6aab72bf67ea 100644
--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
@@ -215,6 +215,11 @@ clocks and IDs.
         cko2                    200
         cko                     201
         vdoa                    202
+        pll4_audio_div          203
+        lvds1_sel               204
+        lvds2_sel               205
+        lvds1_gate              206
+        lvds2_gate              207
 
 Examples:
 
diff --git a/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt
new file mode 100644
index 000000000000..c62391fc0e39
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt
@@ -0,0 +1,19 @@
+* Core Divider Clock bindings for Marvell MVEBU SoCs
+
+The following is a list of provided IDs and clock names on Armada 370/XP:
+ 0 = nand (NAND clock)
+
+Required properties:
+- compatible : must be "marvell,armada-370-corediv-clock"
+- reg : must be the register address of Core Divider control register
+- #clock-cells : from common clock binding; shall be set to 1
+- clocks : must be set to the parent's phandle
+
+Example:
+
+corediv_clk: corediv-clocks@18740 {
+        compatible = "marvell,armada-370-corediv-clock";
+        reg = <0x18740 0xc>;
+        #clock-cells = <1>;
+        clocks = <&pll>;
+};
diff --git a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
index cffc93d97f54..fc2910fa7e45 100644
--- a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
+++ b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
@@ -1,10 +1,10 @@
-* Gated Clock bindings for Marvell Orion SoCs
+* Gated Clock bindings for Marvell EBU SoCs
 
-Marvell Dove and Kirkwood allow some peripheral clocks to be gated to save
-some power. The clock consumer should specify the desired clock by having
-the clock ID in its "clocks" phandle cell. The clock ID is directly mapped to
-the corresponding clock gating control bit in HW to ease manual clock lookup
-in datasheet.
+Marvell Armada 370/XP, Dove and Kirkwood allow some peripheral clocks to be
+gated to save some power. The clock consumer should specify the desired clock
+by having the clock ID in its "clocks" phandle cell. The clock ID is directly
+mapped to the corresponding clock gating control bit in HW to ease manual clock
+lookup in datasheet.
 
 The following is a list of provided IDs for Armada 370:
 ID      Clock   Peripheral
@@ -94,6 +94,8 @@ ID	Clock	Peripheral
 
 Required properties:
 - compatible : shall be one of the following:
+        "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
+        "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
         "marvell,dove-gating-clock" - for Dove SoC clock gating
         "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
 - reg : shall be the register address of the Clock Gating Control register
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index 00a5c26454eb..91a748fed13d 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -45,8 +45,8 @@ Additionally, "allwinner,*-gates-clk" clocks require:
 
 Clock consumers should specify the desired clocks they use with a
 "clocks" phandle cell. Consumers that are using a gated clock should
-provide an additional ID in their clock property. The values of this
-ID are documented in sunxi/<soc>-gates.txt.
+provide an additional ID in their clock property. This ID is the
+offset of the bit controlling this particular gate in the register.
 
 For example:
 
diff --git a/Documentation/devicetree/bindings/clock/sunxi/sun4i-a10-gates.txt b/Documentation/devicetree/bindings/clock/sunxi/sun4i-a10-gates.txt
deleted file mode 100644
index 6a03475bbfe2..000000000000
--- a/Documentation/devicetree/bindings/clock/sunxi/sun4i-a10-gates.txt
+++ /dev/null
@@ -1,93 +0,0 @@
-Gate clock outputs
-------------------
-
-  * AXI gates ("allwinner,sun4i-axi-gates-clk")
-
-    DRAM                                        0
-
-  * AHB gates ("allwinner,sun4i-ahb-gates-clk")
-
-    USB0                                        0
-    EHCI0                                       1
-    OHCI0                                       2*
-    EHCI1                                       3
-    OHCI1                                       4*
-    SS                                          5
-    DMA                                         6
-    BIST                                        7
-    MMC0                                        8
-    MMC1                                        9
-    MMC2                                        10
-    MMC3                                        11
-    MS                                          12**
-    NAND                                        13
-    SDRAM                                       14
-
-    ACE                                         16
-    EMAC                                        17
-    TS                                          18
-
-    SPI0                                        20
-    SPI1                                        21
-    SPI2                                        22
-    SPI3                                        23
-    PATA                                        24
-    SATA                                        25**
-    GPS                                         26*
-
-    VE                                          32
-    TVD                                         33
-    TVE0                                        34
-    TVE1                                        35
-    LCD0                                        36
-    LCD1                                        37
-
-    CSI0                                        40
-    CSI1                                        41
-
-    HDMI                                        43
-    DE_BE0                                      44
-    DE_BE1                                      45
-    DE_FE1                                      46
-    DE_FE1                                      47
-
-    MP                                          50
-
-    MALI400                                     52
-
-  * APB0 gates ("allwinner,sun4i-apb0-gates-clk")
-
-    CODEC                                       0
-    SPDIF                                       1*
-    AC97                                        2
-    IIS                                         3
-
-    PIO                                         5
-    IR0                                         6
-    IR1                                         7
-
-    KEYPAD                                      10
-
-  * APB1 gates ("allwinner,sun4i-apb1-gates-clk")
-
-    I2C0                                        0
-    I2C1                                        1
-    I2C2                                        2
-
-    CAN                                         4
-    SCR                                         5
-    PS20                                        6
-    PS21                                        7
-
-    UART0                                       16
-    UART1                                       17
-    UART2                                       18
-    UART3                                       19
-    UART4                                       20
-    UART5                                       21
-    UART6                                       22
-    UART7                                       23
-
-Notation:
- [*]:  The datasheet didn't mention these, but they are present on AW code
- [**]: The datasheet had this marked as "NC" but they are used on AW code
diff --git a/Documentation/devicetree/bindings/clock/sunxi/sun5i-a10s-gates.txt b/Documentation/devicetree/bindings/clock/sunxi/sun5i-a10s-gates.txt
deleted file mode 100644
index d24279fe1429..000000000000
--- a/Documentation/devicetree/bindings/clock/sunxi/sun5i-a10s-gates.txt
+++ /dev/null
@@ -1,75 +0,0 @@
-Gate clock outputs
-------------------
-
-  * AXI gates ("allwinner,sun4i-axi-gates-clk")
-
-    DRAM                                        0
-
-  * AHB gates ("allwinner,sun5i-a10s-ahb-gates-clk")
-
-    USB0                                        0
-    EHCI0                                       1
-    OHCI0                                       2
-
-    SS                                          5
-    DMA                                         6
-    BIST                                        7
-    MMC0                                        8
-    MMC1                                        9
-    MMC2                                        10
-
-    NAND                                        13
-    SDRAM                                       14
-
-    EMAC                                        17
-    TS                                          18
-
-    SPI0                                        20
-    SPI1                                        21
-    SPI2                                        22
-
-    GPS                                         26
-
-    HSTIMER                                     28
-
-    VE                                          32
-
-    TVE                                         34
-
-    LCD                                         36
-
-    CSI                                         40
-
-    HDMI                                        43
-    DE_BE                                       44
-
-    DE_FE                                       46
-
-    IEP                                         51
-    MALI400                                     52
-
-  * APB0 gates ("allwinner,sun5i-a10s-apb0-gates-clk")
-
-    CODEC                                       0
-
-    IIS                                         3
-
-    PIO                                         5
-    IR                                          6
-
-    KEYPAD                                      10
-
-  * APB1 gates ("allwinner,sun5i-a10s-apb1-gates-clk")
-
-    I2C0                                        0
-    I2C1                                        1
-    I2C2                                        2
-
-    UART0                                       16
-    UART1                                       17
-    UART2                                       18
-    UART3                                       19
-
-Notation:
- [*]:  The datasheet didn't mention these, but they are present on AW code
- [**]: The datasheet had this marked as "NC" but they are used on AW code
diff --git a/Documentation/devicetree/bindings/clock/sunxi/sun5i-a13-gates.txt b/Documentation/devicetree/bindings/clock/sunxi/sun5i-a13-gates.txt
deleted file mode 100644
index 006b6dfc4703..000000000000
--- a/Documentation/devicetree/bindings/clock/sunxi/sun5i-a13-gates.txt
+++ /dev/null
@@ -1,58 +0,0 @@
-Gate clock outputs
-------------------
-
-  * AXI gates ("allwinner,sun4i-axi-gates-clk")
-
-    DRAM                                        0
-
-  * AHB gates ("allwinner,sun5i-a13-ahb-gates-clk")
-
-    USBOTG                                      0
-    EHCI                                        1
-    OHCI                                        2
-
-    SS                                          5
-    DMA                                         6
-    BIST                                        7
-    MMC0                                        8
-    MMC1                                        9
-    MMC2                                        10
-
-    NAND                                        13
-    SDRAM                                       14
-
-    SPI0                                        20
-    SPI1                                        21
-    SPI2                                        22
-
-    STIMER                                      28
-
-    VE                                          32
-
-    LCD                                         36
-
-    CSI                                         40
-
-    DE_BE                                       44
-
-    DE_FE                                       46
-
-    IEP                                         51
-    MALI400                                     52
-
-  * APB0 gates ("allwinner,sun5i-a13-apb0-gates-clk")
-
-    CODEC                                       0
-
-    PIO                                         5
-    IR                                          6
-
-  * APB1 gates ("allwinner,sun5i-a13-apb1-gates-clk")
-
-    I2C0                                        0
-    I2C1                                        1
-    I2C2                                        2
-
-    UART1                                       17
-
-    UART3                                       19
diff --git a/Documentation/devicetree/bindings/clock/sunxi/sun6i-a31-gates.txt b/Documentation/devicetree/bindings/clock/sunxi/sun6i-a31-gates.txt
deleted file mode 100644
index fe44932b5c6b..000000000000
--- a/Documentation/devicetree/bindings/clock/sunxi/sun6i-a31-gates.txt
+++ /dev/null
@@ -1,83 +0,0 @@
-Gate clock outputs
-------------------
-
-  * AHB1 gates ("allwinner,sun6i-a31-ahb1-gates-clk")
-
-    MIPI DSI                                    1
-
-    SS                                          5
-    DMA                                         6
-
-    MMC0                                        8
-    MMC1                                        9
-    MMC2                                        10
-    MMC3                                        11
-
-    NAND1                                       12
-    NAND0                                       13
-    SDRAM                                       14
-
-    GMAC                                        17
-    TS                                          18
-    HSTIMER                                     19
-    SPI0                                        20
-    SPI1                                        21
-    SPI2                                        22
-    SPI3                                        23
-    USB_OTG                                     24
-
-    EHCI0                                       26
-    EHCI1                                       27
-
-    OHCI0                                       29
-    OHCI1                                       30
-    OHCI2                                       31
-    VE                                          32
-
-    LCD0                                        36
-    LCD1                                        37
-
-    CSI                                         40
-
-    HDMI                                        43
-    DE_BE0                                      44
-    DE_BE1                                      45
-    DE_FE1                                      46
-    DE_FE1                                      47
-
-    MP                                          50
-
-    GPU                                         52
-
-    DEU0                                        55
-    DEU1                                        56
-    DRC0                                        57
-    DRC1                                        58
-
-  * APB1 gates ("allwinner,sun6i-a31-apb1-gates-clk")
-
-    CODEC                                       0
-
-    DIGITAL MIC                                 4
-    PIO                                         5
-
-    DAUDIO0                                     12
-    DAUDIO1                                     13
-
-  * APB2 gates ("allwinner,sun6i-a31-apb2-gates-clk")
-
-    I2C0                                        0
-    I2C1                                        1
-    I2C2                                        2
-    I2C3                                        3
-
-    UART0                                       16
-    UART1                                       17
-    UART2                                       18
-    UART3                                       19
-    UART4                                       20
-    UART5                                       21
-
-Notation:
- [*]:  The datasheet didn't mention these, but they are present on AW code
- [**]: The datasheet had this marked as "NC" but they are used on AW code
diff --git a/Documentation/devicetree/bindings/clock/sunxi/sun7i-a20-gates.txt b/Documentation/devicetree/bindings/clock/sunxi/sun7i-a20-gates.txt
deleted file mode 100644
index 357f4fdc02ef..000000000000
--- a/Documentation/devicetree/bindings/clock/sunxi/sun7i-a20-gates.txt
+++ /dev/null
@@ -1,98 +0,0 @@
-Gate clock outputs
-------------------
-
-  * AXI gates ("allwinner,sun4i-axi-gates-clk")
-
-    DRAM                                        0
-
-  * AHB gates ("allwinner,sun7i-a20-ahb-gates-clk")
-
-    USB0                                        0
-    EHCI0                                       1
-    OHCI0                                       2
-    EHCI1                                       3
-    OHCI1                                       4
-    SS                                          5
-    DMA                                         6
-    BIST                                        7
-    MMC0                                        8
-    MMC1                                        9
-    MMC2                                        10
-    MMC3                                        11
-    MS                                          12
-    NAND                                        13
-    SDRAM                                       14
-
-    ACE                                         16
-    EMAC                                        17
-    TS                                          18
-
-    SPI0                                        20
-    SPI1                                        21
-    SPI2                                        22
-    SPI3                                        23
-
-    SATA                                        25
-
-    HSTIMER                                     28
-
-    VE                                          32
-    TVD                                         33
-    TVE0                                        34
-    TVE1                                        35
-    LCD0                                        36
-    LCD1                                        37
-
-    CSI0                                        40
-    CSI1                                        41
-
-    HDMI1                                       42
-    HDMI0                                       43
-    DE_BE0                                      44
-    DE_BE1                                      45
-    DE_FE1                                      46
-    DE_FE1                                      47
-
-    GMAC                                        49
-    MP                                          50
-
-    MALI400                                     52
-
-  * APB0 gates ("allwinner,sun7i-a20-apb0-gates-clk")
-
-    CODEC                                       0
-    SPDIF                                       1
-    AC97                                        2
-    IIS0                                        3
-    IIS1                                        4
-    PIO                                         5
-    IR0                                         6
-    IR1                                         7
-    IIS2                                        8
-
-    KEYPAD                                      10
-
-  * APB1 gates ("allwinner,sun7i-a20-apb1-gates-clk")
-
-    I2C0                                        0
-    I2C1                                        1
-    I2C2                                        2
-    I2C3                                        3
-    CAN                                         4
-    SCR                                         5
-    PS20                                        6
-    PS21                                        7
-
-    I2C4                                        15
-    UART0                                       16
-    UART1                                       17
-    UART2                                       18
-    UART3                                       19
-    UART4                                       20
-    UART5                                       21
-    UART6                                       22
-    UART7                                       23
-
-Notation:
- [*]:  The datasheet didn't mention these, but they are present on AW code
- [**]: The datasheet had this marked as "NC" but they are used on AW code
diff --git a/Documentation/devicetree/bindings/crypto/omap-aes.txt b/Documentation/devicetree/bindings/crypto/omap-aes.txt
new file mode 100644
index 000000000000..fd9717653cbb
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/omap-aes.txt
@@ -0,0 +1,31 @@
+OMAP SoC AES crypto Module
+
+Required properties:
+
+- compatible : Should contain entries for this and backward compatible
+  AES versions:
+  - "ti,omap2-aes" for OMAP2.
+  - "ti,omap3-aes" for OMAP3.
+  - "ti,omap4-aes" for OMAP4 and AM33XX.
+  Note that the OMAP2 and 3 versions are compatible (OMAP3 supports
+  more algorithms) but they are incompatible with OMAP4.
+- ti,hwmods: Name of the hwmod associated with the AES module
+- reg : Offset and length of the register set for the module
+- interrupts : the interrupt-specifier for the AES module.
+
+Optional properties:
+- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
+        Documentation/devicetree/bindings/dma/dma.txt
+- dma-names: DMA request names should include "tx" and "rx" if present.
+
+Example:
+        /* AM335x */
+        aes: aes@53500000 {
+                compatible = "ti,omap4-aes";
+                ti,hwmods = "aes";
+                reg = <0x53500000 0xa0>;
+                interrupts = <102>;
+                dmas = <&edma 6>,
+                       <&edma 5>;
+                dma-names = "tx", "rx";
+        };
diff --git a/Documentation/devicetree/bindings/crypto/omap-sham.txt b/Documentation/devicetree/bindings/crypto/omap-sham.txt
new file mode 100644
index 000000000000..f839acd6f0ee
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/omap-sham.txt
@@ -0,0 +1,28 @@
+OMAP SoC SHA crypto Module
+
+Required properties:
+
+- compatible : Should contain entries for this and backward compatible
+  SHAM versions:
+  - "ti,omap2-sham" for OMAP2 & OMAP3.
+  - "ti,omap4-sham" for OMAP4 and AM33XX.
+  Note that these two versions are incompatible.
+- ti,hwmods: Name of the hwmod associated with the SHAM module
+- reg : Offset and length of the register set for the module
+- interrupts : the interrupt-specifier for the SHAM module.
+
+Optional properties:
+- dmas: DMA specifiers for the rx dma. See the DMA client binding,
+        Documentation/devicetree/bindings/dma/dma.txt
+- dma-names: DMA request name. Should be "rx" if a dma is present.
+
+Example:
+        /* AM335x */
+        sham: sham@53100000 {
+                compatible = "ti,omap4-sham";
+                ti,hwmods = "sham";
+                reg = <0x53100000 0x200>;
+                interrupts = <109>;
+                dmas = <&edma 36>;
+                dma-names = "rx";
+        };
diff --git a/Documentation/devicetree/bindings/hwrng/omap_rng.txt b/Documentation/devicetree/bindings/hwrng/omap_rng.txt
new file mode 100644
index 000000000000..6a62acd86953
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwrng/omap_rng.txt
@@ -0,0 +1,22 @@
+OMAP SoC HWRNG Module
+
+Required properties:
+
+- compatible : Should contain entries for this and backward compatible
+  RNG versions:
+  - "ti,omap2-rng" for OMAP2.
+  - "ti,omap4-rng" for OMAP4, OMAP5 and AM33XX.
+  Note that these two versions are incompatible.
+- ti,hwmods: Name of the hwmod associated with the RNG module
+- reg : Offset and length of the register set for the module
+- interrupts : the interrupt number for the RNG module.
+                Only used for "ti,omap4-rng".
+
+Example:
+/* AM335x */
+rng: rng@48310000 {
+        compatible = "ti,omap4-rng";
+        ti,hwmods = "rng";
+        reg = <0x48310000 0x2000>;
+        interrupts = <111>;
+};
diff --git a/Documentation/devicetree/bindings/iio/light/cm36651.txt b/Documentation/devicetree/bindings/iio/light/cm36651.txt
new file mode 100644
index 000000000000..c03e19db4550
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/light/cm36651.txt
@@ -0,0 +1,26 @@
+* Capella CM36651 I2C Proximity and Color Light sensor
+
+Required properties:
+- compatible: must be "capella,cm36651"
+- reg: the I2C address of the device
+- interrupts: interrupt-specifier for the sole interrupt
+              generated by the device
+- vled-supply: regulator for the IR LED. IR_LED is a part
+              of the cm36651 for proximity detection.
+              As covered in ../../regulator/regulator.txt
+
+Example:
+
+        i2c_cm36651: i2c-gpio {
+                /* ... */
+
+                cm36651@18 {
+                        compatible = "capella,cm36651";
+                        reg = <0x18>;
+                        interrupt-parent = <&gpx0>;
+                        interrupts = <2 0>;
+                        vled-supply = <&ps_als_reg>;
+                };
+
+                /* ... */
+        };
diff --git a/Documentation/devicetree/bindings/iio/light/gp2ap020a00f.txt b/Documentation/devicetree/bindings/iio/light/gp2ap020a00f.txt
new file mode 100644
index 000000000000..9231c82317ad
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/light/gp2ap020a00f.txt
@@ -0,0 +1,21 @@
+* Sharp GP2AP020A00F I2C Proximity/ALS sensor
+
+The proximity detector sensor requires power supply
+for its built-in led. It is also defined by this binding.
+
+Required properties:
+
+  - compatible : should be "sharp,gp2ap020a00f"
+  - reg : the I2C slave address of the light sensor
+  - interrupts : interrupt specifier for the sole interrupt generated
+                 by the device
+  - vled-supply : VLED power supply, as covered in ../regulator/regulator.txt
+
+Example:
+
+gp2ap020a00f@39 {
+        compatible = "sharp,gp2ap020a00f";
+        reg = <0x39>;
+        interrupts = <2 0>;
+        vled-supply = <...>;
+};
diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt
index 57edb30dbbca..3d3b2b91e333 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt
@@ -8,9 +8,6 @@ Required properties:
 - #interrupt-cells : Specifies the number of cells needed to encode an
   interrupt source. The value shall be 1.
 
-For the valid interrupt sources for your SoC, see the documentation in
-sunxi/<soc>.txt
-
 Example:
 
 intc: interrupt-controller {
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt b/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt
deleted file mode 100644
index 76b98c834499..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt
+++ /dev/null
@@ -1,89 +0,0 @@
-Allwinner A10 (sun4i) interrupt sources
----------------------------------------
-
-The interrupt sources available for the Allwinner A10 SoC are the
-following one:
-
-0: ENMI
-1: UART0
-2: UART1
-3: UART2
-4: UART3
-5: IR0
-6: IR1
-7: I2C0
-8: I2C1
-9: I2C2
-10: SPI0
-11: SPI1
-12: SPI2
-13: SPDIF
-14: AC97
-15: TS
-16: I2S
-17: UART4
-18: UART5
-19: UART6
-20: UART7
-21: KEYPAD
-22: TIMER0
-23: TIMER1
-24: TIMER2
-25: TIMER3
-26: CAN
-27: DMA
-28: PIO
-29: TOUCH_PANEL
-30: AUDIO_CODEC
-31: LRADC
-32: MMC0
-33: MMC1
-34: MMC2
-35: MMC3
-36: MEMSTICK
-37: NAND
-38: USB0
-39: USB1
-40: USB2
-41: SCR
-42: CSI0
-43: CSI1
-44: LCDCTRL0
-45: LCDCTRL1
-46: MP
-47: DEFEBE0
-48: DEFEBE1
-49: PMU
-50: SPI3
-51: TZASC
-52: PATA
-53: VE
-54: SS
-55: EMAC
-56: SATA
-57: GPS
-58: HDMI
-59: TVE
-60: ACE
-61: TVD
-62: PS2_0
-63: PS2_1
-64: USB3
-65: USB4
-66: PLE_PFM
-67: TIMER4
-68: TIMER5
-69: GPU_GP
-70: GPU_GPMMU
-71: GPU_PP0
-72: GPU_PPMMU0
-73: GPU_PMU
-74: GPU_RSV0
-75: GPU_RSV1
-76: GPU_RSV2
-77: GPU_RSV3
-78: GPU_RSV4
-79: GPU_RSV5
-80: GPU_RSV6
-82: SYNC_TIMER0
-83: SYNC_TIMER1
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt b/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt
deleted file mode 100644
index 2ec3b5ce1a0b..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt
+++ /dev/null
@@ -1,55 +0,0 @@
-Allwinner A13 (sun5i) interrupt sources
----------------------------------------
-
-The interrupt sources available for the Allwinner A13 SoC are the
-following one:
-
-0: ENMI
-2: UART1
-4: UART3
-5: IR
-7: I2C0
-8: I2C1
-9: I2C2
-10: SPI0
-11: SPI1
-12: SPI2
-22: TIMER0
-23: TIMER1
-24: TIMER2
-25: TIMER3
-27: DMA
-28: PIO
-29: TOUCH_PANEL
-30: AUDIO_CODEC
-31: LRADC
-32: MMC0
-33: MMC1
-34: MMC2
-37: NAND
-38: USB OTG
-39: USB EHCI
-40: USB OHCI
-42: CSI
-44: LCDCTRL
-47: DEFEBE
-49: PMU
-53: VE
-54: SS
-66: PLE_PFM
-67: TIMER4
-68: TIMER5
-69: GPU_GP
-70: GPU_GPMMU
-71: GPU_PP0
-72: GPU_PPMMU0
-73: GPU_PMU
-74: GPU_RSV0
-75: GPU_RSV1
-76: GPU_RSV2
-77: GPU_RSV3
-78: GPU_RSV4
-79: GPU_RSV5
-80: GPU_RSV6
-82: SYNC_TIMER0
-83: SYNC_TIMER1
diff --git a/Documentation/devicetree/bindings/misc/allwinner,sunxi-sid.txt b/Documentation/devicetree/bindings/misc/allwinner,sunxi-sid.txt
new file mode 100644
index 000000000000..68ba37295565
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/allwinner,sunxi-sid.txt
@@ -0,0 +1,17 @@
+Allwinner sunxi-sid
+
+Required properties:
+- compatible: "allwinner,sun4i-sid" or "allwinner,sun7i-a20-sid".
+- reg: Should contain registers location and length
+
+Example for sun4i:
+        sid@01c23800 {
+                compatible = "allwinner,sun4i-sid";
+                reg = <0x01c23800 0x10>
+        };
+
+Example for sun7i:
+        sid@01c23800 {
+                compatible = "allwinner,sun7i-a20-sid";
+                reg = <0x01c23800 0x200>
+        };
diff --git a/Documentation/devicetree/bindings/misc/ti,dac7512.txt b/Documentation/devicetree/bindings/misc/ti,dac7512.txt
new file mode 100644
index 000000000000..1db45939dac9
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/ti,dac7512.txt
@@ -0,0 +1,20 @@
+TI DAC7512 DEVICETREE BINDINGS
+
+Required properties:
+
+        - "compatible"          Must be set to "ti,dac7512"
+
+Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt
+apply. In particular, "reg" and "spi-max-frequency" properties must be given.
+
+
+Example:
+
+        spi_master {
+                dac7512: dac7512@0 {
+                        compatible = "ti,dac7512";
+                        reg = <0>; /* CS0 */
+                        spi-max-frequency = <1000000>;
+                };
+        };
+
diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index ed271fc255b2..8c8908ab84ba 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -20,8 +20,29 @@ ti,dual-volt: boolean, supports dual voltage cards
 ti,non-removable: non-removable slot (like eMMC)
 ti,needs-special-reset: Requires a special softreset sequence
 ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
+dmas: List of DMA specifiers with the controller specific format
+as described in the generic DMA client binding. A tx and rx
+specifier is required.
+dma-names: List of DMA request names. These strings correspond
+1:1 with the DMA specifiers listed in dmas. The string naming is
+to be "rx" and "tx" for RX and TX DMA requests, respectively.
+
+Examples:
+
+[hwmod populated DMA resources]
+
+        mmc1: mmc@0x4809c000 {
+                compatible = "ti,omap4-hsmmc";
+                reg = <0x4809c000 0x400>;
+                ti,hwmods = "mmc1";
+                ti,dual-volt;
+                bus-width = <4>;
+                vmmc-supply = <&vmmc>; /* phandle to regulator node */
+                ti,non-removable;
+        };
+
+[generic DMA request binding]
 
-Example:
         mmc1: mmc@0x4809c000 {
                 compatible = "ti,omap4-hsmmc";
                 reg = <0x4809c000 0x400>;
@@ -30,4 +51,7 @@ Example:
                 bus-width = <4>;
                 vmmc-supply = <&vmmc>; /* phandle to regulator node */
                 ti,non-removable;
+                dmas = <&edma 24
+                        &edma 25>;
+                dma-names = "tx", "rx";
         };
diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt
index 9556e2fedf6d..08c716b2c6b6 100644
--- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt
+++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt
@@ -5,6 +5,7 @@ Mandatory properties:
 - compatible: one of the following values:
     marvell,armada-370-pcie
     marvell,armada-xp-pcie
+    marvell,dove-pcie
     marvell,kirkwood-pcie
 - #address-cells, set to <3>
 - #size-cells, set to <2>
@@ -14,6 +15,8 @@ Mandatory properties:
 - ranges: ranges describing the MMIO registers to control the PCIe
   interfaces, and ranges describing the MBus windows needed to access
   the memory and I/O regions of each PCIe interface.
+- msi-parent: Link to the hardware entity that serves as the Message
+  Signaled Interrupt controller for this PCI controller.
 
 The ranges describing the MMIO registers have the following layout:
 
@@ -74,6 +77,8 @@ and the following optional properties:
 - marvell,pcie-lane: the physical PCIe lane number, for ports having
   multiple lanes. If this property is not found, we assume that the
   value is 0.
+- reset-gpios: optional gpio to PERST#
+- reset-delay-us: delay in us to wait after reset de-assertion
 
 Example:
 
@@ -86,6 +91,7 @@ pcie-controller {
         #size-cells = <2>;
 
         bus-range = <0x00 0xff>;
+        msi-parent = <&mpic>;
 
         ranges =
                <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000   /* Port 0.0 registers */
@@ -135,6 +141,10 @@ pcie-controller {
                 interrupt-map = <0 0 0 0 &mpic 58>;
                 marvell,pcie-port = <0>;
                 marvell,pcie-lane = <0>;
+                /* low-active PERST# reset on GPIO 25 */
+                reset-gpios = <&gpio0 25 1>;
+                /* wait 20ms for device settle after reset deassertion */
+                reset-delay-us = <20000>;
                 clocks = <&gateclk 5>;
                 status = "disabled";
         };
diff --git a/Documentation/devicetree/bindings/phy/phy-bindings.txt b/Documentation/devicetree/bindings/phy/phy-bindings.txt
new file mode 100644
index 000000000000..8ae844fc0c60
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-bindings.txt
@@ -0,0 +1,66 @@
+This document explains only the device tree data binding. For general
+information about PHY subsystem refer to Documentation/phy.txt
+
+PHY device node
+===============
+
+Required Properties:
+#phy-cells:     Number of cells in a PHY specifier;  The meaning of all those
+                cells is defined by the binding for the phy node. The PHY
+                provider can use the values in cells to find the appropriate
+                PHY.
+
+For example:
+
+phys: phy {
+    compatible = "xxx";
+    reg = <...>;
+    .
+    .
+    #phy-cells = <1>;
+    .
+    .
+};
+
+That node describes an IP block (PHY provider) that implements 2 different PHYs.
+In order to differentiate between these 2 PHYs, an additonal specifier should be
+given while trying to get a reference to it.
+
+PHY user node
+=============
+
+Required Properties:
+phys : the phandle for the PHY device (used by the PHY subsystem)
+phy-names : the names of the PHY corresponding to the PHYs present in the
+            *phys* phandle
+
+Example 1:
+usb1: usb_otg_ss@xxx {
+    compatible = "xxx";
+    reg = <xxx>;
+    .
+    .
+    phys = <&usb2_phy>, <&usb3_phy>;
+    phy-names = "usb2phy", "usb3phy";
+    .
+    .
+};
+
+This node represents a controller that uses two PHYs, one for usb2 and one for
+usb3.
+
+Example 2:
+usb2: usb_otg_ss@xxx {
+    compatible = "xxx";
+    reg = <xxx>;
+    .
+    .
+    phys = <&phys 1>;
+    phy-names = "usbphy";
+    .
+    .
+};
+
+This node represents a controller that uses one of the PHYs of the PHY provider
+device defined previously. Note that the phy handle has an additional specifier
+"1" to differentiate between the two PHYs.
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
new file mode 100644
index 000000000000..c0fccaa1671e
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -0,0 +1,22 @@
+Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY
+-------------------------------------------------
+
+Required properties:
+- compatible : should be "samsung,s5pv210-mipi-video-phy";
+- reg : offset and length of the MIPI DPHY register set;
+- #phy-cells : from the generic phy bindings, must be 1;
+
+For "samsung,s5pv210-mipi-video-phy" compatible PHYs the second cell in
+the PHY specifier identifies the PHY and its meaning is as follows:
+  0 - MIPI CSIS 0,
+  1 - MIPI DSIM 0,
+  2 - MIPI CSIS 1,
+  3 - MIPI DSIM 1.
+
+Samsung EXYNOS SoC series Display Port PHY
+-------------------------------------------------
+
+Required properties:
+- compatible : should be "samsung,exynos5250-dp-video-phy";
+- reg : offset and length of the Display Port PHY register set;
+- #phy-cells : from the generic PHY bindings, must be 0;
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt
index 3077370c89af..1e70a8aff260 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt
@@ -59,16 +59,16 @@ Required subnode-properties:
 
 Optional subnode-properties:
 - fsl,drive-strength: Integer.
-    0: 4 mA
-    1: 8 mA
-    2: 12 mA
-    3: 16 mA
+    0: MXS_DRIVE_4mA
+    1: MXS_DRIVE_8mA
+    2: MXS_DRIVE_12mA
+    3: MXS_DRIVE_16mA
 - fsl,voltage: Integer.
-    0: 1.8 V
-    1: 3.3 V
+    0: MXS_VOLTAGE_LOW  - 1.8 V
+    1: MXS_VOLTAGE_HIGH - 3.3 V
 - fsl,pull-up: Integer.
-    0: Disable the internal pull-up
-    1: Enable the internal pull-up
+    0: MXS_PULL_DISABLE - Disable the internal pull-up
+    1: MXS_PULL_ENABLE  - Enable the internal pull-up
 
 Note that when enabling the pull-up, the internal pad keeper gets disabled.
 Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up
@@ -85,23 +85,32 @@ pinctrl@80018000 {
         mmc0_8bit_pins_a: mmc0-8bit@0 {
                 reg = <0>;
                 fsl,pinmux-ids = <
-                        0x2000 0x2010 0x2020 0x2030
-                        0x2040 0x2050 0x2060 0x2070
-                        0x2080 0x2090 0x20a0>;
-                fsl,drive-strength = <1>;
-                fsl,voltage = <1>;
-                fsl,pull-up = <1>;
+                        MX28_PAD_SSP0_DATA0__SSP0_D0
+                        MX28_PAD_SSP0_DATA1__SSP0_D1
+                        MX28_PAD_SSP0_DATA2__SSP0_D2
+                        MX28_PAD_SSP0_DATA3__SSP0_D3
+                        MX28_PAD_SSP0_DATA4__SSP0_D4
+                        MX28_PAD_SSP0_DATA5__SSP0_D5
+                        MX28_PAD_SSP0_DATA6__SSP0_D6
+                        MX28_PAD_SSP0_DATA7__SSP0_D7
+                        MX28_PAD_SSP0_CMD__SSP0_CMD
+                        MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
+                        MX28_PAD_SSP0_SCK__SSP0_SCK
+                >;
+                fsl,drive-strength = <MXS_DRIVE_4mA>;
+                fsl,voltage = <MXS_VOLTAGE_HIGH>;
+                fsl,pull-up = <MXS_PULL_ENABLE>;
         };
 
         mmc_cd_cfg: mmc-cd-cfg {
-                fsl,pinmux-ids = <0x2090>;
-                fsl,pull-up = <0>;
+                fsl,pinmux-ids = <MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT>;
+                fsl,pull-up = <MXS_PULL_DISABLE>;
         };
 
         mmc_sck_cfg: mmc-sck-cfg {
-                fsl,pinmux-ids = <0x20a0>;
-                fsl,drive-strength = <2>;
-                fsl,pull-up = <0>;
+                fsl,pinmux-ids = <MX28_PAD_SSP0_SCK__SSP0_SCK>;
+                fsl,drive-strength = <MXS_DRIVE_12mA>;
+                fsl,pull-up = <MXS_PULL_DISABLE>;
         };
 };
 
@@ -112,811 +121,7 @@ adjusting the configuration for pins card-detection and clock from what group
 node mmc0-8bit defines.  Only the configuration properties to be adjusted need
 to be listed in the config nodes.
 
-Valid values for i.MX28 pinmux-id:
-
-pinmux                                          id
-------                                          --
-MX28_PAD_GPMI_D00__GPMI_D0                      0x0000
-MX28_PAD_GPMI_D01__GPMI_D1                      0x0010
-MX28_PAD_GPMI_D02__GPMI_D2                      0x0020
-MX28_PAD_GPMI_D03__GPMI_D3                      0x0030
-MX28_PAD_GPMI_D04__GPMI_D4                      0x0040
-MX28_PAD_GPMI_D05__GPMI_D5                      0x0050
-MX28_PAD_GPMI_D06__GPMI_D6                      0x0060
-MX28_PAD_GPMI_D07__GPMI_D7                      0x0070
-MX28_PAD_GPMI_CE0N__GPMI_CE0N                   0x0100
-MX28_PAD_GPMI_CE1N__GPMI_CE1N                   0x0110
-MX28_PAD_GPMI_CE2N__GPMI_CE2N                   0x0120
-MX28_PAD_GPMI_CE3N__GPMI_CE3N                   0x0130
-MX28_PAD_GPMI_RDY0__GPMI_READY0                 0x0140
-MX28_PAD_GPMI_RDY1__GPMI_READY1                 0x0150
-MX28_PAD_GPMI_RDY2__GPMI_READY2                 0x0160
-MX28_PAD_GPMI_RDY3__GPMI_READY3                 0x0170
-MX28_PAD_GPMI_RDN__GPMI_RDN                     0x0180
-MX28_PAD_GPMI_WRN__GPMI_WRN                     0x0190
-MX28_PAD_GPMI_ALE__GPMI_ALE                     0x01a0
-MX28_PAD_GPMI_CLE__GPMI_CLE                     0x01b0
-MX28_PAD_GPMI_RESETN__GPMI_RESETN               0x01c0
-MX28_PAD_LCD_D00__LCD_D0                        0x1000
-MX28_PAD_LCD_D01__LCD_D1                        0x1010
-MX28_PAD_LCD_D02__LCD_D2                        0x1020
-MX28_PAD_LCD_D03__LCD_D3                        0x1030
-MX28_PAD_LCD_D04__LCD_D4                        0x1040
-MX28_PAD_LCD_D05__LCD_D5                        0x1050
-MX28_PAD_LCD_D06__LCD_D6                        0x1060
-MX28_PAD_LCD_D07__LCD_D7                        0x1070
-MX28_PAD_LCD_D08__LCD_D8                        0x1080
-MX28_PAD_LCD_D09__LCD_D9                        0x1090
-MX28_PAD_LCD_D10__LCD_D10                       0x10a0
-MX28_PAD_LCD_D11__LCD_D11                       0x10b0
-MX28_PAD_LCD_D12__LCD_D12                       0x10c0
-MX28_PAD_LCD_D13__LCD_D13                       0x10d0
-MX28_PAD_LCD_D14__LCD_D14                       0x10e0
-MX28_PAD_LCD_D15__LCD_D15                       0x10f0
-MX28_PAD_LCD_D16__LCD_D16                       0x1100
-MX28_PAD_LCD_D17__LCD_D17                       0x1110
-MX28_PAD_LCD_D18__LCD_D18                       0x1120
-MX28_PAD_LCD_D19__LCD_D19                       0x1130
-MX28_PAD_LCD_D20__LCD_D20                       0x1140
-MX28_PAD_LCD_D21__LCD_D21                       0x1150
-MX28_PAD_LCD_D22__LCD_D22                       0x1160
-MX28_PAD_LCD_D23__LCD_D23                       0x1170
-MX28_PAD_LCD_RD_E__LCD_RD_E                     0x1180
-MX28_PAD_LCD_WR_RWN__LCD_WR_RWN                 0x1190
-MX28_PAD_LCD_RS__LCD_RS                         0x11a0
-MX28_PAD_LCD_CS__LCD_CS                         0x11b0
-MX28_PAD_LCD_VSYNC__LCD_VSYNC                   0x11c0
-MX28_PAD_LCD_HSYNC__LCD_HSYNC                   0x11d0
-MX28_PAD_LCD_DOTCLK__LCD_DOTCLK                 0x11e0
-MX28_PAD_LCD_ENABLE__LCD_ENABLE                 0x11f0
-MX28_PAD_SSP0_DATA0__SSP0_D0                    0x2000
-MX28_PAD_SSP0_DATA1__SSP0_D1                    0x2010
-MX28_PAD_SSP0_DATA2__SSP0_D2                    0x2020
-MX28_PAD_SSP0_DATA3__SSP0_D3                    0x2030
-MX28_PAD_SSP0_DATA4__SSP0_D4                    0x2040
-MX28_PAD_SSP0_DATA5__SSP0_D5                    0x2050
-MX28_PAD_SSP0_DATA6__SSP0_D6                    0x2060
-MX28_PAD_SSP0_DATA7__SSP0_D7                    0x2070
-MX28_PAD_SSP0_CMD__SSP0_CMD                     0x2080
-MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT          0x2090
-MX28_PAD_SSP0_SCK__SSP0_SCK                     0x20a0
-MX28_PAD_SSP1_SCK__SSP1_SCK                     0x20c0
-MX28_PAD_SSP1_CMD__SSP1_CMD                     0x20d0
-MX28_PAD_SSP1_DATA0__SSP1_D0                    0x20e0
-MX28_PAD_SSP1_DATA3__SSP1_D3                    0x20f0
-MX28_PAD_SSP2_SCK__SSP2_SCK                     0x2100
-MX28_PAD_SSP2_MOSI__SSP2_CMD                    0x2110
-MX28_PAD_SSP2_MISO__SSP2_D0                     0x2120
-MX28_PAD_SSP2_SS0__SSP2_D3                      0x2130
-MX28_PAD_SSP2_SS1__SSP2_D4                      0x2140
-MX28_PAD_SSP2_SS2__SSP2_D5                      0x2150
-MX28_PAD_SSP3_SCK__SSP3_SCK                     0x2180
-MX28_PAD_SSP3_MOSI__SSP3_CMD                    0x2190
-MX28_PAD_SSP3_MISO__SSP3_D0                     0x21a0
-MX28_PAD_SSP3_SS0__SSP3_D3                      0x21b0
-MX28_PAD_AUART0_RX__AUART0_RX                   0x3000
-MX28_PAD_AUART0_TX__AUART0_TX                   0x3010
-MX28_PAD_AUART0_CTS__AUART0_CTS                 0x3020
-MX28_PAD_AUART0_RTS__AUART0_RTS                 0x3030
-MX28_PAD_AUART1_RX__AUART1_RX                   0x3040
-MX28_PAD_AUART1_TX__AUART1_TX                   0x3050
-MX28_PAD_AUART1_CTS__AUART1_CTS                 0x3060
-MX28_PAD_AUART1_RTS__AUART1_RTS                 0x3070
-MX28_PAD_AUART2_RX__AUART2_RX                   0x3080
-MX28_PAD_AUART2_TX__AUART2_TX                   0x3090
-MX28_PAD_AUART2_CTS__AUART2_CTS                 0x30a0
-MX28_PAD_AUART2_RTS__AUART2_RTS                 0x30b0
-MX28_PAD_AUART3_RX__AUART3_RX                   0x30c0
-MX28_PAD_AUART3_TX__AUART3_TX                   0x30d0
-MX28_PAD_AUART3_CTS__AUART3_CTS                 0x30e0
-MX28_PAD_AUART3_RTS__AUART3_RTS                 0x30f0
-MX28_PAD_PWM0__PWM_0                            0x3100
-MX28_PAD_PWM1__PWM_1                            0x3110
-MX28_PAD_PWM2__PWM_2                            0x3120
-MX28_PAD_SAIF0_MCLK__SAIF0_MCLK                 0x3140
-MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK               0x3150
-MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK             0x3160
-MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0             0x3170
-MX28_PAD_I2C0_SCL__I2C0_SCL                     0x3180
-MX28_PAD_I2C0_SDA__I2C0_SDA                     0x3190
-MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0             0x31a0
-MX28_PAD_SPDIF__SPDIF_TX                        0x31b0
-MX28_PAD_PWM3__PWM_3                            0x31c0
-MX28_PAD_PWM4__PWM_4                            0x31d0
-MX28_PAD_LCD_RESET__LCD_RESET                   0x31e0
-MX28_PAD_ENET0_MDC__ENET0_MDC                   0x4000
-MX28_PAD_ENET0_MDIO__ENET0_MDIO                 0x4010
-MX28_PAD_ENET0_RX_EN__ENET0_RX_EN               0x4020
-MX28_PAD_ENET0_RXD0__ENET0_RXD0                 0x4030
-MX28_PAD_ENET0_RXD1__ENET0_RXD1                 0x4040
-MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK             0x4050
-MX28_PAD_ENET0_TX_EN__ENET0_TX_EN               0x4060
-MX28_PAD_ENET0_TXD0__ENET0_TXD0                 0x4070
-MX28_PAD_ENET0_TXD1__ENET0_TXD1                 0x4080
-MX28_PAD_ENET0_RXD2__ENET0_RXD2                 0x4090
-MX28_PAD_ENET0_RXD3__ENET0_RXD3                 0x40a0
-MX28_PAD_ENET0_TXD2__ENET0_TXD2                 0x40b0
-MX28_PAD_ENET0_TXD3__ENET0_TXD3                 0x40c0
-MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK             0x40d0
-MX28_PAD_ENET0_COL__ENET0_COL                   0x40e0
-MX28_PAD_ENET0_CRS__ENET0_CRS                   0x40f0
-MX28_PAD_ENET_CLK__CLKCTRL_ENET                 0x4100
-MX28_PAD_JTAG_RTCK__JTAG_RTCK                   0x4140
-MX28_PAD_EMI_D00__EMI_DATA0                     0x5000
-MX28_PAD_EMI_D01__EMI_DATA1                     0x5010
-MX28_PAD_EMI_D02__EMI_DATA2                     0x5020
-MX28_PAD_EMI_D03__EMI_DATA3                     0x5030
-MX28_PAD_EMI_D04__EMI_DATA4                     0x5040
-MX28_PAD_EMI_D05__EMI_DATA5                     0x5050
-MX28_PAD_EMI_D06__EMI_DATA6                     0x5060
-MX28_PAD_EMI_D07__EMI_DATA7                     0x5070
-MX28_PAD_EMI_D08__EMI_DATA8                     0x5080
-MX28_PAD_EMI_D09__EMI_DATA9                     0x5090
-MX28_PAD_EMI_D10__EMI_DATA10                    0x50a0
-MX28_PAD_EMI_D11__EMI_DATA11                    0x50b0
-MX28_PAD_EMI_D12__EMI_DATA12                    0x50c0
-MX28_PAD_EMI_D13__EMI_DATA13                    0x50d0
-MX28_PAD_EMI_D14__EMI_DATA14                    0x50e0
-MX28_PAD_EMI_D15__EMI_DATA15                    0x50f0
-MX28_PAD_EMI_ODT0__EMI_ODT0                     0x5100
-MX28_PAD_EMI_DQM0__EMI_DQM0                     0x5110
-MX28_PAD_EMI_ODT1__EMI_ODT1                     0x5120
-MX28_PAD_EMI_DQM1__EMI_DQM1                     0x5130
-MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK 0x5140
-MX28_PAD_EMI_CLK__EMI_CLK                       0x5150
-MX28_PAD_EMI_DQS0__EMI_DQS0                     0x5160
-MX28_PAD_EMI_DQS1__EMI_DQS1                     0x5170
-MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN             0x51a0
-MX28_PAD_EMI_A00__EMI_ADDR0                     0x6000
-MX28_PAD_EMI_A01__EMI_ADDR1                     0x6010
-MX28_PAD_EMI_A02__EMI_ADDR2                     0x6020
-MX28_PAD_EMI_A03__EMI_ADDR3                     0x6030
-MX28_PAD_EMI_A04__EMI_ADDR4                     0x6040
-MX28_PAD_EMI_A05__EMI_ADDR5                     0x6050
-MX28_PAD_EMI_A06__EMI_ADDR6                     0x6060
-MX28_PAD_EMI_A07__EMI_ADDR7                     0x6070
-MX28_PAD_EMI_A08__EMI_ADDR8                     0x6080
-MX28_PAD_EMI_A09__EMI_ADDR9                     0x6090
-MX28_PAD_EMI_A10__EMI_ADDR10                    0x60a0
-MX28_PAD_EMI_A11__EMI_ADDR11                    0x60b0
-MX28_PAD_EMI_A12__EMI_ADDR12                    0x60c0
-MX28_PAD_EMI_A13__EMI_ADDR13                    0x60d0
-MX28_PAD_EMI_A14__EMI_ADDR14                    0x60e0
-MX28_PAD_EMI_BA0__EMI_BA0                       0x6100
-MX28_PAD_EMI_BA1__EMI_BA1                       0x6110
-MX28_PAD_EMI_BA2__EMI_BA2                       0x6120
-MX28_PAD_EMI_CASN__EMI_CASN                     0x6130
-MX28_PAD_EMI_RASN__EMI_RASN                     0x6140
-MX28_PAD_EMI_WEN__EMI_WEN                       0x6150
-MX28_PAD_EMI_CE0N__EMI_CE0N                     0x6160
-MX28_PAD_EMI_CE1N__EMI_CE1N                     0x6170
-MX28_PAD_EMI_CKE__EMI_CKE                       0x6180
-MX28_PAD_GPMI_D00__SSP1_D0                      0x0001
-MX28_PAD_GPMI_D01__SSP1_D1                      0x0011
-MX28_PAD_GPMI_D02__SSP1_D2                      0x0021
-MX28_PAD_GPMI_D03__SSP1_D3                      0x0031
-MX28_PAD_GPMI_D04__SSP1_D4                      0x0041
-MX28_PAD_GPMI_D05__SSP1_D5                      0x0051
-MX28_PAD_GPMI_D06__SSP1_D6                      0x0061
-MX28_PAD_GPMI_D07__SSP1_D7                      0x0071
-MX28_PAD_GPMI_CE0N__SSP3_D0                     0x0101
-MX28_PAD_GPMI_CE1N__SSP3_D3                     0x0111
-MX28_PAD_GPMI_CE2N__CAN1_TX                     0x0121
-MX28_PAD_GPMI_CE3N__CAN1_RX                     0x0131
-MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT            0x0141
-MX28_PAD_GPMI_RDY1__SSP1_CMD                    0x0151
-MX28_PAD_GPMI_RDY2__CAN0_TX                     0x0161
-MX28_PAD_GPMI_RDY3__CAN0_RX                     0x0171
-MX28_PAD_GPMI_RDN__SSP3_SCK                     0x0181
-MX28_PAD_GPMI_WRN__SSP1_SCK                     0x0191
-MX28_PAD_GPMI_ALE__SSP3_D1                      0x01a1
-MX28_PAD_GPMI_CLE__SSP3_D2                      0x01b1
-MX28_PAD_GPMI_RESETN__SSP3_CMD                  0x01c1
-MX28_PAD_LCD_D03__ETM_DA8                       0x1031
-MX28_PAD_LCD_D04__ETM_DA9                       0x1041
-MX28_PAD_LCD_D08__ETM_DA3                       0x1081
-MX28_PAD_LCD_D09__ETM_DA4                       0x1091
-MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT         0x1141
-MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN          0x1151
-MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT         0x1161
-MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN          0x1171
-MX28_PAD_LCD_RD_E__LCD_VSYNC                    0x1181
-MX28_PAD_LCD_WR_RWN__LCD_HSYNC                  0x1191
-MX28_PAD_LCD_RS__LCD_DOTCLK                     0x11a1
-MX28_PAD_LCD_CS__LCD_ENABLE                     0x11b1
-MX28_PAD_LCD_VSYNC__SAIF1_SDATA0                0x11c1
-MX28_PAD_LCD_HSYNC__SAIF1_SDATA1                0x11d1
-MX28_PAD_LCD_DOTCLK__SAIF1_MCLK                 0x11e1
-MX28_PAD_SSP0_DATA4__SSP2_D0                    0x2041
-MX28_PAD_SSP0_DATA5__SSP2_D3                    0x2051
-MX28_PAD_SSP0_DATA6__SSP2_CMD                   0x2061
-MX28_PAD_SSP0_DATA7__SSP2_SCK                   0x2071
-MX28_PAD_SSP1_SCK__SSP2_D1                      0x20c1
-MX28_PAD_SSP1_CMD__SSP2_D2                      0x20d1
-MX28_PAD_SSP1_DATA0__SSP2_D6                    0x20e1
-MX28_PAD_SSP1_DATA3__SSP2_D7                    0x20f1
-MX28_PAD_SSP2_SCK__AUART2_RX                    0x2101
-MX28_PAD_SSP2_MOSI__AUART2_TX                   0x2111
-MX28_PAD_SSP2_MISO__AUART3_RX                   0x2121
-MX28_PAD_SSP2_SS0__AUART3_TX                    0x2131
-MX28_PAD_SSP2_SS1__SSP2_D1                      0x2141
-MX28_PAD_SSP2_SS2__SSP2_D2                      0x2151
-MX28_PAD_SSP3_SCK__AUART4_TX                    0x2181
-MX28_PAD_SSP3_MOSI__AUART4_RX                   0x2191
-MX28_PAD_SSP3_MISO__AUART4_RTS                  0x21a1
-MX28_PAD_SSP3_SS0__AUART4_CTS                   0x21b1
-MX28_PAD_AUART0_RX__I2C0_SCL                    0x3001
-MX28_PAD_AUART0_TX__I2C0_SDA                    0x3011
-MX28_PAD_AUART0_CTS__AUART4_RX                  0x3021
-MX28_PAD_AUART0_RTS__AUART4_TX                  0x3031
-MX28_PAD_AUART1_RX__SSP2_CARD_DETECT            0x3041
-MX28_PAD_AUART1_TX__SSP3_CARD_DETECT            0x3051
-MX28_PAD_AUART1_CTS__USB0_OVERCURRENT           0x3061
-MX28_PAD_AUART1_RTS__USB0_ID                    0x3071
-MX28_PAD_AUART2_RX__SSP3_D1                     0x3081
-MX28_PAD_AUART2_TX__SSP3_D2                     0x3091
-MX28_PAD_AUART2_CTS__I2C1_SCL                   0x30a1
-MX28_PAD_AUART2_RTS__I2C1_SDA                   0x30b1
-MX28_PAD_AUART3_RX__CAN0_TX                     0x30c1
-MX28_PAD_AUART3_TX__CAN0_RX                     0x30d1
-MX28_PAD_AUART3_CTS__CAN1_TX                    0x30e1
-MX28_PAD_AUART3_RTS__CAN1_RX                    0x30f1
-MX28_PAD_PWM0__I2C1_SCL                         0x3101
-MX28_PAD_PWM1__I2C1_SDA                         0x3111
-MX28_PAD_PWM2__USB0_ID                          0x3121
-MX28_PAD_SAIF0_MCLK__PWM_3                      0x3141
-MX28_PAD_SAIF0_LRCLK__PWM_4                     0x3151
-MX28_PAD_SAIF0_BITCLK__PWM_5                    0x3161
-MX28_PAD_SAIF0_SDATA0__PWM_6                    0x3171
-MX28_PAD_I2C0_SCL__TIMROT_ROTARYA               0x3181
-MX28_PAD_I2C0_SDA__TIMROT_ROTARYB               0x3191
-MX28_PAD_SAIF1_SDATA0__PWM_7                    0x31a1
-MX28_PAD_LCD_RESET__LCD_VSYNC                   0x31e1
-MX28_PAD_ENET0_MDC__GPMI_CE4N                   0x4001
-MX28_PAD_ENET0_MDIO__GPMI_CE5N                  0x4011
-MX28_PAD_ENET0_RX_EN__GPMI_CE6N                 0x4021
-MX28_PAD_ENET0_RXD0__GPMI_CE7N                  0x4031
-MX28_PAD_ENET0_RXD1__GPMI_READY4                0x4041
-MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER            0x4051
-MX28_PAD_ENET0_TX_EN__GPMI_READY5               0x4061
-MX28_PAD_ENET0_TXD0__GPMI_READY6                0x4071
-MX28_PAD_ENET0_TXD1__GPMI_READY7                0x4081
-MX28_PAD_ENET0_RXD2__ENET1_RXD0                 0x4091
-MX28_PAD_ENET0_RXD3__ENET1_RXD1                 0x40a1
-MX28_PAD_ENET0_TXD2__ENET1_TXD0                 0x40b1
-MX28_PAD_ENET0_TXD3__ENET1_TXD1                 0x40c1
-MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER              0x40d1
-MX28_PAD_ENET0_COL__ENET1_TX_EN                 0x40e1
-MX28_PAD_ENET0_CRS__ENET1_RX_EN                 0x40f1
-MX28_PAD_GPMI_CE2N__ENET0_RX_ER                 0x0122
-MX28_PAD_GPMI_CE3N__SAIF1_MCLK                  0x0132
-MX28_PAD_GPMI_RDY0__USB0_ID                     0x0142
-MX28_PAD_GPMI_RDY2__ENET0_TX_ER                 0x0162
-MX28_PAD_GPMI_RDY3__HSADC_TRIGGER               0x0172
-MX28_PAD_GPMI_ALE__SSP3_D4                      0x01a2
-MX28_PAD_GPMI_CLE__SSP3_D5                      0x01b2
-MX28_PAD_LCD_D00__ETM_DA0                       0x1002
-MX28_PAD_LCD_D01__ETM_DA1                       0x1012
-MX28_PAD_LCD_D02__ETM_DA2                       0x1022
-MX28_PAD_LCD_D03__ETM_DA3                       0x1032
-MX28_PAD_LCD_D04__ETM_DA4                       0x1042
-MX28_PAD_LCD_D05__ETM_DA5                       0x1052
-MX28_PAD_LCD_D06__ETM_DA6                       0x1062
-MX28_PAD_LCD_D07__ETM_DA7                       0x1072
-MX28_PAD_LCD_D08__ETM_DA8                       0x1082
-MX28_PAD_LCD_D09__ETM_DA9                       0x1092
-MX28_PAD_LCD_D10__ETM_DA10                      0x10a2
-MX28_PAD_LCD_D11__ETM_DA11                      0x10b2
-MX28_PAD_LCD_D12__ETM_DA12                      0x10c2
-MX28_PAD_LCD_D13__ETM_DA13                      0x10d2
-MX28_PAD_LCD_D14__ETM_DA14                      0x10e2
-MX28_PAD_LCD_D15__ETM_DA15                      0x10f2
-MX28_PAD_LCD_D16__ETM_DA7                       0x1102
-MX28_PAD_LCD_D17__ETM_DA6                       0x1112
-MX28_PAD_LCD_D18__ETM_DA5                       0x1122
-MX28_PAD_LCD_D19__ETM_DA4                       0x1132
-MX28_PAD_LCD_D20__ETM_DA3                       0x1142
-MX28_PAD_LCD_D21__ETM_DA2                       0x1152
-MX28_PAD_LCD_D22__ETM_DA1                       0x1162
-MX28_PAD_LCD_D23__ETM_DA0                       0x1172
-MX28_PAD_LCD_RD_E__ETM_TCTL                     0x1182
-MX28_PAD_LCD_WR_RWN__ETM_TCLK                   0x1192
-MX28_PAD_LCD_HSYNC__ETM_TCTL                    0x11d2
-MX28_PAD_LCD_DOTCLK__ETM_TCLK                   0x11e2
-MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT        0x20c2
-MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN         0x20d2
-MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT      0x20e2
-MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN       0x20f2
-MX28_PAD_SSP2_SCK__SAIF0_SDATA1                 0x2102
-MX28_PAD_SSP2_MOSI__SAIF0_SDATA2                0x2112
-MX28_PAD_SSP2_MISO__SAIF1_SDATA1                0x2122
-MX28_PAD_SSP2_SS0__SAIF1_SDATA2                 0x2132
-MX28_PAD_SSP2_SS1__USB1_OVERCURRENT             0x2142
-MX28_PAD_SSP2_SS2__USB0_OVERCURRENT             0x2152
-MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT        0x2182
-MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN        0x2192
-MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT       0x21a2
-MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN         0x21b2
-MX28_PAD_AUART0_RX__DUART_CTS                   0x3002
-MX28_PAD_AUART0_TX__DUART_RTS                   0x3012
-MX28_PAD_AUART0_CTS__DUART_RX                   0x3022
-MX28_PAD_AUART0_RTS__DUART_TX                   0x3032
-MX28_PAD_AUART1_RX__PWM_0                       0x3042
-MX28_PAD_AUART1_TX__PWM_1                       0x3052
-MX28_PAD_AUART1_CTS__TIMROT_ROTARYA             0x3062
-MX28_PAD_AUART1_RTS__TIMROT_ROTARYB             0x3072
-MX28_PAD_AUART2_RX__SSP3_D4                     0x3082
-MX28_PAD_AUART2_TX__SSP3_D5                     0x3092
-MX28_PAD_AUART2_CTS__SAIF1_BITCLK               0x30a2
-MX28_PAD_AUART2_RTS__SAIF1_LRCLK                0x30b2
-MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT       0x30c2
-MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN        0x30d2
-MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT      0x30e2
-MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN       0x30f2
-MX28_PAD_PWM0__DUART_RX                         0x3102
-MX28_PAD_PWM1__DUART_TX                         0x3112
-MX28_PAD_PWM2__USB1_OVERCURRENT                 0x3122
-MX28_PAD_SAIF0_MCLK__AUART4_CTS                 0x3142
-MX28_PAD_SAIF0_LRCLK__AUART4_RTS                0x3152
-MX28_PAD_SAIF0_BITCLK__AUART4_RX                0x3162
-MX28_PAD_SAIF0_SDATA0__AUART4_TX                0x3172
-MX28_PAD_I2C0_SCL__DUART_RX                     0x3182
-MX28_PAD_I2C0_SDA__DUART_TX                     0x3192
-MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1             0x31a2
-MX28_PAD_SPDIF__ENET1_RX_ER                     0x31b2
-MX28_PAD_ENET0_MDC__SAIF0_SDATA1                0x4002
-MX28_PAD_ENET0_MDIO__SAIF0_SDATA2               0x4012
-MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1              0x4022
-MX28_PAD_ENET0_RXD0__SAIF1_SDATA2               0x4032
-MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT    0x4052
-MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT      0x4092
-MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN       0x40a2
-MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT      0x40b2
-MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN       0x40c2
-MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN     0x40d2
-MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT       0x40e2
-MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN        0x40f2
-MX28_PAD_GPMI_D00__GPIO_0_0                     0x0003
-MX28_PAD_GPMI_D01__GPIO_0_1                     0x0013
-MX28_PAD_GPMI_D02__GPIO_0_2                     0x0023
-MX28_PAD_GPMI_D03__GPIO_0_3                     0x0033
-MX28_PAD_GPMI_D04__GPIO_0_4                     0x0043
-MX28_PAD_GPMI_D05__GPIO_0_5                     0x0053
-MX28_PAD_GPMI_D06__GPIO_0_6                     0x0063
-MX28_PAD_GPMI_D07__GPIO_0_7                     0x0073
-MX28_PAD_GPMI_CE0N__GPIO_0_16                   0x0103
-MX28_PAD_GPMI_CE1N__GPIO_0_17                   0x0113
-MX28_PAD_GPMI_CE2N__GPIO_0_18                   0x0123
-MX28_PAD_GPMI_CE3N__GPIO_0_19                   0x0133
-MX28_PAD_GPMI_RDY0__GPIO_0_20                   0x0143
-MX28_PAD_GPMI_RDY1__GPIO_0_21                   0x0153
-MX28_PAD_GPMI_RDY2__GPIO_0_22                   0x0163
-MX28_PAD_GPMI_RDY3__GPIO_0_23                   0x0173
-MX28_PAD_GPMI_RDN__GPIO_0_24                    0x0183
-MX28_PAD_GPMI_WRN__GPIO_0_25                    0x0193
-MX28_PAD_GPMI_ALE__GPIO_0_26                    0x01a3
-MX28_PAD_GPMI_CLE__GPIO_0_27                    0x01b3
-MX28_PAD_GPMI_RESETN__GPIO_0_28                 0x01c3
-MX28_PAD_LCD_D00__GPIO_1_0                      0x1003
-MX28_PAD_LCD_D01__GPIO_1_1                      0x1013
-MX28_PAD_LCD_D02__GPIO_1_2                      0x1023
-MX28_PAD_LCD_D03__GPIO_1_3                      0x1033
-MX28_PAD_LCD_D04__GPIO_1_4                      0x1043
-MX28_PAD_LCD_D05__GPIO_1_5                      0x1053
-MX28_PAD_LCD_D06__GPIO_1_6                      0x1063
-MX28_PAD_LCD_D07__GPIO_1_7                      0x1073
-MX28_PAD_LCD_D08__GPIO_1_8                      0x1083
-MX28_PAD_LCD_D09__GPIO_1_9                      0x1093
-MX28_PAD_LCD_D10__GPIO_1_10                     0x10a3
-MX28_PAD_LCD_D11__GPIO_1_11                     0x10b3
-MX28_PAD_LCD_D12__GPIO_1_12                     0x10c3
-MX28_PAD_LCD_D13__GPIO_1_13                     0x10d3
-MX28_PAD_LCD_D14__GPIO_1_14                     0x10e3
-MX28_PAD_LCD_D15__GPIO_1_15                     0x10f3
-MX28_PAD_LCD_D16__GPIO_1_16                     0x1103
-MX28_PAD_LCD_D17__GPIO_1_17                     0x1113
-MX28_PAD_LCD_D18__GPIO_1_18                     0x1123
-MX28_PAD_LCD_D19__GPIO_1_19                     0x1133
-MX28_PAD_LCD_D20__GPIO_1_20                     0x1143
-MX28_PAD_LCD_D21__GPIO_1_21                     0x1153
-MX28_PAD_LCD_D22__GPIO_1_22                     0x1163
-MX28_PAD_LCD_D23__GPIO_1_23                     0x1173
-MX28_PAD_LCD_RD_E__GPIO_1_24                    0x1183
-MX28_PAD_LCD_WR_RWN__GPIO_1_25                  0x1193
-MX28_PAD_LCD_RS__GPIO_1_26                      0x11a3
-MX28_PAD_LCD_CS__GPIO_1_27                      0x11b3
-MX28_PAD_LCD_VSYNC__GPIO_1_28                   0x11c3
-MX28_PAD_LCD_HSYNC__GPIO_1_29                   0x11d3
-MX28_PAD_LCD_DOTCLK__GPIO_1_30                  0x11e3
-MX28_PAD_LCD_ENABLE__GPIO_1_31                  0x11f3
-MX28_PAD_SSP0_DATA0__GPIO_2_0                   0x2003
-MX28_PAD_SSP0_DATA1__GPIO_2_1                   0x2013
-MX28_PAD_SSP0_DATA2__GPIO_2_2                   0x2023
-MX28_PAD_SSP0_DATA3__GPIO_2_3                   0x2033
-MX28_PAD_SSP0_DATA4__GPIO_2_4                   0x2043
-MX28_PAD_SSP0_DATA5__GPIO_2_5                   0x2053
-MX28_PAD_SSP0_DATA6__GPIO_2_6                   0x2063
-MX28_PAD_SSP0_DATA7__GPIO_2_7                   0x2073
-MX28_PAD_SSP0_CMD__GPIO_2_8                     0x2083
-MX28_PAD_SSP0_DETECT__GPIO_2_9                  0x2093
-MX28_PAD_SSP0_SCK__GPIO_2_10                    0x20a3
-MX28_PAD_SSP1_SCK__GPIO_2_12                    0x20c3
-MX28_PAD_SSP1_CMD__GPIO_2_13                    0x20d3
-MX28_PAD_SSP1_DATA0__GPIO_2_14                  0x20e3
-MX28_PAD_SSP1_DATA3__GPIO_2_15                  0x20f3
-MX28_PAD_SSP2_SCK__GPIO_2_16                    0x2103
-MX28_PAD_SSP2_MOSI__GPIO_2_17                   0x2113
-MX28_PAD_SSP2_MISO__GPIO_2_18                   0x2123
-MX28_PAD_SSP2_SS0__GPIO_2_19                    0x2133
-MX28_PAD_SSP2_SS1__GPIO_2_20                    0x2143
-MX28_PAD_SSP2_SS2__GPIO_2_21                    0x2153
-MX28_PAD_SSP3_SCK__GPIO_2_24                    0x2183
-MX28_PAD_SSP3_MOSI__GPIO_2_25                   0x2193
-MX28_PAD_SSP3_MISO__GPIO_2_26                   0x21a3
-MX28_PAD_SSP3_SS0__GPIO_2_27                    0x21b3
-MX28_PAD_AUART0_RX__GPIO_3_0                    0x3003
-MX28_PAD_AUART0_TX__GPIO_3_1                    0x3013
-MX28_PAD_AUART0_CTS__GPIO_3_2                   0x3023
-MX28_PAD_AUART0_RTS__GPIO_3_3                   0x3033
-MX28_PAD_AUART1_RX__GPIO_3_4                    0x3043
-MX28_PAD_AUART1_TX__GPIO_3_5                    0x3053
-MX28_PAD_AUART1_CTS__GPIO_3_6                   0x3063
-MX28_PAD_AUART1_RTS__GPIO_3_7                   0x3073
-MX28_PAD_AUART2_RX__GPIO_3_8                    0x3083
-MX28_PAD_AUART2_TX__GPIO_3_9                    0x3093
-MX28_PAD_AUART2_CTS__GPIO_3_10                  0x30a3
-MX28_PAD_AUART2_RTS__GPIO_3_11                  0x30b3
-MX28_PAD_AUART3_RX__GPIO_3_12                   0x30c3
-MX28_PAD_AUART3_TX__GPIO_3_13                   0x30d3
-MX28_PAD_AUART3_CTS__GPIO_3_14                  0x30e3
-MX28_PAD_AUART3_RTS__GPIO_3_15                  0x30f3
-MX28_PAD_PWM0__GPIO_3_16                        0x3103
-MX28_PAD_PWM1__GPIO_3_17                        0x3113
-MX28_PAD_PWM2__GPIO_3_18                        0x3123
-MX28_PAD_SAIF0_MCLK__GPIO_3_20                  0x3143
-MX28_PAD_SAIF0_LRCLK__GPIO_3_21                 0x3153
-MX28_PAD_SAIF0_BITCLK__GPIO_3_22                0x3163
-MX28_PAD_SAIF0_SDATA0__GPIO_3_23                0x3173
-MX28_PAD_I2C0_SCL__GPIO_3_24                    0x3183
-MX28_PAD_I2C0_SDA__GPIO_3_25                    0x3193
-MX28_PAD_SAIF1_SDATA0__GPIO_3_26                0x31a3
-MX28_PAD_SPDIF__GPIO_3_27                       0x31b3
-MX28_PAD_PWM3__GPIO_3_28                        0x31c3
-MX28_PAD_PWM4__GPIO_3_29                        0x31d3
-MX28_PAD_LCD_RESET__GPIO_3_30                   0x31e3
-MX28_PAD_ENET0_MDC__GPIO_4_0                    0x4003
-MX28_PAD_ENET0_MDIO__GPIO_4_1                   0x4013
-MX28_PAD_ENET0_RX_EN__GPIO_4_2                  0x4023
-MX28_PAD_ENET0_RXD0__GPIO_4_3                   0x4033
-MX28_PAD_ENET0_RXD1__GPIO_4_4                   0x4043
-MX28_PAD_ENET0_TX_CLK__GPIO_4_5                 0x4053
-MX28_PAD_ENET0_TX_EN__GPIO_4_6                  0x4063
-MX28_PAD_ENET0_TXD0__GPIO_4_7                   0x4073
-MX28_PAD_ENET0_TXD1__GPIO_4_8                   0x4083
-MX28_PAD_ENET0_RXD2__GPIO_4_9                   0x4093
-MX28_PAD_ENET0_RXD3__GPIO_4_10                  0x40a3
-MX28_PAD_ENET0_TXD2__GPIO_4_11                  0x40b3
-MX28_PAD_ENET0_TXD3__GPIO_4_12                  0x40c3
-MX28_PAD_ENET0_RX_CLK__GPIO_4_13                0x40d3
-MX28_PAD_ENET0_COL__GPIO_4_14                   0x40e3
-MX28_PAD_ENET0_CRS__GPIO_4_15                   0x40f3
-MX28_PAD_ENET_CLK__GPIO_4_16                    0x4103
-MX28_PAD_JTAG_RTCK__GPIO_4_20                   0x4143
-
-Valid values for i.MX23 pinmux-id:
-
-pinmux                                          id
-------                                          --
-MX23_PAD_GPMI_D00__GPMI_D00                     0x0000
-MX23_PAD_GPMI_D01__GPMI_D01                     0x0010
-MX23_PAD_GPMI_D02__GPMI_D02                     0x0020
-MX23_PAD_GPMI_D03__GPMI_D03                     0x0030
-MX23_PAD_GPMI_D04__GPMI_D04                     0x0040
-MX23_PAD_GPMI_D05__GPMI_D05                     0x0050
-MX23_PAD_GPMI_D06__GPMI_D06                     0x0060
-MX23_PAD_GPMI_D07__GPMI_D07                     0x0070
-MX23_PAD_GPMI_D08__GPMI_D08                     0x0080
-MX23_PAD_GPMI_D09__GPMI_D09                     0x0090
-MX23_PAD_GPMI_D10__GPMI_D10                     0x00a0
-MX23_PAD_GPMI_D11__GPMI_D11                     0x00b0
-MX23_PAD_GPMI_D12__GPMI_D12                     0x00c0
-MX23_PAD_GPMI_D13__GPMI_D13                     0x00d0
-MX23_PAD_GPMI_D14__GPMI_D14                     0x00e0
-MX23_PAD_GPMI_D15__GPMI_D15                     0x00f0
-MX23_PAD_GPMI_CLE__GPMI_CLE                     0x0100
-MX23_PAD_GPMI_ALE__GPMI_ALE                     0x0110
-MX23_PAD_GPMI_CE2N__GPMI_CE2N                   0x0120
-MX23_PAD_GPMI_RDY0__GPMI_RDY0                   0x0130
-MX23_PAD_GPMI_RDY1__GPMI_RDY1                   0x0140
-MX23_PAD_GPMI_RDY2__GPMI_RDY2                   0x0150
-MX23_PAD_GPMI_RDY3__GPMI_RDY3                   0x0160
-MX23_PAD_GPMI_WPN__GPMI_WPN                     0x0170
-MX23_PAD_GPMI_WRN__GPMI_WRN                     0x0180
-MX23_PAD_GPMI_RDN__GPMI_RDN                     0x0190
-MX23_PAD_AUART1_CTS__AUART1_CTS                 0x01a0
-MX23_PAD_AUART1_RTS__AUART1_RTS                 0x01b0
-MX23_PAD_AUART1_RX__AUART1_RX                   0x01c0
-MX23_PAD_AUART1_TX__AUART1_TX                   0x01d0
-MX23_PAD_I2C_SCL__I2C_SCL                       0x01e0
-MX23_PAD_I2C_SDA__I2C_SDA                       0x01f0
-MX23_PAD_LCD_D00__LCD_D00                       0x1000
-MX23_PAD_LCD_D01__LCD_D01                       0x1010
-MX23_PAD_LCD_D02__LCD_D02                       0x1020
-MX23_PAD_LCD_D03__LCD_D03                       0x1030
-MX23_PAD_LCD_D04__LCD_D04                       0x1040
-MX23_PAD_LCD_D05__LCD_D05                       0x1050
-MX23_PAD_LCD_D06__LCD_D06                       0x1060
-MX23_PAD_LCD_D07__LCD_D07                       0x1070
-MX23_PAD_LCD_D08__LCD_D08                       0x1080
-MX23_PAD_LCD_D09__LCD_D09                       0x1090
-MX23_PAD_LCD_D10__LCD_D10                       0x10a0
-MX23_PAD_LCD_D11__LCD_D11                       0x10b0
-MX23_PAD_LCD_D12__LCD_D12                       0x10c0
-MX23_PAD_LCD_D13__LCD_D13                       0x10d0
-MX23_PAD_LCD_D14__LCD_D14                       0x10e0
-MX23_PAD_LCD_D15__LCD_D15                       0x10f0
-MX23_PAD_LCD_D16__LCD_D16                       0x1100
-MX23_PAD_LCD_D17__LCD_D17                       0x1110
-MX23_PAD_LCD_RESET__LCD_RESET                   0x1120
-MX23_PAD_LCD_RS__LCD_RS                         0x1130
-MX23_PAD_LCD_WR__LCD_WR                         0x1140
-MX23_PAD_LCD_CS__LCD_CS                         0x1150
-MX23_PAD_LCD_DOTCK__LCD_DOTCK                   0x1160
-MX23_PAD_LCD_ENABLE__LCD_ENABLE                 0x1170
-MX23_PAD_LCD_HSYNC__LCD_HSYNC                   0x1180
-MX23_PAD_LCD_VSYNC__LCD_VSYNC                   0x1190
-MX23_PAD_PWM0__PWM0                             0x11a0
-MX23_PAD_PWM1__PWM1                             0x11b0
-MX23_PAD_PWM2__PWM2                             0x11c0
-MX23_PAD_PWM3__PWM3                             0x11d0
-MX23_PAD_PWM4__PWM4                             0x11e0
-MX23_PAD_SSP1_CMD__SSP1_CMD                     0x2000
-MX23_PAD_SSP1_DETECT__SSP1_DETECT               0x2010
-MX23_PAD_SSP1_DATA0__SSP1_DATA0                 0x2020
-MX23_PAD_SSP1_DATA1__SSP1_DATA1                 0x2030
-MX23_PAD_SSP1_DATA2__SSP1_DATA2                 0x2040
-MX23_PAD_SSP1_DATA3__SSP1_DATA3                 0x2050
-MX23_PAD_SSP1_SCK__SSP1_SCK                     0x2060
-MX23_PAD_ROTARYA__ROTARYA                       0x2070
-MX23_PAD_ROTARYB__ROTARYB                       0x2080
-MX23_PAD_EMI_A00__EMI_A00                       0x2090
-MX23_PAD_EMI_A01__EMI_A01                       0x20a0
-MX23_PAD_EMI_A02__EMI_A02                       0x20b0
-MX23_PAD_EMI_A03__EMI_A03                       0x20c0
-MX23_PAD_EMI_A04__EMI_A04                       0x20d0
-MX23_PAD_EMI_A05__EMI_A05                       0x20e0
-MX23_PAD_EMI_A06__EMI_A06                       0x20f0
-MX23_PAD_EMI_A07__EMI_A07                       0x2100
-MX23_PAD_EMI_A08__EMI_A08                       0x2110
-MX23_PAD_EMI_A09__EMI_A09                       0x2120
-MX23_PAD_EMI_A10__EMI_A10                       0x2130
-MX23_PAD_EMI_A11__EMI_A11                       0x2140
-MX23_PAD_EMI_A12__EMI_A12                       0x2150
-MX23_PAD_EMI_BA0__EMI_BA0                       0x2160
-MX23_PAD_EMI_BA1__EMI_BA1                       0x2170
-MX23_PAD_EMI_CASN__EMI_CASN                     0x2180
-MX23_PAD_EMI_CE0N__EMI_CE0N                     0x2190
-MX23_PAD_EMI_CE1N__EMI_CE1N                     0x21a0
-MX23_PAD_GPMI_CE1N__GPMI_CE1N                   0x21b0
-MX23_PAD_GPMI_CE0N__GPMI_CE0N                   0x21c0
-MX23_PAD_EMI_CKE__EMI_CKE                       0x21d0
-MX23_PAD_EMI_RASN__EMI_RASN                     0x21e0
-MX23_PAD_EMI_WEN__EMI_WEN                       0x21f0
-MX23_PAD_EMI_D00__EMI_D00                       0x3000
-MX23_PAD_EMI_D01__EMI_D01                       0x3010
-MX23_PAD_EMI_D02__EMI_D02                       0x3020
-MX23_PAD_EMI_D03__EMI_D03                       0x3030
-MX23_PAD_EMI_D04__EMI_D04                       0x3040
-MX23_PAD_EMI_D05__EMI_D05                       0x3050
-MX23_PAD_EMI_D06__EMI_D06                       0x3060
-MX23_PAD_EMI_D07__EMI_D07                       0x3070
-MX23_PAD_EMI_D08__EMI_D08                       0x3080
-MX23_PAD_EMI_D09__EMI_D09                       0x3090
-MX23_PAD_EMI_D10__EMI_D10                       0x30a0
-MX23_PAD_EMI_D11__EMI_D11                       0x30b0
-MX23_PAD_EMI_D12__EMI_D12                       0x30c0
-MX23_PAD_EMI_D13__EMI_D13                       0x30d0
-MX23_PAD_EMI_D14__EMI_D14                       0x30e0
-MX23_PAD_EMI_D15__EMI_D15                       0x30f0
-MX23_PAD_EMI_DQM0__EMI_DQM0                     0x3100
-MX23_PAD_EMI_DQM1__EMI_DQM1                     0x3110
-MX23_PAD_EMI_DQS0__EMI_DQS0                     0x3120
-MX23_PAD_EMI_DQS1__EMI_DQS1                     0x3130
-MX23_PAD_EMI_CLK__EMI_CLK                       0x3140
-MX23_PAD_EMI_CLKN__EMI_CLKN                     0x3150
-MX23_PAD_GPMI_D00__LCD_D8                       0x0001
-MX23_PAD_GPMI_D01__LCD_D9                       0x0011
-MX23_PAD_GPMI_D02__LCD_D10                      0x0021
-MX23_PAD_GPMI_D03__LCD_D11                      0x0031
-MX23_PAD_GPMI_D04__LCD_D12                      0x0041
-MX23_PAD_GPMI_D05__LCD_D13                      0x0051
-MX23_PAD_GPMI_D06__LCD_D14                      0x0061
-MX23_PAD_GPMI_D07__LCD_D15                      0x0071
-MX23_PAD_GPMI_D08__LCD_D18                      0x0081
-MX23_PAD_GPMI_D09__LCD_D19                      0x0091
-MX23_PAD_GPMI_D10__LCD_D20                      0x00a1
-MX23_PAD_GPMI_D11__LCD_D21                      0x00b1
-MX23_PAD_GPMI_D12__LCD_D22                      0x00c1
-MX23_PAD_GPMI_D13__LCD_D23                      0x00d1
-MX23_PAD_GPMI_D14__AUART2_RX                    0x00e1
-MX23_PAD_GPMI_D15__AUART2_TX                    0x00f1
-MX23_PAD_GPMI_CLE__LCD_D16                      0x0101
-MX23_PAD_GPMI_ALE__LCD_D17                      0x0111
-MX23_PAD_GPMI_CE2N__ATA_A2                      0x0121
-MX23_PAD_AUART1_RTS__IR_CLK                     0x01b1
-MX23_PAD_AUART1_RX__IR_RX                       0x01c1
-MX23_PAD_AUART1_TX__IR_TX                       0x01d1
-MX23_PAD_I2C_SCL__GPMI_RDY2                     0x01e1
-MX23_PAD_I2C_SDA__GPMI_CE2N                     0x01f1
-MX23_PAD_LCD_D00__ETM_DA8                       0x1001
-MX23_PAD_LCD_D01__ETM_DA9                       0x1011
-MX23_PAD_LCD_D02__ETM_DA10                      0x1021
-MX23_PAD_LCD_D03__ETM_DA11                      0x1031
-MX23_PAD_LCD_D04__ETM_DA12                      0x1041
-MX23_PAD_LCD_D05__ETM_DA13                      0x1051
-MX23_PAD_LCD_D06__ETM_DA14                      0x1061
-MX23_PAD_LCD_D07__ETM_DA15                      0x1071
-MX23_PAD_LCD_D08__ETM_DA0                       0x1081
-MX23_PAD_LCD_D09__ETM_DA1                       0x1091
-MX23_PAD_LCD_D10__ETM_DA2                       0x10a1
-MX23_PAD_LCD_D11__ETM_DA3                       0x10b1
-MX23_PAD_LCD_D12__ETM_DA4                       0x10c1
-MX23_PAD_LCD_D13__ETM_DA5                       0x10d1
-MX23_PAD_LCD_D14__ETM_DA6                       0x10e1
-MX23_PAD_LCD_D15__ETM_DA7                       0x10f1
-MX23_PAD_LCD_RESET__ETM_TCTL                    0x1121
-MX23_PAD_LCD_RS__ETM_TCLK                       0x1131
-MX23_PAD_LCD_DOTCK__GPMI_RDY3                   0x1161
-MX23_PAD_LCD_ENABLE__I2C_SCL                    0x1171
-MX23_PAD_LCD_HSYNC__I2C_SDA                     0x1181
-MX23_PAD_LCD_VSYNC__LCD_BUSY                    0x1191
-MX23_PAD_PWM0__ROTARYA                          0x11a1
-MX23_PAD_PWM1__ROTARYB                          0x11b1
-MX23_PAD_PWM2__GPMI_RDY3                        0x11c1
-MX23_PAD_PWM3__ETM_TCTL                         0x11d1
-MX23_PAD_PWM4__ETM_TCLK                         0x11e1
-MX23_PAD_SSP1_DETECT__GPMI_CE3N                 0x2011
-MX23_PAD_SSP1_DATA1__I2C_SCL                    0x2031
-MX23_PAD_SSP1_DATA2__I2C_SDA                    0x2041
-MX23_PAD_ROTARYA__AUART2_RTS                    0x2071
-MX23_PAD_ROTARYB__AUART2_CTS                    0x2081
-MX23_PAD_GPMI_D00__SSP2_DATA0                   0x0002
-MX23_PAD_GPMI_D01__SSP2_DATA1                   0x0012
-MX23_PAD_GPMI_D02__SSP2_DATA2                   0x0022
-MX23_PAD_GPMI_D03__SSP2_DATA3                   0x0032
-MX23_PAD_GPMI_D04__SSP2_DATA4                   0x0042
-MX23_PAD_GPMI_D05__SSP2_DATA5                   0x0052
-MX23_PAD_GPMI_D06__SSP2_DATA6                   0x0062
-MX23_PAD_GPMI_D07__SSP2_DATA7                   0x0072
-MX23_PAD_GPMI_D08__SSP1_DATA4                   0x0082
-MX23_PAD_GPMI_D09__SSP1_DATA5                   0x0092
-MX23_PAD_GPMI_D10__SSP1_DATA6                   0x00a2
-MX23_PAD_GPMI_D11__SSP1_DATA7                   0x00b2
-MX23_PAD_GPMI_D15__GPMI_CE3N                    0x00f2
-MX23_PAD_GPMI_RDY0__SSP2_DETECT                 0x0132
-MX23_PAD_GPMI_RDY1__SSP2_CMD                    0x0142
-MX23_PAD_GPMI_WRN__SSP2_SCK                     0x0182
-MX23_PAD_AUART1_CTS__SSP1_DATA4                 0x01a2
-MX23_PAD_AUART1_RTS__SSP1_DATA5                 0x01b2
-MX23_PAD_AUART1_RX__SSP1_DATA6                  0x01c2
-MX23_PAD_AUART1_TX__SSP1_DATA7                  0x01d2
-MX23_PAD_I2C_SCL__AUART1_TX                     0x01e2
-MX23_PAD_I2C_SDA__AUART1_RX                     0x01f2
-MX23_PAD_LCD_D08__SAIF2_SDATA0                  0x1082
-MX23_PAD_LCD_D09__SAIF1_SDATA0                  0x1092
-MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK              0x10a2
-MX23_PAD_LCD_D11__SAIF_LRCLK                    0x10b2
-MX23_PAD_LCD_D12__SAIF2_SDATA1                  0x10c2
-MX23_PAD_LCD_D13__SAIF2_SDATA2                  0x10d2
-MX23_PAD_LCD_D14__SAIF1_SDATA2                  0x10e2
-MX23_PAD_LCD_D15__SAIF1_SDATA1                  0x10f2
-MX23_PAD_LCD_D16__SAIF_ALT_BITCLK               0x1102
-MX23_PAD_LCD_RESET__GPMI_CE3N                   0x1122
-MX23_PAD_PWM0__DUART_RX                         0x11a2
-MX23_PAD_PWM1__DUART_TX                         0x11b2
-MX23_PAD_PWM3__AUART1_CTS                       0x11d2
-MX23_PAD_PWM4__AUART1_RTS                       0x11e2
-MX23_PAD_SSP1_CMD__JTAG_TDO                     0x2002
-MX23_PAD_SSP1_DETECT__USB_OTG_ID                0x2012
-MX23_PAD_SSP1_DATA0__JTAG_TDI                   0x2022
-MX23_PAD_SSP1_DATA1__JTAG_TCLK                  0x2032
-MX23_PAD_SSP1_DATA2__JTAG_RTCK                  0x2042
-MX23_PAD_SSP1_DATA3__JTAG_TMS                   0x2052
-MX23_PAD_SSP1_SCK__JTAG_TRST                    0x2062
-MX23_PAD_ROTARYA__SPDIF                         0x2072
-MX23_PAD_ROTARYB__GPMI_CE3N                     0x2082
-MX23_PAD_GPMI_D00__GPIO_0_0                     0x0003
-MX23_PAD_GPMI_D01__GPIO_0_1                     0x0013
-MX23_PAD_GPMI_D02__GPIO_0_2                     0x0023
-MX23_PAD_GPMI_D03__GPIO_0_3                     0x0033
-MX23_PAD_GPMI_D04__GPIO_0_4                     0x0043
-MX23_PAD_GPMI_D05__GPIO_0_5                     0x0053
-MX23_PAD_GPMI_D06__GPIO_0_6                     0x0063
-MX23_PAD_GPMI_D07__GPIO_0_7                     0x0073
-MX23_PAD_GPMI_D08__GPIO_0_8                     0x0083
-MX23_PAD_GPMI_D09__GPIO_0_9                     0x0093
-MX23_PAD_GPMI_D10__GPIO_0_10                    0x00a3
-MX23_PAD_GPMI_D11__GPIO_0_11                    0x00b3
-MX23_PAD_GPMI_D12__GPIO_0_12                    0x00c3
-MX23_PAD_GPMI_D13__GPIO_0_13                    0x00d3
-MX23_PAD_GPMI_D14__GPIO_0_14                    0x00e3
-MX23_PAD_GPMI_D15__GPIO_0_15                    0x00f3
-MX23_PAD_GPMI_CLE__GPIO_0_16                    0x0103
-MX23_PAD_GPMI_ALE__GPIO_0_17                    0x0113
-MX23_PAD_GPMI_CE2N__GPIO_0_18                   0x0123
-MX23_PAD_GPMI_RDY0__GPIO_0_19                   0x0133
-MX23_PAD_GPMI_RDY1__GPIO_0_20                   0x0143
-MX23_PAD_GPMI_RDY2__GPIO_0_21                   0x0153
-MX23_PAD_GPMI_RDY3__GPIO_0_22                   0x0163
-MX23_PAD_GPMI_WPN__GPIO_0_23                    0x0173
-MX23_PAD_GPMI_WRN__GPIO_0_24                    0x0183
-MX23_PAD_GPMI_RDN__GPIO_0_25                    0x0193
-MX23_PAD_AUART1_CTS__GPIO_0_26                  0x01a3
-MX23_PAD_AUART1_RTS__GPIO_0_27                  0x01b3
-MX23_PAD_AUART1_RX__GPIO_0_28                   0x01c3
-MX23_PAD_AUART1_TX__GPIO_0_29                   0x01d3
-MX23_PAD_I2C_SCL__GPIO_0_30                     0x01e3
-MX23_PAD_I2C_SDA__GPIO_0_31                     0x01f3
-MX23_PAD_LCD_D00__GPIO_1_0                      0x1003
-MX23_PAD_LCD_D01__GPIO_1_1                      0x1013
-MX23_PAD_LCD_D02__GPIO_1_2                      0x1023
-MX23_PAD_LCD_D03__GPIO_1_3                      0x1033
-MX23_PAD_LCD_D04__GPIO_1_4                      0x1043
-MX23_PAD_LCD_D05__GPIO_1_5                      0x1053
-MX23_PAD_LCD_D06__GPIO_1_6                      0x1063
-MX23_PAD_LCD_D07__GPIO_1_7                      0x1073
-MX23_PAD_LCD_D08__GPIO_1_8                      0x1083
-MX23_PAD_LCD_D09__GPIO_1_9                      0x1093
-MX23_PAD_LCD_D10__GPIO_1_10                     0x10a3
-MX23_PAD_LCD_D11__GPIO_1_11                     0x10b3
-MX23_PAD_LCD_D12__GPIO_1_12                     0x10c3
-MX23_PAD_LCD_D13__GPIO_1_13                     0x10d3
-MX23_PAD_LCD_D14__GPIO_1_14                     0x10e3
-MX23_PAD_LCD_D15__GPIO_1_15                     0x10f3
-MX23_PAD_LCD_D16__GPIO_1_16                     0x1103
-MX23_PAD_LCD_D17__GPIO_1_17                     0x1113
-MX23_PAD_LCD_RESET__GPIO_1_18                   0x1123
-MX23_PAD_LCD_RS__GPIO_1_19                      0x1133
-MX23_PAD_LCD_WR__GPIO_1_20                      0x1143
-MX23_PAD_LCD_CS__GPIO_1_21                      0x1153
-MX23_PAD_LCD_DOTCK__GPIO_1_22                   0x1163
-MX23_PAD_LCD_ENABLE__GPIO_1_23                  0x1173
-MX23_PAD_LCD_HSYNC__GPIO_1_24                   0x1183
-MX23_PAD_LCD_VSYNC__GPIO_1_25                   0x1193
-MX23_PAD_PWM0__GPIO_1_26                        0x11a3
-MX23_PAD_PWM1__GPIO_1_27                        0x11b3
-MX23_PAD_PWM2__GPIO_1_28                        0x11c3
-MX23_PAD_PWM3__GPIO_1_29                        0x11d3
-MX23_PAD_PWM4__GPIO_1_30                        0x11e3
-MX23_PAD_SSP1_CMD__GPIO_2_0                     0x2003
-MX23_PAD_SSP1_DETECT__GPIO_2_1                  0x2013
-MX23_PAD_SSP1_DATA0__GPIO_2_2                   0x2023
-MX23_PAD_SSP1_DATA1__GPIO_2_3                   0x2033
-MX23_PAD_SSP1_DATA2__GPIO_2_4                   0x2043
-MX23_PAD_SSP1_DATA3__GPIO_2_5                   0x2053
-MX23_PAD_SSP1_SCK__GPIO_2_6                     0x2063
-MX23_PAD_ROTARYA__GPIO_2_7                      0x2073
-MX23_PAD_ROTARYB__GPIO_2_8                      0x2083
-MX23_PAD_EMI_A00__GPIO_2_9                      0x2093
-MX23_PAD_EMI_A01__GPIO_2_10                     0x20a3
-MX23_PAD_EMI_A02__GPIO_2_11                     0x20b3
-MX23_PAD_EMI_A03__GPIO_2_12                     0x20c3
-MX23_PAD_EMI_A04__GPIO_2_13                     0x20d3
-MX23_PAD_EMI_A05__GPIO_2_14                     0x20e3
-MX23_PAD_EMI_A06__GPIO_2_15                     0x20f3
-MX23_PAD_EMI_A07__GPIO_2_16                     0x2103
-MX23_PAD_EMI_A08__GPIO_2_17                     0x2113
-MX23_PAD_EMI_A09__GPIO_2_18                     0x2123
-MX23_PAD_EMI_A10__GPIO_2_19                     0x2133
-MX23_PAD_EMI_A11__GPIO_2_20                     0x2143
-MX23_PAD_EMI_A12__GPIO_2_21                     0x2153
-MX23_PAD_EMI_BA0__GPIO_2_22                     0x2163
-MX23_PAD_EMI_BA1__GPIO_2_23                     0x2173
-MX23_PAD_EMI_CASN__GPIO_2_24                    0x2183
-MX23_PAD_EMI_CE0N__GPIO_2_25                    0x2193
-MX23_PAD_EMI_CE1N__GPIO_2_26                    0x21a3
-MX23_PAD_GPMI_CE1N__GPIO_2_27                   0x21b3
-MX23_PAD_GPMI_CE0N__GPIO_2_28                   0x21c3
-MX23_PAD_EMI_CKE__GPIO_2_29                     0x21d3
-MX23_PAD_EMI_RASN__GPIO_2_30                    0x21e3
-MX23_PAD_EMI_WEN__GPIO_2_31                     0x21f3
+Valid values for i.MX28/i.MX23 pinmux-id are defined in
+arch/arm/boot/dts/imx28-pinfunc.h and arch/arm/boot/dts/imx23-pinfunc.h.
+The definitions for the padconfig properties can be found in
+arch/arm/boot/dts/mxs-pinfunc.h.
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
index 5a02e30dd262..7069a0b84e3a 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
@@ -72,6 +72,13 @@ Optional properties:
                 /* pin base, nr pins & gpio function */
                 pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>;
 
+- interrupt-controller : standard interrupt controller binding if using
+  interrupts for wake-up events for example. In this case pinctrl-single
+  is set up as a chained interrupt controller and the wake-up interrupts
+  can be requested by the drivers using request_irq().
+
+- #interrupt-cells : standard interrupt binding if using interrupts
+
 This driver assumes that there is only one register for each pin (unless the
 pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as
 specified in the pinctrl-bindings.txt document in this directory.
@@ -121,6 +128,8 @@ pmx_core: pinmux@4a100040 {
         reg = <0x4a100040 0x0196>;
         #address-cells = <1>;
         #size-cells = <0>;
+        #interrupt-cells = <1>;
+        interrupt-controller;
         pinctrl-single,register-width = <16>;
         pinctrl-single,function-mask = <0xffff>;
 };
@@ -131,6 +140,8 @@ pmx_wkup: pinmux@4a31e040 {
         reg = <0x4a31e040 0x0038>;
         #address-cells = <1>;
         #size-cells = <0>;
+        #interrupt-cells = <1>;
+        interrupt-controller;
         pinctrl-single,register-width = <16>;
         pinctrl-single,function-mask = <0xffff>;
 };
diff --git a/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt b/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt
index 46882058b59b..ee05dc390694 100644
--- a/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt
+++ b/Documentation/devicetree/bindings/staging/iio/adc/mxs-lradc.txt
@@ -1,7 +1,8 @@
 * Freescale i.MX28 LRADC device driver
 
 Required properties:
-- compatible: Should be "fsl,imx28-lradc"
+- compatible: Should be "fsl,imx23-lradc" for i.MX23 SoC and "fsl,imx28-lradc"
+              for i.MX28 SoC
 - reg: Address and length of the register set for the device
 - interrupts: Should contain the LRADC interrupts
 
@@ -9,13 +10,38 @@ Optional properties:
 - fsl,lradc-touchscreen-wires: Number of wires used to connect the touchscreen
                                to LRADC. Valid value is either 4 or 5. If this
                                property is not present, then the touchscreen is
-                               disabled.
+                               disabled. 5 wires is valid for i.MX28 SoC only.
+- fsl,ave-ctrl: number of samples per direction to calculate an average value.
+                Allowed value is 1 ... 31, default is 4
+- fsl,ave-delay: delay between consecutive samples. Allowed value is
+                 1 ... 2047. It is used if 'fsl,ave-ctrl' > 1, counts at
+                 2 kHz and its default is 2 (= 1 ms)
+- fsl,settling: delay between plate switch to next sample. Allowed value is
+                1 ... 2047. It counts at 2 kHz and its default is
+                10 (= 5 ms)
 
-Examples:
+Example for i.MX23 SoC:
+
+        lradc@80050000 {
+                compatible = "fsl,imx23-lradc";
+                reg = <0x80050000 0x2000>;
+                interrupts = <36 37 38 39 40 41 42 43 44>;
+                status = "okay";
+                fsl,lradc-touchscreen-wires = <4>;
+                fsl,ave-ctrl = <4>;
+                fsl,ave-delay = <2>;
+                fsl,settling = <10>;
+        };
+
+Example for i.MX28 SoC:
 
         lradc@80050000 {
                 compatible = "fsl,imx28-lradc";
                 reg = <0x80050000 0x2000>;
-                interrupts = <10 14 15 16 17 18 19
-                                20 21 22 23 24 25>;
+                interrupts = <10 14 15 16 17 18 19 20 21 22 23 24 25>;
+                status = "okay";
+                fsl,lradc-touchscreen-wires = <5>;
+                fsl,ave-ctrl = <4>;
+                fsl,ave-delay = <2>;
+                fsl,settling = <10>;
         };
diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
new file mode 100644
index 000000000000..5ea26c631e3a
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -0,0 +1,17 @@
+MSM SoC HSUSB controllers
+
+EHCI
+
+Required properties:
+- compatible:   Should contain "qcom,ehci-host"
+- regs:                 offset and length of the register set in the memory map
+- usb-phy:              phandle for the PHY device
+
+Example EHCI controller device node:
+
+        ehci: ehci@f9a55000 {
+                compatible = "qcom,ehci-host";
+                reg = <0xf9a55000 0x400>;
+                usb-phy = <&usb_otg>;
+        };
+
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt b/Documentation/devicetree/bindings/usb/omap-usb.txt
index 9088ab09e200..090e5e22bd2b 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -3,9 +3,6 @@ OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS
 OMAP MUSB GLUE
  - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
  - ti,hwmods : must be "usb_otg_hs"
- - ti,has-mailbox : to specify that omap uses an external mailbox
-   (in control module) to communicate with the musb core during device connect
-   and disconnect.
  - multipoint : Should be "1" indicating the musb controller supports
    multipoint. This is a MUSB configuration-specific setting.
  - num-eps : Specifies the number of endpoints. This is also a
@@ -19,6 +16,9 @@ OMAP MUSB GLUE
  - power : Should be "50". This signifies the controller can supply up to
    100mA when operating in host mode.
  - usb-phy : the phandle for the PHY device
+ - phys : the phandle for the PHY device (used by generic PHY framework)
+ - phy-names : the names of the PHY corresponding to the PHYs present in the
+   *phy* phandle.
 
 Optional properties:
  - ctrl-module : phandle of the control module this glue uses to write to
@@ -28,11 +28,12 @@ SOC specific device node entry
 usb_otg_hs: usb_otg_hs@4a0ab000 {
         compatible = "ti,omap4-musb";
         ti,hwmods = "usb_otg_hs";
-        ti,has-mailbox;
         multipoint = <1>;
         num-eps = <16>;
         ram-bits = <12>;
         ctrl-module = <&omap_control_usb>;
+        phys = <&usb2_phy>;
+        phy-names = "usb2-phy";
 };
 
 Board specific device node entry
@@ -78,22 +79,22 @@ omap_dwc3 {
 OMAP CONTROL USB
 
 Required properties:
- - compatible: Should be "ti,omap-control-usb"
+ - compatible: Should be one of
+ "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
+ "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
+                        e.g. USB2_PHY on OMAP5.
+ "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
+                        e.g. USB3 PHY and SATA PHY on OMAP5.
+ "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
+                        DRA7 platform.
  - reg : Address and length of the register set for the device. It contains
-   the address of "control_dev_conf" and "otghs_control" or "phy_power_usb"
-   depending upon omap4 or omap5.
- - reg-names: The names of the register addresses corresponding to the registers
-   filled in "reg".
- - ti,type: This is used to differentiate whether the control module has
-   usb mailbox or usb3 phy power. omap4 has usb mailbox in control module to
-   notify events to the musb core and omap5 has usb3 phy power register to
-   power on usb3 phy. Should be "1" if it has mailbox and "2" if it has usb3
-   phy power.
+   the address of "otghs_control" for control-phy-otghs or "power" register
+   for other types.
+ - reg-names: should be "otghs_control" control-phy-otghs and "power" for
+   other types.
 
 omap_control_usb: omap-control-usb@4a002300 {
-        compatible = "ti,omap-control-usb";
-        reg = <0x4a002300 0x4>,
-              <0x4a00233c 0x4>;
-        reg-names = "control_dev_conf", "otghs_control";
-        ti,type = <1>;
+        compatible = "ti,control-phy-otghs";
+        reg = <0x4a00233c 0x4>;
+        reg-names = "otghs_control";
 };
diff --git a/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt b/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt
index d7e272671c7e..1bd37faba05b 100644
--- a/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt
+++ b/Documentation/devicetree/bindings/usb/usb-nop-xceiv.txt
@@ -15,7 +15,7 @@ Optional properties:
 
 - vcc-supply: phandle to the regulator that provides RESET to the PHY.
 
-- reset-supply: phandle to the regulator that provides power to the PHY.
+- reset-gpios: Should specify the GPIO for reset.
 
 Example:
 
@@ -25,10 +25,9 @@ Example:
                 clocks = <&osc 0>;
                 clock-names = "main_clk";
                 vcc-supply = <&hsusb1_vcc_regulator>;
-                reset-supply = <&hsusb1_reset_regulator>;
+                reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
         };
 
 hsusb1_phy is a NOP USB PHY device that gets its clock from an oscillator
 and expects that clock to be configured to 19.2MHz by the NOP PHY driver.
-hsusb1_vcc_regulator provides power to the PHY and hsusb1_reset_regulator
-controls RESET.
+hsusb1_vcc_regulator provides power to the PHY and GPIO 7 controls RESET.
diff --git a/Documentation/devicetree/bindings/usb/usb-phy.txt b/Documentation/devicetree/bindings/usb/usb-phy.txt
index 61496f5cb095..c0245c888982 100644
--- a/Documentation/devicetree/bindings/usb/usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/usb-phy.txt
@@ -5,6 +5,8 @@ OMAP USB2 PHY
 Required properties:
  - compatible: Should be "ti,omap-usb2"
  - reg : Address and length of the register set for the device.
+ - #phy-cells: determine the number of cells that should be given in the
+   phandle while referencing this phy.
 
 Optional properties:
  - ctrl-module : phandle of the control module used by PHY driver to power on
@@ -16,6 +18,7 @@ usb2phy@4a0ad080 {
         compatible = "ti,omap-usb2";
         reg = <0x4a0ad080 0x58>;
         ctrl-module = <&omap_control_usb>;
+        #phy-cells = <0>;
 };
 
 OMAP USB3 PHY
@@ -25,6 +28,8 @@ Required properties:
  - reg : Address and length of the register set for the device.
  - reg-names: The names of the register addresses corresponding to the registers
    filled in "reg".
+ - #phy-cells: determine the number of cells that should be given in the
+   phandle while referencing this phy.
 
 Optional properties:
  - ctrl-module : phandle of the control module used by PHY driver to power on
@@ -39,4 +44,5 @@ usb3phy@4a084400 {
               <0x4a084c00 0x40>;
         reg-names = "phy_rx", "phy_tx", "pll_ctrl";
         ctrl-module = <&omap_control_usb>;
+        #phy-cells = <0>;
 };
diff --git a/Documentation/devicetree/bindings/usb/ux500-usb.txt b/Documentation/devicetree/bindings/usb/ux500-usb.txt
index 330d6ec15401..439a41c79afa 100644
--- a/Documentation/devicetree/bindings/usb/ux500-usb.txt
+++ b/Documentation/devicetree/bindings/usb/ux500-usb.txt
@@ -15,7 +15,7 @@ Optional properties:
 Example:
 
 usb_per5@a03e0000 {
-        compatible = "stericsson,db8500-musb", "mentor,musb";
+        compatible = "stericsson,db8500-musb";
         reg = <0xa03e0000 0x10000>;
         interrupts = <0 23 0x4>;
         interrupt-names = "mc";
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 2956800f0240..04eab45dd148 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -15,6 +15,7 @@ atmel	Atmel Corporation
 avago   Avago Technologies
 bosch   Bosch Sensortec GmbH
 brcm    Broadcom Corporation
+capella Capella Microsystems, Inc
 cavium  Cavium, Inc.
 chrp    Common Hardware Reference Platform
 cirrus  Cirrus Logic, Inc.
diff --git a/Documentation/devicetree/bindings/video/exynos_dp.txt b/Documentation/devicetree/bindings/video/exynos_dp.txt
index 84f10c16cb38..3289d76a21d0 100644
--- a/Documentation/devicetree/bindings/video/exynos_dp.txt
+++ b/Documentation/devicetree/bindings/video/exynos_dp.txt
@@ -6,10 +6,10 @@ We use two nodes:
         -dptx-phy node(defined inside dp-controller node)
 
 For the DP-PHY initialization, we use the dptx-phy node.
-Required properties for dptx-phy:
-        -reg:
+Required properties for dptx-phy: deprecated, use phys and phy-names
+        -reg: deprecated
                 Base address of DP PHY register.
-        -samsung,enable-mask:
+        -samsung,enable-mask: deprecated
                 The bit-mask used to enable/disable DP PHY.
 
 For the Panel initialization, we read data from dp-controller node.
@@ -27,6 +27,10 @@ Required properties for dp-controller:
                 from common clock binding: Shall be "dp".
         -interrupt-parent:
                 phandle to Interrupt combiner node.
+        -phys:
+                from general PHY binding: the phandle for the PHY device.
+        -phy-names:
+                from general PHY binding: Should be "dp".
         -samsung,color-space:
                 input video data format.
                         COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
@@ -68,11 +72,8 @@ SOC specific portion:
                 clocks = <&clock 342>;
                 clock-names = "dp";
 
-                dptx-phy {
-                        reg = <0x10040720>;
-                        samsung,enable-mask = <1>;
-                };
-
+                phys = <&dp_phy>;
+                phy-names = "dp";
         };
 
 Board Specific portion:
diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
index 323983be3c30..50decf8e1b90 100644
--- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
+++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
@@ -12,7 +12,19 @@ Required properties:
         a) phandle of the gpio controller node.
         b) pin number within the gpio controller.
         c) optional flags and pull up/down.
-
+- clocks: list of clock IDs from SoC clock driver.
+        a) hdmi: Gate of HDMI IP bus clock.
+        b) sclk_hdmi: Gate of HDMI special clock.
+        c) sclk_pixel: Pixel special clock, one of the two possible inputs of
+                HDMI clock mux.
+        d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of
+                HDMI clock mux.
+        e) mout_hdmi: It is required by the driver to switch between the 2
+                parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
+                after configuration, parent is set to sclk_hdmiphy else
+                sclk_pixel.
+- clock-names: aliases as per driver requirements for above clock IDs:
+        "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".
 Example:
 
         hdmi {
diff --git a/Documentation/devicetree/bindings/video/exynos_mixer.txt b/Documentation/devicetree/bindings/video/exynos_mixer.txt
index 3334b0a8e343..7bfde9c9d658 100644
--- a/Documentation/devicetree/bindings/video/exynos_mixer.txt
+++ b/Documentation/devicetree/bindings/video/exynos_mixer.txt
@@ -10,6 +10,10 @@ Required properties:
 - reg: physical base address of the mixer and length of memory mapped
         region.
 - interrupts: interrupt number to the cpu.
+- clocks: list of clock IDs from SoC clock driver.
+        a) mixer: Gate of Mixer IP bus clock.
+        b) sclk_hdmi: HDMI Special clock, one of the two possible inputs of
+               mixer mux.
 
 Example:
 
diff --git a/Documentation/extcon/porting-android-switch-class b/Documentation/extcon/porting-android-switch-class
index eb0fa5f4fe88..5377f6317961 100644
--- a/Documentation/extcon/porting-android-switch-class
+++ b/Documentation/extcon/porting-android-switch-class
@@ -25,8 +25,10 @@ MyungJoo Ham <myungjoo.ham@samsung.com>
     @print_state: no change but type change (switch_dev->extcon_dev)
 
 - switch_dev_register(sdev, dev)
-        => extcon_dev_register(edev, dev)
-        : no change but type change (sdev->edev)
+        => extcon_dev_register(edev)
+        : type change (sdev->edev)
+        : remove second param('dev'). if edev has parent device, should store
+          'dev' to 'edev.dev.parent' before registering extcon device
 - switch_dev_unregister(sdev)
         => extcon_dev_unregister(edev)
         : no change but type change (sdev->edev)
diff --git a/Documentation/filesystems/caching/netfs-api.txt b/Documentation/filesystems/caching/netfs-api.txt
index 11a0a40ce445..aed6b94160b1 100644
--- a/Documentation/filesystems/caching/netfs-api.txt
+++ b/Documentation/filesystems/caching/netfs-api.txt
@@ -29,15 +29,16 @@ This document contains the following sections:
          (6) Index registration
          (7) Data file registration
          (8) Miscellaneous object registration
-         (9) Setting the data file size
+         (9) Setting the data file size
         (10) Page alloc/read/write
         (11) Page uncaching
         (12) Index and data file consistency
-        (13) Miscellaneous cookie operations
-        (14) Cookie unregistration
-        (15) Index invalidation
-        (16) Data file invalidation
-        (17) FS-Cache specific page flags.
+        (13) Cookie enablement
+        (14) Miscellaneous cookie operations
+        (15) Cookie unregistration
+        (16) Index invalidation
+        (17) Data file invalidation
+        (18) FS-Cache specific page flags.
 
 
 =============================
@@ -334,7 +335,8 @@ the path to the file:
         struct fscache_cookie *
         fscache_acquire_cookie(struct fscache_cookie *parent,
                                const struct fscache_object_def *def,
-                               void *netfs_data);
+                               void *netfs_data,
+                               bool enable);
 
 This function creates an index entry in the index represented by parent,
 filling in the index entry by calling the operations pointed to by def.
@@ -350,6 +352,10 @@ object needs to be created somewhere down the hierarchy.  Furthermore, an index
 may be created in several different caches independently at different times.
 This is all handled transparently, and the netfs doesn't see any of it.
 
+A cookie will be created in the disabled state if enabled is false.  A cookie
+must be enabled to do anything with it.  A disabled cookie can be enabled by
+calling fscache_enable_cookie() (see below).
+
 For example, with AFS, a cell would be added to the primary index.  This index
 entry would have a dependent inode containing a volume location index for the
 volume mappings within this cell:
@@ -357,7 +363,7 @@ volume mappings within this cell:
         cell->cache =
                 fscache_acquire_cookie(afs_cache_netfs.primary_index,
                                        &afs_cell_cache_index_def,
-                                       cell);
+                                       cell, true);
 
 Then when a volume location was accessed, it would be entered into the cell's
 index and an inode would be allocated that acts as a volume type and hash chain
@@ -366,7 +372,7 @@ combination:
         vlocation->cache =
                 fscache_acquire_cookie(cell->cache,
                                        &afs_vlocation_cache_index_def,
-                                       vlocation);
+                                       vlocation, true);
 
 And then a particular flavour of volume (R/O for example) could be added to
 that index, creating another index for vnodes (AFS inode equivalents):
@@ -374,7 +380,7 @@ that index, creating another index for vnodes (AFS inode equivalents):
         volume->cache =
                 fscache_acquire_cookie(vlocation->cache,
                                        &afs_volume_cache_index_def,
-                                       volume);
+                                       volume, true);
 
 
 ======================
@@ -388,7 +394,7 @@ the object definition should be something other than index type.
         vnode->cache =
                 fscache_acquire_cookie(volume->cache,
                                        &afs_vnode_cache_object_def,
-                                       vnode);
+                                       vnode, true);
 
 
 =================================
@@ -404,7 +410,7 @@ it would be some other type of object such as a data file.
         xattr->cache =
                 fscache_acquire_cookie(vnode->cache,
                                        &afs_xattr_cache_object_def,
-                                       xattr);
+                                       xattr, true);
 
 Miscellaneous objects might be used to store extended attributes or directory
 entries for example.
@@ -733,6 +739,47 @@ Note that partial updates may happen automatically at other times, such as when
 data blocks are added to a data file object.
 
 
+=================
+COOKIE ENABLEMENT
+=================
+
+Cookies exist in one of two states: enabled and disabled.  If a cookie is
+disabled, it ignores all attempts to acquire child cookies; check, update or
+invalidate its state; allocate, read or write backing pages - though it is
+still possible to uncache pages and relinquish the cookie.
+
+The initial enablement state is set by fscache_acquire_cookie(), but the cookie
+can be enabled or disabled later.  To disable a cookie, call:
+    
+        void fscache_disable_cookie(struct fscache_cookie *cookie,
+                                    bool invalidate);
+    
+If the cookie is not already disabled, this locks the cookie against other
+enable and disable ops, marks the cookie as being disabled, discards or
+invalidates any backing objects and waits for cessation of activity on any
+associated object before unlocking the cookie.
+
+All possible failures are handled internally.  The caller should consider
+calling fscache_uncache_all_inode_pages() afterwards to make sure all page
+markings are cleared up.
+    
+Cookies can be enabled or reenabled with:
+    
+        void fscache_enable_cookie(struct fscache_cookie *cookie,
+                                   bool (*can_enable)(void *data),
+                                   void *data)
+    
+If the cookie is not already enabled, this locks the cookie against other
+enable and disable ops, invokes can_enable() and, if the cookie is not an index
+cookie, will begin the procedure of acquiring backing objects.
+
+The optional can_enable() function is passed the data argument and returns a
+ruling as to whether or not enablement should actually be permitted to begin.
+
+All possible failures are handled internally.  The cookie will only be marked
+as enabled if provisional backing objects are allocated.
+
+
 ===============================
 MISCELLANEOUS COOKIE OPERATIONS
 ===============================
@@ -778,7 +825,7 @@ COOKIE UNREGISTRATION
 To get rid of a cookie, this function should be called.
 
         void fscache_relinquish_cookie(struct fscache_cookie *cookie,
-                                       int retire);
+                                       bool retire);
 
 If retire is non-zero, then the object will be marked for recycling, and all
 copies of it will be removed from all active caches in which it is present.
diff --git a/Documentation/mic/mic_overview.txt b/Documentation/mic/mic_overview.txt
new file mode 100644
index 000000000000..b41929224804
--- /dev/null
+++ b/Documentation/mic/mic_overview.txt
@@ -0,0 +1,51 @@
+An Intel MIC X100 device is a PCIe form factor add-in coprocessor
+card based on the Intel Many Integrated Core (MIC) architecture
+that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
+implements the three required standard address spaces i.e. configuration,
+memory and I/O. The host OS loads a device driver as is typical for
+PCIe devices. The card itself runs a bootstrap after reset that
+transfers control to the card OS downloaded from the host driver. The
+host driver supports OSPM suspend and resume operations. It shuts down
+the card during suspend and reboots the card OS during resume.
+The card OS as shipped by Intel is a Linux kernel with modifications
+for the X100 devices.
+
+Since it is a PCIe card, it does not have the ability to host hardware
+devices for networking, storage and console. We provide these devices
+on X100 coprocessors thus enabling a self-bootable equivalent environment
+for applications. A key benefit of our solution is that it leverages
+the standard virtio framework for network, disk and console devices,
+though in our case the virtio framework is used across a PCIe bus.
+
+Here is a block diagram of the various components described above. The
+virtio backends are situated on the host rather than the card given better
+single threaded performance for the host compared to MIC, the ability of
+the host to initiate DMA's to/from the card using the MIC DMA engine and
+the fact that the virtio block storage backend can only be on the host.
+
+                              |
+       +----------+           |             +----------+
+       | Card OS  |           |             | Host OS  |
+       +----------+           |             +----------+
+                              |
++-------+ +--------+ +------+ | +---------+  +--------+ +--------+
+| Virtio| |Virtio  | |Virtio| | |Virtio   |  |Virtio  | |Virtio  |
+| Net   | |Console | |Block | | |Net      |  |Console | |Block   |
+| Driver| |Driver  | |Driver| | |backend  |  |backend | |backend |
++-------+ +--------+ +------+ | +---------+  +--------+ +--------+
+    |         |         |     |      |            |         |
+    |         |         |     |User  |            |         |
+    |         |         |     |------|------------|---------|-------
+    +-------------------+     |Kernel +--------------------------+
+              |               |       | Virtio over PCIe IOCTLs  |
+              |               |       +--------------------------+
+      +--------------+        |                   |
+      |Intel MIC     |        |            +---------------+
+      |Card Driver   |        |            |Intel MIC      |
+      +--------------+        |            |Host Driver    |
+              |               |            +---------------+
+              |               |                   |
+     +-------------------------------------------------------------+
+     |                                                             |
+     |                    PCIe Bus                                 |
+     +-------------------------------------------------------------+
diff --git a/Documentation/mic/mpssd/.gitignore b/Documentation/mic/mpssd/.gitignore
new file mode 100644
index 000000000000..8b7c72f07c92
--- /dev/null
+++ b/Documentation/mic/mpssd/.gitignore
@@ -0,0 +1 @@
+mpssd
diff --git a/Documentation/mic/mpssd/Makefile b/Documentation/mic/mpssd/Makefile
new file mode 100644
index 000000000000..eb860a7d152e
--- /dev/null
+++ b/Documentation/mic/mpssd/Makefile
@@ -0,0 +1,19 @@
+#
+# Makefile - Intel MIC User Space Tools.
+# Copyright(c) 2013, Intel Corporation.
+#
+ifdef DEBUG
+CFLAGS += $(USERWARNFLAGS) -I. -g -Wall -DDEBUG=$(DEBUG)
+else
+CFLAGS += $(USERWARNFLAGS) -I. -g -Wall
+endif
+
+mpssd: mpssd.o sysfs.o
+        $(CC) $(CFLAGS) -o $@ $^ -lpthread
+
+install:
+        install mpssd /usr/sbin/mpssd
+        install micctrl /usr/sbin/micctrl
+
+clean:
+        rm -f mpssd *.o
diff --git a/Documentation/mic/mpssd/micctrl b/Documentation/mic/mpssd/micctrl
new file mode 100755
index 000000000000..8f2629b41c5f
--- /dev/null
+++ b/Documentation/mic/mpssd/micctrl
@@ -0,0 +1,173 @@
+#!/bin/bash
+# Intel MIC Platform Software Stack (MPSS)
+#
+# Copyright(c) 2013 Intel Corporation.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# The full GNU General Public License is included in this distribution in
+# the file called "COPYING".
+#
+# Intel MIC User Space Tools.
+#
+# micctrl - Controls MIC boot/start/stop.
+#
+# chkconfig: 2345 95 05
+# description: start MPSS stack processing.
+#
+### BEGIN INIT INFO
+# Provides: micctrl
+### END INIT INFO
+
+# Source function library.
+. /etc/init.d/functions
+
+sysfs="/sys/class/mic"
+
+_status()
+{
+        f=$sysfs/$1
+        echo -e $1 state: "`cat $f/state`" shutdown_status: "`cat $f/shutdown_status`"
+}
+
+status()
+{
+        if [ "`echo $1 | head -c3`" == "mic" ]; then
+                _status $1
+                return $?
+        fi
+        for f in $sysfs/*
+        do
+                _status `basename $f`
+                RETVAL=$?
+                [ $RETVAL -ne 0 ] && return $RETVAL
+        done
+        return 0
+}
+
+_reset()
+{
+        f=$sysfs/$1
+        echo reset > $f/state
+}
+
+reset()
+{
+        if [ "`echo $1 | head -c3`" == "mic" ]; then
+                _reset $1
+                return $?
+        fi
+        for f in $sysfs/*
+        do
+                _reset `basename $f`
+                RETVAL=$?
+                [ $RETVAL -ne 0 ] && return $RETVAL
+        done
+        return 0
+}
+
+_boot()
+{
+        f=$sysfs/$1
+        echo "linux" > $f/bootmode
+        echo "mic/uos.img" > $f/firmware
+        echo "mic/$1.image" > $f/ramdisk
+        echo "boot" > $f/state
+}
+
+boot()
+{
+        if [ "`echo $1 | head -c3`" == "mic" ]; then
+                _boot $1
+                return $?
+        fi
+        for f in $sysfs/*
+        do
+                _boot `basename $f`
+                RETVAL=$?
+                [ $RETVAL -ne 0 ] && return $RETVAL
+        done
+        return 0
+}
+
+_shutdown()
+{
+        f=$sysfs/$1
+        echo shutdown > $f/state
+}
+
+shutdown()
+{
+        if [ "`echo $1 | head -c3`" == "mic" ]; then
+                _shutdown $1
+                return $?
+        fi
+        for f in $sysfs/*
+        do
+                _shutdown `basename $f`
+                RETVAL=$?
+                [ $RETVAL -ne 0 ] && return $RETVAL
+        done
+        return 0
+}
+
+_wait()
+{
+        f=$sysfs/$1
+        while [ "`cat $f/state`" != "offline" -a "`cat $f/state`" != "online" ]
+        do
+                sleep 1
+                echo -e "Waiting for $1 to go offline"
+        done
+}
+
+wait()
+{
+        if [ "`echo $1 | head -c3`" == "mic" ]; then
+                _wait $1
+                return $?
+        fi
+        # Wait for the cards to go offline
+        for f in $sysfs/*
+        do
+                _wait `basename $f`
+                RETVAL=$?
+                [ $RETVAL -ne 0 ] && return $RETVAL
+        done
+        return 0
+}
+
+if [ ! -d "$sysfs" ]; then
+        echo -e $"Module unloaded "
+        exit 3
+fi
+
+case $1 in
+        -s)
+                status $2
+                ;;
+        -r)
+                reset $2
+                ;;
+        -b)
+                boot $2
+                ;;
+        -S)
+                shutdown $2
+                ;;
+        -w)
+                wait $2
+                ;;
+        *)
+                echo $"Usage: $0 {-s (status) |-r (reset) |-b (boot) |-S (shutdown) |-w (wait)}"
+                exit 2
+esac
+
+exit $?
diff --git a/Documentation/mic/mpssd/mpss b/Documentation/mic/mpssd/mpss
new file mode 100755
index 000000000000..3136c68dad0b
--- /dev/null
+++ b/Documentation/mic/mpssd/mpss
@@ -0,0 +1,202 @@
+#!/bin/bash
+# Intel MIC Platform Software Stack (MPSS)
+#
+# Copyright(c) 2013 Intel Corporation.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# The full GNU General Public License is included in this distribution in
+# the file called "COPYING".
+#
+# Intel MIC User Space Tools.
+#
+# mpss  Start mpssd.
+#
+# chkconfig: 2345 95 05
+# description: start MPSS stack processing.
+#
+### BEGIN INIT INFO
+# Provides: mpss
+# Required-Start:
+# Required-Stop:
+# Short-Description: MPSS stack control
+# Description: MPSS stack control
+### END INIT INFO
+
+# Source function library.
+. /etc/init.d/functions
+
+exec=/usr/sbin/mpssd
+sysfs="/sys/class/mic"
+
+start()
+{
+        [ -x $exec ] || exit 5
+
+        if [ "`ps -e | awk '{print $4}' | grep mpssd | head -1`" = "mpssd" ]; then
+                echo -e $"MPSSD already running! "
+                success
+                echo
+                return 0
+        fi
+
+        echo -e $"Starting MPSS Stack"
+        echo -e $"Loading MIC_HOST Module"
+
+        # Ensure the driver is loaded
+        if [ ! -d "$sysfs" ]; then
+                modprobe mic_host
+                RETVAL=$?
+                if [ $RETVAL -ne 0 ]; then
+                        failure
+                        echo
+                        return $RETVAL
+                fi
+        fi
+
+        # Start the daemon
+        echo -n $"Starting MPSSD "
+        $exec
+        RETVAL=$?
+        if [ $RETVAL -ne 0 ]; then
+                failure
+                echo
+                return $RETVAL
+        fi
+        success
+        echo
+
+        sleep 5
+
+        # Boot the cards
+        micctrl -b
+
+        # Wait till ping works
+        for f in $sysfs/*
+        do
+                count=100
+                ipaddr=`cat $f/cmdline`
+                ipaddr=${ipaddr#*address,}
+                ipaddr=`echo $ipaddr | cut -d, -f1 | cut -d\; -f1`
+                while [ $count -ge 0 ]
+                do
+                        echo -e "Pinging "`basename $f`" "
+                        ping -c 1 $ipaddr &> /dev/null
+                        RETVAL=$?
+                        if [ $RETVAL -eq 0 ]; then
+                                success
+                                break
+                        fi
+                        sleep 1
+                        count=`expr $count - 1`
+                done
+                [ $RETVAL -ne 0 ] && failure || success
+                echo
+        done
+        return $RETVAL
+}
+
+stop()
+{
+        echo -e $"Shutting down MPSS Stack: "
+
+        # Bail out if module is unloaded
+        if [ ! -d "$sysfs" ]; then
+                echo -n $"Module unloaded "
+                success
+                echo
+                return 0
+        fi
+
+        # Shut down the cards.
+        micctrl -S
+
+        # Wait for the cards to go offline
+        for f in $sysfs/*
+        do
+                while [ "`cat $f/state`" != "offline" ]
+                do
+                        sleep 1
+                        echo -e "Waiting for "`basename $f`" to go offline"
+                done
+        done
+
+        # Display the status of the cards
+        micctrl -s
+
+        # Kill MPSSD now
+        echo -n $"Killing MPSSD"
+        killall -9 mpssd 2>/dev/null
+        RETVAL=$?
+        [ $RETVAL -ne 0 ] && failure || success
+        echo
+        return $RETVAL
+}
+
+restart()
+{
+        stop
+        sleep 5
+        start
+}
+
+status()
+{
+        micctrl -s
+        if [ "`ps -e | awk '{print $4}' | grep mpssd | head -n 1`" = "mpssd" ]; then
+                echo "mpssd is running"
+        else
+                echo "mpssd is stopped"
+        fi
+        return 0
+}
+
+unload()
+{
+        if [ ! -d "$sysfs" ]; then
+                echo -n $"No MIC_HOST Module: "
+                success
+                echo
+                return
+        fi
+
+        stop
+
+        sleep 5
+        echo -n $"Removing MIC_HOST Module: "
+        modprobe -r mic_host
+        RETVAL=$?
+        [ $RETVAL -ne 0 ] && failure || success
+        echo
+        return $RETVAL
+}
+
+case $1 in
+        start)
+                start
+                ;;
+        stop)
+                stop
+                ;;
+        restart)
+                restart
+                ;;
+        status)
+                status
+                ;;
+        unload)
+                unload
+                ;;
+        *)
+                echo $"Usage: $0 {start|stop|restart|status|unload}"
+                exit 2
+esac
+
+exit $?
diff --git a/Documentation/mic/mpssd/mpssd.c b/Documentation/mic/mpssd/mpssd.c
new file mode 100644
index 000000000000..0c980ad40b17
--- /dev/null
+++ b/Documentation/mic/mpssd/mpssd.c
@@ -0,0 +1,1721 @@
+/*
+ * Intel MIC Platform Software Stack (MPSS)
+ *
+ * Copyright(c) 2013 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Intel MIC User Space Tools.
+ */
+
+#define _GNU_SOURCE
+
+#include <stdlib.h>
+#include <fcntl.h>
+#include <getopt.h>
+#include <assert.h>
+#include <unistd.h>
+#include <stdbool.h>
+#include <signal.h>
+#include <poll.h>
+#include <features.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+#include <sys/socket.h>
+#include <linux/virtio_ring.h>
+#include <linux/virtio_net.h>
+#include <linux/virtio_console.h>
+#include <linux/virtio_blk.h>
+#include <linux/version.h>
+#include "mpssd.h"
+#include <linux/mic_ioctl.h>
+#include <linux/mic_common.h>
+
+static void init_mic(struct mic_info *mic);
+
+static FILE *logfp;
+static struct mic_info mic_list;
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+#define min_t(type, x, y) ({                            \
+                type __min1 = (x);                      \
+                type __min2 = (y);                      \
+                __min1 < __min2 ? __min1 : __min2; })
+
+/* align addr on a size boundary - adjust address up/down if needed */
+#define _ALIGN_DOWN(addr, size)  ((addr)&(~((size)-1)))
+#define _ALIGN_UP(addr, size)    _ALIGN_DOWN(addr + size - 1, size)
+
+/* align addr on a size boundary - adjust address up if needed */
+#define _ALIGN(addr, size)     _ALIGN_UP(addr, size)
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr)        _ALIGN(addr, PAGE_SIZE)
+
+#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
+
+#define GSO_ENABLED             1
+#define MAX_GSO_SIZE            (64 * 1024)
+#define ETH_H_LEN               14
+#define MAX_NET_PKT_SIZE        (_ALIGN_UP(MAX_GSO_SIZE + ETH_H_LEN, 64))
+#define MIC_DEVICE_PAGE_END     0x1000
+
+#ifndef VIRTIO_NET_HDR_F_DATA_VALID
+#define VIRTIO_NET_HDR_F_DATA_VALID     2       /* Csum is valid */
+#endif
+
+static struct {
+        struct mic_device_desc dd;
+        struct mic_vqconfig vqconfig[2];
+        __u32 host_features, guest_acknowledgements;
+        struct virtio_console_config cons_config;
+} virtcons_dev_page = {
+        .dd = {
+                .type = VIRTIO_ID_CONSOLE,
+                .num_vq = ARRAY_SIZE(virtcons_dev_page.vqconfig),
+                .feature_len = sizeof(virtcons_dev_page.host_features),
+                .config_len = sizeof(virtcons_dev_page.cons_config),
+        },
+        .vqconfig[0] = {
+                .num = htole16(MIC_VRING_ENTRIES),
+        },
+        .vqconfig[1] = {
+                .num = htole16(MIC_VRING_ENTRIES),
+        },
+};
+
+static struct {
+        struct mic_device_desc dd;
+        struct mic_vqconfig vqconfig[2];
+        __u32 host_features, guest_acknowledgements;
+        struct virtio_net_config net_config;
+} virtnet_dev_page = {
+        .dd = {
+                .type = VIRTIO_ID_NET,
+                .num_vq = ARRAY_SIZE(virtnet_dev_page.vqconfig),
+                .feature_len = sizeof(virtnet_dev_page.host_features),
+                .config_len = sizeof(virtnet_dev_page.net_config),
+        },
+        .vqconfig[0] = {
+                .num = htole16(MIC_VRING_ENTRIES),
+        },
+        .vqconfig[1] = {
+                .num = htole16(MIC_VRING_ENTRIES),
+        },
+#if GSO_ENABLED
+                .host_features = htole32(
+                1 << VIRTIO_NET_F_CSUM |
+                1 << VIRTIO_NET_F_GSO |
+                1 << VIRTIO_NET_F_GUEST_TSO4 |
+                1 << VIRTIO_NET_F_GUEST_TSO6 |
+                1 << VIRTIO_NET_F_GUEST_ECN |
+                1 << VIRTIO_NET_F_GUEST_UFO),
+#else
+                .host_features = 0,
+#endif
+};
+
+static const char *mic_config_dir = "/etc/sysconfig/mic";
+static const char *virtblk_backend = "VIRTBLK_BACKEND";
+static struct {
+        struct mic_device_desc dd;
+        struct mic_vqconfig vqconfig[1];
+        __u32 host_features, guest_acknowledgements;
+        struct virtio_blk_config blk_config;
+} virtblk_dev_page = {
+        .dd = {
+                .type = VIRTIO_ID_BLOCK,
+                .num_vq = ARRAY_SIZE(virtblk_dev_page.vqconfig),
+                .feature_len = sizeof(virtblk_dev_page.host_features),
+                .config_len = sizeof(virtblk_dev_page.blk_config),
+        },
+        .vqconfig[0] = {
+                .num = htole16(MIC_VRING_ENTRIES),
+        },
+        .host_features =
+                htole32(1<<VIRTIO_BLK_F_SEG_MAX),
+        .blk_config = {
+                .seg_max = htole32(MIC_VRING_ENTRIES - 2),
+                .capacity = htole64(0),
+         }
+};
+
+static char *myname;
+
+static int
+tap_configure(struct mic_info *mic, char *dev)
+{
+        pid_t pid;
+        char *ifargv[7];
+        char ipaddr[IFNAMSIZ];
+        int ret = 0;
+
+        pid = fork();
+        if (pid == 0) {
+                ifargv[0] = "ip";
+                ifargv[1] = "link";
+                ifargv[2] = "set";
+                ifargv[3] = dev;
+                ifargv[4] = "up";
+                ifargv[5] = NULL;
+                mpsslog("Configuring %s\n", dev);
+                ret = execvp("ip", ifargv);
+                if (ret < 0) {
+                        mpsslog("%s execvp failed errno %s\n",
+                                mic->name, strerror(errno));
+                        return ret;
+                }
+        }
+        if (pid < 0) {
+                mpsslog("%s fork failed errno %s\n",
+                        mic->name, strerror(errno));
+                return ret;
+        }
+
+        ret = waitpid(pid, NULL, 0);
+        if (ret < 0) {
+                mpsslog("%s waitpid failed errno %s\n",
+                        mic->name, strerror(errno));
+                return ret;
+        }
+
+        snprintf(ipaddr, IFNAMSIZ, "172.31.%d.254/24", mic->id);
+
+        pid = fork();
+        if (pid == 0) {
+                ifargv[0] = "ip";
+                ifargv[1] = "addr";
+                ifargv[2] = "add";
+                ifargv[3] = ipaddr;
+                ifargv[4] = "dev";
+                ifargv[5] = dev;
+                ifargv[6] = NULL;
+                mpsslog("Configuring %s ipaddr %s\n", dev, ipaddr);
+                ret = execvp("ip", ifargv);
+                if (ret < 0) {
+                        mpsslog("%s execvp failed errno %s\n",
+                                mic->name, strerror(errno));
+                        return ret;
+                }
+        }
+        if (pid < 0) {
+                mpsslog("%s fork failed errno %s\n",
+                        mic->name, strerror(errno));
+                return ret;
+        }
+
+        ret = waitpid(pid, NULL, 0);
+        if (ret < 0) {
+                mpsslog("%s waitpid failed errno %s\n",
+                        mic->name, strerror(errno));
+                return ret;
+        }
+        mpsslog("MIC name %s %s %d DONE!\n",
+                mic->name, __func__, __LINE__);
+        return 0;
+}
+
+static int tun_alloc(struct mic_info *mic, char *dev)
+{
+        struct ifreq ifr;
+        int fd, err;
+#if GSO_ENABLED
+        unsigned offload;
+#endif
+        fd = open("/dev/net/tun", O_RDWR);
+        if (fd < 0) {
+                mpsslog("Could not open /dev/net/tun %s\n", strerror(errno));
+                goto done;
+        }
+
+        memset(&ifr, 0, sizeof(ifr));
+
+        ifr.ifr_flags = IFF_TAP | IFF_NO_PI | IFF_VNET_HDR;
+        if (*dev)
+                strncpy(ifr.ifr_name, dev, IFNAMSIZ);
+
+        err = ioctl(fd, TUNSETIFF, (void *)&ifr);
+        if (err < 0) {
+                mpsslog("%s %s %d TUNSETIFF failed %s\n",
+                        mic->name, __func__, __LINE__, strerror(errno));
+                close(fd);
+                return err;
+        }
+#if GSO_ENABLED
+        offload = TUN_F_CSUM | TUN_F_TSO4 | TUN_F_TSO6 |
+                TUN_F_TSO_ECN | TUN_F_UFO;
+
+        err = ioctl(fd, TUNSETOFFLOAD, offload);
+        if (err < 0) {
+                mpsslog("%s %s %d TUNSETOFFLOAD failed %s\n",
+                        mic->name, __func__, __LINE__, strerror(errno));
+                close(fd);
+                return err;
+        }
+#endif
+        strcpy(dev, ifr.ifr_name);
+        mpsslog("Created TAP %s\n", dev);
+done:
+        return fd;
+}
+
+#define NET_FD_VIRTIO_NET 0
+#define NET_FD_TUN 1
+#define MAX_NET_FD 2
+
+static void set_dp(struct mic_info *mic, int type, void *dp)
+{
+        switch (type) {
+        case VIRTIO_ID_CONSOLE:
+                mic->mic_console.console_dp = dp;
+                return;
+        case VIRTIO_ID_NET:
+                mic->mic_net.net_dp = dp;
+                return;
+        case VIRTIO_ID_BLOCK:
+                mic->mic_virtblk.block_dp = dp;
+                return;
+        }
+        mpsslog("%s %s %d not found\n", mic->name, __func__, type);
+        assert(0);
+}
+
+static void *get_dp(struct mic_info *mic, int type)
+{
+        switch (type) {
+        case VIRTIO_ID_CONSOLE:
+                return mic->mic_console.console_dp;
+        case VIRTIO_ID_NET:
+                return mic->mic_net.net_dp;
+        case VIRTIO_ID_BLOCK:
+                return mic->mic_virtblk.block_dp;
+        }
+        mpsslog("%s %s %d not found\n", mic->name, __func__, type);
+        assert(0);
+        return NULL;
+}
+
+static struct mic_device_desc *get_device_desc(struct mic_info *mic, int type)
+{
+        struct mic_device_desc *d;
+        int i;
+        void *dp = get_dp(mic, type);
+
+        for (i = mic_aligned_size(struct mic_bootparam); i < PAGE_SIZE;
+                i += mic_total_desc_size(d)) {
+                d = dp + i;
+
+                /* End of list */
+                if (d->type == 0)
+                        break;
+
+                if (d->type == -1)
+                        continue;
+
+                mpsslog("%s %s d-> type %d d %p\n",
+                        mic->name, __func__, d->type, d);
+
+                if (d->type == (__u8)type)
+                        return d;
+        }
+        mpsslog("%s %s %d not found\n", mic->name, __func__, type);
+        assert(0);
+        return NULL;
+}
+
+/* See comments in vhost.c for explanation of next_desc() */
+static unsigned next_desc(struct vring_desc *desc)
+{
+        unsigned int next;
+
+        if (!(le16toh(desc->flags) & VRING_DESC_F_NEXT))
+                return -1U;
+        next = le16toh(desc->next);
+        return next;
+}
+
+/* Sum up all the IOVEC length */
+static ssize_t
+sum_iovec_len(struct mic_copy_desc *copy)
+{
+        ssize_t sum = 0;
+        int i;
+
+        for (i = 0; i < copy->iovcnt; i++)
+                sum += copy->iov[i].iov_len;
+        return sum;
+}
+
+static inline void verify_out_len(struct mic_info *mic,
+        struct mic_copy_desc *copy)
+{
+        if (copy->out_len != sum_iovec_len(copy)) {
+                mpsslog("%s %s %d BUG copy->out_len 0x%x len 0x%zx\n",
+                        mic->name, __func__, __LINE__,
+                        copy->out_len, sum_iovec_len(copy));
+                assert(copy->out_len == sum_iovec_len(copy));
+        }
+}
+
+/* Display an iovec */
+static void
+disp_iovec(struct mic_info *mic, struct mic_copy_desc *copy,
+           const char *s, int line)
+{
+        int i;
+
+        for (i = 0; i < copy->iovcnt; i++)
+                mpsslog("%s %s %d copy->iov[%d] addr %p len 0x%zx\n",
+                        mic->name, s, line, i,
+                        copy->iov[i].iov_base, copy->iov[i].iov_len);
+}
+
+static inline __u16 read_avail_idx(struct mic_vring *vr)
+{
+        return ACCESS_ONCE(vr->info->avail_idx);
+}
+
+static inline void txrx_prepare(int type, bool tx, struct mic_vring *vr,
+                                struct mic_copy_desc *copy, ssize_t len)
+{
+        copy->vr_idx = tx ? 0 : 1;
+        copy->update_used = true;
+        if (type == VIRTIO_ID_NET)
+                copy->iov[1].iov_len = len - sizeof(struct virtio_net_hdr);
+        else
+                copy->iov[0].iov_len = len;
+}
+
+/* Central API which triggers the copies */
+static int
+mic_virtio_copy(struct mic_info *mic, int fd,
+                struct mic_vring *vr, struct mic_copy_desc *copy)
+{
+        int ret;
+
+        ret = ioctl(fd, MIC_VIRTIO_COPY_DESC, copy);
+        if (ret) {
+                mpsslog("%s %s %d errno %s ret %d\n",
+                        mic->name, __func__, __LINE__,
+                        strerror(errno), ret);
+        }
+        return ret;
+}
+
+/*
+ * This initialization routine requires at least one
+ * vring i.e. vr0. vr1 is optional.
+ */
+static void *
+init_vr(struct mic_info *mic, int fd, int type,
+        struct mic_vring *vr0, struct mic_vring *vr1, int num_vq)
+{
+        int vr_size;
+        char *va;
+
+        vr_size = PAGE_ALIGN(vring_size(MIC_VRING_ENTRIES,
+                MIC_VIRTIO_RING_ALIGN) + sizeof(struct _mic_vring_info));
+        va = mmap(NULL, MIC_DEVICE_PAGE_END + vr_size * num_vq,
+                PROT_READ, MAP_SHARED, fd, 0);
+        if (MAP_FAILED == va) {
+                mpsslog("%s %s %d mmap failed errno %s\n",
+                        mic->name, __func__, __LINE__,
+                        strerror(errno));
+                goto done;
+        }
+        set_dp(mic, type, va);
+        vr0->va = (struct mic_vring *)&va[MIC_DEVICE_PAGE_END];
+        vr0->info = vr0->va +
+                vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN);
+        vring_init(&vr0->vr,
+                   MIC_VRING_ENTRIES, vr0->va, MIC_VIRTIO_RING_ALIGN);
+        mpsslog("%s %s vr0 %p vr0->info %p vr_size 0x%x vring 0x%x ",
+                __func__, mic->name, vr0->va, vr0->info, vr_size,
+                vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN));
+        mpsslog("magic 0x%x expected 0x%x\n",
+                vr0->info->magic, MIC_MAGIC + type);
+        assert(vr0->info->magic == MIC_MAGIC + type);
+        if (vr1) {
+                vr1->va = (struct mic_vring *)
+                        &va[MIC_DEVICE_PAGE_END + vr_size];
+                vr1->info = vr1->va + vring_size(MIC_VRING_ENTRIES,
+                        MIC_VIRTIO_RING_ALIGN);
+                vring_init(&vr1->vr,
+                           MIC_VRING_ENTRIES, vr1->va, MIC_VIRTIO_RING_ALIGN);
+                mpsslog("%s %s vr1 %p vr1->info %p vr_size 0x%x vring 0x%x ",
+                        __func__, mic->name, vr1->va, vr1->info, vr_size,
+                        vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN));
+                mpsslog("magic 0x%x expected 0x%x\n",
+                        vr1->info->magic, MIC_MAGIC + type + 1);
+                assert(vr1->info->magic == MIC_MAGIC + type + 1);
+        }
+done:
+        return va;
+}
+
+static void
+wait_for_card_driver(struct mic_info *mic, int fd, int type)
+{
+        struct pollfd pollfd;
+        int err;
+        struct mic_device_desc *desc = get_device_desc(mic, type);
+
+        pollfd.fd = fd;
+        mpsslog("%s %s Waiting .... desc-> type %d status 0x%x\n",
+                mic->name, __func__, type, desc->status);
+        while (1) {
+                pollfd.events = POLLIN;
+                pollfd.revents = 0;
+                err = poll(&pollfd, 1, -1);
+                if (err < 0) {
+                        mpsslog("%s %s poll failed %s\n",
+                                mic->name, __func__, strerror(errno));
+                        continue;
+                }
+
+                if (pollfd.revents) {
+                        mpsslog("%s %s Waiting... desc-> type %d status 0x%x\n",
+                                mic->name, __func__, type, desc->status);
+                        if (desc->status & VIRTIO_CONFIG_S_DRIVER_OK) {
+                                mpsslog("%s %s poll.revents %d\n",
+                                        mic->name, __func__, pollfd.revents);
+                                mpsslog("%s %s desc-> type %d status 0x%x\n",
+                                        mic->name, __func__, type,
+                                        desc->status);
+                                break;
+                        }
+                }
+        }
+}
+
+/* Spin till we have some descriptors */
+static void
+spin_for_descriptors(struct mic_info *mic, struct mic_vring *vr)
+{
+        __u16 avail_idx = read_avail_idx(vr);
+
+        while (avail_idx == le16toh(ACCESS_ONCE(vr->vr.avail->idx))) {
+#ifdef DEBUG
+                mpsslog("%s %s waiting for desc avail %d info_avail %d\n",
+                        mic->name, __func__,
+                        le16toh(vr->vr.avail->idx), vr->info->avail_idx);
+#endif
+                sched_yield();
+        }
+}
+
+static void *
+virtio_net(void *arg)
+{
+        static __u8 vnet_hdr[2][sizeof(struct virtio_net_hdr)];
+        static __u8 vnet_buf[2][MAX_NET_PKT_SIZE] __aligned(64);
+        struct iovec vnet_iov[2][2] = {
+                { { .iov_base = vnet_hdr[0], .iov_len = sizeof(vnet_hdr[0]) },
+                  { .iov_base = vnet_buf[0], .iov_len = sizeof(vnet_buf[0]) } },
+                { { .iov_base = vnet_hdr[1], .iov_len = sizeof(vnet_hdr[1]) },
+                  { .iov_base = vnet_buf[1], .iov_len = sizeof(vnet_buf[1]) } },
+        };
+        struct iovec *iov0 = vnet_iov[0], *iov1 = vnet_iov[1];
+        struct mic_info *mic = (struct mic_info *)arg;
+        char if_name[IFNAMSIZ];
+        struct pollfd net_poll[MAX_NET_FD];
+        struct mic_vring tx_vr, rx_vr;
+        struct mic_copy_desc copy;
+        struct mic_device_desc *desc;
+        int err;
+
+        snprintf(if_name, IFNAMSIZ, "mic%d", mic->id);
+        mic->mic_net.tap_fd = tun_alloc(mic, if_name);
+        if (mic->mic_net.tap_fd < 0)
+                goto done;
+
+        if (tap_configure(mic, if_name))
+                goto done;
+        mpsslog("MIC name %s id %d\n", mic->name, mic->id);
+
+        net_poll[NET_FD_VIRTIO_NET].fd = mic->mic_net.virtio_net_fd;
+        net_poll[NET_FD_VIRTIO_NET].events = POLLIN;
+        net_poll[NET_FD_TUN].fd = mic->mic_net.tap_fd;
+        net_poll[NET_FD_TUN].events = POLLIN;
+
+        if (MAP_FAILED == init_vr(mic, mic->mic_net.virtio_net_fd,
+                                  VIRTIO_ID_NET, &tx_vr, &rx_vr,
+                virtnet_dev_page.dd.num_vq)) {
+                mpsslog("%s init_vr failed %s\n",
+                        mic->name, strerror(errno));
+                goto done;
+        }
+
+        copy.iovcnt = 2;
+        desc = get_device_desc(mic, VIRTIO_ID_NET);
+
+        while (1) {
+                ssize_t len;
+
+                net_poll[NET_FD_VIRTIO_NET].revents = 0;
+                net_poll[NET_FD_TUN].revents = 0;
+
+                /* Start polling for data from tap and virtio net */
+                err = poll(net_poll, 2, -1);
+                if (err < 0) {
+                        mpsslog("%s poll failed %s\n",
+                                __func__, strerror(errno));
+                        continue;
+                }
+                if (!(desc->status & VIRTIO_CONFIG_S_DRIVER_OK))
+                        wait_for_card_driver(mic, mic->mic_net.virtio_net_fd,
+                                             VIRTIO_ID_NET);
+                /*
+                 * Check if there is data to be read from TUN and write to
+                 * virtio net fd if there is.
+                 */
+                if (net_poll[NET_FD_TUN].revents & POLLIN) {
+                        copy.iov = iov0;
+                        len = readv(net_poll[NET_FD_TUN].fd,
+                                copy.iov, copy.iovcnt);
+                        if (len > 0) {
+                                struct virtio_net_hdr *hdr
+                                        = (struct virtio_net_hdr *)vnet_hdr[0];
+
+                                /* Disable checksums on the card since we are on
+                                   a reliable PCIe link */
+                                hdr->flags |= VIRTIO_NET_HDR_F_DATA_VALID;
+#ifdef DEBUG
+                                mpsslog("%s %s %d hdr->flags 0x%x ", mic->name,
+                                        __func__, __LINE__, hdr->flags);
+                                mpsslog("copy.out_len %d hdr->gso_type 0x%x\n",
+                                        copy.out_len, hdr->gso_type);
+#endif
+#ifdef DEBUG
+                                disp_iovec(mic, copy, __func__, __LINE__);
+                                mpsslog("%s %s %d read from tap 0x%lx\n",
+                                        mic->name, __func__, __LINE__,
+                                        len);
+#endif
+                                spin_for_descriptors(mic, &tx_vr);
+                                txrx_prepare(VIRTIO_ID_NET, 1, &tx_vr, &copy,
+                                             len);
+
+                                err = mic_virtio_copy(mic,
+                                        mic->mic_net.virtio_net_fd, &tx_vr,
+                                        &copy);
+                                if (err < 0) {
+                                        mpsslog("%s %s %d mic_virtio_copy %s\n",
+                                                mic->name, __func__, __LINE__,
+                                                strerror(errno));
+                                }
+                                if (!err)
+                                        verify_out_len(mic, &copy);
+#ifdef DEBUG
+                                disp_iovec(mic, copy, __func__, __LINE__);
+                                mpsslog("%s %s %d wrote to net 0x%lx\n",
+                                        mic->name, __func__, __LINE__,
+                                        sum_iovec_len(&copy));
+#endif
+                                /* Reinitialize IOV for next run */
+                                iov0[1].iov_len = MAX_NET_PKT_SIZE;
+                        } else if (len < 0) {
+                                disp_iovec(mic, &copy, __func__, __LINE__);
+                                mpsslog("%s %s %d read failed %s ", mic->name,
+                                        __func__, __LINE__, strerror(errno));
+                                mpsslog("cnt %d sum %zd\n",
+                                        copy.iovcnt, sum_iovec_len(&copy));
+                        }
+                }
+
+                /*
+                 * Check if there is data to be read from virtio net and
+                 * write to TUN if there is.
+                 */
+                if (net_poll[NET_FD_VIRTIO_NET].revents & POLLIN) {
+                        while (rx_vr.info->avail_idx !=
+                                le16toh(rx_vr.vr.avail->idx)) {
+                                copy.iov = iov1;
+                                txrx_prepare(VIRTIO_ID_NET, 0, &rx_vr, &copy,
+                                             MAX_NET_PKT_SIZE
+                                        + sizeof(struct virtio_net_hdr));
+
+                                err = mic_virtio_copy(mic,
+                                        mic->mic_net.virtio_net_fd, &rx_vr,
+                                        &copy);
+                                if (!err) {
+#ifdef DEBUG
+                                        struct virtio_net_hdr *hdr
+                                                = (struct virtio_net_hdr *)
+                                                        vnet_hdr[1];
+
+                                        mpsslog("%s %s %d hdr->flags 0x%x, ",
+                                                mic->name, __func__, __LINE__,
+                                                hdr->flags);
+                                        mpsslog("out_len %d gso_type 0x%x\n",
+                                                copy.out_len,
+                                                hdr->gso_type);
+#endif
+                                        /* Set the correct output iov_len */
+                                        iov1[1].iov_len = copy.out_len -
+                                                sizeof(struct virtio_net_hdr);
+                                        verify_out_len(mic, &copy);
+#ifdef DEBUG
+                                        disp_iovec(mic, copy, __func__,
+                                                   __LINE__);
+                                        mpsslog("%s %s %d ",
+                                                mic->name, __func__, __LINE__);
+                                        mpsslog("read from net 0x%lx\n",
+                                                sum_iovec_len(copy));
+#endif
+                                        len = writev(net_poll[NET_FD_TUN].fd,
+                                                copy.iov, copy.iovcnt);
+                                        if (len != sum_iovec_len(&copy)) {
+                                                mpsslog("Tun write failed %s ",
+                                                        strerror(errno));
+                                                mpsslog("len 0x%zx ", len);
+                                                mpsslog("read_len 0x%zx\n",
+                                                        sum_iovec_len(&copy));
+                                        } else {
+#ifdef DEBUG
+                                                disp_iovec(mic, &copy, __func__,
+                                                           __LINE__);
+                                                mpsslog("%s %s %d ",
+                                                        mic->name, __func__,
+                                                        __LINE__);
+                                                mpsslog("wrote to tap 0x%lx\n",
+                                                        len);
+#endif
+                                        }
+                                } else {
+                                        mpsslog("%s %s %d mic_virtio_copy %s\n",
+                                                mic->name, __func__, __LINE__,
+                                                strerror(errno));
+                                        break;
+                                }
+                        }
+                }
+                if (net_poll[NET_FD_VIRTIO_NET].revents & POLLERR)
+                        mpsslog("%s: %s: POLLERR\n", __func__, mic->name);
+        }
+done:
+        pthread_exit(NULL);
+}
+
+/* virtio_console */
+#define VIRTIO_CONSOLE_FD 0
+#define MONITOR_FD (VIRTIO_CONSOLE_FD + 1)
+#define MAX_CONSOLE_FD (MONITOR_FD + 1)  /* must be the last one + 1 */
+#define MAX_BUFFER_SIZE PAGE_SIZE
+
+static void *
+virtio_console(void *arg)
+{
+        static __u8 vcons_buf[2][PAGE_SIZE];
+        struct iovec vcons_iov[2] = {
+                { .iov_base = vcons_buf[0], .iov_len = sizeof(vcons_buf[0]) },
+                { .iov_base = vcons_buf[1], .iov_len = sizeof(vcons_buf[1]) },
+        };
+        struct iovec *iov0 = &vcons_iov[0], *iov1 = &vcons_iov[1];
+        struct mic_info *mic = (struct mic_info *)arg;
+        int err;
+        struct pollfd console_poll[MAX_CONSOLE_FD];
+        int pty_fd;
+        char *pts_name;
+        ssize_t len;
+        struct mic_vring tx_vr, rx_vr;
+        struct mic_copy_desc copy;
+        struct mic_device_desc *desc;
+
+        pty_fd = posix_openpt(O_RDWR);
+        if (pty_fd < 0) {
+                mpsslog("can't open a pseudoterminal master device: %s\n",
+                        strerror(errno));
+                goto _return;
+        }
+        pts_name = ptsname(pty_fd);
+        if (pts_name == NULL) {
+                mpsslog("can't get pts name\n");
+                goto _close_pty;
+        }
+        printf("%s console message goes to %s\n", mic->name, pts_name);
+        mpsslog("%s console message goes to %s\n", mic->name, pts_name);
+        err = grantpt(pty_fd);
+        if (err < 0) {
+                mpsslog("can't grant access: %s %s\n",
+                        pts_name, strerror(errno));
+                goto _close_pty;
+        }
+        err = unlockpt(pty_fd);
+        if (err < 0) {
+                mpsslog("can't unlock a pseudoterminal: %s %s\n",
+                        pts_name, strerror(errno));
+                goto _close_pty;
+        }
+        console_poll[MONITOR_FD].fd = pty_fd;
+        console_poll[MONITOR_FD].events = POLLIN;
+
+        console_poll[VIRTIO_CONSOLE_FD].fd = mic->mic_console.virtio_console_fd;
+        console_poll[VIRTIO_CONSOLE_FD].events = POLLIN;
+
+        if (MAP_FAILED == init_vr(mic, mic->mic_console.virtio_console_fd,
+                                  VIRTIO_ID_CONSOLE, &tx_vr, &rx_vr,
+                virtcons_dev_page.dd.num_vq)) {
+                mpsslog("%s init_vr failed %s\n",
+                        mic->name, strerror(errno));
+                goto _close_pty;
+        }
+
+        copy.iovcnt = 1;
+        desc = get_device_desc(mic, VIRTIO_ID_CONSOLE);
+
+        for (;;) {
+                console_poll[MONITOR_FD].revents = 0;
+                console_poll[VIRTIO_CONSOLE_FD].revents = 0;
+                err = poll(console_poll, MAX_CONSOLE_FD, -1);
+                if (err < 0) {
+                        mpsslog("%s %d: poll failed: %s\n", __func__, __LINE__,
+                                strerror(errno));
+                        continue;
+                }
+                if (!(desc->status & VIRTIO_CONFIG_S_DRIVER_OK))
+                        wait_for_card_driver(mic,
+                                             mic->mic_console.virtio_console_fd,
+                                VIRTIO_ID_CONSOLE);
+
+                if (console_poll[MONITOR_FD].revents & POLLIN) {
+                        copy.iov = iov0;
+                        len = readv(pty_fd, copy.iov, copy.iovcnt);
+                        if (len > 0) {
+#ifdef DEBUG
+                                disp_iovec(mic, copy, __func__, __LINE__);
+                                mpsslog("%s %s %d read from tap 0x%lx\n",
+                                        mic->name, __func__, __LINE__,
+                                        len);
+#endif
+                                spin_for_descriptors(mic, &tx_vr);
+                                txrx_prepare(VIRTIO_ID_CONSOLE, 1, &tx_vr,
+                                             &copy, len);
+
+                                err = mic_virtio_copy(mic,
+                                        mic->mic_console.virtio_console_fd,
+                                        &tx_vr, &copy);
+                                if (err < 0) {
+                                        mpsslog("%s %s %d mic_virtio_copy %s\n",
+                                                mic->name, __func__, __LINE__,
+                                                strerror(errno));
+                                }
+                                if (!err)
+                                        verify_out_len(mic, &copy);
+#ifdef DEBUG
+                                disp_iovec(mic, copy, __func__, __LINE__);
+                                mpsslog("%s %s %d wrote to net 0x%lx\n",
+                                        mic->name, __func__, __LINE__,
+                                        sum_iovec_len(copy));
+#endif
+                                /* Reinitialize IOV for next run */
+                                iov0->iov_len = PAGE_SIZE;
+                        } else if (len < 0) {
+                                disp_iovec(mic, &copy, __func__, __LINE__);
+                                mpsslog("%s %s %d read failed %s ",
+                                        mic->name, __func__, __LINE__,
+                                        strerror(errno));
+                                mpsslog("cnt %d sum %zd\n",
+                                        copy.iovcnt, sum_iovec_len(&copy));
+                        }
+                }
+
+                if (console_poll[VIRTIO_CONSOLE_FD].revents & POLLIN) {
+                        while (rx_vr.info->avail_idx !=
+                                le16toh(rx_vr.vr.avail->idx)) {
+                                copy.iov = iov1;
+                                txrx_prepare(VIRTIO_ID_CONSOLE, 0, &rx_vr,
+                                             &copy, PAGE_SIZE);
+
+                                err = mic_virtio_copy(mic,
+                                        mic->mic_console.virtio_console_fd,
+                                        &rx_vr, &copy);
+                                if (!err) {
+                                        /* Set the correct output iov_len */
+                                        iov1->iov_len = copy.out_len;
+                                        verify_out_len(mic, &copy);
+#ifdef DEBUG
+                                        disp_iovec(mic, copy, __func__,
+                                                   __LINE__);
+                                        mpsslog("%s %s %d ",
+                                                mic->name, __func__, __LINE__);
+                                        mpsslog("read from net 0x%lx\n",
+                                                sum_iovec_len(copy));
+#endif
+                                        len = writev(pty_fd,
+                                                copy.iov, copy.iovcnt);
+                                        if (len != sum_iovec_len(&copy)) {
+                                                mpsslog("Tun write failed %s ",
+                                                        strerror(errno));
+                                                mpsslog("len 0x%zx ", len);
+                                                mpsslog("read_len 0x%zx\n",
+                                                        sum_iovec_len(&copy));
+                                        } else {
+#ifdef DEBUG
+                                                disp_iovec(mic, copy, __func__,
+                                                           __LINE__);
+                                                mpsslog("%s %s %d ",
+                                                        mic->name, __func__,
+                                                        __LINE__);
+                                                mpsslog("wrote to tap 0x%lx\n",
+                                                        len);
+#endif
+                                        }
+                                } else {
+                                        mpsslog("%s %s %d mic_virtio_copy %s\n",
+                                                mic->name, __func__, __LINE__,
+                                                strerror(errno));
+                                        break;
+                                }
+                        }
+                }
+                if (console_poll[NET_FD_VIRTIO_NET].revents & POLLERR)
+                        mpsslog("%s: %s: POLLERR\n", __func__, mic->name);
+        }
+_close_pty:
+        close(pty_fd);
+_return:
+        pthread_exit(NULL);
+}
+
+static void
+add_virtio_device(struct mic_info *mic, struct mic_device_desc *dd)
+{
+        char path[PATH_MAX];
+        int fd, err;
+
+        snprintf(path, PATH_MAX, "/dev/mic%d", mic->id);
+        fd = open(path, O_RDWR);
+        if (fd < 0) {
+                mpsslog("Could not open %s %s\n", path, strerror(errno));
+                return;
+        }
+
+        err = ioctl(fd, MIC_VIRTIO_ADD_DEVICE, dd);
+        if (err < 0) {
+                mpsslog("Could not add %d %s\n", dd->type, strerror(errno));
+                close(fd);
+                return;
+        }
+        switch (dd->type) {
+        case VIRTIO_ID_NET:
+                mic->mic_net.virtio_net_fd = fd;
+                mpsslog("Added VIRTIO_ID_NET for %s\n", mic->name);
+                break;
+        case VIRTIO_ID_CONSOLE:
+                mic->mic_console.virtio_console_fd = fd;
+                mpsslog("Added VIRTIO_ID_CONSOLE for %s\n", mic->name);
+                break;
+        case VIRTIO_ID_BLOCK:
+                mic->mic_virtblk.virtio_block_fd = fd;
+                mpsslog("Added VIRTIO_ID_BLOCK for %s\n", mic->name);
+                break;
+        }
+}
+
+static bool
+set_backend_file(struct mic_info *mic)
+{
+        FILE *config;
+        char buff[PATH_MAX], *line, *evv, *p;
+
+        snprintf(buff, PATH_MAX, "%s/mpssd%03d.conf", mic_config_dir, mic->id);
+        config = fopen(buff, "r");
+        if (config == NULL)
+                return false;
+        do {  /* look for "virtblk_backend=XXXX" */
+                line = fgets(buff, PATH_MAX, config);
+                if (line == NULL)
+                        break;
+                if (*line == '#')
+                        continue;
+                p = strchr(line, '\n');
+                if (p)
+                        *p = '\0';
+        } while (strncmp(line, virtblk_backend, strlen(virtblk_backend)) != 0);
+        fclose(config);
+        if (line == NULL)
+                return false;
+        evv = strchr(line, '=');
+        if (evv == NULL)
+                return false;
+        mic->mic_virtblk.backend_file = malloc(strlen(evv) + 1);
+        if (mic->mic_virtblk.backend_file == NULL) {
+                mpsslog("%s %d can't allocate memory\n", mic->name, mic->id);
+                return false;
+        }
+        strcpy(mic->mic_virtblk.backend_file, evv + 1);
+        return true;
+}
+
+#define SECTOR_SIZE 512
+static bool
+set_backend_size(struct mic_info *mic)
+{
+        mic->mic_virtblk.backend_size = lseek(mic->mic_virtblk.backend, 0,
+                SEEK_END);
+        if (mic->mic_virtblk.backend_size < 0) {
+                mpsslog("%s: can't seek: %s\n",
+                        mic->name, mic->mic_virtblk.backend_file);
+                return false;
+        }
+        virtblk_dev_page.blk_config.capacity =
+                mic->mic_virtblk.backend_size / SECTOR_SIZE;
+        if ((mic->mic_virtblk.backend_size % SECTOR_SIZE) != 0)
+                virtblk_dev_page.blk_config.capacity++;
+
+        virtblk_dev_page.blk_config.capacity =
+                htole64(virtblk_dev_page.blk_config.capacity);
+
+        return true;
+}
+
+static bool
+open_backend(struct mic_info *mic)
+{
+        if (!set_backend_file(mic))
+                goto _error_exit;
+        mic->mic_virtblk.backend = open(mic->mic_virtblk.backend_file, O_RDWR);
+        if (mic->mic_virtblk.backend < 0) {
+                mpsslog("%s: can't open: %s\n", mic->name,
+                        mic->mic_virtblk.backend_file);
+                goto _error_free;
+        }
+        if (!set_backend_size(mic))
+                goto _error_close;
+        mic->mic_virtblk.backend_addr = mmap(NULL,
+                mic->mic_virtblk.backend_size,
+                PROT_READ|PROT_WRITE, MAP_SHARED,
+                mic->mic_virtblk.backend, 0L);
+        if (mic->mic_virtblk.backend_addr == MAP_FAILED) {
+                mpsslog("%s: can't map: %s %s\n",
+                        mic->name, mic->mic_virtblk.backend_file,
+                        strerror(errno));
+                goto _error_close;
+        }
+        return true;
+
+ _error_close:
+        close(mic->mic_virtblk.backend);
+ _error_free:
+        free(mic->mic_virtblk.backend_file);
+ _error_exit:
+        return false;
+}
+
+static void
+close_backend(struct mic_info *mic)
+{
+        munmap(mic->mic_virtblk.backend_addr, mic->mic_virtblk.backend_size);
+        close(mic->mic_virtblk.backend);
+        free(mic->mic_virtblk.backend_file);
+}
+
+static bool
+start_virtblk(struct mic_info *mic, struct mic_vring *vring)
+{
+        if (((unsigned long)&virtblk_dev_page.blk_config % 8) != 0) {
+                mpsslog("%s: blk_config is not 8 byte aligned.\n",
+                        mic->name);
+                return false;
+        }
+        add_virtio_device(mic, &virtblk_dev_page.dd);
+        if (MAP_FAILED == init_vr(mic, mic->mic_virtblk.virtio_block_fd,
+                                  VIRTIO_ID_BLOCK, vring, NULL,
+                                  virtblk_dev_page.dd.num_vq)) {
+                mpsslog("%s init_vr failed %s\n",
+                        mic->name, strerror(errno));
+                return false;
+        }
+        return true;
+}
+
+static void
+stop_virtblk(struct mic_info *mic)
+{
+        int vr_size, ret;
+
+        vr_size = PAGE_ALIGN(vring_size(MIC_VRING_ENTRIES,
+                MIC_VIRTIO_RING_ALIGN) + sizeof(struct _mic_vring_info));
+        ret = munmap(mic->mic_virtblk.block_dp,
+                MIC_DEVICE_PAGE_END + vr_size * virtblk_dev_page.dd.num_vq);
+        if (ret < 0)
+                mpsslog("%s munmap errno %d\n", mic->name, errno);
+        close(mic->mic_virtblk.virtio_block_fd);
+}
+
+static __u8
+header_error_check(struct vring_desc *desc)
+{
+        if (le32toh(desc->len) != sizeof(struct virtio_blk_outhdr)) {
+                mpsslog("%s() %d: length is not sizeof(virtio_blk_outhd)\n",
+                        __func__, __LINE__);
+                return -EIO;
+        }
+        if (!(le16toh(desc->flags) & VRING_DESC_F_NEXT)) {
+                mpsslog("%s() %d: alone\n",
+                        __func__, __LINE__);
+                return -EIO;
+        }
+        if (le16toh(desc->flags) & VRING_DESC_F_WRITE) {
+                mpsslog("%s() %d: not read\n",
+                        __func__, __LINE__);
+                return -EIO;
+        }
+        return 0;
+}
+
+static int
+read_header(int fd, struct virtio_blk_outhdr *hdr, __u32 desc_idx)
+{
+        struct iovec iovec;
+        struct mic_copy_desc copy;
+
+        iovec.iov_len = sizeof(*hdr);
+        iovec.iov_base = hdr;
+        copy.iov = &iovec;
+        copy.iovcnt = 1;
+        copy.vr_idx = 0;  /* only one vring on virtio_block */
+        copy.update_used = false;  /* do not update used index */
+        return ioctl(fd, MIC_VIRTIO_COPY_DESC, &copy);
+}
+
+static int
+transfer_blocks(int fd, struct iovec *iovec, __u32 iovcnt)
+{
+        struct mic_copy_desc copy;
+
+        copy.iov = iovec;
+        copy.iovcnt = iovcnt;
+        copy.vr_idx = 0;  /* only one vring on virtio_block */
+        copy.update_used = false;  /* do not update used index */
+        return ioctl(fd, MIC_VIRTIO_COPY_DESC, &copy);
+}
+
+static __u8
+status_error_check(struct vring_desc *desc)
+{
+        if (le32toh(desc->len) != sizeof(__u8)) {
+                mpsslog("%s() %d: length is not sizeof(status)\n",
+                        __func__, __LINE__);
+                return -EIO;
+        }
+        return 0;
+}
+
+static int
+write_status(int fd, __u8 *status)
+{
+        struct iovec iovec;
+        struct mic_copy_desc copy;
+
+        iovec.iov_base = status;
+        iovec.iov_len = sizeof(*status);
+        copy.iov = &iovec;
+        copy.iovcnt = 1;
+        copy.vr_idx = 0;  /* only one vring on virtio_block */
+        copy.update_used = true; /* Update used index */
+        return ioctl(fd, MIC_VIRTIO_COPY_DESC, &copy);
+}
+
+static void *
+virtio_block(void *arg)
+{
+        struct mic_info *mic = (struct mic_info *)arg;
+        int ret;
+        struct pollfd block_poll;
+        struct mic_vring vring;
+        __u16 avail_idx;
+        __u32 desc_idx;
+        struct vring_desc *desc;
+        struct iovec *iovec, *piov;
+        __u8 status;
+        __u32 buffer_desc_idx;
+        struct virtio_blk_outhdr hdr;
+        void *fos;
+
+        for (;;) {  /* forever */
+                if (!open_backend(mic)) { /* No virtblk */
+                        for (mic->mic_virtblk.signaled = 0;
+                                !mic->mic_virtblk.signaled;)
+                                sleep(1);
+                        continue;
+                }
+
+                /* backend file is specified. */
+                if (!start_virtblk(mic, &vring))
+                        goto _close_backend;
+                iovec = malloc(sizeof(*iovec) *
+                        le32toh(virtblk_dev_page.blk_config.seg_max));
+                if (!iovec) {
+                        mpsslog("%s: can't alloc iovec: %s\n",
+                                mic->name, strerror(ENOMEM));
+                        goto _stop_virtblk;
+                }
+
+                block_poll.fd = mic->mic_virtblk.virtio_block_fd;
+                block_poll.events = POLLIN;
+                for (mic->mic_virtblk.signaled = 0;
+                     !mic->mic_virtblk.signaled;) {
+                        block_poll.revents = 0;
+                                        /* timeout in 1 sec to see signaled */
+                        ret = poll(&block_poll, 1, 1000);
+                        if (ret < 0) {
+                                mpsslog("%s %d: poll failed: %s\n",
+                                        __func__, __LINE__,
+                                        strerror(errno));
+                                continue;
+                        }
+
+                        if (!(block_poll.revents & POLLIN)) {
+#ifdef DEBUG
+                                mpsslog("%s %d: block_poll.revents=0x%x\n",
+                                        __func__, __LINE__, block_poll.revents);
+#endif
+                                continue;
+                        }
+
+                        /* POLLIN */
+                        while (vring.info->avail_idx !=
+                                le16toh(vring.vr.avail->idx)) {
+                                /* read header element */
+                                avail_idx =
+                                        vring.info->avail_idx &
+                                        (vring.vr.num - 1);
+                                desc_idx = le16toh(
+                                        vring.vr.avail->ring[avail_idx]);
+                                desc = &vring.vr.desc[desc_idx];
+#ifdef DEBUG
+                                mpsslog("%s() %d: avail_idx=%d ",
+                                        __func__, __LINE__,
+                                        vring.info->avail_idx);
+                                mpsslog("vring.vr.num=%d desc=%p\n",
+                                        vring.vr.num, desc);
+#endif
+                                status = header_error_check(desc);
+                                ret = read_header(
+                                        mic->mic_virtblk.virtio_block_fd,
+                                        &hdr, desc_idx);
+                                if (ret < 0) {
+                                        mpsslog("%s() %d %s: ret=%d %s\n",
+                                                __func__, __LINE__,
+                                                mic->name, ret,
+                                                strerror(errno));
+                                        break;
+                                }
+                                /* buffer element */
+                                piov = iovec;
+                                status = 0;
+                                fos = mic->mic_virtblk.backend_addr +
+                                        (hdr.sector * SECTOR_SIZE);
+                                buffer_desc_idx = next_desc(desc);
+                                desc_idx = buffer_desc_idx;
+                                for (desc = &vring.vr.desc[buffer_desc_idx];
+                                     desc->flags & VRING_DESC_F_NEXT;
+                                     desc_idx = next_desc(desc),
+                                             desc = &vring.vr.desc[desc_idx]) {
+                                        piov->iov_len = desc->len;
+                                        piov->iov_base = fos;
+                                        piov++;
+                                        fos += desc->len;
+                                }
+                                /* Returning NULLs for VIRTIO_BLK_T_GET_ID. */
+                                if (hdr.type & ~(VIRTIO_BLK_T_OUT |
+                                        VIRTIO_BLK_T_GET_ID)) {
+                                        /*
+                                          VIRTIO_BLK_T_IN - does not do
+                                          anything. Probably for documenting.
+                                          VIRTIO_BLK_T_SCSI_CMD - for
+                                          virtio_scsi.
+                                          VIRTIO_BLK_T_FLUSH - turned off in
+                                          config space.
+                                          VIRTIO_BLK_T_BARRIER - defined but not
+                                          used in anywhere.
+                                        */
+                                        mpsslog("%s() %d: type %x ",
+                                                __func__, __LINE__,
+                                                hdr.type);
+                                        mpsslog("is not supported\n");
+                                        status = -ENOTSUP;
+
+                                } else {
+                                        ret = transfer_blocks(
+                                        mic->mic_virtblk.virtio_block_fd,
+                                                iovec,
+                                                piov - iovec);
+                                        if (ret < 0 &&
+                                            status != 0)
+                                                status = ret;
+                                }
+                                /* write status and update used pointer */
+                                if (status != 0)
+                                        status = status_error_check(desc);
+                                ret = write_status(
+                                        mic->mic_virtblk.virtio_block_fd,
+                                        &status);
+#ifdef DEBUG
+                                mpsslog("%s() %d: write status=%d on desc=%p\n",
+                                        __func__, __LINE__,
+                                        status, desc);
+#endif
+                        }
+                }
+                free(iovec);
+_stop_virtblk:
+                stop_virtblk(mic);
+_close_backend:
+                close_backend(mic);
+        }  /* forever */
+
+        pthread_exit(NULL);
+}
+
+static void
+reset(struct mic_info *mic)
+{
+#define RESET_TIMEOUT 120
+        int i = RESET_TIMEOUT;
+        setsysfs(mic->name, "state", "reset");
+        while (i) {
+                char *state;
+                state = readsysfs(mic->name, "state");
+                if (!state)
+                        goto retry;
+                mpsslog("%s: %s %d state %s\n",
+                        mic->name, __func__, __LINE__, state);
+
+                /*
+                 * If the shutdown was initiated by OSPM, the state stays
+                 * in "suspended" which is also a valid condition for reset.
+                 */
+                if ((!strcmp(state, "offline")) ||
+                    (!strcmp(state, "suspended"))) {
+                        free(state);
+                        break;
+                }
+                free(state);
+retry:
+                sleep(1);
+                i--;
+        }
+}
+
+static int
+get_mic_shutdown_status(struct mic_info *mic, char *shutdown_status)
+{
+        if (!strcmp(shutdown_status, "nop"))
+                return MIC_NOP;
+        if (!strcmp(shutdown_status, "crashed"))
+                return MIC_CRASHED;
+        if (!strcmp(shutdown_status, "halted"))
+                return MIC_HALTED;
+        if (!strcmp(shutdown_status, "poweroff"))
+                return MIC_POWER_OFF;
+        if (!strcmp(shutdown_status, "restart"))
+                return MIC_RESTART;
+        mpsslog("%s: BUG invalid status %s\n", mic->name, shutdown_status);
+        /* Invalid state */
+        assert(0);
+};
+
+static int get_mic_state(struct mic_info *mic, char *state)
+{
+        if (!strcmp(state, "offline"))
+                return MIC_OFFLINE;
+        if (!strcmp(state, "online"))
+                return MIC_ONLINE;
+        if (!strcmp(state, "shutting_down"))
+                return MIC_SHUTTING_DOWN;
+        if (!strcmp(state, "reset_failed"))
+                return MIC_RESET_FAILED;
+        if (!strcmp(state, "suspending"))
+                return MIC_SUSPENDING;
+        if (!strcmp(state, "suspended"))
+                return MIC_SUSPENDED;
+        mpsslog("%s: BUG invalid state %s\n", mic->name, state);
+        /* Invalid state */
+        assert(0);
+};
+
+static void mic_handle_shutdown(struct mic_info *mic)
+{
+#define SHUTDOWN_TIMEOUT 60
+        int i = SHUTDOWN_TIMEOUT, ret, stat = 0;
+        char *shutdown_status;
+        while (i) {
+                shutdown_status = readsysfs(mic->name, "shutdown_status");
+                if (!shutdown_status)
+                        continue;
+                mpsslog("%s: %s %d shutdown_status %s\n",
+                        mic->name, __func__, __LINE__, shutdown_status);
+                switch (get_mic_shutdown_status(mic, shutdown_status)) {
+                case MIC_RESTART:
+                        mic->restart = 1;
+                case MIC_HALTED:
+                case MIC_POWER_OFF:
+                case MIC_CRASHED:
+                        free(shutdown_status);
+                        goto reset;
+                default:
+                        break;
+                }
+                free(shutdown_status);
+                sleep(1);
+                i--;
+        }
+reset:
+        ret = kill(mic->pid, SIGTERM);
+        mpsslog("%s: %s %d kill pid %d ret %d\n",
+                mic->name, __func__, __LINE__,
+                mic->pid, ret);
+        if (!ret) {
+                ret = waitpid(mic->pid, &stat,
+                        WIFSIGNALED(stat));
+                mpsslog("%s: %s %d waitpid ret %d pid %d\n",
+                        mic->name, __func__, __LINE__,
+                        ret, mic->pid);
+        }
+        if (ret == mic->pid)
+                reset(mic);
+}
+
+static void *
+mic_config(void *arg)
+{
+        struct mic_info *mic = (struct mic_info *)arg;
+        char *state = NULL;
+        char pathname[PATH_MAX];
+        int fd, ret;
+        struct pollfd ufds[1];
+        char value[4096];
+
+        snprintf(pathname, PATH_MAX - 1, "%s/%s/%s",
+                 MICSYSFSDIR, mic->name, "state");
+
+        fd = open(pathname, O_RDONLY);
+        if (fd < 0) {
+                mpsslog("%s: opening file %s failed %s\n",
+                        mic->name, pathname, strerror(errno));
+                goto error;
+        }
+
+        do {
+                ret = read(fd, value, sizeof(value));
+                if (ret < 0) {
+                        mpsslog("%s: Failed to read sysfs entry '%s': %s\n",
+                                mic->name, pathname, strerror(errno));
+                        goto close_error1;
+                }
+retry:
+                state = readsysfs(mic->name, "state");
+                if (!state)
+                        goto retry;
+                mpsslog("%s: %s %d state %s\n",
+                        mic->name, __func__, __LINE__, state);
+                switch (get_mic_state(mic, state)) {
+                case MIC_SHUTTING_DOWN:
+                        mic_handle_shutdown(mic);
+                        goto close_error;
+                case MIC_SUSPENDING:
+                        mic->boot_on_resume = 1;
+                        setsysfs(mic->name, "state", "suspend");
+                        mic_handle_shutdown(mic);
+                        goto close_error;
+                case MIC_OFFLINE:
+                        if (mic->boot_on_resume) {
+                                setsysfs(mic->name, "state", "boot");
+                                mic->boot_on_resume = 0;
+                        }
+                        break;
+                default:
+                        break;
+                }
+                free(state);
+
+                ufds[0].fd = fd;
+                ufds[0].events = POLLERR | POLLPRI;
+                ret = poll(ufds, 1, -1);
+                if (ret < 0) {
+                        mpsslog("%s: poll failed %s\n",
+                                mic->name, strerror(errno));
+                        goto close_error1;
+                }
+        } while (1);
+close_error:
+        free(state);
+close_error1:
+        close(fd);
+error:
+        init_mic(mic);
+        pthread_exit(NULL);
+}
+
+static void
+set_cmdline(struct mic_info *mic)
+{
+        char buffer[PATH_MAX];
+        int len;
+
+        len = snprintf(buffer, PATH_MAX,
+                "clocksource=tsc highres=off nohz=off ");
+        len += snprintf(buffer + len, PATH_MAX,
+                "cpufreq_on;corec6_off;pc3_off;pc6_off ");
+        len += snprintf(buffer + len, PATH_MAX,
+                "ifcfg=static;address,172.31.%d.1;netmask,255.255.255.0",
+                mic->id);
+
+        setsysfs(mic->name, "cmdline", buffer);
+        mpsslog("%s: Command line: \"%s\"\n", mic->name, buffer);
+        snprintf(buffer, PATH_MAX, "172.31.%d.1", mic->id);
+        mpsslog("%s: IPADDR: \"%s\"\n", mic->name, buffer);
+}
+
+static void
+set_log_buf_info(struct mic_info *mic)
+{
+        int fd;
+        off_t len;
+        char system_map[] = "/lib/firmware/mic/System.map";
+        char *map, *temp, log_buf[17] = {'\0'};
+
+        fd = open(system_map, O_RDONLY);
+        if (fd < 0) {
+                mpsslog("%s: Opening System.map failed: %d\n",
+                        mic->name, errno);
+                return;
+        }
+        len = lseek(fd, 0, SEEK_END);
+        if (len < 0) {
+                mpsslog("%s: Reading System.map size failed: %d\n",
+                        mic->name, errno);
+                close(fd);
+                return;
+        }
+        map = mmap(NULL, len, PROT_READ, MAP_PRIVATE, fd, 0);
+        if (map == MAP_FAILED) {
+                mpsslog("%s: mmap of System.map failed: %d\n",
+                        mic->name, errno);
+                close(fd);
+                return;
+        }
+        temp = strstr(map, "__log_buf");
+        if (!temp) {
+                mpsslog("%s: __log_buf not found: %d\n", mic->name, errno);
+                munmap(map, len);
+                close(fd);
+                return;
+        }
+        strncpy(log_buf, temp - 19, 16);
+        setsysfs(mic->name, "log_buf_addr", log_buf);
+        mpsslog("%s: log_buf_addr: %s\n", mic->name, log_buf);
+        temp = strstr(map, "log_buf_len");
+        if (!temp) {
+                mpsslog("%s: log_buf_len not found: %d\n", mic->name, errno);
+                munmap(map, len);
+                close(fd);
+                return;
+        }
+        strncpy(log_buf, temp - 19, 16);
+        setsysfs(mic->name, "log_buf_len", log_buf);
+        mpsslog("%s: log_buf_len: %s\n", mic->name, log_buf);
+        munmap(map, len);
+        close(fd);
+}
+
+static void init_mic(struct mic_info *mic);
+
+static void
+change_virtblk_backend(int x, siginfo_t *siginfo, void *p)
+{
+        struct mic_info *mic;
+
+        for (mic = mic_list.next; mic != NULL; mic = mic->next)
+                mic->mic_virtblk.signaled = 1/* true */;
+}
+
+static void
+init_mic(struct mic_info *mic)
+{
+        struct sigaction ignore = {
+                .sa_flags = 0,
+                .sa_handler = SIG_IGN
+        };
+        struct sigaction act = {
+                .sa_flags = SA_SIGINFO,
+                .sa_sigaction = change_virtblk_backend,
+        };
+        char buffer[PATH_MAX];
+        int err;
+
+        /*
+         * Currently, one virtio block device is supported for each MIC card
+         * at a time. Any user (or test) can send a SIGUSR1 to the MIC daemon.
+         * The signal informs the virtio block backend about a change in the
+         * configuration file which specifies the virtio backend file name on
+         * the host. Virtio block backend then re-reads the configuration file
+         * and switches to the new block device. This signalling mechanism may
+         * not be required once multiple virtio block devices are supported by
+         * the MIC daemon.
+         */
+        sigaction(SIGUSR1, &ignore, NULL);
+
+        mic->pid = fork();
+        switch (mic->pid) {
+        case 0:
+                set_log_buf_info(mic);
+                set_cmdline(mic);
+                add_virtio_device(mic, &virtcons_dev_page.dd);
+                add_virtio_device(mic, &virtnet_dev_page.dd);
+                err = pthread_create(&mic->mic_console.console_thread, NULL,
+                        virtio_console, mic);
+                if (err)
+                        mpsslog("%s virtcons pthread_create failed %s\n",
+                                mic->name, strerror(err));
+                err = pthread_create(&mic->mic_net.net_thread, NULL,
+                        virtio_net, mic);
+                if (err)
+                        mpsslog("%s virtnet pthread_create failed %s\n",
+                                mic->name, strerror(err));
+                err = pthread_create(&mic->mic_virtblk.block_thread, NULL,
+                        virtio_block, mic);
+                if (err)
+                        mpsslog("%s virtblk pthread_create failed %s\n",
+                                mic->name, strerror(err));
+                sigemptyset(&act.sa_mask);
+                err = sigaction(SIGUSR1, &act, NULL);
+                if (err)
+                        mpsslog("%s sigaction SIGUSR1 failed %s\n",
+                                mic->name, strerror(errno));
+                while (1)
+                        sleep(60);
+        case -1:
+                mpsslog("fork failed MIC name %s id %d errno %d\n",
+                        mic->name, mic->id, errno);
+                break;
+        default:
+                if (mic->restart) {
+                        snprintf(buffer, PATH_MAX, "boot");
+                        setsysfs(mic->name, "state", buffer);
+                        mpsslog("%s restarting mic %d\n",
+                                mic->name, mic->restart);
+                        mic->restart = 0;
+                }
+                pthread_create(&mic->config_thread, NULL, mic_config, mic);
+        }
+}
+
+static void
+start_daemon(void)
+{
+        struct mic_info *mic;
+
+        for (mic = mic_list.next; mic != NULL; mic = mic->next)
+                init_mic(mic);
+
+        while (1)
+                sleep(60);
+}
+
+static int
+init_mic_list(void)
+{
+        struct mic_info *mic = &mic_list;
+        struct dirent *file;
+        DIR *dp;
+        int cnt = 0;
+
+        dp = opendir(MICSYSFSDIR);
+        if (!dp)
+                return 0;
+
+        while ((file = readdir(dp)) != NULL) {
+                if (!strncmp(file->d_name, "mic", 3)) {
+                        mic->next = calloc(1, sizeof(struct mic_info));
+                        if (mic->next) {
+                                mic = mic->next;
+                                mic->id = atoi(&file->d_name[3]);
+                                mic->name = malloc(strlen(file->d_name) + 16);
+                                if (mic->name)
+                                        strcpy(mic->name, file->d_name);
+                                mpsslog("MIC name %s id %d\n", mic->name,
+                                        mic->id);
+                                cnt++;
+                        }
+                }
+        }
+
+        closedir(dp);
+        return cnt;
+}
+
+void
+mpsslog(char *format, ...)
+{
+        va_list args;
+        char buffer[4096];
+        char ts[52], *ts1;
+        time_t t;
+
+        if (logfp == NULL)
+                return;
+
+        va_start(args, format);
+        vsprintf(buffer, format, args);
+        va_end(args);
+
+        time(&t);
+        ts1 = ctime_r(&t, ts);
+        ts1[strlen(ts1) - 1] = '\0';
+        fprintf(logfp, "%s: %s", ts1, buffer);
+
+        fflush(logfp);
+}
+
+int
+main(int argc, char *argv[])
+{
+        int cnt;
+        pid_t pid;
+
+        myname = argv[0];
+
+        logfp = fopen(LOGFILE_NAME, "a+");
+        if (!logfp) {
+                fprintf(stderr, "cannot open logfile '%s'\n", LOGFILE_NAME);
+                exit(1);
+        }
+        pid = fork();
+        switch (pid) {
+        case 0:
+                break;
+        case -1:
+                exit(2);
+        default:
+                exit(0);
+        }
+
+        mpsslog("MIC Daemon start\n");
+
+        cnt = init_mic_list();
+        if (cnt == 0) {
+                mpsslog("MIC module not loaded\n");
+                exit(3);
+        }
+        mpsslog("MIC found %d devices\n", cnt);
+
+        start_daemon();
+
+        exit(0);
+}
diff --git a/Documentation/mic/mpssd/mpssd.h b/Documentation/mic/mpssd/mpssd.h
new file mode 100644
index 000000000000..f5f18b15d9a0
--- /dev/null
+++ b/Documentation/mic/mpssd/mpssd.h
@@ -0,0 +1,102 @@
+/*
+ * Intel MIC Platform Software Stack (MPSS)
+ *
+ * Copyright(c) 2013 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Intel MIC User Space Tools.
+ */
+#ifndef _MPSSD_H_
+#define _MPSSD_H_
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <dirent.h>
+#include <libgen.h>
+#include <pthread.h>
+#include <stdarg.h>
+#include <time.h>
+#include <errno.h>
+#include <sys/dir.h>
+#include <sys/ioctl.h>
+#include <sys/poll.h>
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <sys/mman.h>
+#include <sys/utsname.h>
+#include <sys/wait.h>
+#include <netinet/in.h>
+#include <arpa/inet.h>
+#include <netdb.h>
+#include <pthread.h>
+#include <signal.h>
+#include <limits.h>
+#include <syslog.h>
+#include <getopt.h>
+#include <net/if.h>
+#include <linux/if_tun.h>
+#include <linux/if_tun.h>
+#include <linux/virtio_ids.h>
+
+#define MICSYSFSDIR "/sys/class/mic"
+#define LOGFILE_NAME "/var/log/mpssd"
+#define PAGE_SIZE 4096
+
+struct mic_console_info {
+        pthread_t       console_thread;
+        int             virtio_console_fd;
+        void            *console_dp;
+};
+
+struct mic_net_info {
+        pthread_t       net_thread;
+        int             virtio_net_fd;
+        int             tap_fd;
+        void            *net_dp;
+};
+
+struct mic_virtblk_info {
+        pthread_t       block_thread;
+        int             virtio_block_fd;
+        void            *block_dp;
+        volatile sig_atomic_t   signaled;
+        char            *backend_file;
+        int             backend;
+        void            *backend_addr;
+        long            backend_size;
+};
+
+struct mic_info {
+        int             id;
+        char            *name;
+        pthread_t       config_thread;
+        pid_t           pid;
+        struct mic_console_info mic_console;
+        struct mic_net_info     mic_net;
+        struct mic_virtblk_info mic_virtblk;
+        int             restart;
+        int             boot_on_resume;
+        struct mic_info *next;
+};
+
+__attribute__((format(printf, 1, 2)))
+void mpsslog(char *format, ...);
+char *readsysfs(char *dir, char *entry);
+int setsysfs(char *dir, char *entry, char *value);
+#endif
diff --git a/Documentation/mic/mpssd/sysfs.c b/Documentation/mic/mpssd/sysfs.c
new file mode 100644
index 000000000000..8dd326936083
--- /dev/null
+++ b/Documentation/mic/mpssd/sysfs.c
@@ -0,0 +1,102 @@
+/*
+ * Intel MIC Platform Software Stack (MPSS)
+ *
+ * Copyright(c) 2013 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Intel MIC User Space Tools.
+ */
+
+#include "mpssd.h"
+
+#define PAGE_SIZE 4096
+
+char *
+readsysfs(char *dir, char *entry)
+{
+        char filename[PATH_MAX];
+        char value[PAGE_SIZE];
+        char *string = NULL;
+        int fd;
+        int len;
+
+        if (dir == NULL)
+                snprintf(filename, PATH_MAX, "%s/%s", MICSYSFSDIR, entry);
+        else
+                snprintf(filename, PATH_MAX,
+                         "%s/%s/%s", MICSYSFSDIR, dir, entry);
+
+        fd = open(filename, O_RDONLY);
+        if (fd < 0) {
+                mpsslog("Failed to open sysfs entry '%s': %s\n",
+                        filename, strerror(errno));
+                return NULL;
+        }
+
+        len = read(fd, value, sizeof(value));
+        if (len < 0) {
+                mpsslog("Failed to read sysfs entry '%s': %s\n",
+                        filename, strerror(errno));
+                goto readsys_ret;
+        }
+        if (len == 0)
+                goto readsys_ret;
+
+        value[len - 1] = '\0';
+
+        string = malloc(strlen(value) + 1);
+        if (string)
+                strcpy(string, value);
+
+readsys_ret:
+        close(fd);
+        return string;
+}
+
+int
+setsysfs(char *dir, char *entry, char *value)
+{
+        char filename[PATH_MAX];
+        char *oldvalue;
+        int fd, ret = 0;
+
+        if (dir == NULL)
+                snprintf(filename, PATH_MAX, "%s/%s", MICSYSFSDIR, entry);
+        else
+                snprintf(filename, PATH_MAX, "%s/%s/%s",
+                         MICSYSFSDIR, dir, entry);
+
+        oldvalue = readsysfs(dir, entry);
+
+        fd = open(filename, O_RDWR);
+        if (fd < 0) {
+                ret = errno;
+                mpsslog("Failed to open sysfs entry '%s': %s\n",
+                        filename, strerror(errno));
+                goto done;
+        }
+
+        if (!oldvalue || strcmp(value, oldvalue)) {
+                if (write(fd, value, strlen(value)) < 0) {
+                        ret = errno;
+                        mpsslog("Failed to write new sysfs entry '%s': %s\n",
+                                filename, strerror(errno));
+                }
+        }
+        close(fd);
+done:
+        if (oldvalue)
+                free(oldvalue);
+        return ret;
+}
diff --git a/Documentation/networking/dccp.txt b/Documentation/networking/dccp.txt
index d718bc2ff1cf..bf5dbe3ab8c5 100644
--- a/Documentation/networking/dccp.txt
+++ b/Documentation/networking/dccp.txt
@@ -18,8 +18,8 @@ Introduction
 Datagram Congestion Control Protocol (DCCP) is an unreliable, connection
 oriented protocol designed to solve issues present in UDP and TCP, particularly
 for real-time and multimedia (streaming) traffic.
-It divides into a base protocol (RFC 4340) and plugable congestion control
-modules called CCIDs. Like plugable TCP congestion control, at least one CCID
+It divides into a base protocol (RFC 4340) and pluggable congestion control
+modules called CCIDs. Like pluggable TCP congestion control, at least one CCID
 needs to be enabled in order for the protocol to function properly. In the Linux
 implementation, this is the TCP-like CCID2 (RFC 4341). Additional CCIDs, such as
 the TCP-friendly CCID3 (RFC 4342), are optional.
diff --git a/Documentation/networking/e100.txt b/Documentation/networking/e100.txt
index 13a32124bca0..f862cf3aff34 100644
--- a/Documentation/networking/e100.txt
+++ b/Documentation/networking/e100.txt
@@ -103,7 +103,7 @@ Additional Configurations
   PRO/100 Family of Adapters is e100.
 
   As an example, if you install the e100 driver for two PRO/100 adapters
-  (eth0 and eth1), add the following to a configuraton file in /etc/modprobe.d/
+  (eth0 and eth1), add the following to a configuration file in /etc/modprobe.d/
 
        alias eth0 e100
        alias eth1 e100
diff --git a/Documentation/networking/ieee802154.txt b/Documentation/networking/ieee802154.txt
index 09eb57329f11..22bbc7225f8e 100644
--- a/Documentation/networking/ieee802154.txt
+++ b/Documentation/networking/ieee802154.txt
@@ -4,7 +4,7 @@
 
 Introduction
 ============
-The IEEE 802.15.4 working group focuses on standartization of bottom
+The IEEE 802.15.4 working group focuses on standardization of bottom
 two layers: Medium Access Control (MAC) and Physical (PHY). And there
 are mainly two options available for upper layers:
  - ZigBee - proprietary protocol from ZigBee Alliance
@@ -66,7 +66,7 @@ net_device, with .type = ARPHRD_IEEE802154. Data is exchanged with socket family
 code via plain sk_buffs. On skb reception skb->cb must contain additional
 info as described in the struct ieee802154_mac_cb. During packet transmission
 the skb->cb is used to provide additional data to device's header_ops->create
-function. Be aware, that this data can be overriden later (when socket code
+function. Be aware that this data can be overridden later (when socket code
 submits skb to qdisc), so if you need something from that cb later, you should
 store info in the skb->data on your own.
 
diff --git a/Documentation/networking/l2tp.txt b/Documentation/networking/l2tp.txt
index e63fc1f7bf87..c74434de2fa5 100644
--- a/Documentation/networking/l2tp.txt
+++ b/Documentation/networking/l2tp.txt
@@ -197,7 +197,7 @@ state information because the file format is subject to change. It is
 implemented to provide extra debug information to help diagnose
 problems.) Users should use the netlink API.
 
-/proc/net/pppol2tp is also provided for backwards compaibility with
+/proc/net/pppol2tp is also provided for backwards compatibility with
 the original pppol2tp driver. It lists information about L2TPv2
 tunnels and sessions only. Its use is discouraged.
 
diff --git a/Documentation/networking/netdev-FAQ.txt b/Documentation/networking/netdev-FAQ.txt
index d9112f01c44a..0fe1c6e0dbcd 100644
--- a/Documentation/networking/netdev-FAQ.txt
+++ b/Documentation/networking/netdev-FAQ.txt
@@ -4,23 +4,23 @@ Information you need to know about netdev
 
 Q: What is netdev?
 
-A: It is a mailing list for all network related linux stuff.  This includes
+A: It is a mailing list for all network-related Linux stuff.  This includes
    anything found under net/  (i.e. core code like IPv6) and drivers/net
-   (i.e. hardware specific drivers) in the linux source tree.
+   (i.e. hardware specific drivers) in the Linux source tree.
 
    Note that some subsystems (e.g. wireless drivers) which have a high volume
    of traffic have their own specific mailing lists.
 
-   The netdev list is managed (like many other linux mailing lists) through
+   The netdev list is managed (like many other Linux mailing lists) through
    VGER ( http://vger.kernel.org/ ) and archives can be found below:
 
         http://marc.info/?l=linux-netdev
         http://www.spinics.net/lists/netdev/
 
-   Aside from subsystems like that mentioned above, all network related linux
-   development (i.e. RFC, review, comments, etc) takes place on netdev.
+   Aside from subsystems like that mentioned above, all network-related Linux
+   development (i.e. RFC, review, comments, etc.) takes place on netdev.
 
-Q: How do the changes posted to netdev make their way into linux?
+Q: How do the changes posted to netdev make their way into Linux?
 
 A: There are always two trees (git repositories) in play.  Both are driven
    by David Miller, the main network maintainer.  There is the "net" tree,
@@ -35,7 +35,7 @@ A: There are always two trees (git repositories) in play.  Both are driven
 Q: How often do changes from these trees make it to the mainline Linus tree?
 
 A: To understand this, you need to know a bit of background information
-   on the cadence of linux development.  Each new release starts off with
+   on the cadence of Linux development.  Each new release starts off with
    a two week "merge window" where the main maintainers feed their new
    stuff to Linus for merging into the mainline tree.  After the two weeks,
    the merge window is closed, and it is called/tagged "-rc1".  No new
@@ -46,7 +46,7 @@ A: To understand this, you need to know a bit of background information
    things are in a state of churn), and a week after the last vX.Y-rcN
    was done, the official "vX.Y" is released.
 
-   Relating that to netdev:  At the beginning of the 2 week merge window,
+   Relating that to netdev:  At the beginning of the 2-week merge window,
    the net-next tree will be closed - no new changes/features.  The
    accumulated new content of the past ~10 weeks will be passed onto
    mainline/Linus via a pull request for vX.Y -- at the same time,
@@ -59,16 +59,16 @@ A: To understand this, you need to know a bit of background information
    IMPORTANT:  Do not send new net-next content to netdev during the
    period during which net-next tree is closed.
 
-   Shortly after the two weeks have passed, (and vX.Y-rc1 is released) the
+   Shortly after the two weeks have passed (and vX.Y-rc1 is released), the
    tree for net-next reopens to collect content for the next (vX.Y+1) release.
 
    If you aren't subscribed to netdev and/or are simply unsure if net-next
    has re-opened yet, simply check the net-next git repository link above for
-   any new networking related commits.
+   any new networking-related commits.
 
    The "net" tree continues to collect fixes for the vX.Y content, and
    is fed back to Linus at regular (~weekly) intervals.  Meaning that the
-   focus for "net" is on stablilization and bugfixes.
+   focus for "net" is on stabilization and bugfixes.
 
    Finally, the vX.Y gets released, and the whole cycle starts over.
 
@@ -217,7 +217,7 @@ A: Attention to detail.  Re-read your own work as if you were the
    to why it happens, and then if necessary, explain why the fix proposed
    is the best way to get things done.   Don't mangle whitespace, and as
    is common, don't mis-indent function arguments that span multiple lines.
-   If it is your 1st patch, mail it to yourself so you can test apply
+   If it is your first patch, mail it to yourself so you can test apply
    it to an unpatched tree to confirm infrastructure didn't mangle it.
 
    Finally, go back and read Documentation/SubmittingPatches to be
diff --git a/Documentation/networking/netlink_mmap.txt b/Documentation/networking/netlink_mmap.txt
index 533378839546..b26122973525 100644
--- a/Documentation/networking/netlink_mmap.txt
+++ b/Documentation/networking/netlink_mmap.txt
@@ -45,7 +45,7 @@ processing.
 
 Conversion of the reception path involves calling poll() on the file
 descriptor, once the socket is readable the frames from the ring are
-processsed in order until no more messages are available, as indicated by
+processed in order until no more messages are available, as indicated by
 a status word in the frame header.
 
 On kernel side, in order to make use of memory mapped I/O on receive, the
@@ -56,7 +56,7 @@ Dumps of kernel databases automatically support memory mapped I/O.
 
 Conversion of the transmit path involves changing message construction to
 use memory from the TX ring instead of (usually) a buffer declared on the
-stack and setting up the frame header approriately. Optionally poll() can
+stack and setting up the frame header appropriately. Optionally poll() can
 be used to wait for free frames in the TX ring.
 
 Structured and definitions for using memory mapped I/O are contained in
@@ -231,7 +231,7 @@ Ring setup:
         if (setsockopt(fd, NETLINK_TX_RING, &req, sizeof(req)) < 0)
                 exit(1)
 
-        /* Calculate size of each invididual ring */
+        /* Calculate size of each individual ring */
         ring_size = req.nm_block_nr * req.nm_block_size;
 
         /* Map RX/TX rings. The TX ring is located after the RX ring */
diff --git a/Documentation/networking/operstates.txt b/Documentation/networking/operstates.txt
index 97694572338b..355c6d8ef8ad 100644
--- a/Documentation/networking/operstates.txt
+++ b/Documentation/networking/operstates.txt
@@ -89,8 +89,8 @@ packets. The name 'carrier' and the inversion are historical, think of
 it as lower layer.
 
 Note that for certain kind of soft-devices, which are not managing any
-real hardware, there is possible to set this bit from userpsace.
-One should use TVL IFLA_CARRIER to do so.
+real hardware, it is possible to set this bit from userspace.  One
+should use TVL IFLA_CARRIER to do so.
 
 netif_carrier_ok() can be used to query that bit.
 
diff --git a/Documentation/networking/rxrpc.txt b/Documentation/networking/rxrpc.txt
index 60d05eb77c64..b89bc82eed46 100644
--- a/Documentation/networking/rxrpc.txt
+++ b/Documentation/networking/rxrpc.txt
@@ -144,7 +144,7 @@ An overview of the RxRPC protocol:
  (*) Calls use ACK packets to handle reliability.  Data packets are also
      explicitly sequenced per call.
 
- (*) There are two types of positive acknowledgement: hard-ACKs and soft-ACKs.
+ (*) There are two types of positive acknowledgment: hard-ACKs and soft-ACKs.
      A hard-ACK indicates to the far side that all the data received to a point
      has been received and processed; a soft-ACK indicates that the data has
      been received but may yet be discarded and re-requested.  The sender may
diff --git a/Documentation/networking/stmmac.txt b/Documentation/networking/stmmac.txt
index 457b8bbafb08..cdd916da838d 100644
--- a/Documentation/networking/stmmac.txt
+++ b/Documentation/networking/stmmac.txt
@@ -160,7 +160,7 @@ Where:
  o pmt: core has the embedded power module (optional).
  o force_sf_dma_mode: force DMA to use the Store and Forward mode
                      instead of the Threshold.
- o force_thresh_dma_mode: force DMA to use the Shreshold mode other than
+ o force_thresh_dma_mode: force DMA to use the Threshold mode other than
                      the Store and Forward mode.
  o riwt_off: force to disable the RX watchdog feature and switch to NAPI mode.
  o fix_mac_speed: this callback is used for modifying some syscfg registers
@@ -175,7 +175,7 @@ Where:
              registers.
  o custom_cfg/custom_data: this is a custom configuration that can be passed
                            while initializing the resources.
- o bsp_priv: another private poiter.
+ o bsp_priv: another private pointer.
 
 For MDIO bus The we have:
 
@@ -271,7 +271,7 @@ reset procedure etc).
  o dwmac1000_dma.c:  dma functions for the GMAC chip;
  o dwmac1000.h: specific header file for the GMAC;
  o dwmac100_core: MAC 100 core and dma code;
- o dwmac100_dma.c: dma funtions for the MAC chip;
+ o dwmac100_dma.c: dma functions for the MAC chip;
  o dwmac1000.h: specific header file for the MAC;
  o dwmac_lib.c: generic DMA functions shared among chips;
  o enh_desc.c: functions for handling enhanced descriptors;
@@ -364,4 +364,4 @@ Auto-negotiated Link Parter Ability.
 10) TODO:
  o XGMAC is not supported.
  o Complete the TBI & RTBI support.
- o extened VLAN support for 3.70a SYNP GMAC.
+ o extend VLAN support for 3.70a SYNP GMAC.
diff --git a/Documentation/networking/vortex.txt b/Documentation/networking/vortex.txt
index 9a8041dcbb53..97282da82b75 100644
--- a/Documentation/networking/vortex.txt
+++ b/Documentation/networking/vortex.txt
@@ -68,7 +68,7 @@ Module parameters
 
 There are several parameters which may be provided to the driver when
 its module is loaded.  These are usually placed in /etc/modprobe.d/*.conf
-configuretion files.  Example:
+configuration files.  Example:
 
 options 3c59x debug=3 rx_copybreak=300
 
@@ -178,7 +178,7 @@ max_interrupt_work=N
 
   The driver's interrupt service routine can handle many receive and
   transmit packets in a single invocation.  It does this in a loop. 
-  The value of max_interrupt_work governs how mnay times the interrupt
+  The value of max_interrupt_work governs how many times the interrupt
   service routine will loop.  The default value is 32 loops.  If this
   is exceeded the interrupt service routine gives up and generates a
   warning message "eth0: Too much work in interrupt".
diff --git a/Documentation/networking/x25-iface.txt b/Documentation/networking/x25-iface.txt
index 78f662ee0622..7f213b556e85 100644
--- a/Documentation/networking/x25-iface.txt
+++ b/Documentation/networking/x25-iface.txt
@@ -105,7 +105,7 @@ reduced by the following measures or a combination thereof:
     later.
     The lapb module interface was modified to support this. Its
     data_indication() method should now transparently pass the
-    netif_rx() return value to the (lapb mopdule) caller.
+    netif_rx() return value to the (lapb module) caller.
 (2) Drivers for kernel versions 2.2.x should always check the global
     variable netdev_dropping when a new frame is received. The driver
     should only call netif_rx() if netdev_dropping is zero. Otherwise
diff --git a/Documentation/phy.txt b/Documentation/phy.txt
new file mode 100644
index 000000000000..0103e4b15b0e
--- /dev/null
+++ b/Documentation/phy.txt
@@ -0,0 +1,166 @@
+                            PHY SUBSYSTEM
+                  Kishon Vijay Abraham I <kishon@ti.com>
+
+This document explains the Generic PHY Framework along with the APIs provided,
+and how-to-use.
+
+1. Introduction
+
+*PHY* is the abbreviation for physical layer. It is used to connect a device
+to the physical medium e.g., the USB controller has a PHY to provide functions
+such as serialization, de-serialization, encoding, decoding and is responsible
+for obtaining the required data transmission rate. Note that some USB
+controllers have PHY functionality embedded into it and others use an external
+PHY. Other peripherals that use PHY include Wireless LAN, Ethernet,
+SATA etc.
+
+The intention of creating this framework is to bring the PHY drivers spread
+all over the Linux kernel to drivers/phy to increase code re-use and for
+better code maintainability.
+
+This framework will be of use only to devices that use external PHY (PHY
+functionality is not embedded within the controller).
+
+2. Registering/Unregistering the PHY provider
+
+PHY provider refers to an entity that implements one or more PHY instances.
+For the simple case where the PHY provider implements only a single instance of
+the PHY, the framework provides its own implementation of of_xlate in
+of_phy_simple_xlate. If the PHY provider implements multiple instances, it
+should provide its own implementation of of_xlate. of_xlate is used only for
+dt boot case.
+
+#define of_phy_provider_register(dev, xlate)    \
+        __of_phy_provider_register((dev), THIS_MODULE, (xlate))
+
+#define devm_of_phy_provider_register(dev, xlate)       \
+        __devm_of_phy_provider_register((dev), THIS_MODULE, (xlate))
+
+of_phy_provider_register and devm_of_phy_provider_register macros can be used to
+register the phy_provider and it takes device and of_xlate as
+arguments. For the dt boot case, all PHY providers should use one of the above
+2 macros to register the PHY provider.
+
+void devm_of_phy_provider_unregister(struct device *dev,
+        struct phy_provider *phy_provider);
+void of_phy_provider_unregister(struct phy_provider *phy_provider);
+
+devm_of_phy_provider_unregister and of_phy_provider_unregister can be used to
+unregister the PHY.
+
+3. Creating the PHY
+
+The PHY driver should create the PHY in order for other peripheral controllers
+to make use of it. The PHY framework provides 2 APIs to create the PHY.
+
+struct phy *phy_create(struct device *dev, const struct phy_ops *ops,
+        struct phy_init_data *init_data);
+struct phy *devm_phy_create(struct device *dev, const struct phy_ops *ops,
+        struct phy_init_data *init_data);
+
+The PHY drivers can use one of the above 2 APIs to create the PHY by passing
+the device pointer, phy ops and init_data.
+phy_ops is a set of function pointers for performing PHY operations such as
+init, exit, power_on and power_off. *init_data* is mandatory to get a reference
+to the PHY in the case of non-dt boot. See section *Board File Initialization*
+on how init_data should be used.
+
+Inorder to dereference the private data (in phy_ops), the phy provider driver
+can use phy_set_drvdata() after creating the PHY and use phy_get_drvdata() in
+phy_ops to get back the private data.
+
+4. Getting a reference to the PHY
+
+Before the controller can make use of the PHY, it has to get a reference to
+it. This framework provides the following APIs to get a reference to the PHY.
+
+struct phy *phy_get(struct device *dev, const char *string);
+struct phy *devm_phy_get(struct device *dev, const char *string);
+
+phy_get and devm_phy_get can be used to get the PHY. In the case of dt boot,
+the string arguments should contain the phy name as given in the dt data and
+in the case of non-dt boot, it should contain the label of the PHY.
+The only difference between the two APIs is that devm_phy_get associates the
+device with the PHY using devres on successful PHY get. On driver detach,
+release function is invoked on the the devres data and devres data is freed.
+
+5. Releasing a reference to the PHY
+
+When the controller no longer needs the PHY, it has to release the reference
+to the PHY it has obtained using the APIs mentioned in the above section. The
+PHY framework provides 2 APIs to release a reference to the PHY.
+
+void phy_put(struct phy *phy);
+void devm_phy_put(struct device *dev, struct phy *phy);
+
+Both these APIs are used to release a reference to the PHY and devm_phy_put
+destroys the devres associated with this PHY.
+
+6. Destroying the PHY
+
+When the driver that created the PHY is unloaded, it should destroy the PHY it
+created using one of the following 2 APIs.
+
+void phy_destroy(struct phy *phy);
+void devm_phy_destroy(struct device *dev, struct phy *phy);
+
+Both these APIs destroy the PHY and devm_phy_destroy destroys the devres
+associated with this PHY.
+
+7. PM Runtime
+
+This subsystem is pm runtime enabled. So while creating the PHY,
+pm_runtime_enable of the phy device created by this subsystem is called and
+while destroying the PHY, pm_runtime_disable is called. Note that the phy
+device created by this subsystem will be a child of the device that calls
+phy_create (PHY provider device).
+
+So pm_runtime_get_sync of the phy_device created by this subsystem will invoke
+pm_runtime_get_sync of PHY provider device because of parent-child relationship.
+It should also be noted that phy_power_on and phy_power_off performs
+phy_pm_runtime_get_sync and phy_pm_runtime_put respectively.
+There are exported APIs like phy_pm_runtime_get, phy_pm_runtime_get_sync,
+phy_pm_runtime_put, phy_pm_runtime_put_sync, phy_pm_runtime_allow and
+phy_pm_runtime_forbid for performing PM operations.
+
+8. Board File Initialization
+
+Certain board file initialization is necessary in order to get a reference
+to the PHY in the case of non-dt boot.
+Say we have a single device that implements 3 PHYs that of USB, SATA and PCIe,
+then in the board file the following initialization should be done.
+
+struct phy_consumer consumers[] = {
+        PHY_CONSUMER("dwc3.0", "usb"),
+        PHY_CONSUMER("pcie.0", "pcie"),
+        PHY_CONSUMER("sata.0", "sata"),
+};
+PHY_CONSUMER takes 2 parameters, first is the device name of the controller
+(PHY consumer) and second is the port name.
+
+struct phy_init_data init_data = {
+        .consumers = consumers,
+        .num_consumers = ARRAY_SIZE(consumers),
+};
+
+static const struct platform_device pipe3_phy_dev = {
+        .name = "pipe3-phy",
+        .id = -1,
+        .dev = {
+                .platform_data = {
+                        .init_data = &init_data,
+                },
+        },
+};
+
+then, while doing phy_create, the PHY driver should pass this init_data
+        phy_create(dev, ops, pdata->init_data);
+
+and the controller driver (phy consumer) should pass the port name along with
+the device to get a reference to the PHY
+        phy_get(dev, "pcie");
+
+9. DeviceTree Binding
+
+The documentation for PHY dt binding can be found @
+Documentation/devicetree/bindings/phy/phy-bindings.txt
diff --git a/Documentation/pps/pps.txt b/Documentation/pps/pps.txt
index d35dcdd82ff6..c03b1be5eb15 100644
--- a/Documentation/pps/pps.txt
+++ b/Documentation/pps/pps.txt
@@ -66,6 +66,21 @@ In LinuxPPS the PPS sources are simply char devices usually mapped
 into files /dev/pps0, /dev/pps1, etc..
 
 
+PPS with USB to serial devices
+------------------------------
+
+It is possible to grab the PPS from an USB to serial device. However,
+you should take into account the latencies and jitter introduced by
+the USB stack. Users has reported clock instability around +-1ms when
+synchronized with PPS through USB. This isn't suited for time server
+synchronization.
+
+If your device doesn't report PPS, you can check that the feature is
+supported by its driver. Most of the time, you only need to add a call
+to usb_serial_handle_dcd_change after checking the DCD status (see
+ch341 and pl2303 examples).
+
+
 Coding example
 --------------
 
diff --git a/Documentation/s390/s390dbf.txt b/Documentation/s390/s390dbf.txt
index fcaf0b4efba2..3da163383c93 100644
--- a/Documentation/s390/s390dbf.txt
+++ b/Documentation/s390/s390dbf.txt
@@ -158,6 +158,16 @@ Return Value:  none
 Description:   Sets new actual debug level if new_level is valid. 
 
 ---------------------------------------------------------------------------
+bool debug_level_enabled (debug_info_t * id, int level);
+
+Parameter:    id:         handle for debug log
+              level:      debug level
+
+Return Value: True if level is less or equal to the current debug level.
+
+Description:  Returns true if debug events for the specified level would be
+              logged. Otherwise returns false.
+---------------------------------------------------------------------------
 void debug_stop_all(void);
 
 Parameter:     none
diff --git a/Documentation/serial/driver b/Documentation/serial/driver
index 067c47d46917..c3a7689a90e6 100644
--- a/Documentation/serial/driver
+++ b/Documentation/serial/driver
@@ -264,10 +264,6 @@ hardware.
         Locking: none.
         Interrupts: caller dependent.
 
-  set_wake(port,state)
-        Enable/disable power management wakeup on serial activity.  Not
-        currently implemented.
-
   type(port)
         Return a pointer to a string constant describing the specified
         port, or return NULL, in which case the string 'unknown' is
diff --git a/Documentation/sysrq.txt b/Documentation/sysrq.txt
index 8cb4d7842a5f..0e307c94809a 100644
--- a/Documentation/sysrq.txt
+++ b/Documentation/sysrq.txt
@@ -11,27 +11,29 @@ regardless of whatever else it is doing, unless it is completely locked up.
 You need to say "yes" to 'Magic SysRq key (CONFIG_MAGIC_SYSRQ)' when
 configuring the kernel. When running a kernel with SysRq compiled in,
 /proc/sys/kernel/sysrq controls the functions allowed to be invoked via
-the SysRq key. By default the file contains 1 which means that every
-possible SysRq request is allowed (in older versions SysRq was disabled
-by default, and you were required to specifically enable it at run-time
-but this is not the case any more). Here is the list of possible values
-in /proc/sys/kernel/sysrq:
+the SysRq key. The default value in this file is set by the
+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE config symbol, which itself defaults
+to 1. Here is the list of possible values in /proc/sys/kernel/sysrq:
    0 - disable sysrq completely
    1 - enable all functions of sysrq
   >1 - bitmask of allowed sysrq functions (see below for detailed function
        description):
-          2 - enable control of console logging level
-          4 - enable control of keyboard (SAK, unraw)
-          8 - enable debugging dumps of processes etc.
-         16 - enable sync command
-         32 - enable remount read-only
-         64 - enable signalling of processes (term, kill, oom-kill)
-        128 - allow reboot/poweroff
-        256 - allow nicing of all RT tasks
+          2 =   0x2 - enable control of console logging level
+          4 =   0x4 - enable control of keyboard (SAK, unraw)
+          8 =   0x8 - enable debugging dumps of processes etc.
+         16 =  0x10 - enable sync command
+         32 =  0x20 - enable remount read-only
+         64 =  0x40 - enable signalling of processes (term, kill, oom-kill)
+        128 =  0x80 - allow reboot/poweroff
+        256 = 0x100 - allow nicing of all RT tasks
 
 You can set the value in the file by the following command:
     echo "number" >/proc/sys/kernel/sysrq
 
+The number may be written here either as decimal or as hexadecimal
+with the 0x prefix. CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE must always be
+written in hexadecimal.
+
 Note that the value of /proc/sys/kernel/sysrq influences only the invocation
 via a keyboard. Invocation of any operation via /proc/sysrq-trigger is always
 allowed (by a user with admin privileges).