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-rw-r--r--Documentation/spi/spi-lm70llp2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/spi/spi-lm70llp b/Documentation/spi/spi-lm70llp
index 34a9cfd746bd..463f6d01fa15 100644
--- a/Documentation/spi/spi-lm70llp
+++ b/Documentation/spi/spi-lm70llp
@@ -46,7 +46,7 @@ The hardware interfacing on the LM70 LLP eval board is as follows:
46 46
47Note that since the LM70 uses a "3-wire" variant of SPI, the SI/SO pin 47Note that since the LM70 uses a "3-wire" variant of SPI, the SI/SO pin
48is connected to both pin D7 (as Master Out) and Select (as Master In) 48is connected to both pin D7 (as Master Out) and Select (as Master In)
49using an arrangment that lets either the parport or the LM70 pull the 49using an arrangement that lets either the parport or the LM70 pull the
50pin low. This can't be shared with true SPI devices, but other 3-wire 50pin low. This can't be shared with true SPI devices, but other 3-wire
51devices might share the same SI/SO pin. 51devices might share the same SI/SO pin.
52 52