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-rw-r--r--Documentation/scsi/ncr53c8xx.txt6
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/scsi/ncr53c8xx.txt b/Documentation/scsi/ncr53c8xx.txt
index fb9281ae8faa..e80a02cffb22 100644
--- a/Documentation/scsi/ncr53c8xx.txt
+++ b/Documentation/scsi/ncr53c8xx.txt
@@ -96,10 +96,10 @@ The original driver has been written for 386bsd and FreeBSD by:
96It is now available as a bundle of 2 drivers: 96It is now available as a bundle of 2 drivers:
97 97
98- ncr53c8xx generic driver that supports all the SYM53C8XX family including 98- ncr53c8xx generic driver that supports all the SYM53C8XX family including
99 the ealiest 810 rev. 1, the latest 896 (2 channel LVD SCSI controller) and 99 the earliest 810 rev. 1, the latest 896 (2 channel LVD SCSI controller) and
100 the new 895A (1 channel LVD SCSI controller). 100 the new 895A (1 channel LVD SCSI controller).
101- sym53c8xx enhanced driver (a.k.a. 896 drivers) that drops support of oldest 101- sym53c8xx enhanced driver (a.k.a. 896 drivers) that drops support of oldest
102 chips in order to gain advantage of new features, as LOAD/STORE intructions 102 chips in order to gain advantage of new features, as LOAD/STORE instructions
103 available since the 810A and hardware phase mismatch available with the 103 available since the 810A and hardware phase mismatch available with the
104 896 and the 895A. 104 896 and the 895A.
105 105
@@ -207,7 +207,7 @@ The 896 and the 895A allows handling of the phase mismatch context from
207SCRIPTS (avoids the phase mismatch interrupt that stops the SCSI processor 207SCRIPTS (avoids the phase mismatch interrupt that stops the SCSI processor
208until the C code has saved the context of the transfer). 208until the C code has saved the context of the transfer).
209Implementing this without using LOAD/STORE instructions would be painfull 209Implementing this without using LOAD/STORE instructions would be painfull
210and I did'nt even want to try it. 210and I didn't even want to try it.
211 211
212The 896 chip supports 64 bit PCI transactions and addressing, while the 212The 896 chip supports 64 bit PCI transactions and addressing, while the
213895A supports 32 bit PCI transactions and 64 bit addressing. 213895A supports 32 bit PCI transactions and 64 bit addressing.