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-rw-r--r--Documentation/powerpc/dts-bindings/fsl/dma.txt13
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/ssi.txt20
2 files changed, 25 insertions, 8 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/dma.txt b/Documentation/powerpc/dts-bindings/fsl/dma.txt
index 86826df00e64..cc453110fc46 100644
--- a/Documentation/powerpc/dts-bindings/fsl/dma.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/dma.txt
@@ -20,7 +20,7 @@ Required properties:
20 - compatible : compatible list, contains 2 entries, first is 20 - compatible : compatible list, contains 2 entries, first is
21 "fsl,CHIP-dma-channel", where CHIP is the processor 21 "fsl,CHIP-dma-channel", where CHIP is the processor
22 (mpc8349, mpc8350, etc.) and the second is 22 (mpc8349, mpc8350, etc.) and the second is
23 "fsl,elo-dma-channel" 23 "fsl,elo-dma-channel". However, see note below.
24 - reg : <registers mapping for channel> 24 - reg : <registers mapping for channel>
25 - cell-index : dma channel index starts at 0. 25 - cell-index : dma channel index starts at 0.
26 26
@@ -82,7 +82,7 @@ Required properties:
82 - compatible : compatible list, contains 2 entries, first is 82 - compatible : compatible list, contains 2 entries, first is
83 "fsl,CHIP-dma-channel", where CHIP is the processor 83 "fsl,CHIP-dma-channel", where CHIP is the processor
84 (mpc8540, mpc8560, etc.) and the second is 84 (mpc8540, mpc8560, etc.) and the second is
85 "fsl,eloplus-dma-channel" 85 "fsl,eloplus-dma-channel". However, see note below.
86 - cell-index : dma channel index starts at 0. 86 - cell-index : dma channel index starts at 0.
87 - reg : <registers mapping for channel> 87 - reg : <registers mapping for channel>
88 - interrupts : <interrupt mapping for DMA channel IRQ> 88 - interrupts : <interrupt mapping for DMA channel IRQ>
@@ -125,3 +125,12 @@ Example:
125 interrupts = <17 2>; 125 interrupts = <17 2>;
126 }; 126 };
127 }; 127 };
128
129Note on DMA channel compatible properties: The compatible property must say
130"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
131driver (fsldma). Any DMA channel used by fsldma cannot be used by another
132DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA
133channel that should be used for another driver should not use
134"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
135example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt
136for more information.
diff --git a/Documentation/powerpc/dts-bindings/fsl/ssi.txt b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
index 5d9841303cae..a2d963998a65 100644
--- a/Documentation/powerpc/dts-bindings/fsl/ssi.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
@@ -24,12 +24,12 @@ Required properties:
24 "rj-master" - r.j., SSI is clock master 24 "rj-master" - r.j., SSI is clock master
25 "ac97-slave" - AC97 mode, SSI is clock slave 25 "ac97-slave" - AC97 mode, SSI is clock slave
26 "ac97-master" - AC97 mode, SSI is clock master 26 "ac97-master" - AC97 mode, SSI is clock master
27- fsl,playback-dma: phandle to a DMA node for the DMA channel to use for 27- fsl,playback-dma: phandle to a node for the DMA channel to use for
28 playback of audio. This is typically dictated by SOC 28 playback of audio. This is typically dictated by SOC
29 design. See the notes below. 29 design. See the notes below.
30- fsl,capture-dma: phandle to a DMA node for the DMA channel to use for 30- fsl,capture-dma: phandle to a node for the DMA channel to use for
31 capture (recording) of audio. This is typically dictated 31 capture (recording) of audio. This is typically dictated
32 by SOC design. See the notes below. 32 by SOC design. See the notes below.
33 33
34Optional properties: 34Optional properties:
35- codec-handle : phandle to a 'codec' node that defines an audio 35- codec-handle : phandle to a 'codec' node that defines an audio
@@ -51,3 +51,11 @@ playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
51playback and DMA channel 3 for capture. The developer can choose which 51playback and DMA channel 3 for capture. The developer can choose which
52DMA controller to use, but the channels themselves are hard-wired. The 52DMA controller to use, but the channels themselves are hard-wired. The
53purpose of these two properties is to represent this hardware design. 53purpose of these two properties is to represent this hardware design.
54
55The device tree nodes for the DMA channels that are referenced by
56"fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
57"fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
58"fsl,mpc8610-dma-channel") can remain. If these nodes are left as
59"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA
60drivers (fsldma) will attempt to use them, and it will conflict with the
61sound drivers.