1 files changed, 41 insertions, 0 deletions

diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index a13d4578319c..da98154328a0 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -56,6 +56,7 @@ Table of Contents
       m) Chipselect/Local Bus
       n) 4xx/Axon EMAC ethernet nodes
       o) Xilinx IP cores
+      p) Freescale Synchronous Serial Interface
 
   VII - Specifying interrupt information for devices
     1) interrupts property
@@ -2575,6 +2576,46 @@ platforms are moved over to use the flattened-device-tree model.
       Requred properties:
        - current-speed : Baud rate of uartlite
 
+    p) Freescale Synchronous Serial Interface
+
+       The SSI is a serial device that communicates with audio codecs.  It can
+       be programmed in AC97, I2S, left-justified, or right-justified modes.
+
+       Required properties:
+       - compatible       : compatible list, containing "fsl,ssi"
+       - cell-index       : the SSI, <0> = SSI1, <1> = SSI2, and so on
+       - reg              : offset and length of the register set for the device
+       - interrupts       : <a b> where a is the interrupt number and b is a
+                            field that represents an encoding of the sense and
+                            level information for the interrupt.  This should be
+                            encoded based on the information in section 2)
+                            depending on the type of interrupt controller you
+                            have.
+       - interrupt-parent : the phandle for the interrupt controller that
+                            services interrupts for this device.
+       - fsl,mode         : the operating mode for the SSI interface
+                            "i2s-slave" - I2S mode, SSI is clock slave
+                            "i2s-master" - I2S mode, SSI is clock master
+                            "lj-slave" - left-justified mode, SSI is clock slave
+                            "lj-master" - l.j. mode, SSI is clock master
+                            "rj-slave" - right-justified mode, SSI is clock slave
+                            "rj-master" - r.j., SSI is clock master
+                            "ac97-slave" - AC97 mode, SSI is clock slave
+                            "ac97-master" - AC97 mode, SSI is clock master
+
+       Optional properties:
+       - codec-handle     : phandle to a 'codec' node that defines an audio
+                            codec connected to this SSI.  This node is typically
+                            a child of an I2C or other control node.
+
+       Child 'codec' node required properties:
+       - compatible       : compatible list, contains the name of the codec
+
+       Child 'codec' node optional properties:
+       - clock-frequency  : The frequency of the input clock, which typically
+                            comes from an on-board dedicated oscillator.
+
+
    More devices will be defined as this spec matures.
 
 VII - Specifying interrupt information for devices