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-rw-r--r--Documentation/powerpc/booting-without-of.txt78
1 files changed, 72 insertions, 6 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index de2e5c05d6e7..aee243a846a2 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -41,12 +41,24 @@ Table of Contents
41 VI - System-on-a-chip devices and nodes 41 VI - System-on-a-chip devices and nodes
42 1) Defining child nodes of an SOC 42 1) Defining child nodes of an SOC
43 2) Representing devices without a current OF specification 43 2) Representing devices without a current OF specification
44 a) PHY nodes 44 a) MDIO IO device
45 b) Interrupt controllers 45 b) Gianfar-compatible ethernet nodes
46 c) CFI or JEDEC memory-mapped NOR flash 46 c) PHY nodes
47 d) 4xx/Axon EMAC ethernet nodes 47 d) Interrupt controllers
48 e) Xilinx IP cores 48 e) I2C
49 f) USB EHCI controllers 49 f) Freescale SOC USB controllers
50 g) Freescale SOC SEC Security Engines
51 h) Board Control and Status (BCSR)
52 i) Freescale QUICC Engine module (QE)
53 j) CFI or JEDEC memory-mapped NOR flash
54 k) Global Utilities Block
55 l) Freescale Communications Processor Module
56 m) Chipselect/Local Bus
57 n) 4xx/Axon EMAC ethernet nodes
58 o) Xilinx IP cores
59 p) Freescale Synchronous Serial Interface
60 q) USB EHCI controllers
61 r) MDIO on GPIOs
50 62
51 VII - Marvell Discovery mv64[345]6x System Controller chips 63 VII - Marvell Discovery mv64[345]6x System Controller chips
52 1) The /system-controller node 64 1) The /system-controller node
@@ -1815,6 +1827,60 @@ platforms are moved over to use the flattened-device-tree model.
1815 big-endian; 1827 big-endian;
1816 }; 1828 };
1817 1829
1830 r) Freescale Display Interface Unit
1831
1832 The Freescale DIU is a LCD controller, with proper hardware, it can also
1833 drive DVI monitors.
1834
1835 Required properties:
1836 - compatible : should be "fsl-diu".
1837 - reg : should contain at least address and length of the DIU register
1838 set.
1839 - Interrupts : one DIU interrupt should be describe here.
1840
1841 Example (MPC8610HPCD)
1842 display@2c000 {
1843 compatible = "fsl,diu";
1844 reg = <0x2c000 100>;
1845 interrupts = <72 2>;
1846 interrupt-parent = <&mpic>;
1847 };
1848
1849 s) Freescale on board FPGA
1850
1851 This is the memory-mapped registers for on board FPGA.
1852
1853 Required properities:
1854 - compatible : should be "fsl,fpga-pixis".
1855 - reg : should contain the address and the lenght of the FPPGA register
1856 set.
1857
1858 Example (MPC8610HPCD)
1859 board-control@e8000000 {
1860 compatible = "fsl,fpga-pixis";
1861 reg = <0xe8000000 32>;
1862 };
1863
1864 r) MDIO on GPIOs
1865
1866 Currently defined compatibles:
1867 - virtual,gpio-mdio
1868
1869 MDC and MDIO lines connected to GPIO controllers are listed in the
1870 gpios property as described in section VIII.1 in the following order:
1871
1872 MDC, MDIO.
1873
1874 Example:
1875
1876 mdio {
1877 compatible = "virtual,mdio-gpio";
1878 #address-cells = <1>;
1879 #size-cells = <0>;
1880 gpios = <&qe_pio_a 11
1881 &qe_pio_c 6>;
1882 };
1883
1818VII - Marvell Discovery mv64[345]6x System Controller chips 1884VII - Marvell Discovery mv64[345]6x System Controller chips
1819=========================================================== 1885===========================================================
1820 1886