diff options
Diffstat (limited to 'Documentation/powerpc')
-rw-r--r-- | Documentation/powerpc/booting-without-of.txt | 128 |
1 files changed, 128 insertions, 0 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index da98154328a0..e56c1c7c3015 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt | |||
@@ -2615,6 +2615,134 @@ platforms are moved over to use the flattened-device-tree model. | |||
2615 | - clock-frequency : The frequency of the input clock, which typically | 2615 | - clock-frequency : The frequency of the input clock, which typically |
2616 | comes from an on-board dedicated oscillator. | 2616 | comes from an on-board dedicated oscillator. |
2617 | 2617 | ||
2618 | * Freescale 83xx DMA Controller | ||
2619 | |||
2620 | Freescale PowerPC 83xx have on chip general purpose DMA controllers. | ||
2621 | |||
2622 | Required properties: | ||
2623 | |||
2624 | - compatible : compatible list, contains 2 entries, first is | ||
2625 | "fsl,CHIP-dma", where CHIP is the processor | ||
2626 | (mpc8349, mpc8360, etc.) and the second is | ||
2627 | "fsl,elo-dma" | ||
2628 | - reg : <registers mapping for DMA general status reg> | ||
2629 | - ranges : Should be defined as specified in 1) to describe the | ||
2630 | DMA controller channels. | ||
2631 | - cell-index : controller index. 0 for controller @ 0x8100 | ||
2632 | - interrupts : <interrupt mapping for DMA IRQ> | ||
2633 | - interrupt-parent : optional, if needed for interrupt mapping | ||
2634 | |||
2635 | |||
2636 | - DMA channel nodes: | ||
2637 | - compatible : compatible list, contains 2 entries, first is | ||
2638 | "fsl,CHIP-dma-channel", where CHIP is the processor | ||
2639 | (mpc8349, mpc8350, etc.) and the second is | ||
2640 | "fsl,elo-dma-channel" | ||
2641 | - reg : <registers mapping for channel> | ||
2642 | - cell-index : dma channel index starts at 0. | ||
2643 | |||
2644 | Optional properties: | ||
2645 | - interrupts : <interrupt mapping for DMA channel IRQ> | ||
2646 | (on 83xx this is expected to be identical to | ||
2647 | the interrupts property of the parent node) | ||
2648 | - interrupt-parent : optional, if needed for interrupt mapping | ||
2649 | |||
2650 | Example: | ||
2651 | dma@82a8 { | ||
2652 | #address-cells = <1>; | ||
2653 | #size-cells = <1>; | ||
2654 | compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; | ||
2655 | reg = <82a8 4>; | ||
2656 | ranges = <0 8100 1a4>; | ||
2657 | interrupt-parent = <&ipic>; | ||
2658 | interrupts = <47 8>; | ||
2659 | cell-index = <0>; | ||
2660 | dma-channel@0 { | ||
2661 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
2662 | cell-index = <0>; | ||
2663 | reg = <0 80>; | ||
2664 | }; | ||
2665 | dma-channel@80 { | ||
2666 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
2667 | cell-index = <1>; | ||
2668 | reg = <80 80>; | ||
2669 | }; | ||
2670 | dma-channel@100 { | ||
2671 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
2672 | cell-index = <2>; | ||
2673 | reg = <100 80>; | ||
2674 | }; | ||
2675 | dma-channel@180 { | ||
2676 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
2677 | cell-index = <3>; | ||
2678 | reg = <180 80>; | ||
2679 | }; | ||
2680 | }; | ||
2681 | |||
2682 | * Freescale 85xx/86xx DMA Controller | ||
2683 | |||
2684 | Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers. | ||
2685 | |||
2686 | Required properties: | ||
2687 | |||
2688 | - compatible : compatible list, contains 2 entries, first is | ||
2689 | "fsl,CHIP-dma", where CHIP is the processor | ||
2690 | (mpc8540, mpc8540, etc.) and the second is | ||
2691 | "fsl,eloplus-dma" | ||
2692 | - reg : <registers mapping for DMA general status reg> | ||
2693 | - cell-index : controller index. 0 for controller @ 0x21000, | ||
2694 | 1 for controller @ 0xc000 | ||
2695 | - ranges : Should be defined as specified in 1) to describe the | ||
2696 | DMA controller channels. | ||
2697 | |||
2698 | - DMA channel nodes: | ||
2699 | - compatible : compatible list, contains 2 entries, first is | ||
2700 | "fsl,CHIP-dma-channel", where CHIP is the processor | ||
2701 | (mpc8540, mpc8560, etc.) and the second is | ||
2702 | "fsl,eloplus-dma-channel" | ||
2703 | - cell-index : dma channel index starts at 0. | ||
2704 | - reg : <registers mapping for channel> | ||
2705 | - interrupts : <interrupt mapping for DMA channel IRQ> | ||
2706 | - interrupt-parent : optional, if needed for interrupt mapping | ||
2707 | |||
2708 | Example: | ||
2709 | dma@21300 { | ||
2710 | #address-cells = <1>; | ||
2711 | #size-cells = <1>; | ||
2712 | compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; | ||
2713 | reg = <21300 4>; | ||
2714 | ranges = <0 21100 200>; | ||
2715 | cell-index = <0>; | ||
2716 | dma-channel@0 { | ||
2717 | compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; | ||
2718 | reg = <0 80>; | ||
2719 | cell-index = <0>; | ||
2720 | interrupt-parent = <&mpic>; | ||
2721 | interrupts = <14 2>; | ||
2722 | }; | ||
2723 | dma-channel@80 { | ||
2724 | compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; | ||
2725 | reg = <80 80>; | ||
2726 | cell-index = <1>; | ||
2727 | interrupt-parent = <&mpic>; | ||
2728 | interrupts = <15 2>; | ||
2729 | }; | ||
2730 | dma-channel@100 { | ||
2731 | compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; | ||
2732 | reg = <100 80>; | ||
2733 | cell-index = <2>; | ||
2734 | interrupt-parent = <&mpic>; | ||
2735 | interrupts = <16 2>; | ||
2736 | }; | ||
2737 | dma-channel@180 { | ||
2738 | compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; | ||
2739 | reg = <180 80>; | ||
2740 | cell-index = <3>; | ||
2741 | interrupt-parent = <&mpic>; | ||
2742 | interrupts = <17 2>; | ||
2743 | }; | ||
2744 | }; | ||
2745 | |||
2618 | 2746 | ||
2619 | More devices will be defined as this spec matures. | 2747 | More devices will be defined as this spec matures. |
2620 | 2748 | ||