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-rw-r--r--Documentation/powerpc/booting-without-of.txt156
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diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 76733a3962f0..838fd323e797 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1824,6 +1824,162 @@ platforms are moved over to use the flattened-device-tree model.
1824 fsl,has-rstcr; 1824 fsl,has-rstcr;
1825 }; 1825 };
1826 1826
1827
1828 h) 4xx/Axon EMAC ethernet nodes
1829
1830 The EMAC ethernet controller in IBM and AMCC 4xx chips, and also
1831 the Axon bridge. To operate this needs to interact with a ths
1832 special McMAL DMA controller, and sometimes an RGMII or ZMII
1833 interface. In addition to the nodes and properties described
1834 below, the node for the OPB bus on which the EMAC sits must have a
1835 correct clock-frequency property.
1836
1837 i) The EMAC node itself
1838
1839 Required properties:
1840 - device_type : "network"
1841
1842 - compatible : compatible list, contains 2 entries, first is
1843 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
1844 405gp, Axon) and second is either "ibm,emac" or
1845 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
1846 "ibm,emac4"
1847 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
1848 - interrupt-parent : optional, if needed for interrupt mapping
1849 - reg : <registers mapping>
1850 - local-mac-address : 6 bytes, MAC address
1851 - mal-device : phandle of the associated McMAL node
1852 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
1853 with this EMAC
1854 - mal-rx-channel : 1 cell, index of the rx channel on McMAL associated
1855 with this EMAC
1856 - cell-index : 1 cell, hardware index of the EMAC cell on a given
1857 ASIC (typically 0x0 and 0x1 for EMAC0 and EMAC1 on
1858 each Axon chip)
1859 - max-frame-size : 1 cell, maximum frame size supported in bytes
1860 - rx-fifo-size : 1 cell, Rx fifo size in bytes for 10 and 100 Mb/sec
1861 operations.
1862 For Axon, 2048
1863 - tx-fifo-size : 1 cell, Tx fifo size in bytes for 10 and 100 Mb/sec
1864 operations.
1865 For Axon, 2048.
1866 - fifo-entry-size : 1 cell, size of a fifo entry (used to calculate
1867 thresholds).
1868 For Axon, 0x00000010
1869 - mal-burst-size : 1 cell, MAL burst size (used to calculate thresholds)
1870 in bytes.
1871 For Axon, 0x00000100 (I think ...)
1872 - phy-mode : string, mode of operations of the PHY interface.
1873 Supported values are: "mii", "rmii", "smii", "rgmii",
1874 "tbi", "gmii", rtbi", "sgmii".
1875 For Axon on CAB, it is "rgmii"
1876 - mdio-device : 1 cell, required iff using shared MDIO registers
1877 (440EP). phandle of the EMAC to use to drive the
1878 MDIO lines for the PHY used by this EMAC.
1879 - zmii-device : 1 cell, required iff connected to a ZMII. phandle of
1880 the ZMII device node
1881 - zmii-channel : 1 cell, required iff connected to a ZMII. Which ZMII
1882 channel or 0xffffffff if ZMII is only used for MDIO.
1883 - rgmii-device : 1 cell, required iff connected to an RGMII. phandle
1884 of the RGMII device node.
1885 For Axon: phandle of plb5/plb4/opb/rgmii
1886 - rgmii-channel : 1 cell, required iff connected to an RGMII. Which
1887 RGMII channel is used by this EMAC.
1888 Fox Axon: present, whatever value is appropriate for each
1889 EMAC, that is the content of the current (bogus) "phy-port"
1890 property.
1891
1892 Recommended properties:
1893 - linux,network-index : This is the intended "index" of this
1894 network device. This is used by the bootwrapper to interpret
1895 MAC addresses passed by the firmware when no information other
1896 than indices is available to associate an address with a device.
1897
1898 Optional properties:
1899 - phy-address : 1 cell, optional, MDIO address of the PHY. If absent,
1900 a search is performed.
1901 - phy-map : 1 cell, optional, bitmap of addresses to probe the PHY
1902 for, used if phy-address is absent. bit 0x00000001 is
1903 MDIO address 0.
1904 For Axon it can be absent, thouugh my current driver
1905 doesn't handle phy-address yet so for now, keep
1906 0x00ffffff in it.
1907 - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec
1908 operations (if absent the value is the same as
1909 rx-fifo-size). For Axon, either absent or 2048.
1910 - tx-fifo-size-gige : 1 cell, Tx fifo size in bytes for 1000 Mb/sec
1911 operations (if absent the value is the same as
1912 tx-fifo-size). For Axon, either absent or 2048.
1913 - tah-device : 1 cell, optional. If connected to a TAH engine for
1914 offload, phandle of the TAH device node.
1915 - tah-channel : 1 cell, optional. If appropriate, channel used on the
1916 TAH engine.
1917
1918 Example:
1919
1920 EMAC0: ethernet@40000800 {
1921 linux,network-index = <0>;
1922 device_type = "network";
1923 compatible = "ibm,emac-440gp", "ibm,emac";
1924 interrupt-parent = <&UIC1>;
1925 interrupts = <1c 4 1d 4>;
1926 reg = <40000800 70>;
1927 local-mac-address = [00 04 AC E3 1B 1E];
1928 mal-device = <&MAL0>;
1929 mal-tx-channel = <0 1>;
1930 mal-rx-channel = <0>;
1931 cell-index = <0>;
1932 max-frame-size = <5dc>;
1933 rx-fifo-size = <1000>;
1934 tx-fifo-size = <800>;
1935 phy-mode = "rmii";
1936 phy-map = <00000001>;
1937 zmii-device = <&ZMII0>;
1938 zmii-channel = <0>;
1939 };
1940
1941 ii) McMAL node
1942
1943 Required properties:
1944 - device_type : "dma-controller"
1945 - compatible : compatible list, containing 2 entries, first is
1946 "ibm,mcmal-CHIP" where CHIP is the host ASIC (like
1947 emac) and the second is either "ibm,mcmal" or
1948 "ibm,mcmal2".
1949 For Axon, "ibm,mcmal-axon","ibm,mcmal2"
1950 - interrupts : <interrupt mapping for the MAL interrupts sources:
1951 5 sources: tx_eob, rx_eob, serr, txde, rxde>.
1952 For Axon: This is _different_ from the current
1953 firmware. We use the "delayed" interrupts for txeob
1954 and rxeob. Thus we end up with mapping those 5 MPIC
1955 interrupts, all level positive sensitive: 10, 11, 32,
1956 33, 34 (in decimal)
1957 - dcr-reg : < DCR registers range >
1958 - dcr-parent : if needed for dcr-reg
1959 - num-tx-chans : 1 cell, number of Tx channels
1960 - num-rx-chans : 1 cell, number of Rx channels
1961
1962 iii) ZMII node
1963
1964 Required properties:
1965 - compatible : compatible list, containing 2 entries, first is
1966 "ibm,zmii-CHIP" where CHIP is the host ASIC (like
1967 EMAC) and the second is "ibm,zmii".
1968 For Axon, there is no ZMII node.
1969 - reg : <registers mapping>
1970
1971 iv) RGMII node
1972
1973 Required properties:
1974 - compatible : compatible list, containing 2 entries, first is
1975 "ibm,rgmii-CHIP" where CHIP is the host ASIC (like
1976 EMAC) and the second is "ibm,rgmii".
1977 For Axon, "ibm,rgmii-axon","ibm,rgmii"
1978 - reg : <registers mapping>
1979 - revision : as provided by the RGMII new version register if
1980 available.
1981 For Axon: 0x0000012a
1982
1827 More devices will be defined as this spec matures. 1983 More devices will be defined as this spec matures.
1828 1984
1829VII - Specifying interrupt information for devices 1985VII - Specifying interrupt information for devices