diff options
Diffstat (limited to 'Documentation/powerpc/dts-bindings')
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/board.txt | 4 | ||||
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/mpc5200.txt | 17 |
2 files changed, 20 insertions, 1 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/board.txt b/Documentation/powerpc/dts-bindings/fsl/board.txt index e8b5bc24d0ac..39e941515a36 100644 --- a/Documentation/powerpc/dts-bindings/fsl/board.txt +++ b/Documentation/powerpc/dts-bindings/fsl/board.txt | |||
@@ -20,12 +20,16 @@ Required properities: | |||
20 | - compatible : should be "fsl,fpga-pixis". | 20 | - compatible : should be "fsl,fpga-pixis". |
21 | - reg : should contain the address and the length of the FPPGA register | 21 | - reg : should contain the address and the length of the FPPGA register |
22 | set. | 22 | set. |
23 | - interrupt-parent: should specify phandle for the interrupt controller. | ||
24 | - interrupts : should specify event (wakeup) IRQ. | ||
23 | 25 | ||
24 | Example (MPC8610HPCD): | 26 | Example (MPC8610HPCD): |
25 | 27 | ||
26 | board-control@e8000000 { | 28 | board-control@e8000000 { |
27 | compatible = "fsl,fpga-pixis"; | 29 | compatible = "fsl,fpga-pixis"; |
28 | reg = <0xe8000000 32>; | 30 | reg = <0xe8000000 32>; |
31 | interrupt-parent = <&mpic>; | ||
32 | interrupts = <8 8>; | ||
29 | }; | 33 | }; |
30 | 34 | ||
31 | * Freescale BCSR GPIO banks | 35 | * Freescale BCSR GPIO banks |
diff --git a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt index cabc780f7258..5c6602dbfdc2 100644 --- a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt +++ b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt | |||
@@ -103,7 +103,22 @@ fsl,mpc5200-gpt nodes | |||
103 | --------------------- | 103 | --------------------- |
104 | On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board | 104 | On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board |
105 | design supports the internal wdt, then the device node for GPT0 should | 105 | design supports the internal wdt, then the device node for GPT0 should |
106 | include the empty property 'fsl,has-wdt'. | 106 | include the empty property 'fsl,has-wdt'. Note that this does not activate |
107 | the watchdog. The timer will function as a GPT if the timer api is used, and | ||
108 | it will function as watchdog if the watchdog device is used. The watchdog | ||
109 | mode has priority over the gpt mode, i.e. if the watchdog is activated, any | ||
110 | gpt api call to this timer will fail with -EBUSY. | ||
111 | |||
112 | If you add the property | ||
113 | fsl,wdt-on-boot = <n>; | ||
114 | GPT0 will be marked as in-use watchdog, i.e. blocking every gpt access to it. | ||
115 | If n>0, the watchdog is started with a timeout of n seconds. If n=0, the | ||
116 | configuration of the watchdog is not touched. This is useful in two cases: | ||
117 | - just mark GPT0 as watchdog, blocking gpt accesses, and configure it later; | ||
118 | - do not touch a configuration assigned by the boot loader which supervises | ||
119 | the boot process itself. | ||
120 | |||
121 | The watchdog will respect the CONFIG_WATCHDOG_NOWAYOUT option. | ||
107 | 122 | ||
108 | An mpc5200-gpt can be used as a single line GPIO controller. To do so, | 123 | An mpc5200-gpt can be used as a single line GPIO controller. To do so, |
109 | add the following properties to the gpt node: | 124 | add the following properties to the gpt node: |