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-rw-r--r--Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt40
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt40
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/dma.txt13
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/ssi.txt23
4 files changed, 114 insertions, 2 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt b/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt
new file mode 100644
index 000000000000..35a465362408
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt
@@ -0,0 +1,40 @@
1* Freescale 83xx and 512x PCI bridges
2
3Freescale 83xx and 512x SOCs include the same pci bridge core.
4
583xx/512x specific notes:
6- reg: should contain two address length tuples
7 The first is for the internal pci bridge registers
8 The second is for the pci config space access registers
9
10Example (MPC8313ERDB)
11 pci0: pci@e0008500 {
12 cell-index = <1>;
13 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
14 interrupt-map = <
15 /* IDSEL 0x0E -mini PCI */
16 0x7000 0x0 0x0 0x1 &ipic 18 0x8
17 0x7000 0x0 0x0 0x2 &ipic 18 0x8
18 0x7000 0x0 0x0 0x3 &ipic 18 0x8
19 0x7000 0x0 0x0 0x4 &ipic 18 0x8
20
21 /* IDSEL 0x0F - PCI slot */
22 0x7800 0x0 0x0 0x1 &ipic 17 0x8
23 0x7800 0x0 0x0 0x2 &ipic 18 0x8
24 0x7800 0x0 0x0 0x3 &ipic 17 0x8
25 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
26 interrupt-parent = <&ipic>;
27 interrupts = <66 0x8>;
28 bus-range = <0x0 0x0>;
29 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
30 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
31 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
32 clock-frequency = <66666666>;
33 #interrupt-cells = <1>;
34 #size-cells = <2>;
35 #address-cells = <3>;
36 reg = <0xe0008500 0x100 /* internal registers */
37 0xe0008300 0x8>; /* config space access registers */
38 compatible = "fsl,mpc8349-pci";
39 device_type = "pci";
40 };
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
new file mode 100644
index 000000000000..d015dcec4011
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
@@ -0,0 +1,40 @@
1GPIO controllers on MPC8xxx SoCs
2
3This is for the non-QE/CPM/GUTs GPIO controllers as found on
48349, 8572, 8610 and compatible.
5
6Every GPIO controller node must have #gpio-cells property defined,
7this information will be used to translate gpio-specifiers.
8
9Required properties:
10- compatible : "fsl,<CHIP>-gpio" followed by "fsl,mpc8349-gpio" for
11 83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx.
12- #gpio-cells : Should be two. The first cell is the pin number and the
13 second cell is used to specify optional parameters (currently unused).
14 - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
15 - interrupt-parent : Phandle for the interrupt controller that
16 services interrupts for this device.
17- gpio-controller : Marks the port as GPIO controller.
18
19Example of gpio-controller nodes for a MPC8347 SoC:
20
21 gpio1: gpio-controller@c00 {
22 #gpio-cells = <2>;
23 compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
24 reg = <0xc00 0x100>;
25 interrupts = <74 0x8>;
26 interrupt-parent = <&ipic>;
27 gpio-controller;
28 };
29
30 gpio2: gpio-controller@d00 {
31 #gpio-cells = <2>;
32 compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
33 reg = <0xd00 0x100>;
34 interrupts = <75 0x8>;
35 interrupt-parent = <&ipic>;
36 gpio-controller;
37 };
38
39See booting-without-of.txt for details of how to specify GPIO
40information for devices.
diff --git a/Documentation/powerpc/dts-bindings/fsl/dma.txt b/Documentation/powerpc/dts-bindings/fsl/dma.txt
index 86826df00e64..cc453110fc46 100644
--- a/Documentation/powerpc/dts-bindings/fsl/dma.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/dma.txt
@@ -20,7 +20,7 @@ Required properties:
20 - compatible : compatible list, contains 2 entries, first is 20 - compatible : compatible list, contains 2 entries, first is
21 "fsl,CHIP-dma-channel", where CHIP is the processor 21 "fsl,CHIP-dma-channel", where CHIP is the processor
22 (mpc8349, mpc8350, etc.) and the second is 22 (mpc8349, mpc8350, etc.) and the second is
23 "fsl,elo-dma-channel" 23 "fsl,elo-dma-channel". However, see note below.
24 - reg : <registers mapping for channel> 24 - reg : <registers mapping for channel>
25 - cell-index : dma channel index starts at 0. 25 - cell-index : dma channel index starts at 0.
26 26
@@ -82,7 +82,7 @@ Required properties:
82 - compatible : compatible list, contains 2 entries, first is 82 - compatible : compatible list, contains 2 entries, first is
83 "fsl,CHIP-dma-channel", where CHIP is the processor 83 "fsl,CHIP-dma-channel", where CHIP is the processor
84 (mpc8540, mpc8560, etc.) and the second is 84 (mpc8540, mpc8560, etc.) and the second is
85 "fsl,eloplus-dma-channel" 85 "fsl,eloplus-dma-channel". However, see note below.
86 - cell-index : dma channel index starts at 0. 86 - cell-index : dma channel index starts at 0.
87 - reg : <registers mapping for channel> 87 - reg : <registers mapping for channel>
88 - interrupts : <interrupt mapping for DMA channel IRQ> 88 - interrupts : <interrupt mapping for DMA channel IRQ>
@@ -125,3 +125,12 @@ Example:
125 interrupts = <17 2>; 125 interrupts = <17 2>;
126 }; 126 };
127 }; 127 };
128
129Note on DMA channel compatible properties: The compatible property must say
130"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
131driver (fsldma). Any DMA channel used by fsldma cannot be used by another
132DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA
133channel that should be used for another driver should not use
134"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
135example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt
136for more information.
diff --git a/Documentation/powerpc/dts-bindings/fsl/ssi.txt b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
index d100555d488a..a2d963998a65 100644
--- a/Documentation/powerpc/dts-bindings/fsl/ssi.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
@@ -24,6 +24,12 @@ Required properties:
24 "rj-master" - r.j., SSI is clock master 24 "rj-master" - r.j., SSI is clock master
25 "ac97-slave" - AC97 mode, SSI is clock slave 25 "ac97-slave" - AC97 mode, SSI is clock slave
26 "ac97-master" - AC97 mode, SSI is clock master 26 "ac97-master" - AC97 mode, SSI is clock master
27- fsl,playback-dma: phandle to a node for the DMA channel to use for
28 playback of audio. This is typically dictated by SOC
29 design. See the notes below.
30- fsl,capture-dma: phandle to a node for the DMA channel to use for
31 capture (recording) of audio. This is typically dictated
32 by SOC design. See the notes below.
27 33
28Optional properties: 34Optional properties:
29- codec-handle : phandle to a 'codec' node that defines an audio 35- codec-handle : phandle to a 'codec' node that defines an audio
@@ -36,3 +42,20 @@ Child 'codec' node required properties:
36Child 'codec' node optional properties: 42Child 'codec' node optional properties:
37- clock-frequency : The frequency of the input clock, which typically 43- clock-frequency : The frequency of the input clock, which typically
38 comes from an on-board dedicated oscillator. 44 comes from an on-board dedicated oscillator.
45
46Notes on fsl,playback-dma and fsl,capture-dma:
47
48On SOCs that have an SSI, specific DMA channels are hard-wired for playback
49and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
50playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
51playback and DMA channel 3 for capture. The developer can choose which
52DMA controller to use, but the channels themselves are hard-wired. The
53purpose of these two properties is to represent this hardware design.
54
55The device tree nodes for the DMA channels that are referenced by
56"fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
57"fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
58"fsl,mpc8610-dma-channel") can remain. If these nodes are left as
59"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA
60drivers (fsldma) will attempt to use them, and it will conflict with the
61sound drivers.