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-rw-r--r--Documentation/powerpc/dts-bindings/fsl/mpc5200.txt9
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diff --git a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
index 8447fd7090d0..b151fb1ddef0 100644
--- a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
@@ -178,3 +178,12 @@ External interrupts:
178 external irq3: interrupts = <1 3 n>; 178 external irq3: interrupts = <1 3 n>;
179'n' is sense (0: level high, 1: edge rising, 2: edge falling 3: level low) 179'n' is sense (0: level high, 1: edge rising, 2: edge falling 3: level low)
180 180
181fsl,mpc5200-mscan nodes
182-----------------------
183In addition to the required compatible-, reg- and interrupt-properites, you can
184also specify which clock shall be used for the bus:
185
186- fsl,mscan-clk-src - a string describing the clock source. Valid values
187 are "ip" for IP_CLK and "sys" for SYS_XTAL.
188 "sys" is the default in case the property is not
189 present.