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-rw-r--r--Documentation/powerpc/booting-without-of.txt189
1 files changed, 113 insertions, 76 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index ee92fedada1a..99514ced82c5 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -90,10 +90,12 @@ Table of Contents
90 3) OpenPIC Interrupt Controllers 90 3) OpenPIC Interrupt Controllers
91 4) ISA Interrupt Controllers 91 4) ISA Interrupt Controllers
92 92
93 VIII - Specifying GPIO information for devices 93 IX - Specifying GPIO information for devices
94 1) gpios property 94 1) gpios property
95 2) gpio-controller nodes 95 2) gpio-controller nodes
96 96
97 X - Specifying device power management information (sleep property)
98
97 Appendix A - Sample SOC node for MPC8540 99 Appendix A - Sample SOC node for MPC8540
98 100
99 101
@@ -2545,8 +2547,8 @@ encodings listed below:
2545 2 = high to low edge sensitive type enabled 2547 2 = high to low edge sensitive type enabled
2546 3 = low to high edge sensitive type enabled 2548 3 = low to high edge sensitive type enabled
2547 2549
2548VIII - Specifying GPIO information for devices 2550IX - Specifying GPIO information for devices
2549============================================== 2551============================================
2550 2552
25511) gpios property 25531) gpios property
2552----------------- 2554-----------------
@@ -2594,116 +2596,151 @@ Example of two SOC GPIO banks defined as gpio-controller nodes:
2594 gpio-controller; 2596 gpio-controller;
2595 }; 2597 };
2596 2598
2599X - Specifying Device Power Management Information (sleep property)
2600===================================================================
2601
2602Devices on SOCs often have mechanisms for placing devices into low-power
2603states that are decoupled from the devices' own register blocks. Sometimes,
2604this information is more complicated than a cell-index property can
2605reasonably describe. Thus, each device controlled in such a manner
2606may contain a "sleep" property which describes these connections.
2607
2608The sleep property consists of one or more sleep resources, each of
2609which consists of a phandle to a sleep controller, followed by a
2610controller-specific sleep specifier of zero or more cells.
2611
2612The semantics of what type of low power modes are possible are defined
2613by the sleep controller. Some examples of the types of low power modes
2614that may be supported are:
2615
2616 - Dynamic: The device may be disabled or enabled at any time.
2617 - System Suspend: The device may request to be disabled or remain
2618 awake during system suspend, but will not be disabled until then.
2619 - Permanent: The device is disabled permanently (until the next hard
2620 reset).
2621
2622Some devices may share a clock domain with each other, such that they should
2623only be suspended when none of the devices are in use. Where reasonable,
2624such nodes should be placed on a virtual bus, where the bus has the sleep
2625property. If the clock domain is shared among devices that cannot be
2626reasonably grouped in this manner, then create a virtual sleep controller
2627(similar to an interrupt nexus, except that defining a standardized
2628sleep-map should wait until its necessity is demonstrated).
2629
2597Appendix A - Sample SOC node for MPC8540 2630Appendix A - Sample SOC node for MPC8540
2598======================================== 2631========================================
2599 2632
2600Note that the #address-cells and #size-cells for the SoC node 2633 soc@e0000000 {
2601in this example have been explicitly listed; these are likely
2602not necessary as they are usually the same as the root node.
2603
2604 soc8540@e0000000 {
2605 #address-cells = <1>; 2634 #address-cells = <1>;
2606 #size-cells = <1>; 2635 #size-cells = <1>;
2607 #interrupt-cells = <2>; 2636 compatible = "fsl,mpc8540-ccsr", "simple-bus";
2608 device_type = "soc"; 2637 device_type = "soc";
2609 ranges = <00000000 e0000000 00100000> 2638 ranges = <0x00000000 0xe0000000 0x00100000>
2610 reg = <e0000000 00003000>;
2611 bus-frequency = <0>; 2639 bus-frequency = <0>;
2612 2640 interrupt-parent = <&pic>;
2613 mdio@24520 {
2614 reg = <24520 20>;
2615 device_type = "mdio";
2616 compatible = "gianfar";
2617
2618 ethernet-phy@0 {
2619 linux,phandle = <2452000>
2620 interrupt-parent = <40000>;
2621 interrupts = <35 1>;
2622 reg = <0>;
2623 device_type = "ethernet-phy";
2624 };
2625
2626 ethernet-phy@1 {
2627 linux,phandle = <2452001>
2628 interrupt-parent = <40000>;
2629 interrupts = <35 1>;
2630 reg = <1>;
2631 device_type = "ethernet-phy";
2632 };
2633
2634 ethernet-phy@3 {
2635 linux,phandle = <2452002>
2636 interrupt-parent = <40000>;
2637 interrupts = <35 1>;
2638 reg = <3>;
2639 device_type = "ethernet-phy";
2640 };
2641
2642 };
2643 2641
2644 ethernet@24000 { 2642 ethernet@24000 {
2645 #size-cells = <0>; 2643 #address-cells = <1>;
2644 #size-cells = <1>;
2646 device_type = "network"; 2645 device_type = "network";
2647 model = "TSEC"; 2646 model = "TSEC";
2648 compatible = "gianfar"; 2647 compatible = "gianfar", "simple-bus";
2649 reg = <24000 1000>; 2648 reg = <0x24000 0x1000>;
2650 mac-address = [ 00 E0 0C 00 73 00 ]; 2649 local-mac-address = [ 00 E0 0C 00 73 00 ];
2651 interrupts = <d 3 e 3 12 3>; 2650 interrupts = <29 2 30 2 34 2>;
2652 interrupt-parent = <40000>; 2651 phy-handle = <&phy0>;
2653 phy-handle = <2452000>; 2652 sleep = <&pmc 00000080>;
2653 ranges;
2654
2655 mdio@24520 {
2656 reg = <0x24520 0x20>;
2657 compatible = "fsl,gianfar-mdio";
2658
2659 phy0: ethernet-phy@0 {
2660 interrupts = <5 1>;
2661 reg = <0>;
2662 device_type = "ethernet-phy";
2663 };
2664
2665 phy1: ethernet-phy@1 {
2666 interrupts = <5 1>;
2667 reg = <1>;
2668 device_type = "ethernet-phy";
2669 };
2670
2671 phy3: ethernet-phy@3 {
2672 interrupts = <7 1>;
2673 reg = <3>;
2674 device_type = "ethernet-phy";
2675 };
2676 };
2654 }; 2677 };
2655 2678
2656 ethernet@25000 { 2679 ethernet@25000 {
2657 #address-cells = <1>;
2658 #size-cells = <0>;
2659 device_type = "network"; 2680 device_type = "network";
2660 model = "TSEC"; 2681 model = "TSEC";
2661 compatible = "gianfar"; 2682 compatible = "gianfar";
2662 reg = <25000 1000>; 2683 reg = <0x25000 0x1000>;
2663 mac-address = [ 00 E0 0C 00 73 01 ]; 2684 local-mac-address = [ 00 E0 0C 00 73 01 ];
2664 interrupts = <13 3 14 3 18 3>; 2685 interrupts = <13 2 14 2 18 2>;
2665 interrupt-parent = <40000>; 2686 phy-handle = <&phy1>;
2666 phy-handle = <2452001>; 2687 sleep = <&pmc 00000040>;
2667 }; 2688 };
2668 2689
2669 ethernet@26000 { 2690 ethernet@26000 {
2670 #address-cells = <1>;
2671 #size-cells = <0>;
2672 device_type = "network"; 2691 device_type = "network";
2673 model = "FEC"; 2692 model = "FEC";
2674 compatible = "gianfar"; 2693 compatible = "gianfar";
2675 reg = <26000 1000>; 2694 reg = <0x26000 0x1000>;
2676 mac-address = [ 00 E0 0C 00 73 02 ]; 2695 local-mac-address = [ 00 E0 0C 00 73 02 ];
2677 interrupts = <19 3>; 2696 interrupts = <41 2>;
2678 interrupt-parent = <40000>; 2697 phy-handle = <&phy3>;
2679 phy-handle = <2452002>; 2698 sleep = <&pmc 00000020>;
2680 }; 2699 };
2681 2700
2682 serial@4500 { 2701 serial@4500 {
2683 device_type = "serial"; 2702 #address-cells = <1>;
2684 compatible = "ns16550"; 2703 #size-cells = <1>;
2685 reg = <4500 100>; 2704 compatible = "fsl,mpc8540-duart", "simple-bus";
2686 clock-frequency = <0>; 2705 sleep = <&pmc 00000002>;
2687 interrupts = <1a 3>; 2706 ranges;
2688 interrupt-parent = <40000>; 2707
2708 serial@4500 {
2709 device_type = "serial";
2710 compatible = "ns16550";
2711 reg = <0x4500 0x100>;
2712 clock-frequency = <0>;
2713 interrupts = <42 2>;
2714 };
2715
2716 serial@4600 {
2717 device_type = "serial";
2718 compatible = "ns16550";
2719 reg = <0x4600 0x100>;
2720 clock-frequency = <0>;
2721 interrupts = <42 2>;
2722 };
2689 }; 2723 };
2690 2724
2691 pic@40000 { 2725 pic: pic@40000 {
2692 linux,phandle = <40000>;
2693 interrupt-controller; 2726 interrupt-controller;
2694 #address-cells = <0>; 2727 #address-cells = <0>;
2695 reg = <40000 40000>; 2728 #interrupt-cells = <2>;
2729 reg = <0x40000 0x40000>;
2696 compatible = "chrp,open-pic"; 2730 compatible = "chrp,open-pic";
2697 device_type = "open-pic"; 2731 device_type = "open-pic";
2698 }; 2732 };
2699 2733
2700 i2c@3000 { 2734 i2c@3000 {
2701 interrupt-parent = <40000>; 2735 interrupts = <43 2>;
2702 interrupts = <1b 3>; 2736 reg = <0x3000 0x100>;
2703 reg = <3000 18>;
2704 device_type = "i2c";
2705 compatible = "fsl-i2c"; 2737 compatible = "fsl-i2c";
2706 dfsrr; 2738 dfsrr;
2739 sleep = <&pmc 00000004>;
2707 }; 2740 };
2708 2741
2742 pmc: power@e0070 {
2743 compatible = "fsl,mpc8540-pmc", "fsl,mpc8548-pmc";
2744 reg = <0xe0070 0x20>;
2745 };
2709 }; 2746 };