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Diffstat (limited to 'Documentation/powerpc/booting-without-of.txt')
-rw-r--r-- | Documentation/powerpc/booting-without-of.txt | 336 |
1 files changed, 299 insertions, 37 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index 838fd323e797..a96e85397eb7 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt | |||
@@ -50,7 +50,7 @@ Table of Contents | |||
50 | g) Freescale SOC SEC Security Engines | 50 | g) Freescale SOC SEC Security Engines |
51 | h) Board Control and Status (BCSR) | 51 | h) Board Control and Status (BCSR) |
52 | i) Freescale QUICC Engine module (QE) | 52 | i) Freescale QUICC Engine module (QE) |
53 | j) Flash chip nodes | 53 | j) CFI or JEDEC memory-mapped NOR flash |
54 | k) Global Utilities Block | 54 | k) Global Utilities Block |
55 | 55 | ||
56 | VII - Specifying interrupt information for devices | 56 | VII - Specifying interrupt information for devices |
@@ -1510,7 +1510,10 @@ platforms are moved over to use the flattened-device-tree model. | |||
1510 | 1510 | ||
1511 | i) Freescale QUICC Engine module (QE) | 1511 | i) Freescale QUICC Engine module (QE) |
1512 | This represents qe module that is installed on PowerQUICC II Pro. | 1512 | This represents qe module that is installed on PowerQUICC II Pro. |
1513 | Hopefully it will merge backward compatibility with CPM/CPM2. | 1513 | |
1514 | NOTE: This is an interim binding; it should be updated to fit | ||
1515 | in with the CPM binding later in this document. | ||
1516 | |||
1514 | Basically, it is a bus of devices, that could act more or less | 1517 | Basically, it is a bus of devices, that could act more or less |
1515 | as a complete entity (UCC, USB etc ). All of them should be siblings on | 1518 | as a complete entity (UCC, USB etc ). All of them should be siblings on |
1516 | the "root" qe node, using the common properties from there. | 1519 | the "root" qe node, using the common properties from there. |
@@ -1548,7 +1551,7 @@ platforms are moved over to use the flattened-device-tree model. | |||
1548 | Required properties: | 1551 | Required properties: |
1549 | - device_type : should be "spi". | 1552 | - device_type : should be "spi". |
1550 | - compatible : should be "fsl_spi". | 1553 | - compatible : should be "fsl_spi". |
1551 | - mode : the SPI operation mode, it can be "cpu" or "qe". | 1554 | - mode : the SPI operation mode, it can be "cpu" or "cpu-qe". |
1552 | - reg : Offset and length of the register set for the device | 1555 | - reg : Offset and length of the register set for the device |
1553 | - interrupts : <a b> where a is the interrupt number and b is a | 1556 | - interrupts : <a b> where a is the interrupt number and b is a |
1554 | field that represents an encoding of the sense and level | 1557 | field that represents an encoding of the sense and level |
@@ -1757,45 +1760,69 @@ platforms are moved over to use the flattened-device-tree model. | |||
1757 | }; | 1760 | }; |
1758 | }; | 1761 | }; |
1759 | 1762 | ||
1760 | j) Flash chip nodes | 1763 | j) CFI or JEDEC memory-mapped NOR flash |
1761 | 1764 | ||
1762 | Flash chips (Memory Technology Devices) are often used for solid state | 1765 | Flash chips (Memory Technology Devices) are often used for solid state |
1763 | file systems on embedded devices. | 1766 | file systems on embedded devices. |
1764 | 1767 | ||
1765 | Required properties: | 1768 | - compatible : should contain the specific model of flash chip(s) |
1766 | 1769 | used, if known, followed by either "cfi-flash" or "jedec-flash" | |
1767 | - device_type : has to be "rom" | 1770 | - reg : Address range of the flash chip |
1768 | - compatible : Should specify what this flash device is compatible with. | 1771 | - bank-width : Width (in bytes) of the flash bank. Equal to the |
1769 | Currently, this is most likely to be "direct-mapped" (which | 1772 | device width times the number of interleaved chips. |
1770 | corresponds to the MTD physmap mapping driver). | 1773 | - device-width : (optional) Width of a single flash chip. If |
1771 | - reg : Offset and length of the register set (or memory mapping) for | 1774 | omitted, assumed to be equal to 'bank-width'. |
1772 | the device. | 1775 | - #address-cells, #size-cells : Must be present if the flash has |
1773 | - bank-width : Width of the flash data bus in bytes. Required | 1776 | sub-nodes representing partitions (see below). In this case |
1774 | for the NOR flashes (compatible == "direct-mapped" and others) ONLY. | 1777 | both #address-cells and #size-cells must be equal to 1. |
1775 | 1778 | ||
1776 | Recommended properties : | 1779 | For JEDEC compatible devices, the following additional properties |
1777 | 1780 | are defined: | |
1778 | - partitions : Several pairs of 32-bit values where the first value is | 1781 | |
1779 | partition's offset from the start of the device and the second one is | 1782 | - vendor-id : Contains the flash chip's vendor id (1 byte). |
1780 | partition size in bytes with LSB used to signify a read only | 1783 | - device-id : Contains the flash chip's device id (1 byte). |
1781 | partition (so, the partition size should always be an even number). | 1784 | |
1782 | - partition-names : The list of concatenated zero terminated strings | 1785 | In addition to the information on the flash bank itself, the |
1783 | representing the partition names. | 1786 | device tree may optionally contain additional information |
1784 | - probe-type : The type of probe which should be done for the chip | 1787 | describing partitions of the flash address space. This can be |
1785 | (JEDEC vs CFI actually). Valid ONLY for NOR flashes. | 1788 | used on platforms which have strong conventions about which |
1789 | portions of the flash are used for what purposes, but which don't | ||
1790 | use an on-flash partition table such as RedBoot. | ||
1791 | |||
1792 | Each partition is represented as a sub-node of the flash device. | ||
1793 | Each node's name represents the name of the corresponding | ||
1794 | partition of the flash device. | ||
1795 | |||
1796 | Flash partitions | ||
1797 | - reg : The partition's offset and size within the flash bank. | ||
1798 | - label : (optional) The label / name for this flash partition. | ||
1799 | If omitted, the label is taken from the node name (excluding | ||
1800 | the unit address). | ||
1801 | - read-only : (optional) This parameter, if present, is a hint to | ||
1802 | Linux that this flash partition should only be mounted | ||
1803 | read-only. This is usually used for flash partitions | ||
1804 | containing early-boot firmware images or data which should not | ||
1805 | be clobbered. | ||
1786 | 1806 | ||
1787 | Example: | 1807 | Example: |
1788 | 1808 | ||
1789 | flash@ff000000 { | 1809 | flash@ff000000 { |
1790 | device_type = "rom"; | 1810 | compatible = "amd,am29lv128ml", "cfi-flash"; |
1791 | compatible = "direct-mapped"; | 1811 | reg = <ff000000 01000000>; |
1792 | probe-type = "CFI"; | 1812 | bank-width = <4>; |
1793 | reg = <ff000000 01000000>; | 1813 | device-width = <1>; |
1794 | bank-width = <4>; | 1814 | #address-cells = <1>; |
1795 | partitions = <00000000 00f80000 | 1815 | #size-cells = <1>; |
1796 | 00f80000 00080001>; | 1816 | fs@0 { |
1797 | partition-names = "fs\0firmware"; | 1817 | label = "fs"; |
1798 | }; | 1818 | reg = <0 f80000>; |
1819 | }; | ||
1820 | firmware@f80000 { | ||
1821 | label ="firmware"; | ||
1822 | reg = <f80000 80000>; | ||
1823 | read-only; | ||
1824 | }; | ||
1825 | }; | ||
1799 | 1826 | ||
1800 | k) Global Utilities Block | 1827 | k) Global Utilities Block |
1801 | 1828 | ||
@@ -1824,8 +1851,243 @@ platforms are moved over to use the flattened-device-tree model. | |||
1824 | fsl,has-rstcr; | 1851 | fsl,has-rstcr; |
1825 | }; | 1852 | }; |
1826 | 1853 | ||
1854 | l) Freescale Communications Processor Module | ||
1855 | |||
1856 | NOTE: This is an interim binding, and will likely change slightly, | ||
1857 | as more devices are supported. The QE bindings especially are | ||
1858 | incomplete. | ||
1859 | |||
1860 | i) Root CPM node | ||
1861 | |||
1862 | Properties: | ||
1863 | - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe". | ||
1864 | - reg : A 48-byte region beginning with CPCR. | ||
1865 | |||
1866 | Example: | ||
1867 | cpm@119c0 { | ||
1868 | #address-cells = <1>; | ||
1869 | #size-cells = <1>; | ||
1870 | #interrupt-cells = <2>; | ||
1871 | compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; | ||
1872 | reg = <119c0 30>; | ||
1873 | } | ||
1874 | |||
1875 | ii) Properties common to mulitple CPM/QE devices | ||
1876 | |||
1877 | - fsl,cpm-command : This value is ORed with the opcode and command flag | ||
1878 | to specify the device on which a CPM command operates. | ||
1879 | |||
1880 | - fsl,cpm-brg : Indicates which baud rate generator the device | ||
1881 | is associated with. If absent, an unused BRG | ||
1882 | should be dynamically allocated. If zero, the | ||
1883 | device uses an external clock rather than a BRG. | ||
1884 | |||
1885 | - reg : Unless otherwise specified, the first resource represents the | ||
1886 | scc/fcc/ucc registers, and the second represents the device's | ||
1887 | parameter RAM region (if it has one). | ||
1888 | |||
1889 | iii) Serial | ||
1890 | |||
1891 | Currently defined compatibles: | ||
1892 | - fsl,cpm1-smc-uart | ||
1893 | - fsl,cpm2-smc-uart | ||
1894 | - fsl,cpm1-scc-uart | ||
1895 | - fsl,cpm2-scc-uart | ||
1896 | - fsl,qe-uart | ||
1897 | |||
1898 | Example: | ||
1899 | |||
1900 | serial@11a00 { | ||
1901 | device_type = "serial"; | ||
1902 | compatible = "fsl,mpc8272-scc-uart", | ||
1903 | "fsl,cpm2-scc-uart"; | ||
1904 | reg = <11a00 20 8000 100>; | ||
1905 | interrupts = <28 8>; | ||
1906 | interrupt-parent = <&PIC>; | ||
1907 | fsl,cpm-brg = <1>; | ||
1908 | fsl,cpm-command = <00800000>; | ||
1909 | }; | ||
1910 | |||
1911 | iii) Network | ||
1912 | |||
1913 | Currently defined compatibles: | ||
1914 | - fsl,cpm1-scc-enet | ||
1915 | - fsl,cpm2-scc-enet | ||
1916 | - fsl,cpm1-fec-enet | ||
1917 | - fsl,cpm2-fcc-enet (third resource is GFEMR) | ||
1918 | - fsl,qe-enet | ||
1919 | |||
1920 | Example: | ||
1921 | |||
1922 | ethernet@11300 { | ||
1923 | device_type = "network"; | ||
1924 | compatible = "fsl,mpc8272-fcc-enet", | ||
1925 | "fsl,cpm2-fcc-enet"; | ||
1926 | reg = <11300 20 8400 100 11390 1>; | ||
1927 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
1928 | interrupts = <20 8>; | ||
1929 | interrupt-parent = <&PIC>; | ||
1930 | phy-handle = <&PHY0>; | ||
1931 | linux,network-index = <0>; | ||
1932 | fsl,cpm-command = <12000300>; | ||
1933 | }; | ||
1934 | |||
1935 | iv) MDIO | ||
1936 | |||
1937 | Currently defined compatibles: | ||
1938 | fsl,pq1-fec-mdio (reg is same as first resource of FEC device) | ||
1939 | fsl,cpm2-mdio-bitbang (reg is port C registers) | ||
1940 | |||
1941 | Properties for fsl,cpm2-mdio-bitbang: | ||
1942 | fsl,mdio-pin : pin of port C controlling mdio data | ||
1943 | fsl,mdc-pin : pin of port C controlling mdio clock | ||
1944 | |||
1945 | Example: | ||
1946 | |||
1947 | mdio@10d40 { | ||
1948 | device_type = "mdio"; | ||
1949 | compatible = "fsl,mpc8272ads-mdio-bitbang", | ||
1950 | "fsl,mpc8272-mdio-bitbang", | ||
1951 | "fsl,cpm2-mdio-bitbang"; | ||
1952 | reg = <10d40 14>; | ||
1953 | #address-cells = <1>; | ||
1954 | #size-cells = <0>; | ||
1955 | fsl,mdio-pin = <12>; | ||
1956 | fsl,mdc-pin = <13>; | ||
1957 | }; | ||
1958 | |||
1959 | v) Baud Rate Generators | ||
1960 | |||
1961 | Currently defined compatibles: | ||
1962 | fsl,cpm-brg | ||
1963 | fsl,cpm1-brg | ||
1964 | fsl,cpm2-brg | ||
1965 | |||
1966 | Properties: | ||
1967 | - reg : There may be an arbitrary number of reg resources; BRG | ||
1968 | numbers are assigned to these in order. | ||
1969 | - clock-frequency : Specifies the base frequency driving | ||
1970 | the BRG. | ||
1971 | |||
1972 | Example: | ||
1973 | |||
1974 | brg@119f0 { | ||
1975 | compatible = "fsl,mpc8272-brg", | ||
1976 | "fsl,cpm2-brg", | ||
1977 | "fsl,cpm-brg"; | ||
1978 | reg = <119f0 10 115f0 10>; | ||
1979 | clock-frequency = <d#25000000>; | ||
1980 | }; | ||
1981 | |||
1982 | vi) Interrupt Controllers | ||
1983 | |||
1984 | Currently defined compatibles: | ||
1985 | - fsl,cpm1-pic | ||
1986 | - only one interrupt cell | ||
1987 | - fsl,pq1-pic | ||
1988 | - fsl,cpm2-pic | ||
1989 | - second interrupt cell is level/sense: | ||
1990 | - 2 is falling edge | ||
1991 | - 8 is active low | ||
1992 | |||
1993 | Example: | ||
1994 | |||
1995 | interrupt-controller@10c00 { | ||
1996 | #interrupt-cells = <2>; | ||
1997 | interrupt-controller; | ||
1998 | reg = <10c00 80>; | ||
1999 | compatible = "mpc8272-pic", "fsl,cpm2-pic"; | ||
2000 | }; | ||
2001 | |||
2002 | vii) USB (Universal Serial Bus Controller) | ||
2003 | |||
2004 | Properties: | ||
2005 | - compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb" | ||
2006 | |||
2007 | Example: | ||
2008 | usb@11bc0 { | ||
2009 | #address-cells = <1>; | ||
2010 | #size-cells = <0>; | ||
2011 | compatible = "fsl,cpm2-usb"; | ||
2012 | reg = <11b60 18 8b00 100>; | ||
2013 | interrupts = <b 8>; | ||
2014 | interrupt-parent = <&PIC>; | ||
2015 | fsl,cpm-command = <2e600000>; | ||
2016 | }; | ||
2017 | |||
2018 | viii) Multi-User RAM (MURAM) | ||
2019 | |||
2020 | The multi-user/dual-ported RAM is expressed as a bus under the CPM node. | ||
2021 | |||
2022 | Ranges must be set up subject to the following restrictions: | ||
2023 | |||
2024 | - Children's reg nodes must be offsets from the start of all muram, even | ||
2025 | if the user-data area does not begin at zero. | ||
2026 | - If multiple range entries are used, the difference between the parent | ||
2027 | address and the child address must be the same in all, so that a single | ||
2028 | mapping can cover them all while maintaining the ability to determine | ||
2029 | CPM-side offsets with pointer subtraction. It is recommended that | ||
2030 | multiple range entries not be used. | ||
2031 | - A child address of zero must be translatable, even if no reg resources | ||
2032 | contain it. | ||
2033 | |||
2034 | A child "data" node must exist, compatible with "fsl,cpm-muram-data", to | ||
2035 | indicate the portion of muram that is usable by the OS for arbitrary | ||
2036 | purposes. The data node may have an arbitrary number of reg resources, | ||
2037 | all of which contribute to the allocatable muram pool. | ||
2038 | |||
2039 | Example, based on mpc8272: | ||
2040 | |||
2041 | muram@0 { | ||
2042 | #address-cells = <1>; | ||
2043 | #size-cells = <1>; | ||
2044 | ranges = <0 0 10000>; | ||
2045 | |||
2046 | data@0 { | ||
2047 | compatible = "fsl,cpm-muram-data"; | ||
2048 | reg = <0 2000 9800 800>; | ||
2049 | }; | ||
2050 | }; | ||
2051 | |||
2052 | m) Chipselect/Local Bus | ||
2053 | |||
2054 | Properties: | ||
2055 | - name : Should be localbus | ||
2056 | - #address-cells : Should be either two or three. The first cell is the | ||
2057 | chipselect number, and the remaining cells are the | ||
2058 | offset into the chipselect. | ||
2059 | - #size-cells : Either one or two, depending on how large each chipselect | ||
2060 | can be. | ||
2061 | - ranges : Each range corresponds to a single chipselect, and cover | ||
2062 | the entire access window as configured. | ||
2063 | |||
2064 | Example: | ||
2065 | localbus@f0010100 { | ||
2066 | compatible = "fsl,mpc8272ads-localbus", | ||
2067 | "fsl,mpc8272-localbus", | ||
2068 | "fsl,pq2-localbus"; | ||
2069 | #address-cells = <2>; | ||
2070 | #size-cells = <1>; | ||
2071 | reg = <f0010100 40>; | ||
2072 | |||
2073 | ranges = <0 0 fe000000 02000000 | ||
2074 | 1 0 f4500000 00008000>; | ||
2075 | |||
2076 | flash@0,0 { | ||
2077 | compatible = "jedec-flash"; | ||
2078 | reg = <0 0 2000000>; | ||
2079 | bank-width = <4>; | ||
2080 | device-width = <1>; | ||
2081 | }; | ||
2082 | |||
2083 | board-control@1,0 { | ||
2084 | reg = <1 0 20>; | ||
2085 | compatible = "fsl,mpc8272ads-bcsr"; | ||
2086 | }; | ||
2087 | }; | ||
2088 | |||
1827 | 2089 | ||
1828 | h) 4xx/Axon EMAC ethernet nodes | 2090 | n) 4xx/Axon EMAC ethernet nodes |
1829 | 2091 | ||
1830 | The EMAC ethernet controller in IBM and AMCC 4xx chips, and also | 2092 | The EMAC ethernet controller in IBM and AMCC 4xx chips, and also |
1831 | the Axon bridge. To operate this needs to interact with a ths | 2093 | the Axon bridge. To operate this needs to interact with a ths |