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-rw-r--r--Documentation/mips/00-INDEX2
-rw-r--r--Documentation/mips/GT64120.README65
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2 - this file. 2 - this file.
3AU1xxx_IDE.README 3AU1xxx_IDE.README
4 - README for MIPS AU1XXX IDE driver. 4 - README for MIPS AU1XXX IDE driver.
5GT64120.README
6 - README for dir with info on MIPS boards using GT-64120 or GT-64120A.
diff --git a/Documentation/mips/GT64120.README b/Documentation/mips/GT64120.README
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1README for arch/mips/gt64120 directory and subdirectories
2
3Jun Sun, jsun@mvista.com or jsun@junsun.net
401/27, 2001
5
6MOTIVATION
7----------
8
9Many MIPS boards share the same system controller (or CPU companian chip),
10such as GT-64120. It is highly desirable to let these boards share
11the same controller code instead of duplicating them.
12
13This directory is meant to hold all MIPS boards that use GT-64120 or GT-64120A.
14
15
16HOW TO ADD A BOARD
17------------------
18
19. Create a subdirectory include/asm/gt64120/<board>.
20
21. Create a file called gt64120_dep.h under that directory.
22
23. Modify include/asm/gt64120/gt64120.h file to include the new gt64120_dep.h
24 based on config options. The board-dep section is at the end of
25 include/asm/gt64120/gt64120.h file. There you can find all required
26 definitions include/asm/gt64120/<board>/gt64120_dep.h file must supply.
27
28. Create a subdirectory arch/mips/gt64120/<board> directory to hold
29 board specific routines.
30
31. The GT-64120 common code is supplied under arch/mips/gt64120/common directory.
32 It includes:
33 1) arch/mips/gt64120/pci.c -
34 common PCI routine, include the top-level pcibios_init()
35 2) arch/mips/gt64120/irq.c -
36 common IRQ routine, include the top-level do_IRQ()
37 [This part really belongs to arch/mips/kernel. jsun]
38 3) arch/mips/gt64120/gt_irq.c -
39 common IRQ routines for GT-64120 chip. Currently it only handles
40 the timer interrupt.
41
42. Board-specific routines are supplied under arch/mips/gt64120/<board> dir.
43 1) arch/mips/gt64120/<board>/pci.c - it provides bus fixup routine
44 2) arch/mips/gt64120/<board>/irq.c - it provides enable/disable irqs
45 and board irq setup routine (irq_setup)
46 3) arch/mips/gt64120/<board>/int-handler.S -
47 The first-level interrupt dispatching routine.
48 4) a bunch of other "normal" stuff (setup, prom, dbg_io, reset, etc)
49
50. Follow other "normal" procedure to modify configuration files, etc.
51
52
53TO-DO LIST
54----------
55
56. Expand arch/mips/gt64120/gt_irq.c to handle all GT-64120 interrupts.
57 We probably need to introduce GT_IRQ_BASE in board-dep header file,
58 which is used the starting irq_nr for all GT irqs.
59
60 A function, gt64120_handle_irq(), will be added so that the first-level
61 irq dispatcher will call this function if it detects an interrupt
62 from GT-64120.
63
64. More support for GT-64120 PCI features (2nd PCI bus, perhaps)
65