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Diffstat (limited to 'Documentation/memory-barriers.txt')
| -rw-r--r-- | Documentation/memory-barriers.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 46b9b389df35..a60f3ce474e3 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt | |||
| @@ -1915,7 +1915,7 @@ Whilst most CPUs do imply a data dependency barrier on the read when a memory | |||
| 1915 | access depends on a read, not all do, so it may not be relied on. | 1915 | access depends on a read, not all do, so it may not be relied on. |
| 1916 | 1916 | ||
| 1917 | Other CPUs may also have split caches, but must coordinate between the various | 1917 | Other CPUs may also have split caches, but must coordinate between the various |
| 1918 | cachelets for normal memory accesss. The semantics of the Alpha removes the | 1918 | cachelets for normal memory accesses. The semantics of the Alpha removes the |
| 1919 | need for coordination in absence of memory barriers. | 1919 | need for coordination in absence of memory barriers. |
| 1920 | 1920 | ||
| 1921 | 1921 | ||