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Diffstat (limited to 'Documentation/i2c/chips/smsc47b397')
-rw-r--r-- | Documentation/i2c/chips/smsc47b397 | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/Documentation/i2c/chips/smsc47b397 b/Documentation/i2c/chips/smsc47b397 index 4737bb6109da..da9d80c96432 100644 --- a/Documentation/i2c/chips/smsc47b397 +++ b/Documentation/i2c/chips/smsc47b397 | |||
@@ -1,7 +1,19 @@ | |||
1 | Kernel driver smsc47b397 | ||
2 | ======================== | ||
3 | |||
4 | Supported chips: | ||
5 | * SMSC LPC47B397-NC | ||
6 | Prefix: 'smsc47b397' | ||
7 | Addresses scanned: none, address read from Super I/O config space | ||
8 | Datasheet: In this file | ||
9 | |||
10 | Authors: Mark M. Hoffman <mhoffman@lightlink.com> | ||
11 | Utilitek Systems, Inc. | ||
12 | |||
1 | November 23, 2004 | 13 | November 23, 2004 |
2 | 14 | ||
3 | The following specification describes the SMSC LPC47B397-NC sensor chip | 15 | The following specification describes the SMSC LPC47B397-NC sensor chip |
4 | (for which there is no public datasheet available). This document was | 16 | (for which there is no public datasheet available). This document was |
5 | provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected | 17 | provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected |
6 | by Mark M. Hoffman <mhoffman@lightlink.com>. | 18 | by Mark M. Hoffman <mhoffman@lightlink.com>. |
7 | 19 | ||
@@ -10,10 +22,10 @@ by Mark M. Hoffman <mhoffman@lightlink.com>. | |||
10 | Methods for detecting the HP SIO and reading the thermal data on a dc7100. | 22 | Methods for detecting the HP SIO and reading the thermal data on a dc7100. |
11 | 23 | ||
12 | The thermal information on the dc7100 is contained in the SIO Hardware Monitor | 24 | The thermal information on the dc7100 is contained in the SIO Hardware Monitor |
13 | (HWM). The information is accessed through an index/data pair. The index/data | 25 | (HWM). The information is accessed through an index/data pair. The index/data |
14 | pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The | 26 | pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The |
15 | HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB) | 27 | HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB) |
16 | and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and | 28 | and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and |
17 | 0x480 and 0x481 for the index/data pair. | 29 | 0x480 and 0x481 for the index/data pair. |
18 | 30 | ||
19 | Reading temperature information. | 31 | Reading temperature information. |
@@ -50,7 +62,7 @@ Reading the tach LSB locks the tach MSB. | |||
50 | The LSB Must be read first. | 62 | The LSB Must be read first. |
51 | 63 | ||
52 | How to convert the tach reading to RPM. | 64 | How to convert the tach reading to RPM. |
53 | The tach reading (TCount) is given by: (Tach MSB * 256) + (Tach LSB) | 65 | The tach reading (TCount) is given by: (Tach MSB * 256) + (Tach LSB) |
54 | The SIO counts the number of 90kHz (11.111us) pulses per revolution. | 66 | The SIO counts the number of 90kHz (11.111us) pulses per revolution. |
55 | RPM = 60/(TCount * 11.111us) | 67 | RPM = 60/(TCount * 11.111us) |
56 | 68 | ||