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1 | Kernel driver smsc47b397 | ||
2 | ======================== | ||
3 | |||
4 | Supported chips: | ||
5 | * SMSC LPC47B397-NC | ||
6 | Prefix: 'smsc47b397' | ||
7 | Addresses scanned: none, address read from Super I/O config space | ||
8 | Datasheet: In this file | ||
9 | |||
10 | Authors: Mark M. Hoffman <mhoffman@lightlink.com> | ||
11 | Utilitek Systems, Inc. | ||
12 | |||
13 | November 23, 2004 | ||
14 | |||
15 | The following specification describes the SMSC LPC47B397-NC sensor chip | ||
16 | (for which there is no public datasheet available). This document was | ||
17 | provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected | ||
18 | by Mark M. Hoffman <mhoffman@lightlink.com>. | ||
19 | |||
20 | * * * * * | ||
21 | |||
22 | Methods for detecting the HP SIO and reading the thermal data on a dc7100. | ||
23 | |||
24 | The thermal information on the dc7100 is contained in the SIO Hardware Monitor | ||
25 | (HWM). The information is accessed through an index/data pair. The index/data | ||
26 | pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The | ||
27 | HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB) | ||
28 | and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and | ||
29 | 0x480 and 0x481 for the index/data pair. | ||
30 | |||
31 | Reading temperature information. | ||
32 | The temperature information is located in the following registers: | ||
33 | Temp1 0x25 (Currently, this reflects the CPU temp on all systems). | ||
34 | Temp2 0x26 | ||
35 | Temp3 0x27 | ||
36 | Temp4 0x80 | ||
37 | |||
38 | Programming Example | ||
39 | The following is an example of how to read the HWM temperature registers: | ||
40 | MOV DX,480H | ||
41 | MOV AX,25H | ||
42 | OUT DX,AL | ||
43 | MOV DX,481H | ||
44 | IN AL,DX | ||
45 | |||
46 | AL contains the data in hex, the temperature in Celsius is the decimal | ||
47 | equivalent. | ||
48 | |||
49 | Ex: If AL contains 0x2A, the temperature is 42 degrees C. | ||
50 | |||
51 | Reading tach information. | ||
52 | The fan speed information is located in the following registers: | ||
53 | LSB MSB | ||
54 | Tach1 0x28 0x29 (Currently, this reflects the CPU | ||
55 | fan speed on all systems). | ||
56 | Tach2 0x2A 0x2B | ||
57 | Tach3 0x2C 0x2D | ||
58 | Tach4 0x2E 0x2F | ||
59 | |||
60 | Important!!! | ||
61 | Reading the tach LSB locks the tach MSB. | ||
62 | The LSB Must be read first. | ||
63 | |||
64 | How to convert the tach reading to RPM. | ||
65 | The tach reading (TCount) is given by: (Tach MSB * 256) + (Tach LSB) | ||
66 | The SIO counts the number of 90kHz (11.111us) pulses per revolution. | ||
67 | RPM = 60/(TCount * 11.111us) | ||
68 | |||
69 | Example: | ||
70 | Reg 0x28 = 0x9B | ||
71 | Reg 0x29 = 0x08 | ||
72 | |||
73 | TCount = 0x89B = 2203 | ||
74 | |||
75 | RPM = 60 / (2203 * 11.11111 E-6) = 2451 RPM | ||
76 | |||
77 | Obtaining the SIO version. | ||
78 | |||
79 | CONFIGURATION SEQUENCE | ||
80 | To program the configuration registers, the following sequence must be followed: | ||
81 | 1. Enter Configuration Mode | ||
82 | 2. Configure the Configuration Registers | ||
83 | 3. Exit Configuration Mode. | ||
84 | |||
85 | Enter Configuration Mode | ||
86 | To place the chip into the Configuration State The config key (0x55) is written | ||
87 | to the CONFIG PORT (0x2E). | ||
88 | |||
89 | Configuration Mode | ||
90 | In configuration mode, the INDEX PORT is located at the CONFIG PORT address and | ||
91 | the DATA PORT is at INDEX PORT address + 1. | ||
92 | |||
93 | The desired configuration registers are accessed in two steps: | ||
94 | a. Write the index of the Logical Device Number Configuration Register | ||
95 | (i.e., 0x07) to the INDEX PORT and then write the number of the | ||
96 | desired logical device to the DATA PORT. | ||
97 | |||
98 | b. Write the address of the desired configuration register within the | ||
99 | logical device to the INDEX PORT and then write or read the config- | ||
100 | uration register through the DATA PORT. | ||
101 | |||
102 | Note: If accessing the Global Configuration Registers, step (a) is not required. | ||
103 | |||
104 | Exit Configuration Mode | ||
105 | To exit the Configuration State the write 0xAA to the CONFIG PORT (0x2E). | ||
106 | The chip returns to the RUN State. (This is important). | ||
107 | |||
108 | Programming Example | ||
109 | The following is an example of how to read the SIO Device ID located at 0x20 | ||
110 | |||
111 | ; ENTER CONFIGURATION MODE | ||
112 | MOV DX,02EH | ||
113 | MOV AX,055H | ||
114 | OUT DX,AL | ||
115 | ; GLOBAL CONFIGURATION REGISTER | ||
116 | MOV DX,02EH | ||
117 | MOV AL,20H | ||
118 | OUT DX,AL | ||
119 | ; READ THE DATA | ||
120 | MOV DX,02FH | ||
121 | IN AL,DX | ||
122 | ; EXIT CONFIGURATION MODE | ||
123 | MOV DX,02EH | ||
124 | MOV AX,0AAH | ||
125 | OUT DX,AL | ||
126 | |||
127 | The registers of interest for identifying the SIO on the dc7100 are Device ID | ||
128 | (0x20) and Device Rev (0x21). | ||
129 | |||
130 | The Device ID will read 0X6F | ||
131 | The Device Rev currently reads 0x01 | ||
132 | |||
133 | Obtaining the HWM Base Address. | ||
134 | The following is an example of how to read the HWM Base Address located in | ||
135 | Logical Device 8. | ||
136 | |||
137 | ; ENTER CONFIGURATION MODE | ||
138 | MOV DX,02EH | ||
139 | MOV AX,055H | ||
140 | OUT DX,AL | ||
141 | ; CONFIGURE REGISTER CRE0, | ||
142 | ; LOGICAL DEVICE 8 | ||
143 | MOV DX,02EH | ||
144 | MOV AL,07H | ||
145 | OUT DX,AL ;Point to LD# Config Reg | ||
146 | MOV DX,02FH | ||
147 | MOV AL, 08H | ||
148 | OUT DX,AL;Point to Logical Device 8 | ||
149 | ; | ||
150 | MOV DX,02EH | ||
151 | MOV AL,60H | ||
152 | OUT DX,AL ; Point to HWM Base Addr MSB | ||
153 | MOV DX,02FH | ||
154 | IN AL,DX ; Get MSB of HWM Base Addr | ||
155 | ; EXIT CONFIGURATION MODE | ||
156 | MOV DX,02EH | ||
157 | MOV AX,0AAH | ||
158 | OUT DX,AL | ||