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-rw-r--r--Documentation/gpio.txt133
1 files changed, 121 insertions, 12 deletions
diff --git a/Documentation/gpio.txt b/Documentation/gpio.txt
index 6bc2ba215df9..8da724e2a0ff 100644
--- a/Documentation/gpio.txt
+++ b/Documentation/gpio.txt
@@ -32,7 +32,7 @@ The exact capabilities of GPIOs vary between systems. Common options:
32 - Input values are likewise readable (1, 0). Some chips support readback 32 - Input values are likewise readable (1, 0). Some chips support readback
33 of pins configured as "output", which is very useful in such "wire-OR" 33 of pins configured as "output", which is very useful in such "wire-OR"
34 cases (to support bidirectional signaling). GPIO controllers may have 34 cases (to support bidirectional signaling). GPIO controllers may have
35 input de-glitch logic, sometimes with software controls. 35 input de-glitch/debounce logic, sometimes with software controls.
36 36
37 - Inputs can often be used as IRQ signals, often edge triggered but 37 - Inputs can often be used as IRQ signals, often edge triggered but
38 sometimes level triggered. Such IRQs may be configurable as system 38 sometimes level triggered. Such IRQs may be configurable as system
@@ -60,10 +60,13 @@ used on a board that's wired differently. Only least-common-denominator
60functionality can be very portable. Other features are platform-specific, 60functionality can be very portable. Other features are platform-specific,
61and that can be critical for glue logic. 61and that can be critical for glue logic.
62 62
63Plus, this doesn't define an implementation framework, just an interface. 63Plus, this doesn't require any implementation framework, just an interface.
64One platform might implement it as simple inline functions accessing chip 64One platform might implement it as simple inline functions accessing chip
65registers; another might implement it by delegating through abstractions 65registers; another might implement it by delegating through abstractions
66used for several very different kinds of GPIO controller. 66used for several very different kinds of GPIO controller. (There is some
67optional code supporting such an implementation strategy, described later
68in this document, but drivers acting as clients to the GPIO interface must
69not care how it's implemented.)
67 70
68That said, if the convention is supported on their platform, drivers should 71That said, if the convention is supported on their platform, drivers should
69use it when possible. Platforms should declare GENERIC_GPIO support in 72use it when possible. Platforms should declare GENERIC_GPIO support in
@@ -121,6 +124,11 @@ before tasking is enabled, as part of early board setup.
121For output GPIOs, the value provided becomes the initial output value. 124For output GPIOs, the value provided becomes the initial output value.
122This helps avoid signal glitching during system startup. 125This helps avoid signal glitching during system startup.
123 126
127For compatibility with legacy interfaces to GPIOs, setting the direction
128of a GPIO implicitly requests that GPIO (see below) if it has not been
129requested already. That compatibility may be removed in the future;
130explicitly requesting GPIOs is strongly preferred.
131
124Setting the direction can fail if the GPIO number is invalid, or when 132Setting the direction can fail if the GPIO number is invalid, or when
125that particular GPIO can't be used in that mode. It's generally a bad 133that particular GPIO can't be used in that mode. It's generally a bad
126idea to rely on boot firmware to have set the direction correctly, since 134idea to rely on boot firmware to have set the direction correctly, since
@@ -133,6 +141,7 @@ Spinlock-Safe GPIO access
133------------------------- 141-------------------------
134Most GPIO controllers can be accessed with memory read/write instructions. 142Most GPIO controllers can be accessed with memory read/write instructions.
135That doesn't need to sleep, and can safely be done from inside IRQ handlers. 143That doesn't need to sleep, and can safely be done from inside IRQ handlers.
144(That includes hardirq contexts on RT kernels.)
136 145
137Use these calls to access such GPIOs: 146Use these calls to access such GPIOs:
138 147
@@ -145,7 +154,7 @@ Use these calls to access such GPIOs:
145The values are boolean, zero for low, nonzero for high. When reading the 154The values are boolean, zero for low, nonzero for high. When reading the
146value of an output pin, the value returned should be what's seen on the 155value of an output pin, the value returned should be what's seen on the
147pin ... that won't always match the specified output value, because of 156pin ... that won't always match the specified output value, because of
148issues including wire-OR and output latencies. 157issues including open-drain signaling and output latencies.
149 158
150The get/set calls have no error returns because "invalid GPIO" should have 159The get/set calls have no error returns because "invalid GPIO" should have
151been reported earlier from gpio_direction_*(). However, note that not all 160been reported earlier from gpio_direction_*(). However, note that not all
@@ -170,7 +179,8 @@ get to the head of a queue to transmit a command and get its response.
170This requires sleeping, which can't be done from inside IRQ handlers. 179This requires sleeping, which can't be done from inside IRQ handlers.
171 180
172Platforms that support this type of GPIO distinguish them from other GPIOs 181Platforms that support this type of GPIO distinguish them from other GPIOs
173by returning nonzero from this call: 182by returning nonzero from this call (which requires a valid GPIO number,
183either explicitly or implicitly requested):
174 184
175 int gpio_cansleep(unsigned gpio); 185 int gpio_cansleep(unsigned gpio);
176 186
@@ -209,8 +219,11 @@ before tasking is enabled, as part of early board setup.
209These calls serve two basic purposes. One is marking the signals which 219These calls serve two basic purposes. One is marking the signals which
210are actually in use as GPIOs, for better diagnostics; systems may have 220are actually in use as GPIOs, for better diagnostics; systems may have
211several hundred potential GPIOs, but often only a dozen are used on any 221several hundred potential GPIOs, but often only a dozen are used on any
212given board. Another is to catch conflicts between drivers, reporting 222given board. Another is to catch conflicts, identifying errors when
213errors when drivers wrongly think they have exclusive use of that signal. 223(a) two or more drivers wrongly think they have exclusive use of that
224signal, or (b) something wrongly believes it's safe to remove drivers
225needed to manage a signal that's in active use. That is, requesting a
226GPIO can serve as a kind of lock.
214 227
215These two calls are optional because not not all current Linux platforms 228These two calls are optional because not not all current Linux platforms
216offer such functionality in their GPIO support; a valid implementation 229offer such functionality in their GPIO support; a valid implementation
@@ -223,6 +236,9 @@ Note that requesting a GPIO does NOT cause it to be configured in any
223way; it just marks that GPIO as in use. Separate code must handle any 236way; it just marks that GPIO as in use. Separate code must handle any
224pin setup (e.g. controlling which pin the GPIO uses, pullup/pulldown). 237pin setup (e.g. controlling which pin the GPIO uses, pullup/pulldown).
225 238
239Also note that it's your responsibility to have stopped using a GPIO
240before you free it.
241
226 242
227GPIOs mapped to IRQs 243GPIOs mapped to IRQs
228-------------------- 244--------------------
@@ -238,7 +254,7 @@ map between them using calls like:
238 254
239Those return either the corresponding number in the other namespace, or 255Those return either the corresponding number in the other namespace, or
240else a negative errno code if the mapping can't be done. (For example, 256else a negative errno code if the mapping can't be done. (For example,
241some GPIOs can't used as IRQs.) It is an unchecked error to use a GPIO 257some GPIOs can't be used as IRQs.) It is an unchecked error to use a GPIO
242number that wasn't set up as an input using gpio_direction_input(), or 258number that wasn't set up as an input using gpio_direction_input(), or
243to use an IRQ number that didn't originally come from gpio_to_irq(). 259to use an IRQ number that didn't originally come from gpio_to_irq().
244 260
@@ -299,17 +315,110 @@ Related to multiplexing is configuration and enabling of the pullups or
299pulldowns integrated on some platforms. Not all platforms support them, 315pulldowns integrated on some platforms. Not all platforms support them,
300or support them in the same way; and any given board might use external 316or support them in the same way; and any given board might use external
301pullups (or pulldowns) so that the on-chip ones should not be used. 317pullups (or pulldowns) so that the on-chip ones should not be used.
318(When a circuit needs 5 kOhm, on-chip 100 kOhm resistors won't do.)
302 319
303There are other system-specific mechanisms that are not specified here, 320There are other system-specific mechanisms that are not specified here,
304like the aforementioned options for input de-glitching and wire-OR output. 321like the aforementioned options for input de-glitching and wire-OR output.
305Hardware may support reading or writing GPIOs in gangs, but that's usually 322Hardware may support reading or writing GPIOs in gangs, but that's usually
306configuration dependent: for GPIOs sharing the same bank. (GPIOs are 323configuration dependent: for GPIOs sharing the same bank. (GPIOs are
307commonly grouped in banks of 16 or 32, with a given SOC having several such 324commonly grouped in banks of 16 or 32, with a given SOC having several such
308banks.) Some systems can trigger IRQs from output GPIOs. Code relying on 325banks.) Some systems can trigger IRQs from output GPIOs, or read values
309such mechanisms will necessarily be nonportable. 326from pins not managed as GPIOs. Code relying on such mechanisms will
327necessarily be nonportable.
310 328
311Dynamic definition of GPIOs is not currently supported; for example, as 329Dynamic definition of GPIOs is not currently standard; for example, as
312a side effect of configuring an add-on board with some GPIO expanders. 330a side effect of configuring an add-on board with some GPIO expanders.
313 331
314These calls are purely for kernel space, but a userspace API could be built 332These calls are purely for kernel space, but a userspace API could be built
315on top of it. 333on top of them.
334
335
336GPIO implementor's framework (OPTIONAL)
337=======================================
338As noted earlier, there is an optional implementation framework making it
339easier for platforms to support different kinds of GPIO controller using
340the same programming interface.
341
342As a debugging aid, if debugfs is available a /sys/kernel/debug/gpio file
343will be found there. That will list all the controllers registered through
344this framework, and the state of the GPIOs currently in use.
345
346
347Controller Drivers: gpio_chip
348-----------------------------
349In this framework each GPIO controller is packaged as a "struct gpio_chip"
350with information common to each controller of that type:
351
352 - methods to establish GPIO direction
353 - methods used to access GPIO values
354 - flag saying whether calls to its methods may sleep
355 - optional debugfs dump method (showing extra state like pullup config)
356 - label for diagnostics
357
358There is also per-instance data, which may come from device.platform_data:
359the number of its first GPIO, and how many GPIOs it exposes.
360
361The code implementing a gpio_chip should support multiple instances of the
362controller, possibly using the driver model. That code will configure each
363gpio_chip and issue gpiochip_add(). Removing a GPIO controller should be
364rare; use gpiochip_remove() when it is unavoidable.
365
366Most often a gpio_chip is part of an instance-specific structure with state
367not exposed by the GPIO interfaces, such as addressing, power management,
368and more. Chips such as codecs will have complex non-GPIO state,
369
370Any debugfs dump method should normally ignore signals which haven't been
371requested as GPIOs. They can use gpiochip_is_requested(), which returns
372either NULL or the label associated with that GPIO when it was requested.
373
374
375Platform Support
376----------------
377To support this framework, a platform's Kconfig will "select HAVE_GPIO_LIB"
378and arrange that its <asm/gpio.h> includes <asm-generic/gpio.h> and defines
379three functions: gpio_get_value(), gpio_set_value(), and gpio_cansleep().
380They may also want to provide a custom value for ARCH_NR_GPIOS.
381
382Trivial implementations of those functions can directly use framework
383code, which always dispatches through the gpio_chip:
384
385 #define gpio_get_value __gpio_get_value
386 #define gpio_set_value __gpio_set_value
387 #define gpio_cansleep __gpio_cansleep
388
389Fancier implementations could instead define those as inline functions with
390logic optimizing access to specific SOC-based GPIOs. For example, if the
391referenced GPIO is the constant "12", getting or setting its value could
392cost as little as two or three instructions, never sleeping. When such an
393optimization is not possible those calls must delegate to the framework
394code, costing at least a few dozen instructions. For bitbanged I/O, such
395instruction savings can be significant.
396
397For SOCs, platform-specific code defines and registers gpio_chip instances
398for each bank of on-chip GPIOs. Those GPIOs should be numbered/labeled to
399match chip vendor documentation, and directly match board schematics. They
400may well start at zero and go up to a platform-specific limit. Such GPIOs
401are normally integrated into platform initialization to make them always be
402available, from arch_initcall() or earlier; they can often serve as IRQs.
403
404
405Board Support
406-------------
407For external GPIO controllers -- such as I2C or SPI expanders, ASICs, multi
408function devices, FPGAs or CPLDs -- most often board-specific code handles
409registering controller devices and ensures that their drivers know what GPIO
410numbers to use with gpiochip_add(). Their numbers often start right after
411platform-specific GPIOs.
412
413For example, board setup code could create structures identifying the range
414of GPIOs that chip will expose, and passes them to each GPIO expander chip
415using platform_data. Then the chip driver's probe() routine could pass that
416data to gpiochip_add().
417
418Initialization order can be important. For example, when a device relies on
419an I2C-based GPIO, its probe() routine should only be called after that GPIO
420becomes available. That may mean the device should not be registered until
421calls for that GPIO can work. One way to address such dependencies is for
422such gpio_chip controllers to provide setup() and teardown() callbacks to
423board specific code; those board specific callbacks would register devices
424once all the necessary resources are available.