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1SH7760/SH7763 integrated LCDC Framebuffer driver
2================================================
3
40. Overwiew
5-----------
6The SH7760/SH7763 have an integrated LCD Display controller (LCDC) which
7supports (in theory) resolutions ranging from 1x1 to 1024x1024,
8with color depths ranging from 1 to 16 bits, on STN, DSTN and TFT Panels.
9
10Caveats:
11* Framebuffer memory must be a large chunk allocated at the top
12 of Area3 (HW requirement). Because of this requirement you should NOT
13 make the driver a module since at runtime it may become impossible to
14 get a large enough contiguous chunk of memory.
15
16* The driver does not support changing resolution while loaded
17 (displays aren't hotpluggable anyway)
18
19* Heavy flickering may be observed
20 a) if you're using 15/16bit color modes at >= 640x480 px resolutions,
21 b) during PCMCIA (or any other slow bus) activity.
22
23* Rotation works only 90degress clockwise, and only if horizontal
24 resolution is <= 320 pixels.
25
26files: drivers/video/sh7760fb.c
27 include/asm-sh/sh7760fb.h
28 Documentation/fb/sh7760fb.txt
29
301. Platform setup
31-----------------
32SH7760:
33 Video data is fetched via the DMABRG DMA engine, so you have to
34 configure the SH DMAC for DMABRG mode (write 0x94808080 to the
35 DMARSRA register somewhere at boot).
36
37 PFC registers PCCR and PCDR must be set to peripheral mode.
38 (write zeros to both).
39
40The driver does NOT do the above for you since board setup is, well, job
41of the board setup code.
42
432. Panel definitions
44--------------------
45The LCDC must explicitly be told about the type of LCD panel
46attached. Data must be wrapped in a "struct sh7760fb_platdata" and
47passed to the driver as platform_data.
48
49Suggest you take a closer look at the SH7760 Manual, Section 30.
50(http://documentation.renesas.com/eng/products/mpumcu/e602291_sh7760.pdf)
51
52The following code illustrates what needs to be done to
53get the framebuffer working on a 640x480 TFT:
54
55====================== cut here ======================================
56
57#include <linux/fb.h>
58#include <asm/sh7760fb.h>
59
60/*
61 * NEC NL6440bc26-01 640x480 TFT
62 * dotclock 25175 kHz
63 * Xres 640 Yres 480
64 * Htotal 800 Vtotal 525
65 * HsynStart 656 VsynStart 490
66 * HsynLenn 30 VsynLenn 2
67 *
68 * The linux framebuffer layer does not use the syncstart/synclen
69 * values but right/left/upper/lower margin values. The comments
70 * for the x_margin explain how to calculate those from given
71 * panel sync timings.
72 */
73static struct fb_videomode nl6448bc26 = {
74 .name = "NL6448BC26",
75 .refresh = 60,
76 .xres = 640,
77 .yres = 480,
78 .pixclock = 39683, /* in picoseconds! */
79 .hsync_len = 30,
80 .vsync_len = 2,
81 .left_margin = 114, /* HTOT - (HSYNSLEN + HSYNSTART) */
82 .right_margin = 16, /* HSYNSTART - XRES */
83 .upper_margin = 33, /* VTOT - (VSYNLEN + VSYNSTART) */
84 .lower_margin = 10, /* VSYNSTART - YRES */
85 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
86 .vmode = FB_VMODE_NONINTERLACED,
87 .flag = 0,
88};
89
90static struct sh7760fb_platdata sh7760fb_nl6448 = {
91 .def_mode = &nl6448bc26,
92 .ldmtr = LDMTR_TFT_COLOR_16, /* 16bit TFT panel */
93 .lddfr = LDDFR_8BPP, /* we want 8bit output */
94 .ldpmmr = 0x0070,
95 .ldpspr = 0x0500,
96 .ldaclnr = 0,
97 .ldickr = LDICKR_CLKSRC(LCDC_CLKSRC_EXTERNAL) |
98 LDICKR_CLKDIV(1),
99 .rotate = 0,
100 .novsync = 1,
101 .blank = NULL,
102};
103
104/* SH7760:
105 * 0xFE300800: 256 * 4byte xRGB palette ram
106 * 0xFE300C00: 42 bytes ctrl registers
107 */
108static struct resource sh7760_lcdc_res[] = {
109 [0] = {
110 .start = 0xFE300800,
111 .end = 0xFE300CFF,
112 .flags = IORESOURCE_MEM,
113 },
114 [1] = {
115 .start = 65,
116 .end = 65,
117 .flags = IORESOURCE_IRQ,
118 },
119};
120
121static struct platform_device sh7760_lcdc_dev = {
122 .dev = {
123 .platform_data = &sh7760fb_nl6448,
124 },
125 .name = "sh7760-lcdc",
126 .id = -1,
127 .resource = sh7760_lcdc_res,
128 .num_resources = ARRAY_SIZE(sh7760_lcdc_res),
129};
130
131====================== cut here ======================================