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-rw-r--r--Documentation/devicetree/bindings/dma/apm-xgene-dma.txt47
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1Applied Micro X-Gene SoC DMA nodes
2
3DMA nodes are defined to describe on-chip DMA interfaces in
4APM X-Gene SoC.
5
6Required properties for DMA interfaces:
7- compatible: Should be "apm,xgene-dma".
8- device_type: set to "dma".
9- reg: Address and length of the register set for the device.
10 It contains the information of registers in the following order:
11 1st - DMA control and status register address space.
12 2nd - Descriptor ring control and status register address space.
13 3rd - Descriptor ring command register address space.
14 4th - Soc efuse register address space.
15- interrupts: DMA has 5 interrupts sources. 1st interrupt is
16 DMA error reporting interrupt. 2nd, 3rd, 4th and 5th interrupts
17 are completion interrupts for each DMA channels.
18- clocks: Reference to the clock entry.
19
20Optional properties:
21- dma-coherent : Present if dma operations are coherent
22
23Example:
24 dmaclk: dmaclk@1f27c000 {
25 compatible = "apm,xgene-device-clock";
26 #clock-cells = <1>;
27 clocks = <&socplldiv2 0>;
28 reg = <0x0 0x1f27c000 0x0 0x1000>;
29 reg-names = "csr-reg";
30 clock-output-names = "dmaclk";
31 };
32
33 dma: dma@1f270000 {
34 compatible = "apm,xgene-storm-dma";
35 device_type = "dma";
36 reg = <0x0 0x1f270000 0x0 0x10000>,
37 <0x0 0x1f200000 0x0 0x10000>,
38 <0x0 0x1b008000 0x0 0x2000>,
39 <0x0 0x1054a000 0x0 0x100>;
40 interrupts = <0x0 0x82 0x4>,
41 <0x0 0xb8 0x4>,
42 <0x0 0xb9 0x4>,
43 <0x0 0xba 0x4>,
44 <0x0 0xbb 0x4>;
45 dma-coherent;
46 clocks = <&dmaclk 0>;
47 };